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bcm27xx: add linux 5.4 support
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.4 / 950-0053-BCM2708-Add-core-Device-Tree-support.patch
1 From 1a6116aa1fc2a19a001fbffffb196bcc9f5d0e39 Mon Sep 17 00:00:00 2001
2 From: notro <notro@tronnes.org>
3 Date: Wed, 9 Jul 2014 14:46:08 +0200
4 Subject: [PATCH] BCM2708: Add core Device Tree support
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Add the bare minimum needed to boot BCM2708 from a Device Tree.
10
11 Signed-off-by: Noralf Tronnes <notro@tronnes.org>
12
13 BCM2708: DT: change 'axi' nodename to 'soc'
14
15 Change DT node named 'axi' to 'soc' so it matches ARCH_BCM2835.
16 The VC4 bootloader fills in certain properties in the 'axi' subtree,
17 but since this is part of an upstreaming effort, the name is changed.
18
19 Signed-off-by: Noralf Tronnes notro@tronnes.org
20
21 BCM2708_DT: Correct length of the peripheral space
22
23 Use dts-dirs feature for overlays.
24
25 The kernel makefiles have a dts-dirs target that is for vendor subdirectories.
26
27 Using this fixes the install_dtbs target, which previously did not install the overlays.
28
29 BCM270X_DT: configure I2S DMA channels
30
31 Signed-off-by: Matthias Reichl <hias@horus.com>
32
33 BCM270X_DT: switch to bcm2835-i2s
34
35 I2S soundcard drivers with proper devicetree support (i.e. not linking
36 to the cpu_dai/platform via name but to cpu/platform via of_node)
37 will work out of the box without any modifications.
38
39 When the kernel is compiled without devicetree support the platform
40 code will instantiate the bcm2708-i2s driver and I2S soundcard drivers
41 will link to it via name, as before.
42
43 Signed-off-by: Matthias Reichl <hias@horus.com>
44
45 SDIO-overlay: add poll_once-boolean parameter
46
47 Add paramter to toggle sdio-device-polling
48 done every second or once at boot-time.
49
50 Signed-off-by: Patrick Boettcher <patrick.boettcher@posteo.de>
51
52 BCM270X_DT: Make mmc overlay compatible with current firmware
53
54 The original DT overlay logic followed a merge-then-patch procedure,
55 i.e. parameters are applied to the loaded overlay before the overlay
56 is merged into the base DTB. This sequence has been changed to
57 patch-then-merge, in order to support parameterised node names, and
58 to protect against bad overlays. As a result, overrides (parameters)
59 must only target labels in the overlay, but the overlay can obviously target nodes in the base DTB.
60
61 mmc-overlay.dts (that switches back to the original mmc sdcard
62 driver) is the only overlay violating that rule, and this patch
63 fixes it.
64
65 bcm270x_dt: Use the sdhost MMC controller by default
66
67 The "mmc" overlay reverts to using the other controller.
68
69 squash: Add cprman to dt
70
71 BCM270X_DT: Use clk_core for I2C interfaces
72
73 BCM270X_DT: Use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi
74
75 The mainline Device Tree files are quite close to downstream now.
76 Let's use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi as base files
77 for our dts files.
78
79 Mainline dts files are based on these files:
80
81 bcm2835-rpi.dtsi
82 bcm2835.dtsi bcm2836.dtsi
83 bcm283x.dtsi
84
85 Current downstream are based on these:
86
87 bcm2708.dtsi bcm2709.dtsi bcm2710.dtsi
88 bcm2708_common.dtsi
89
90 This patch introduces this dependency:
91
92 bcm2708.dtsi bcm2709.dtsi
93 bcm2708-rpi.dtsi
94 bcm270x.dtsi
95 bcm2835.dtsi bcm2836.dtsi
96 bcm283x.dtsi
97
98 And:
99 bcm2710.dtsi
100 bcm2708-rpi.dtsi
101 bcm270x.dtsi
102 bcm283x.dtsi
103
104 bcm270x.dtsi contains the downstream bcm283x.dtsi diff.
105 bcm2708-rpi.dtsi is the downstream version of bcm2835-rpi.dtsi.
106
107 Other changes:
108 - The led node has moved from /soc/leds to /leds. This is not a problem
109 since the label is used to reference it.
110 - The clk_osc reg property changes from 6 to 3.
111 - The gpu nodes has their interrupt property set in the base file.
112 - the clocks label does not point to the /clocks node anymore, but
113 points to the cprman node. This is not a problem since the overlays
114 that use the clock node refer to it directly: target-path = "/clocks";
115 - some nodes now have 2 labels since mainline and downstream differs in
116 this respect: cprman/clocks, spi0/spi, gpu/vc4.
117 - some nodes doesn't have an explicit status = "okay" since they're not
118 disabled in the base file: watchdog and random.
119 - gpiomem doesn't need an explicit status = "okay".
120 - bcm2708-rpi-cm.dts got the hpd-gpios property from bcm2708_common.dtsi,
121 it's now set directly in that file.
122 - bcm2709-rpi-2-b.dts has the timer node moved from /soc/timer to /timer.
123 - Removed clock-frequency property on the bcm{2709,2710}.dtsi timer nodes.
124
125 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
126
127 BCM270X_DT: Use raspberrypi-power to turn on USB power
128
129 Use the raspberrypi-power driver to turn on USB power.
130
131 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
132
133 BCM270X_DT: Add a .dtbo target, use for overlays
134
135 Change the filenames and extensions to keep the pre-DDT style of
136 overlay (<name>-overlay.dtb) distinct from new ones that use a
137 different style of local fixups (<name>.dtbo), and to match other
138 platforms.
139
140 The RPi firmware uses the DDTK trailer atom to choose which type of
141 overlay to use for each kernel.
142
143 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
144
145 BCM270X_DT: Don't generate "linux,phandle" props
146
147 The EPAPR standard says to use "phandle" properties to store phandles,
148 rather than the deprecated "linux,phandle" version. By default, dtc
149 generates both, but adding "-H epapr" causes it to only generate
150 "phandle"s, saving some space and clutter.
151
152 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
153
154 BCM270X_DT: Add overlay for enc28j60 on SPI2
155
156 Works on SPI2 for compute module
157
158 BCM270X_DT: Add midi-uart0 overlay
159
160 MIDI requires 31.25kbaud, a baudrate unsupported by Linux. The
161 midi-uart0 overlay configures uart0 (ttyAMA0) to use a fake clock
162 so that requesting 38.4kbaud actually gets 31.25kbaud.
163
164 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
165
166 BCM270X_DT: Add i2c-sensor overlay
167
168 The i2c-sensor overlay is a container for various pressure and
169 temperature sensors, currently bmp085 and bmp280. The standalone
170 bmp085_i2c-sensor overlay is now deprecated.
171
172 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
173
174 BCM270X_DT: overlays/*-overlay.dtb -> overlays/*.dtbo (#1752)
175
176 We now create overlays as .dtbo files.
177
178 build: support for .dtbo files for dtb overlays
179
180 Kernel 4.4.6+ on RaspberryPi support .dtbo files for overlays, instead of .dtb.
181 Patch the kernel, which has faulty rules to generate .dtbo the way yocto does
182
183 Signed-off-by: Herve Jourdain <herve.jourdain@neuf.fr>
184 Signed-off-by: Khem Raj <raj.khem@gmail.com>
185
186 BCM270X: Drop position requirement for CMA in VC4 overlay.
187
188 No longer necessary since 2aefcd576195a739a7a256099571c9c4a401005f,
189 and will probably let peeople that want to choose a larger CMA
190 allocation (particularly on pi0/1).
191
192 Signed-off-by: Eric Anholt <eric@anholt.net>
193
194 BCM270X_DT: RPi Device Tree tidy
195
196 Use the upstream sdhost node, add thermal-zones, and factor out some
197 common elements.
198
199 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
200
201 kbuild: Silence unhelpful DTC warnings
202
203 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
204
205 BCM270X_DT: DT build rules no longer arch-specific
206
207 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
208 ---
209 .gitignore | 1 +
210 arch/arm/boot/dts/Makefile | 25 +
211 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 125 +
212 arch/arm/boot/dts/bcm2708-rpi-b.dts | 115 +
213 arch/arm/boot/dts/bcm2708-rpi-cm.dts | 98 +
214 arch/arm/boot/dts/bcm2708-rpi-cm.dtsi | 18 +
215 arch/arm/boot/dts/bcm2708-rpi-zero-w.dts | 163 ++
216 arch/arm/boot/dts/bcm2708-rpi-zero.dts | 118 +
217 arch/arm/boot/dts/bcm2708-rpi.dtsi | 154 +
218 arch/arm/boot/dts/bcm2708.dtsi | 10 +
219 arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 125 +
220 arch/arm/boot/dts/bcm2709-rpi.dtsi | 5 +
221 arch/arm/boot/dts/bcm2709.dtsi | 18 +
222 arch/arm/boot/dts/bcm270x.dtsi | 165 ++
223 arch/arm/boot/dts/bcm2710-rpi-2-b.dts | 125 +
224 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 183 ++
225 arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 194 ++
226 arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 135 +
227 arch/arm/boot/dts/bcm2710.dtsi | 25 +
228 arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 338 +++
229 arch/arm/boot/dts/bcm2711-rpi.dtsi | 7 +
230 arch/arm/boot/dts/bcm2711.dtsi | 44 +
231 arch/arm/boot/dts/bcm2835-common.dtsi | 54 +
232 arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 1 +
233 arch/arm/boot/dts/bcm2835-rpi-a.dts | 1 +
234 arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 1 +
235 arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 1 +
236 arch/arm/boot/dts/bcm2835-rpi-b.dts | 1 +
237 arch/arm/boot/dts/bcm2835-rpi-zero.dts | 1 +
238 arch/arm/boot/dts/bcm2835-rpi.dtsi | 33 +
239 arch/arm/boot/dts/bcm2835.dtsi | 1 +
240 arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 1 +
241 arch/arm/boot/dts/bcm2836.dtsi | 1 +
242 arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 +
243 arch/arm/boot/dts/bcm2837.dtsi | 1 +
244 arch/arm/boot/dts/bcm2838-rpi-4-b.dts | 118 +
245 arch/arm/boot/dts/bcm2838-rpi.dtsi | 25 +
246 arch/arm/boot/dts/bcm2838.dtsi | 746 +++++
247 arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi | 8 +
248 arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi | 8 +
249 arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi | 8 +
250 arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 15 +
251 arch/arm/boot/dts/bcm283x.dtsi | 76 +-
252 arch/arm/boot/dts/overlays/Makefile | 194 ++
253 arch/arm/boot/dts/overlays/README | 2591 +++++++++++++++++
254 .../arm/boot/dts/overlays/act-led-overlay.dts | 27 +
255 .../dts/overlays/adau1977-adc-overlay.dts | 40 +
256 .../dts/overlays/adau7002-simple-overlay.dts | 52 +
257 .../arm/boot/dts/overlays/ads1015-overlay.dts | 98 +
258 .../arm/boot/dts/overlays/ads1115-overlay.dts | 103 +
259 .../arm/boot/dts/overlays/ads7846-overlay.dts | 89 +
260 .../boot/dts/overlays/adv7282m-overlay.dts | 81 +
261 .../boot/dts/overlays/adv728x-m-overlay.dts | 37 +
262 .../overlays/akkordion-iqdacplus-overlay.dts | 49 +
263 .../allo-boss-dac-pcm512x-audio-overlay.dts | 59 +
264 .../dts/overlays/allo-digione-overlay.dts | 44 +
265 .../allo-katana-dac-audio-overlay.dts | 57 +
266 .../allo-piano-dac-pcm512x-audio-overlay.dts | 54 +
267 ...o-piano-dac-plus-pcm512x-audio-overlay.dts | 55 +
268 .../boot/dts/overlays/applepi-dac-overlay.dts | 57 +
269 .../boot/dts/overlays/at86rf233-overlay.dts | 57 +
270 .../overlays/audioinjector-addons-overlay.dts | 60 +
271 .../overlays/audioinjector-ultra-overlay.dts | 71 +
272 .../audioinjector-wm8731-audio-overlay.dts | 39 +
273 .../dts/overlays/audiosense-pi-overlay.dts | 82 +
274 .../boot/dts/overlays/audremap-overlay.dts | 35 +
275 .../boot/dts/overlays/balena-fin-overlay.dts | 122 +
276 .../overlays/bmp085_i2c-sensor-overlay.dts | 23 +
277 arch/arm/boot/dts/overlays/dht11-overlay.dts | 39 +
278 .../dts/overlays/dionaudio-loco-overlay.dts | 39 +
279 .../overlays/dionaudio-loco-v2-overlay.dts | 49 +
280 .../boot/dts/overlays/disable-bt-overlay.dts | 55 +
281 .../dts/overlays/disable-wifi-overlay.dts | 20 +
282 arch/arm/boot/dts/overlays/dpi18-overlay.dts | 39 +
283 arch/arm/boot/dts/overlays/dpi24-overlay.dts | 39 +
284 arch/arm/boot/dts/overlays/draws-overlay.dts | 200 ++
285 .../arm/boot/dts/overlays/dwc-otg-overlay.dts | 14 +
286 arch/arm/boot/dts/overlays/dwc2-overlay.dts | 26 +
287 .../boot/dts/overlays/enc28j60-overlay.dts | 53 +
288 .../dts/overlays/enc28j60-spi2-overlay.dts | 47 +
289 .../arm/boot/dts/overlays/exc3000-overlay.dts | 48 +
290 .../boot/dts/overlays/fe-pi-audio-overlay.dts | 70 +
291 arch/arm/boot/dts/overlays/goodix-overlay.dts | 46 +
292 .../googlevoicehat-soundcard-overlay.dts | 49 +
293 .../boot/dts/overlays/gpio-fan-overlay.dts | 79 +
294 .../arm/boot/dts/overlays/gpio-ir-overlay.dts | 48 +
295 .../boot/dts/overlays/gpio-ir-tx-overlay.dts | 36 +
296 .../boot/dts/overlays/gpio-key-overlay.dts | 48 +
297 .../overlays/gpio-no-bank0-irq-overlay.dts | 14 +
298 .../boot/dts/overlays/gpio-no-irq-overlay.dts | 14 +
299 .../dts/overlays/gpio-poweroff-overlay.dts | 36 +
300 .../dts/overlays/gpio-shutdown-overlay.dts | 82 +
301 .../boot/dts/overlays/hd44780-lcd-overlay.dts | 46 +
302 .../dts/overlays/hifiberry-amp-overlay.dts | 39 +
303 .../dts/overlays/hifiberry-dac-overlay.dts | 34 +
304 .../overlays/hifiberry-dacplus-overlay.dts | 59 +
305 .../overlays/hifiberry-dacplusadc-overlay.dts | 71 +
306 .../hifiberry-dacplusadcpro-overlay.dts | 64 +
307 .../overlays/hifiberry-dacplusdsp-overlay.dts | 34 +
308 .../dts/overlays/hifiberry-digi-overlay.dts | 41 +
309 .../overlays/hifiberry-digi-pro-overlay.dts | 43 +
310 arch/arm/boot/dts/overlays/hy28a-overlay.dts | 93 +
311 .../boot/dts/overlays/hy28b-2017-overlay.dts | 152 +
312 arch/arm/boot/dts/overlays/hy28b-overlay.dts | 148 +
313 .../boot/dts/overlays/i-sabre-q2m-overlay.dts | 39 +
314 .../boot/dts/overlays/i2c-bcm2708-overlay.dts | 13 +
315 .../boot/dts/overlays/i2c-gpio-overlay.dts | 45 +
316 .../arm/boot/dts/overlays/i2c-mux-overlay.dts | 139 +
317 .../dts/overlays/i2c-pwm-pca9685a-overlay.dts | 26 +
318 .../dts/overlays/i2c-rtc-gpio-overlay.dts | 244 ++
319 .../arm/boot/dts/overlays/i2c-rtc-overlay.dts | 225 ++
320 .../boot/dts/overlays/i2c-sensor-overlay.dts | 239 ++
321 .../dts/overlays/i2c0-bcm2708-overlay.dts | 14 +
322 arch/arm/boot/dts/overlays/i2c0-overlay.dts | 61 +
323 .../dts/overlays/i2c1-bcm2708-overlay.dts | 9 +
324 arch/arm/boot/dts/overlays/i2c1-overlay.dts | 44 +
325 arch/arm/boot/dts/overlays/i2c3-overlay.dts | 36 +
326 arch/arm/boot/dts/overlays/i2c4-overlay.dts | 36 +
327 arch/arm/boot/dts/overlays/i2c5-overlay.dts | 36 +
328 arch/arm/boot/dts/overlays/i2c6-overlay.dts | 36 +
329 .../dts/overlays/i2s-gpio28-31-overlay.dts | 18 +
330 .../boot/dts/overlays/ilitek251x-overlay.dts | 45 +
331 arch/arm/boot/dts/overlays/imx219-overlay.dts | 129 +
332 .../dts/overlays/iqaudio-codec-overlay.dts | 42 +
333 .../boot/dts/overlays/iqaudio-dac-overlay.dts | 46 +
334 .../dts/overlays/iqaudio-dacplus-overlay.dts | 49 +
335 .../iqaudio-digi-wm8804-audio-overlay.dts | 47 +
336 .../arm/boot/dts/overlays/irs1125-overlay.dts | 97 +
337 .../dts/overlays/jedec-spi-nor-overlay.dts | 309 ++
338 .../dts/overlays/justboom-dac-overlay.dts | 46 +
339 .../dts/overlays/justboom-digi-overlay.dts | 41 +
340 .../arm/boot/dts/overlays/ltc294x-overlay.dts | 86 +
341 .../boot/dts/overlays/max98357a-overlay.dts | 84 +
342 .../boot/dts/overlays/mbed-dac-overlay.dts | 64 +
343 .../boot/dts/overlays/mcp23017-overlay.dts | 71 +
344 .../boot/dts/overlays/mcp23s17-overlay.dts | 732 +++++
345 .../dts/overlays/mcp2515-can0-overlay.dts | 73 +
346 .../dts/overlays/mcp2515-can1-overlay.dts | 73 +
347 .../arm/boot/dts/overlays/mcp3008-overlay.dts | 205 ++
348 .../arm/boot/dts/overlays/mcp3202-overlay.dts | 205 ++
349 .../arm/boot/dts/overlays/mcp342x-overlay.dts | 93 +
350 .../dts/overlays/media-center-overlay.dts | 134 +
351 .../boot/dts/overlays/midi-uart0-overlay.dts | 36 +
352 .../boot/dts/overlays/midi-uart1-overlay.dts | 43 +
353 .../boot/dts/overlays/miniuart-bt-overlay.dts | 74 +
354 arch/arm/boot/dts/overlays/mmc-overlay.dts | 46 +
355 .../arm/boot/dts/overlays/mpu6050-overlay.dts | 28 +
356 .../arm/boot/dts/overlays/mz61581-overlay.dts | 117 +
357 arch/arm/boot/dts/overlays/ov5647-overlay.dts | 99 +
358 .../arm/boot/dts/overlays/papirus-overlay.dts | 89 +
359 .../boot/dts/overlays/pi3-act-led-overlay.dts | 1 +
360 .../dts/overlays/pi3-disable-bt-overlay.dts | 1 +
361 .../dts/overlays/pi3-disable-wifi-overlay.dts | 1 +
362 .../dts/overlays/pi3-miniuart-bt-overlay.dts | 1 +
363 arch/arm/boot/dts/overlays/pibell-overlay.dts | 81 +
364 arch/arm/boot/dts/overlays/piglow-overlay.dts | 97 +
365 .../boot/dts/overlays/piscreen-overlay.dts | 102 +
366 .../boot/dts/overlays/piscreen2r-overlay.dts | 106 +
367 .../arm/boot/dts/overlays/pisound-overlay.dts | 120 +
368 .../arm/boot/dts/overlays/pitft22-overlay.dts | 69 +
369 .../overlays/pitft28-capacitive-overlay.dts | 91 +
370 .../overlays/pitft28-resistive-overlay.dts | 119 +
371 .../overlays/pitft35-resistive-overlay.dts | 119 +
372 .../boot/dts/overlays/pps-gpio-overlay.dts | 38 +
373 .../boot/dts/overlays/pwm-2chan-overlay.dts | 47 +
374 .../boot/dts/overlays/pwm-ir-tx-overlay.dts | 40 +
375 arch/arm/boot/dts/overlays/pwm-overlay.dts | 43 +
376 .../arm/boot/dts/overlays/qca7000-overlay.dts | 55 +
377 .../dts/overlays/rotary-encoder-overlay.dts | 59 +
378 .../dts/overlays/rpi-backlight-overlay.dts | 21 +
379 .../overlays/rpi-cirrus-wm5102-overlay.dts | 152 +
380 .../arm/boot/dts/overlays/rpi-dac-overlay.dts | 34 +
381 .../boot/dts/overlays/rpi-display-overlay.dts | 91 +
382 .../boot/dts/overlays/rpi-ft5406-overlay.dts | 25 +
383 .../arm/boot/dts/overlays/rpi-poe-overlay.dts | 70 +
384 .../boot/dts/overlays/rpi-proto-overlay.dts | 39 +
385 .../boot/dts/overlays/rpi-sense-overlay.dts | 47 +
386 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts | 34 +
387 .../rra-digidac1-wm8741-audio-overlay.dts | 49 +
388 .../dts/overlays/sc16is750-i2c-overlay.dts | 38 +
389 .../dts/overlays/sc16is752-i2c-overlay.dts | 40 +
390 .../dts/overlays/sc16is752-spi1-overlay.dts | 61 +
391 arch/arm/boot/dts/overlays/sdhost-overlay.dts | 38 +
392 arch/arm/boot/dts/overlays/sdio-overlay.dts | 77 +
393 .../arm/boot/dts/overlays/sdtweak-overlay.dts | 25 +
394 .../arm/boot/dts/overlays/smi-dev-overlay.dts | 18 +
395 .../boot/dts/overlays/smi-nand-overlay.dts | 66 +
396 arch/arm/boot/dts/overlays/smi-overlay.dts | 37 +
397 .../dts/overlays/spi-gpio35-39-overlay.dts | 31 +
398 .../dts/overlays/spi-gpio40-45-overlay.dts | 36 +
399 .../arm/boot/dts/overlays/spi-rtc-overlay.dts | 33 +
400 .../arm/boot/dts/overlays/spi0-cs-overlay.dts | 29 +
401 .../boot/dts/overlays/spi0-hw-cs-overlay.dts | 26 +
402 .../boot/dts/overlays/spi1-1cs-overlay.dts | 57 +
403 .../boot/dts/overlays/spi1-2cs-overlay.dts | 69 +
404 .../boot/dts/overlays/spi1-3cs-overlay.dts | 81 +
405 .../boot/dts/overlays/spi2-1cs-overlay.dts | 57 +
406 .../boot/dts/overlays/spi2-2cs-overlay.dts | 69 +
407 .../boot/dts/overlays/spi2-3cs-overlay.dts | 81 +
408 .../boot/dts/overlays/spi3-1cs-overlay.dts | 44 +
409 .../boot/dts/overlays/spi3-2cs-overlay.dts | 56 +
410 .../boot/dts/overlays/spi4-1cs-overlay.dts | 44 +
411 .../boot/dts/overlays/spi4-2cs-overlay.dts | 56 +
412 .../boot/dts/overlays/spi5-1cs-overlay.dts | 44 +
413 .../boot/dts/overlays/spi5-2cs-overlay.dts | 56 +
414 .../boot/dts/overlays/spi6-1cs-overlay.dts | 44 +
415 .../boot/dts/overlays/spi6-2cs-overlay.dts | 56 +
416 .../arm/boot/dts/overlays/ssd1306-overlay.dts | 36 +
417 .../dts/overlays/superaudioboard-overlay.dts | 73 +
418 arch/arm/boot/dts/overlays/sx150x-overlay.dts | 1706 +++++++++++
419 .../dts/overlays/tc358743-audio-overlay.dts | 52 +
420 .../boot/dts/overlays/tc358743-overlay.dts | 116 +
421 .../boot/dts/overlays/tinylcd35-overlay.dts | 222 ++
422 .../boot/dts/overlays/tpm-slb9670-overlay.dts | 44 +
423 arch/arm/boot/dts/overlays/uart0-overlay.dts | 33 +
424 arch/arm/boot/dts/overlays/uart1-overlay.dts | 38 +
425 arch/arm/boot/dts/overlays/uart2-overlay.dts | 27 +
426 arch/arm/boot/dts/overlays/uart3-overlay.dts | 27 +
427 arch/arm/boot/dts/overlays/uart4-overlay.dts | 27 +
428 arch/arm/boot/dts/overlays/uart5-overlay.dts | 27 +
429 arch/arm/boot/dts/overlays/udrc-overlay.dts | 128 +
430 .../boot/dts/overlays/upstream-overlay.dts | 131 +
431 .../dts/overlays/vc4-fkms-v3d-overlay.dts | 81 +
432 .../overlays/vc4-kms-kippah-7inch-overlay.dts | 43 +
433 .../boot/dts/overlays/vc4-kms-v3d-overlay.dts | 152 +
434 arch/arm/boot/dts/overlays/vga666-overlay.dts | 30 +
435 .../arm/boot/dts/overlays/w1-gpio-overlay.dts | 40 +
436 .../dts/overlays/w1-gpio-pullup-overlay.dts | 42 +
437 arch/arm/boot/dts/overlays/w5500-overlay.dts | 63 +
438 .../arm/boot/dts/overlays/wittypi-overlay.dts | 44 +
439 arch/arm64/boot/dts/Makefile | 2 +
440 arch/arm64/boot/dts/broadcom/Makefile | 11 +
441 .../dts/broadcom/bcm2710-rpi-3-b-plus.dts | 3 +
442 .../boot/dts/broadcom/bcm2710-rpi-3-b.dts | 3 +
443 .../boot/dts/broadcom/bcm2710-rpi-cm3.dts | 3 +
444 .../boot/dts/broadcom/bcm2711-rpi-4-b.dts | 3 +
445 .../dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi | 1 +
446 .../dts/broadcom/bcm283x-rpi-lan7515.dtsi | 1 +
447 arch/arm64/boot/dts/overlays | 1 +
448 scripts/Makefile.dtbinst | 8 +-
449 scripts/Makefile.lib | 13 +
450 241 files changed, 20250 insertions(+), 48 deletions(-)
451 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
452 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b.dts
453 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dts
454 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
455 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
456 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-zero.dts
457 create mode 100644 arch/arm/boot/dts/bcm2708-rpi.dtsi
458 create mode 100644 arch/arm/boot/dts/bcm2708.dtsi
459 create mode 100644 arch/arm/boot/dts/bcm2709-rpi-2-b.dts
460 create mode 100644 arch/arm/boot/dts/bcm2709-rpi.dtsi
461 create mode 100644 arch/arm/boot/dts/bcm2709.dtsi
462 create mode 100644 arch/arm/boot/dts/bcm270x.dtsi
463 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-2-b.dts
464 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
465 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b.dts
466 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-cm3.dts
467 create mode 100644 arch/arm/boot/dts/bcm2710.dtsi
468 create mode 100644 arch/arm/boot/dts/bcm2711-rpi-4-b.dts
469 create mode 100644 arch/arm/boot/dts/bcm2711-rpi.dtsi
470 create mode 100644 arch/arm/boot/dts/bcm2711.dtsi
471 create mode 100644 arch/arm/boot/dts/bcm2835-common.dtsi
472 create mode 100644 arch/arm/boot/dts/bcm2838-rpi-4-b.dts
473 create mode 100644 arch/arm/boot/dts/bcm2838-rpi.dtsi
474 create mode 100644 arch/arm/boot/dts/bcm2838.dtsi
475 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi
476 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
477 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi
478 create mode 100644 arch/arm/boot/dts/overlays/Makefile
479 create mode 100644 arch/arm/boot/dts/overlays/README
480 create mode 100644 arch/arm/boot/dts/overlays/act-led-overlay.dts
481 create mode 100644 arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
482 create mode 100644 arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
483 create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts
484 create mode 100644 arch/arm/boot/dts/overlays/ads1115-overlay.dts
485 create mode 100644 arch/arm/boot/dts/overlays/ads7846-overlay.dts
486 create mode 100644 arch/arm/boot/dts/overlays/adv7282m-overlay.dts
487 create mode 100644 arch/arm/boot/dts/overlays/adv728x-m-overlay.dts
488 create mode 100644 arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
489 create mode 100644 arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
490 create mode 100644 arch/arm/boot/dts/overlays/allo-digione-overlay.dts
491 create mode 100644 arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
492 create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
493 create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
494 create mode 100644 arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
495 create mode 100644 arch/arm/boot/dts/overlays/at86rf233-overlay.dts
496 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
497 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
498 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
499 create mode 100644 arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
500 create mode 100644 arch/arm/boot/dts/overlays/audremap-overlay.dts
501 create mode 100644 arch/arm/boot/dts/overlays/balena-fin-overlay.dts
502 create mode 100644 arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts
503 create mode 100644 arch/arm/boot/dts/overlays/dht11-overlay.dts
504 create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
505 create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
506 create mode 100644 arch/arm/boot/dts/overlays/disable-bt-overlay.dts
507 create mode 100644 arch/arm/boot/dts/overlays/disable-wifi-overlay.dts
508 create mode 100644 arch/arm/boot/dts/overlays/dpi18-overlay.dts
509 create mode 100644 arch/arm/boot/dts/overlays/dpi24-overlay.dts
510 create mode 100644 arch/arm/boot/dts/overlays/draws-overlay.dts
511 create mode 100644 arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
512 create mode 100644 arch/arm/boot/dts/overlays/dwc2-overlay.dts
513 create mode 100644 arch/arm/boot/dts/overlays/enc28j60-overlay.dts
514 create mode 100644 arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
515 create mode 100644 arch/arm/boot/dts/overlays/exc3000-overlay.dts
516 create mode 100644 arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
517 create mode 100644 arch/arm/boot/dts/overlays/goodix-overlay.dts
518 create mode 100644 arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
519 create mode 100644 arch/arm/boot/dts/overlays/gpio-fan-overlay.dts
520 create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
521 create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
522 create mode 100644 arch/arm/boot/dts/overlays/gpio-key-overlay.dts
523 create mode 100755 arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts
524 create mode 100644 arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
525 create mode 100644 arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
526 create mode 100644 arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
527 create mode 100644 arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts
528 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
529 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
530 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
531 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
532 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
533 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
534 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
535 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
536 create mode 100644 arch/arm/boot/dts/overlays/hy28a-overlay.dts
537 create mode 100644 arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts
538 create mode 100644 arch/arm/boot/dts/overlays/hy28b-overlay.dts
539 create mode 100644 arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
540 create mode 100644 arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
541 create mode 100644 arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
542 create mode 100644 arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
543 create mode 100644 arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
544 create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
545 create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
546 create mode 100644 arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
547 create mode 100644 arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
548 create mode 100644 arch/arm/boot/dts/overlays/i2c0-overlay.dts
549 create mode 100644 arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts
550 create mode 100644 arch/arm/boot/dts/overlays/i2c1-overlay.dts
551 create mode 100644 arch/arm/boot/dts/overlays/i2c3-overlay.dts
552 create mode 100644 arch/arm/boot/dts/overlays/i2c4-overlay.dts
553 create mode 100644 arch/arm/boot/dts/overlays/i2c5-overlay.dts
554 create mode 100644 arch/arm/boot/dts/overlays/i2c6-overlay.dts
555 create mode 100644 arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
556 create mode 100644 arch/arm/boot/dts/overlays/ilitek251x-overlay.dts
557 create mode 100644 arch/arm/boot/dts/overlays/imx219-overlay.dts
558 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
559 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
560 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
561 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
562 create mode 100644 arch/arm/boot/dts/overlays/irs1125-overlay.dts
563 create mode 100644 arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
564 create mode 100644 arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
565 create mode 100644 arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
566 create mode 100644 arch/arm/boot/dts/overlays/ltc294x-overlay.dts
567 create mode 100644 arch/arm/boot/dts/overlays/max98357a-overlay.dts
568 create mode 100644 arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
569 create mode 100644 arch/arm/boot/dts/overlays/mcp23017-overlay.dts
570 create mode 100644 arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
571 create mode 100755 arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
572 create mode 100644 arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
573 create mode 100755 arch/arm/boot/dts/overlays/mcp3008-overlay.dts
574 create mode 100755 arch/arm/boot/dts/overlays/mcp3202-overlay.dts
575 create mode 100644 arch/arm/boot/dts/overlays/mcp342x-overlay.dts
576 create mode 100644 arch/arm/boot/dts/overlays/media-center-overlay.dts
577 create mode 100644 arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
578 create mode 100644 arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
579 create mode 100644 arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts
580 create mode 100644 arch/arm/boot/dts/overlays/mmc-overlay.dts
581 create mode 100644 arch/arm/boot/dts/overlays/mpu6050-overlay.dts
582 create mode 100644 arch/arm/boot/dts/overlays/mz61581-overlay.dts
583 create mode 100644 arch/arm/boot/dts/overlays/ov5647-overlay.dts
584 create mode 100644 arch/arm/boot/dts/overlays/papirus-overlay.dts
585 create mode 100644 arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts
586 create mode 100644 arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts
587 create mode 100644 arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts
588 create mode 100644 arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts
589 create mode 100644 arch/arm/boot/dts/overlays/pibell-overlay.dts
590 create mode 100644 arch/arm/boot/dts/overlays/piglow-overlay.dts
591 create mode 100644 arch/arm/boot/dts/overlays/piscreen-overlay.dts
592 create mode 100644 arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
593 create mode 100644 arch/arm/boot/dts/overlays/pisound-overlay.dts
594 create mode 100644 arch/arm/boot/dts/overlays/pitft22-overlay.dts
595 create mode 100644 arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
596 create mode 100644 arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
597 create mode 100644 arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
598 create mode 100644 arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
599 create mode 100644 arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
600 create mode 100644 arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
601 create mode 100644 arch/arm/boot/dts/overlays/pwm-overlay.dts
602 create mode 100644 arch/arm/boot/dts/overlays/qca7000-overlay.dts
603 create mode 100644 arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
604 create mode 100644 arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
605 create mode 100644 arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
606 create mode 100644 arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
607 create mode 100644 arch/arm/boot/dts/overlays/rpi-display-overlay.dts
608 create mode 100644 arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
609 create mode 100644 arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
610 create mode 100644 arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
611 create mode 100644 arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
612 create mode 100644 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
613 create mode 100644 arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
614 create mode 100644 arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
615 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
616 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
617 create mode 100644 arch/arm/boot/dts/overlays/sdhost-overlay.dts
618 create mode 100644 arch/arm/boot/dts/overlays/sdio-overlay.dts
619 create mode 100644 arch/arm/boot/dts/overlays/sdtweak-overlay.dts
620 create mode 100644 arch/arm/boot/dts/overlays/smi-dev-overlay.dts
621 create mode 100644 arch/arm/boot/dts/overlays/smi-nand-overlay.dts
622 create mode 100644 arch/arm/boot/dts/overlays/smi-overlay.dts
623 create mode 100644 arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
624 create mode 100644 arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
625 create mode 100644 arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
626 create mode 100644 arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
627 create mode 100644 arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
628 create mode 100644 arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
629 create mode 100644 arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
630 create mode 100644 arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
631 create mode 100644 arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
632 create mode 100644 arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
633 create mode 100644 arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
634 create mode 100644 arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
635 create mode 100644 arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
636 create mode 100644 arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
637 create mode 100644 arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
638 create mode 100644 arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
639 create mode 100644 arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
640 create mode 100644 arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
641 create mode 100644 arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
642 create mode 100644 arch/arm/boot/dts/overlays/ssd1306-overlay.dts
643 create mode 100755 arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
644 create mode 100644 arch/arm/boot/dts/overlays/sx150x-overlay.dts
645 create mode 100644 arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
646 create mode 100644 arch/arm/boot/dts/overlays/tc358743-overlay.dts
647 create mode 100644 arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
648 create mode 100644 arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts
649 create mode 100755 arch/arm/boot/dts/overlays/uart0-overlay.dts
650 create mode 100644 arch/arm/boot/dts/overlays/uart1-overlay.dts
651 create mode 100644 arch/arm/boot/dts/overlays/uart2-overlay.dts
652 create mode 100644 arch/arm/boot/dts/overlays/uart3-overlay.dts
653 create mode 100644 arch/arm/boot/dts/overlays/uart4-overlay.dts
654 create mode 100644 arch/arm/boot/dts/overlays/uart5-overlay.dts
655 create mode 100644 arch/arm/boot/dts/overlays/udrc-overlay.dts
656 create mode 100644 arch/arm/boot/dts/overlays/upstream-overlay.dts
657 create mode 100644 arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
658 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts
659 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
660 create mode 100644 arch/arm/boot/dts/overlays/vga666-overlay.dts
661 create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
662 create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
663 create mode 100644 arch/arm/boot/dts/overlays/w5500-overlay.dts
664 create mode 100644 arch/arm/boot/dts/overlays/wittypi-overlay.dts
665 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
666 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts
667 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts
668 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts
669 create mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi
670 create mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
671 create mode 120000 arch/arm64/boot/dts/overlays
672
673 diff --git a/.gitignore b/.gitignore
674 index 70580bdd352c..a0cf56d7d0d2 100644
675 --- a/.gitignore
676 +++ b/.gitignore
677 @@ -17,6 +17,7 @@
678 *.c.[012]*.*
679 *.dt.yaml
680 *.dtb
681 +*.dtbo
682 *.dtb.S
683 *.dwo
684 *.elf
685 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
686 index b21b3a64641a..e6832866849d 100644
687 --- a/arch/arm/boot/dts/Makefile
688 +++ b/arch/arm/boot/dts/Makefile
689 @@ -1,4 +1,18 @@
690 # SPDX-License-Identifier: GPL-2.0
691 +
692 +dtb-$(CONFIG_ARCH_BCM2835) += \
693 + bcm2708-rpi-b.dtb \
694 + bcm2708-rpi-b-plus.dtb \
695 + bcm2708-rpi-cm.dtb \
696 + bcm2708-rpi-zero.dtb \
697 + bcm2708-rpi-zero-w.dtb \
698 + bcm2709-rpi-2-b.dtb \
699 + bcm2710-rpi-2-b.dtb \
700 + bcm2710-rpi-3-b.dtb \
701 + bcm2711-rpi-4-b.dtb \
702 + bcm2710-rpi-3-b-plus.dtb \
703 + bcm2710-rpi-cm3.dtb
704 +
705 dtb-$(CONFIG_ARCH_ALPINE) += \
706 alpine-db.dtb
707 dtb-$(CONFIG_MACH_ARTPEC6) += \
708 @@ -83,6 +97,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
709 bcm2837-rpi-3-b.dtb \
710 bcm2837-rpi-3-b-plus.dtb \
711 bcm2837-rpi-cm3-io3.dtb \
712 + bcm2838-rpi-4-b.dtb \
713 bcm2835-rpi-zero.dtb \
714 bcm2835-rpi-zero-w.dtb
715 dtb-$(CONFIG_ARCH_BCM_5301X) += \
716 @@ -1303,3 +1318,13 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
717 aspeed-bmc-opp-zaius.dtb \
718 aspeed-bmc-portwell-neptune.dtb \
719 aspeed-bmc-quanta-q71l.dtb
720 +
721 +targets += dtbs dtbs_install
722 +targets += $(dtb-y)
723 +
724 +subdir-y := overlays
725 +
726 +# Enable fixups to support overlays on BCM2835 platforms
727 +ifeq ($(CONFIG_ARCH_BCM2835),y)
728 + DTC_FLAGS ?= -@
729 +endif
730 diff --git a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
731 new file mode 100644
732 index 000000000000..b800699a03fb
733 --- /dev/null
734 +++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
735 @@ -0,0 +1,125 @@
736 +/dts-v1/;
737 +
738 +#include "bcm2708.dtsi"
739 +#include "bcm2708-rpi.dtsi"
740 +#include "bcm283x-rpi-smsc9514.dtsi"
741 +#include "bcm283x-rpi-csi1-2lane.dtsi"
742 +
743 +/ {
744 + compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
745 + model = "Raspberry Pi Model B+";
746 +};
747 +
748 +&gpio {
749 + spi0_pins: spi0_pins {
750 + brcm,pins = <9 10 11>;
751 + brcm,function = <4>; /* alt0 */
752 + };
753 +
754 + spi0_cs_pins: spi0_cs_pins {
755 + brcm,pins = <8 7>;
756 + brcm,function = <1>; /* output */
757 + };
758 +
759 + i2c0_pins: i2c0 {
760 + brcm,pins = <0 1>;
761 + brcm,function = <4>;
762 + };
763 +
764 + i2c1_pins: i2c1 {
765 + brcm,pins = <2 3>;
766 + brcm,function = <4>;
767 + };
768 +
769 + i2s_pins: i2s {
770 + brcm,pins = <18 19 20 21>;
771 + brcm,function = <4>; /* alt0 */
772 + };
773 +
774 + audio_pins: audio_pins {
775 + brcm,pins = <40 45>;
776 + brcm,function = <4>;
777 + };
778 +};
779 +
780 +&uart0 {
781 + status = "okay";
782 +};
783 +
784 +&spi0 {
785 + pinctrl-names = "default";
786 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
787 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
788 +
789 + spidev0: spidev@0{
790 + compatible = "spidev";
791 + reg = <0>; /* CE0 */
792 + #address-cells = <1>;
793 + #size-cells = <0>;
794 + spi-max-frequency = <125000000>;
795 + };
796 +
797 + spidev1: spidev@1{
798 + compatible = "spidev";
799 + reg = <1>; /* CE1 */
800 + #address-cells = <1>;
801 + #size-cells = <0>;
802 + spi-max-frequency = <125000000>;
803 + };
804 +};
805 +
806 +&i2c0 {
807 + pinctrl-names = "default";
808 + pinctrl-0 = <&i2c0_pins>;
809 + clock-frequency = <100000>;
810 +};
811 +
812 +&i2c1 {
813 + pinctrl-names = "default";
814 + pinctrl-0 = <&i2c1_pins>;
815 + clock-frequency = <100000>;
816 +};
817 +
818 +&i2c2 {
819 + clock-frequency = <100000>;
820 +};
821 +
822 +&i2s {
823 + pinctrl-names = "default";
824 + pinctrl-0 = <&i2s_pins>;
825 +};
826 +
827 +&leds {
828 + act_led: act {
829 + label = "led0";
830 + linux,default-trigger = "mmc0";
831 + gpios = <&gpio 47 0>;
832 + };
833 +
834 + pwr_led: pwr {
835 + label = "led1";
836 + linux,default-trigger = "input";
837 + gpios = <&gpio 35 0>;
838 + };
839 +};
840 +
841 +&hdmi {
842 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
843 +};
844 +
845 +&audio {
846 + pinctrl-names = "default";
847 + pinctrl-0 = <&audio_pins>;
848 +};
849 +
850 +/ {
851 + __overrides__ {
852 + act_led_gpio = <&act_led>,"gpios:4";
853 + act_led_activelow = <&act_led>,"gpios:8";
854 + act_led_trigger = <&act_led>,"linux,default-trigger";
855 +
856 + pwr_led_gpio = <&pwr_led>,"gpios:4";
857 + pwr_led_activelow = <&pwr_led>,"gpios:8";
858 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
859 + };
860 +};
861 diff --git a/arch/arm/boot/dts/bcm2708-rpi-b.dts b/arch/arm/boot/dts/bcm2708-rpi-b.dts
862 new file mode 100644
863 index 000000000000..ef47775692ce
864 --- /dev/null
865 +++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
866 @@ -0,0 +1,115 @@
867 +/dts-v1/;
868 +
869 +#include "bcm2708.dtsi"
870 +#include "bcm2708-rpi.dtsi"
871 +#include "bcm283x-rpi-smsc9512.dtsi"
872 +#include "bcm283x-rpi-csi1-2lane.dtsi"
873 +
874 +/ {
875 + compatible = "raspberrypi,model-b", "brcm,bcm2835";
876 + model = "Raspberry Pi Model B";
877 +};
878 +
879 +&gpio {
880 + spi0_pins: spi0_pins {
881 + brcm,pins = <9 10 11>;
882 + brcm,function = <4>; /* alt0 */
883 + };
884 +
885 + spi0_cs_pins: spi0_cs_pins {
886 + brcm,pins = <8 7>;
887 + brcm,function = <1>; /* output */
888 + };
889 +
890 + i2c0_pins: i2c0 {
891 + brcm,pins = <0 1>;
892 + brcm,function = <4>;
893 + };
894 +
895 + i2c1_pins: i2c1 {
896 + brcm,pins = <2 3>;
897 + brcm,function = <4>;
898 + };
899 +
900 + i2s_pins: i2s {
901 + brcm,pins = <28 29 30 31>;
902 + brcm,function = <6>; /* alt2 */
903 + };
904 +
905 + audio_pins: audio_pins {
906 + brcm,pins = <40 45>;
907 + brcm,function = <4>;
908 + };
909 +};
910 +
911 +&uart0 {
912 + status = "okay";
913 +};
914 +
915 +&spi0 {
916 + pinctrl-names = "default";
917 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
918 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
919 +
920 + spidev0: spidev@0{
921 + compatible = "spidev";
922 + reg = <0>; /* CE0 */
923 + #address-cells = <1>;
924 + #size-cells = <0>;
925 + spi-max-frequency = <125000000>;
926 + };
927 +
928 + spidev1: spidev@1{
929 + compatible = "spidev";
930 + reg = <1>; /* CE1 */
931 + #address-cells = <1>;
932 + #size-cells = <0>;
933 + spi-max-frequency = <125000000>;
934 + };
935 +};
936 +
937 +&i2c0 {
938 + pinctrl-names = "default";
939 + pinctrl-0 = <&i2c0_pins>;
940 + clock-frequency = <100000>;
941 +};
942 +
943 +&i2c1 {
944 + pinctrl-names = "default";
945 + pinctrl-0 = <&i2c1_pins>;
946 + clock-frequency = <100000>;
947 +};
948 +
949 +&i2c2 {
950 + clock-frequency = <100000>;
951 +};
952 +
953 +&i2s {
954 + pinctrl-names = "default";
955 + pinctrl-0 = <&i2s_pins>;
956 +};
957 +
958 +&leds {
959 + act_led: act {
960 + label = "led0";
961 + linux,default-trigger = "mmc0";
962 + gpios = <&gpio 16 1>;
963 + };
964 +};
965 +
966 +&hdmi {
967 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
968 +};
969 +
970 +&audio {
971 + pinctrl-names = "default";
972 + pinctrl-0 = <&audio_pins>;
973 +};
974 +
975 +/ {
976 + __overrides__ {
977 + act_led_gpio = <&act_led>,"gpios:4";
978 + act_led_activelow = <&act_led>,"gpios:8";
979 + act_led_trigger = <&act_led>,"linux,default-trigger";
980 + };
981 +};
982 diff --git a/arch/arm/boot/dts/bcm2708-rpi-cm.dts b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
983 new file mode 100644
984 index 000000000000..64809aee5c0c
985 --- /dev/null
986 +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
987 @@ -0,0 +1,98 @@
988 +/dts-v1/;
989 +
990 +#include "bcm2708-rpi-cm.dtsi"
991 +#include "bcm283x-rpi-csi0-2lane.dtsi"
992 +#include "bcm283x-rpi-csi1-4lane.dtsi"
993 +
994 +/ {
995 + compatible = "raspberrypi,compute-module", "brcm,bcm2835";
996 + model = "Raspberry Pi Compute Module";
997 +};
998 +
999 +&uart0 {
1000 + status = "okay";
1001 +};
1002 +
1003 +&gpio {
1004 + spi0_pins: spi0_pins {
1005 + brcm,pins = <9 10 11>;
1006 + brcm,function = <4>; /* alt0 */
1007 + };
1008 +
1009 + spi0_cs_pins: spi0_cs_pins {
1010 + brcm,pins = <8 7>;
1011 + brcm,function = <1>; /* output */
1012 + };
1013 +
1014 + i2c0_pins: i2c0 {
1015 + brcm,pins = <0 1>;
1016 + brcm,function = <4>;
1017 + };
1018 +
1019 + i2c1_pins: i2c1 {
1020 + brcm,pins = <2 3>;
1021 + brcm,function = <4>;
1022 + };
1023 +
1024 + i2s_pins: i2s {
1025 + brcm,pins = <18 19 20 21>;
1026 + brcm,function = <4>; /* alt0 */
1027 + };
1028 +
1029 + audio_pins: audio_pins {
1030 + brcm,pins;
1031 + brcm,function;
1032 + };
1033 +};
1034 +
1035 +&spi0 {
1036 + pinctrl-names = "default";
1037 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1038 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1039 +
1040 + spidev0: spidev@0{
1041 + compatible = "spidev";
1042 + reg = <0>; /* CE0 */
1043 + #address-cells = <1>;
1044 + #size-cells = <0>;
1045 + spi-max-frequency = <125000000>;
1046 + };
1047 +
1048 + spidev1: spidev@1{
1049 + compatible = "spidev";
1050 + reg = <1>; /* CE1 */
1051 + #address-cells = <1>;
1052 + #size-cells = <0>;
1053 + spi-max-frequency = <125000000>;
1054 + };
1055 +};
1056 +
1057 +&i2c0 {
1058 + pinctrl-names = "default";
1059 + pinctrl-0 = <&i2c0_pins>;
1060 + clock-frequency = <100000>;
1061 +};
1062 +
1063 +&i2c1 {
1064 + pinctrl-names = "default";
1065 + pinctrl-0 = <&i2c1_pins>;
1066 + clock-frequency = <100000>;
1067 +};
1068 +
1069 +&i2c2 {
1070 + clock-frequency = <100000>;
1071 +};
1072 +
1073 +&i2s {
1074 + pinctrl-names = "default";
1075 + pinctrl-0 = <&i2s_pins>;
1076 +};
1077 +
1078 +&audio {
1079 + pinctrl-names = "default";
1080 + pinctrl-0 = <&audio_pins>;
1081 +};
1082 +
1083 +&hdmi {
1084 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
1085 +};
1086 diff --git a/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
1087 new file mode 100644
1088 index 000000000000..dce160f420fd
1089 --- /dev/null
1090 +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
1091 @@ -0,0 +1,18 @@
1092 +#include "bcm2708.dtsi"
1093 +#include "bcm2708-rpi.dtsi"
1094 +
1095 +&leds {
1096 + act_led: act {
1097 + label = "led0";
1098 + linux,default-trigger = "mmc0";
1099 + gpios = <&gpio 47 0>;
1100 + };
1101 +};
1102 +
1103 +/ {
1104 + __overrides__ {
1105 + act_led_gpio = <&act_led>,"gpios:4";
1106 + act_led_activelow = <&act_led>,"gpios:8";
1107 + act_led_trigger = <&act_led>,"linux,default-trigger";
1108 + };
1109 +};
1110 diff --git a/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
1111 new file mode 100644
1112 index 000000000000..92f780a3e557
1113 --- /dev/null
1114 +++ b/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
1115 @@ -0,0 +1,163 @@
1116 +/dts-v1/;
1117 +
1118 +#include "bcm2708.dtsi"
1119 +#include "bcm2708-rpi.dtsi"
1120 +#include "bcm283x-rpi-csi1-2lane.dtsi"
1121 +
1122 +/ {
1123 + compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
1124 + model = "Raspberry Pi Zero W";
1125 +
1126 + chosen {
1127 + bootargs = "coherent_pool=1M 8250.nr_uarts=1";
1128 + };
1129 +
1130 + aliases {
1131 + serial0 = &uart1;
1132 + serial1 = &uart0;
1133 + mmc1 = &mmcnr;
1134 + };
1135 +};
1136 +
1137 +&gpio {
1138 + spi0_pins: spi0_pins {
1139 + brcm,pins = <9 10 11>;
1140 + brcm,function = <4>; /* alt0 */
1141 + };
1142 +
1143 + spi0_cs_pins: spi0_cs_pins {
1144 + brcm,pins = <8 7>;
1145 + brcm,function = <1>; /* output */
1146 + };
1147 +
1148 + i2c0_pins: i2c0 {
1149 + brcm,pins = <0 1>;
1150 + brcm,function = <4>;
1151 + };
1152 +
1153 + i2c1_pins: i2c1 {
1154 + brcm,pins = <2 3>;
1155 + brcm,function = <4>;
1156 + };
1157 +
1158 + i2s_pins: i2s {
1159 + brcm,pins = <18 19 20 21>;
1160 + brcm,function = <4>; /* alt0 */
1161 + };
1162 +
1163 + sdio_pins: sdio_pins {
1164 + brcm,pins = <34 35 36 37 38 39>;
1165 + brcm,function = <7>; /* ALT3 = SD1 */
1166 + brcm,pull = <0 2 2 2 2 2>;
1167 + };
1168 +
1169 + bt_pins: bt_pins {
1170 + brcm,pins = <43>;
1171 + brcm,function = <4>; /* alt0:GPCLK2 */
1172 + brcm,pull = <0>; /* none */
1173 + };
1174 +
1175 + uart0_pins: uart0_pins {
1176 + brcm,pins = <30 31 32 33>;
1177 + brcm,function = <7>; /* alt3=UART0 */
1178 + brcm,pull = <2 0 0 2>; /* up none none up */
1179 + };
1180 +
1181 + uart1_pins: uart1_pins {
1182 + brcm,pins;
1183 + brcm,function;
1184 + brcm,pull;
1185 + };
1186 +
1187 + audio_pins: audio_pins {
1188 + brcm,pins = <>;
1189 + brcm,function = <>;
1190 + };
1191 +};
1192 +
1193 +&mmcnr {
1194 + pinctrl-names = "default";
1195 + pinctrl-0 = <&sdio_pins>;
1196 + bus-width = <4>;
1197 + status = "okay";
1198 +};
1199 +
1200 +&uart0 {
1201 + pinctrl-names = "default";
1202 + pinctrl-0 = <&uart0_pins &bt_pins>;
1203 + status = "okay";
1204 +};
1205 +
1206 +&uart1 {
1207 + pinctrl-names = "default";
1208 + pinctrl-0 = <&uart1_pins>;
1209 + status = "okay";
1210 +};
1211 +
1212 +&spi0 {
1213 + pinctrl-names = "default";
1214 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1215 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1216 +
1217 + spidev0: spidev@0{
1218 + compatible = "spidev";
1219 + reg = <0>; /* CE0 */
1220 + #address-cells = <1>;
1221 + #size-cells = <0>;
1222 + spi-max-frequency = <125000000>;
1223 + };
1224 +
1225 + spidev1: spidev@1{
1226 + compatible = "spidev";
1227 + reg = <1>; /* CE1 */
1228 + #address-cells = <1>;
1229 + #size-cells = <0>;
1230 + spi-max-frequency = <125000000>;
1231 + };
1232 +};
1233 +
1234 +&i2c0 {
1235 + pinctrl-names = "default";
1236 + pinctrl-0 = <&i2c0_pins>;
1237 + clock-frequency = <100000>;
1238 +};
1239 +
1240 +&i2c1 {
1241 + pinctrl-names = "default";
1242 + pinctrl-0 = <&i2c1_pins>;
1243 + clock-frequency = <100000>;
1244 +};
1245 +
1246 +&i2c2 {
1247 + clock-frequency = <100000>;
1248 +};
1249 +
1250 +&i2s {
1251 + pinctrl-names = "default";
1252 + pinctrl-0 = <&i2s_pins>;
1253 +};
1254 +
1255 +&leds {
1256 + act_led: act {
1257 + label = "led0";
1258 + linux,default-trigger = "mmc0";
1259 + gpios = <&gpio 47 0>;
1260 + };
1261 +};
1262 +
1263 +&hdmi {
1264 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
1265 +};
1266 +
1267 +&audio {
1268 + pinctrl-names = "default";
1269 + pinctrl-0 = <&audio_pins>;
1270 +};
1271 +
1272 +/ {
1273 + __overrides__ {
1274 + act_led_gpio = <&act_led>,"gpios:4";
1275 + act_led_activelow = <&act_led>,"gpios:8";
1276 + act_led_trigger = <&act_led>,"linux,default-trigger";
1277 + };
1278 +};
1279 diff --git a/arch/arm/boot/dts/bcm2708-rpi-zero.dts b/arch/arm/boot/dts/bcm2708-rpi-zero.dts
1280 new file mode 100644
1281 index 000000000000..2909ddeafc83
1282 --- /dev/null
1283 +++ b/arch/arm/boot/dts/bcm2708-rpi-zero.dts
1284 @@ -0,0 +1,118 @@
1285 +/dts-v1/;
1286 +
1287 +#include "bcm2708.dtsi"
1288 +#include "bcm2708-rpi.dtsi"
1289 +#include "bcm283x-rpi-csi1-2lane.dtsi"
1290 +
1291 +/ {
1292 + compatible = "raspberrypi,model-zero", "brcm,bcm2835";
1293 + model = "Raspberry Pi Zero";
1294 +
1295 + chosen {
1296 + bootargs = "coherent_pool=1M";
1297 + };
1298 +};
1299 +
1300 +&gpio {
1301 + spi0_pins: spi0_pins {
1302 + brcm,pins = <9 10 11>;
1303 + brcm,function = <4>; /* alt0 */
1304 + };
1305 +
1306 + spi0_cs_pins: spi0_cs_pins {
1307 + brcm,pins = <8 7>;
1308 + brcm,function = <1>; /* output */
1309 + };
1310 +
1311 + i2c0_pins: i2c0 {
1312 + brcm,pins = <0 1>;
1313 + brcm,function = <4>;
1314 + };
1315 +
1316 + i2c1_pins: i2c1 {
1317 + brcm,pins = <2 3>;
1318 + brcm,function = <4>;
1319 + };
1320 +
1321 + i2s_pins: i2s {
1322 + brcm,pins = <18 19 20 21>;
1323 + brcm,function = <4>; /* alt0 */
1324 + };
1325 +
1326 + audio_pins: audio_pins {
1327 + brcm,pins = <>;
1328 + brcm,function = <>;
1329 + };
1330 +};
1331 +
1332 +&uart0 {
1333 + status = "okay";
1334 +};
1335 +
1336 +&spi0 {
1337 + pinctrl-names = "default";
1338 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1339 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1340 +
1341 + spidev0: spidev@0{
1342 + compatible = "spidev";
1343 + reg = <0>; /* CE0 */
1344 + #address-cells = <1>;
1345 + #size-cells = <0>;
1346 + spi-max-frequency = <125000000>;
1347 + };
1348 +
1349 + spidev1: spidev@1{
1350 + compatible = "spidev";
1351 + reg = <1>; /* CE1 */
1352 + #address-cells = <1>;
1353 + #size-cells = <0>;
1354 + spi-max-frequency = <125000000>;
1355 + };
1356 +};
1357 +
1358 +&i2c0 {
1359 + pinctrl-names = "default";
1360 + pinctrl-0 = <&i2c0_pins>;
1361 + clock-frequency = <100000>;
1362 +};
1363 +
1364 +&i2c1 {
1365 + pinctrl-names = "default";
1366 + pinctrl-0 = <&i2c1_pins>;
1367 + clock-frequency = <100000>;
1368 +};
1369 +
1370 +&i2c2 {
1371 + clock-frequency = <100000>;
1372 +};
1373 +
1374 +&i2s {
1375 + pinctrl-names = "default";
1376 + pinctrl-0 = <&i2s_pins>;
1377 +};
1378 +
1379 +&leds {
1380 + act_led: act {
1381 + label = "led0";
1382 + linux,default-trigger = "mmc0";
1383 + gpios = <&gpio 47 0>;
1384 + };
1385 +};
1386 +
1387 +&hdmi {
1388 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
1389 +};
1390 +
1391 +&audio {
1392 + pinctrl-names = "default";
1393 + pinctrl-0 = <&audio_pins>;
1394 +};
1395 +
1396 +/ {
1397 + __overrides__ {
1398 + act_led_gpio = <&act_led>,"gpios:4";
1399 + act_led_activelow = <&act_led>,"gpios:8";
1400 + act_led_trigger = <&act_led>,"linux,default-trigger";
1401 + };
1402 +};
1403 diff --git a/arch/arm/boot/dts/bcm2708-rpi.dtsi b/arch/arm/boot/dts/bcm2708-rpi.dtsi
1404 new file mode 100644
1405 index 000000000000..ce9795dad99f
1406 --- /dev/null
1407 +++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi
1408 @@ -0,0 +1,154 @@
1409 +/* Downstream modifications to bcm2835-rpi.dtsi */
1410 +
1411 +#include "bcm2835-rpi.dtsi"
1412 +
1413 +/ {
1414 + memory@0 {
1415 + device_type = "memory";
1416 + reg = <0x0 0x0>;
1417 + };
1418 +
1419 + aliases {
1420 + audio = &audio;
1421 + aux = &aux;
1422 + sound = &sound;
1423 + soc = &soc;
1424 + dma = &dma;
1425 + intc = &intc;
1426 + watchdog = &watchdog;
1427 + random = &random;
1428 + mailbox = &mailbox;
1429 + gpio = &gpio;
1430 + uart0 = &uart0;
1431 + sdhost = &sdhost;
1432 + mmc0 = &sdhost;
1433 + i2s = &i2s;
1434 + spi0 = &spi0;
1435 + i2c0 = &i2c0;
1436 + uart1 = &uart1;
1437 + spi1 = &spi1;
1438 + spi2 = &spi2;
1439 + mmc = &mmc;
1440 + mmc1 = &mmc;
1441 + i2c1 = &i2c1;
1442 + i2c2 = &i2c2;
1443 + usb = &usb;
1444 + leds = &leds;
1445 + fb = &fb;
1446 + thermal = &thermal;
1447 + axiperf = &axiperf;
1448 + };
1449 +
1450 + leds: leds {
1451 + compatible = "gpio-leds";
1452 + };
1453 +
1454 + soc {
1455 + gpiomem {
1456 + compatible = "brcm,bcm2835-gpiomem";
1457 + reg = <0x7e200000 0x1000>;
1458 + };
1459 +
1460 + fb: fb {
1461 + compatible = "brcm,bcm2708-fb";
1462 + firmware = <&firmware>;
1463 + status = "okay";
1464 + };
1465 +
1466 + vcsm: vcsm {
1467 + compatible = "raspberrypi,bcm2835-vcsm";
1468 + firmware = <&firmware>;
1469 + status = "okay";
1470 + };
1471 +
1472 + /* Onboard audio */
1473 + audio: audio {
1474 + compatible = "brcm,bcm2835-audio";
1475 + brcm,pwm-channels = <8>;
1476 + status = "disabled";
1477 + };
1478 +
1479 + /* External sound card */
1480 + sound: sound {
1481 + status = "disabled";
1482 + };
1483 + };
1484 +
1485 + __overrides__ {
1486 + cache_line_size;
1487 +
1488 + uart0 = <&uart0>,"status";
1489 + uart1 = <&uart1>,"status";
1490 + i2s = <&i2s>,"status";
1491 + spi = <&spi0>,"status";
1492 + i2c0 = <&i2c0>,"status";
1493 + i2c1 = <&i2c1>,"status";
1494 + i2c2_iknowwhatimdoing = <&i2c2>,"status";
1495 + i2c0_baudrate = <&i2c0>,"clock-frequency:0";
1496 + i2c1_baudrate = <&i2c1>,"clock-frequency:0";
1497 + i2c2_baudrate = <&i2c2>,"clock-frequency:0";
1498 +
1499 + audio = <&audio>,"status";
1500 + watchdog = <&watchdog>,"status";
1501 + random = <&random>,"status";
1502 + sd_overclock = <&sdhost>,"brcm,overclock-50:0";
1503 + sd_force_pio = <&sdhost>,"brcm,force-pio?";
1504 + sd_pio_limit = <&sdhost>,"brcm,pio-limit:0";
1505 + sd_debug = <&sdhost>,"brcm,debug";
1506 + sdio_overclock = <&mmc>,"brcm,overclock-50:0",
1507 + <&mmcnr>,"brcm,overclock-50:0";
1508 + axiperf = <&axiperf>,"status";
1509 + };
1510 +};
1511 +
1512 +&hdmi {
1513 + power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
1514 + status = "disabled";
1515 +};
1516 +
1517 +&txp {
1518 + status = "disabled";
1519 +};
1520 +
1521 +&i2c0 {
1522 + status = "disabled";
1523 +};
1524 +
1525 +&i2c1 {
1526 + status = "disabled";
1527 +};
1528 +
1529 +&i2c2 {
1530 + status = "disabled";
1531 +};
1532 +
1533 +&clocks {
1534 + firmware = <&firmware>;
1535 +};
1536 +
1537 +&sdhci {
1538 + pinctrl-names = "default";
1539 + pinctrl-0 = <&emmc_gpio48>;
1540 + bus-width = <4>;
1541 +};
1542 +
1543 +sdhost_pins: &sdhost_gpio48 {
1544 + /* Add alias */
1545 +};
1546 +
1547 +&sdhost {
1548 + pinctrl-names = "default";
1549 + pinctrl-0 = <&sdhost_gpio48>;
1550 + bus-width = <4>;
1551 + brcm,overclock-50 = <0>;
1552 + brcm,pio-limit = <1>;
1553 + status = "okay";
1554 +};
1555 +
1556 +&cpu_thermal {
1557 + /delete-node/ trips;
1558 +};
1559 +
1560 +&vec {
1561 + status = "disabled";
1562 +};
1563 diff --git a/arch/arm/boot/dts/bcm2708.dtsi b/arch/arm/boot/dts/bcm2708.dtsi
1564 new file mode 100644
1565 index 000000000000..16a637363b5d
1566 --- /dev/null
1567 +++ b/arch/arm/boot/dts/bcm2708.dtsi
1568 @@ -0,0 +1,10 @@
1569 +#include "bcm2835.dtsi"
1570 +#include "bcm270x.dtsi"
1571 +
1572 +/ {
1573 + /delete-node/ cpus;
1574 +
1575 + __overrides__ {
1576 + arm_freq;
1577 + };
1578 +};
1579 diff --git a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
1580 new file mode 100644
1581 index 000000000000..4d2262f8d376
1582 --- /dev/null
1583 +++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
1584 @@ -0,0 +1,125 @@
1585 +/dts-v1/;
1586 +
1587 +#include "bcm2709.dtsi"
1588 +#include "bcm2709-rpi.dtsi"
1589 +#include "bcm283x-rpi-smsc9514.dtsi"
1590 +#include "bcm283x-rpi-csi1-2lane.dtsi"
1591 +
1592 +/ {
1593 + compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
1594 + model = "Raspberry Pi 2 Model B";
1595 +};
1596 +
1597 +&gpio {
1598 + spi0_pins: spi0_pins {
1599 + brcm,pins = <9 10 11>;
1600 + brcm,function = <4>; /* alt0 */
1601 + };
1602 +
1603 + spi0_cs_pins: spi0_cs_pins {
1604 + brcm,pins = <8 7>;
1605 + brcm,function = <1>; /* output */
1606 + };
1607 +
1608 + i2c0_pins: i2c0 {
1609 + brcm,pins = <0 1>;
1610 + brcm,function = <4>;
1611 + };
1612 +
1613 + i2c1_pins: i2c1 {
1614 + brcm,pins = <2 3>;
1615 + brcm,function = <4>;
1616 + };
1617 +
1618 + i2s_pins: i2s {
1619 + brcm,pins = <18 19 20 21>;
1620 + brcm,function = <4>; /* alt0 */
1621 + };
1622 +
1623 + audio_pins: audio_pins {
1624 + brcm,pins = <40 45>;
1625 + brcm,function = <4>;
1626 + };
1627 +};
1628 +
1629 +&uart0 {
1630 + status = "okay";
1631 +};
1632 +
1633 +&spi0 {
1634 + pinctrl-names = "default";
1635 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1636 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1637 +
1638 + spidev0: spidev@0{
1639 + compatible = "spidev";
1640 + reg = <0>; /* CE0 */
1641 + #address-cells = <1>;
1642 + #size-cells = <0>;
1643 + spi-max-frequency = <125000000>;
1644 + };
1645 +
1646 + spidev1: spidev@1{
1647 + compatible = "spidev";
1648 + reg = <1>; /* CE1 */
1649 + #address-cells = <1>;
1650 + #size-cells = <0>;
1651 + spi-max-frequency = <125000000>;
1652 + };
1653 +};
1654 +
1655 +&i2c0 {
1656 + pinctrl-names = "default";
1657 + pinctrl-0 = <&i2c0_pins>;
1658 + clock-frequency = <100000>;
1659 +};
1660 +
1661 +&i2c1 {
1662 + pinctrl-names = "default";
1663 + pinctrl-0 = <&i2c1_pins>;
1664 + clock-frequency = <100000>;
1665 +};
1666 +
1667 +&i2c2 {
1668 + clock-frequency = <100000>;
1669 +};
1670 +
1671 +&i2s {
1672 + pinctrl-names = "default";
1673 + pinctrl-0 = <&i2s_pins>;
1674 +};
1675 +
1676 +&leds {
1677 + act_led: act {
1678 + label = "led0";
1679 + linux,default-trigger = "mmc0";
1680 + gpios = <&gpio 47 0>;
1681 + };
1682 +
1683 + pwr_led: pwr {
1684 + label = "led1";
1685 + linux,default-trigger = "input";
1686 + gpios = <&gpio 35 0>;
1687 + };
1688 +};
1689 +
1690 +&hdmi {
1691 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
1692 +};
1693 +
1694 +&audio {
1695 + pinctrl-names = "default";
1696 + pinctrl-0 = <&audio_pins>;
1697 +};
1698 +
1699 +/ {
1700 + __overrides__ {
1701 + act_led_gpio = <&act_led>,"gpios:4";
1702 + act_led_activelow = <&act_led>,"gpios:8";
1703 + act_led_trigger = <&act_led>,"linux,default-trigger";
1704 +
1705 + pwr_led_gpio = <&pwr_led>,"gpios:4";
1706 + pwr_led_activelow = <&pwr_led>,"gpios:8";
1707 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
1708 + };
1709 +};
1710 diff --git a/arch/arm/boot/dts/bcm2709-rpi.dtsi b/arch/arm/boot/dts/bcm2709-rpi.dtsi
1711 new file mode 100644
1712 index 000000000000..babfa41cd9f7
1713 --- /dev/null
1714 +++ b/arch/arm/boot/dts/bcm2709-rpi.dtsi
1715 @@ -0,0 +1,5 @@
1716 +#include "bcm2708-rpi.dtsi"
1717 +
1718 +&vchiq {
1719 + compatible = "brcm,bcm2836-vchiq", "brcm,bcm2835-vchiq";
1720 +};
1721 diff --git a/arch/arm/boot/dts/bcm2709.dtsi b/arch/arm/boot/dts/bcm2709.dtsi
1722 new file mode 100644
1723 index 000000000000..8bc67c0aaff1
1724 --- /dev/null
1725 +++ b/arch/arm/boot/dts/bcm2709.dtsi
1726 @@ -0,0 +1,18 @@
1727 +#include "bcm2836.dtsi"
1728 +#include "bcm270x.dtsi"
1729 +
1730 +/ {
1731 + soc {
1732 + ranges = <0x7e000000 0x3f000000 0x01000000>,
1733 + <0x40000000 0x40000000 0x00040000>;
1734 +
1735 + /delete-node/ timer@7e003000;
1736 + };
1737 +
1738 + __overrides__ {
1739 + arm_freq = <&v7_cpu0>, "clock-frequency:0",
1740 + <&v7_cpu1>, "clock-frequency:0",
1741 + <&v7_cpu2>, "clock-frequency:0",
1742 + <&v7_cpu3>, "clock-frequency:0";
1743 + };
1744 +};
1745 diff --git a/arch/arm/boot/dts/bcm270x.dtsi b/arch/arm/boot/dts/bcm270x.dtsi
1746 new file mode 100644
1747 index 000000000000..9eb6becfbe41
1748 --- /dev/null
1749 +++ b/arch/arm/boot/dts/bcm270x.dtsi
1750 @@ -0,0 +1,165 @@
1751 +/* Downstream bcm283x.dtsi diff */
1752 +#include <dt-bindings/power/raspberrypi-power.h>
1753 +
1754 +/ {
1755 + chosen {
1756 + bootargs = "coherent_pool=1M";
1757 + /delete-property/ stdout-path;
1758 + };
1759 +
1760 + soc: soc {
1761 +
1762 + watchdog: watchdog@7e100000 {
1763 + /* Add label */
1764 + };
1765 +
1766 + random: rng@7e104000 {
1767 + /* Add label */
1768 + };
1769 +
1770 + gpio@7e200000 { /* gpio */
1771 + interrupts = <2 17>, <2 18>;
1772 +
1773 + dpi_18bit_gpio0: dpi_18bit_gpio0 {
1774 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
1775 + 12 13 14 15 16 17 18 19
1776 + 20 21>;
1777 + brcm,function = <BCM2835_FSEL_ALT2>;
1778 + };
1779 + };
1780 +
1781 + serial@7e201000 { /* uart0 */
1782 + /* Enable CTS bug workaround */
1783 + cts-event-workaround;
1784 + };
1785 +
1786 + i2s@7e203000 { /* i2s */
1787 + #sound-dai-cells = <0>;
1788 + reg = <0x7e203000 0x24>;
1789 + clocks = <&clocks BCM2835_CLOCK_PCM>;
1790 + };
1791 +
1792 + spi0: spi@7e204000 {
1793 + /* Add label */
1794 + dmas = <&dma 6>, <&dma 7>;
1795 + dma-names = "tx", "rx";
1796 + };
1797 +
1798 + pixelvalve0: pixelvalve@7e206000 {
1799 + /* Add label */
1800 + status = "disabled";
1801 + };
1802 +
1803 + pixelvalve1: pixelvalve@7e207000 {
1804 + /* Add label */
1805 + status = "disabled";
1806 + };
1807 +
1808 + dpi: dpi@7e208000 {
1809 + compatible = "brcm,bcm2835-dpi";
1810 + reg = <0x7e208000 0x8c>;
1811 + clocks = <&clocks BCM2835_CLOCK_VPU>,
1812 + <&clocks BCM2835_CLOCK_DPI>;
1813 + clock-names = "core", "pixel";
1814 + #address-cells = <1>;
1815 + #size-cells = <0>;
1816 + status = "disabled";
1817 + };
1818 +
1819 + /delete-node/ sdhci@7e300000;
1820 +
1821 + sdhci: mmc: mmc@7e300000 {
1822 + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
1823 + reg = <0x7e300000 0x100>;
1824 + interrupts = <2 30>;
1825 + clocks = <&clocks BCM2835_CLOCK_EMMC>;
1826 + dmas = <&dma 11>;
1827 + dma-names = "rx-tx";
1828 + brcm,overclock-50 = <0>;
1829 + status = "disabled";
1830 + };
1831 +
1832 + /* A clone of mmc but with non-removable set */
1833 + mmcnr: mmcnr@7e300000 {
1834 + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
1835 + reg = <0x7e300000 0x100>;
1836 + interrupts = <2 30>;
1837 + clocks = <&clocks BCM2835_CLOCK_EMMC>;
1838 + dmas = <&dma 11>;
1839 + dma-names = "rx-tx";
1840 + brcm,overclock-50 = <0>;
1841 + non-removable;
1842 + status = "disabled";
1843 + };
1844 +
1845 + hvs: hvs@7e400000 {
1846 + /* Add label */
1847 + status = "disabled";
1848 + };
1849 +
1850 + firmwarekms: firmwarekms@7e600000 {
1851 + compatible = "raspberrypi,rpi-firmware-kms";
1852 + /* SMI interrupt reg */
1853 + reg = <0x7e600000 0x100>;
1854 + interrupts = <2 16>;
1855 + brcm,firmware = <&firmware>;
1856 + status = "disabled";
1857 + };
1858 +
1859 + smi: smi@7e600000 {
1860 + compatible = "brcm,bcm2835-smi";
1861 + reg = <0x7e600000 0x100>;
1862 + interrupts = <2 16>;
1863 + clocks = <&clocks BCM2835_CLOCK_SMI>;
1864 + assigned-clocks = <&clocks BCM2835_CLOCK_SMI>;
1865 + assigned-clock-rates = <125000000>;
1866 + dmas = <&dma 4>;
1867 + dma-names = "rx-tx";
1868 + status = "disabled";
1869 + };
1870 +
1871 + pixelvalve2: pixelvalve@7e807000 {
1872 + /* Add label */
1873 + status = "disabled";
1874 + };
1875 +
1876 + hdmi@7e902000 { /* hdmi */
1877 + status = "disabled";
1878 + };
1879 +
1880 + usb@7e980000 { /* usb */
1881 + compatible = "brcm,bcm2708-usb";
1882 + reg = <0x7e980000 0x10000>,
1883 + <0x7e006000 0x1000>;
1884 + interrupt-names = "usb",
1885 + "soft";
1886 + interrupts = <1 9>,
1887 + <2 0>;
1888 + };
1889 +
1890 + v3d@7ec00000 { /* vd3 */
1891 + compatible = "brcm,vc4-v3d";
1892 + power-domains = <&power RPI_POWER_DOMAIN_V3D>;
1893 + status = "disabled";
1894 + };
1895 +
1896 + axiperf: axiperf {
1897 + compatible = "brcm,bcm2835-axiperf";
1898 + reg = <0x7e009800 0x100>,
1899 + <0x7ee08000 0x100>;
1900 + firmware = <&firmware>;
1901 + status = "disabled";
1902 + };
1903 + };
1904 +
1905 + __overrides__ {
1906 + cam0-pwdn-ctrl;
1907 + cam0-pwdn;
1908 + cam0-led-ctrl;
1909 + cam0-led;
1910 + };
1911 +};
1912 +
1913 +&vc4 {
1914 + status = "disabled";
1915 +};
1916 diff --git a/arch/arm/boot/dts/bcm2710-rpi-2-b.dts b/arch/arm/boot/dts/bcm2710-rpi-2-b.dts
1917 new file mode 100644
1918 index 000000000000..65a6f4d06866
1919 --- /dev/null
1920 +++ b/arch/arm/boot/dts/bcm2710-rpi-2-b.dts
1921 @@ -0,0 +1,125 @@
1922 +/dts-v1/;
1923 +
1924 +#include "bcm2710.dtsi"
1925 +#include "bcm2709-rpi.dtsi"
1926 +#include "bcm283x-rpi-smsc9514.dtsi"
1927 +#include "bcm283x-rpi-csi1-2lane.dtsi"
1928 +
1929 +/ {
1930 + compatible = "raspberrypi,2-model-b-rev2", "brcm,bcm2837";
1931 + model = "Raspberry Pi 2 Model B rev 1.2";
1932 +};
1933 +
1934 +&gpio {
1935 + spi0_pins: spi0_pins {
1936 + brcm,pins = <9 10 11>;
1937 + brcm,function = <4>; /* alt0 */
1938 + };
1939 +
1940 + spi0_cs_pins: spi0_cs_pins {
1941 + brcm,pins = <8 7>;
1942 + brcm,function = <1>; /* output */
1943 + };
1944 +
1945 + i2c0_pins: i2c0 {
1946 + brcm,pins = <0 1>;
1947 + brcm,function = <4>;
1948 + };
1949 +
1950 + i2c1_pins: i2c1 {
1951 + brcm,pins = <2 3>;
1952 + brcm,function = <4>;
1953 + };
1954 +
1955 + i2s_pins: i2s {
1956 + brcm,pins = <18 19 20 21>;
1957 + brcm,function = <4>; /* alt0 */
1958 + };
1959 +
1960 + audio_pins: audio_pins {
1961 + brcm,pins = <40 45>;
1962 + brcm,function = <4>;
1963 + };
1964 +};
1965 +
1966 +&uart0 {
1967 + status = "okay";
1968 +};
1969 +
1970 +&spi0 {
1971 + pinctrl-names = "default";
1972 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1973 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1974 +
1975 + spidev0: spidev@0{
1976 + compatible = "spidev";
1977 + reg = <0>; /* CE0 */
1978 + #address-cells = <1>;
1979 + #size-cells = <0>;
1980 + spi-max-frequency = <125000000>;
1981 + };
1982 +
1983 + spidev1: spidev@1{
1984 + compatible = "spidev";
1985 + reg = <1>; /* CE1 */
1986 + #address-cells = <1>;
1987 + #size-cells = <0>;
1988 + spi-max-frequency = <125000000>;
1989 + };
1990 +};
1991 +
1992 +&i2c0 {
1993 + pinctrl-names = "default";
1994 + pinctrl-0 = <&i2c0_pins>;
1995 + clock-frequency = <100000>;
1996 +};
1997 +
1998 +&i2c1 {
1999 + pinctrl-names = "default";
2000 + pinctrl-0 = <&i2c1_pins>;
2001 + clock-frequency = <100000>;
2002 +};
2003 +
2004 +&i2c2 {
2005 + clock-frequency = <100000>;
2006 +};
2007 +
2008 +&i2s {
2009 + pinctrl-names = "default";
2010 + pinctrl-0 = <&i2s_pins>;
2011 +};
2012 +
2013 +&leds {
2014 + act_led: act {
2015 + label = "led0";
2016 + linux,default-trigger = "mmc0";
2017 + gpios = <&gpio 47 0>;
2018 + };
2019 +
2020 + pwr_led: pwr {
2021 + label = "led1";
2022 + linux,default-trigger = "input";
2023 + gpios = <&gpio 35 0>;
2024 + };
2025 +};
2026 +
2027 +&hdmi {
2028 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
2029 +};
2030 +
2031 +&audio {
2032 + pinctrl-names = "default";
2033 + pinctrl-0 = <&audio_pins>;
2034 +};
2035 +
2036 +/ {
2037 + __overrides__ {
2038 + act_led_gpio = <&act_led>,"gpios:4";
2039 + act_led_activelow = <&act_led>,"gpios:8";
2040 + act_led_trigger = <&act_led>,"linux,default-trigger";
2041 +
2042 + pwr_led_gpio = <&pwr_led>,"gpios:4";
2043 + pwr_led_activelow = <&pwr_led>,"gpios:8";
2044 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
2045 + };
2046 +};
2047 diff --git a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
2048 new file mode 100644
2049 index 000000000000..55420ac94dcf
2050 --- /dev/null
2051 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
2052 @@ -0,0 +1,183 @@
2053 +/dts-v1/;
2054 +
2055 +#include "bcm2710.dtsi"
2056 +#include "bcm2709-rpi.dtsi"
2057 +#include "bcm283x-rpi-lan7515.dtsi"
2058 +#include "bcm283x-rpi-csi1-2lane.dtsi"
2059 +
2060 +/ {
2061 + compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
2062 + model = "Raspberry Pi 3 Model B+";
2063 +
2064 + chosen {
2065 + bootargs = "coherent_pool=1M 8250.nr_uarts=1";
2066 + };
2067 +
2068 + aliases {
2069 + serial0 = &uart1;
2070 + serial1 = &uart0;
2071 + mmc1 = &mmcnr;
2072 + };
2073 +};
2074 +
2075 +&gpio {
2076 + spi0_pins: spi0_pins {
2077 + brcm,pins = <9 10 11>;
2078 + brcm,function = <4>; /* alt0 */
2079 + };
2080 +
2081 + spi0_cs_pins: spi0_cs_pins {
2082 + brcm,pins = <8 7>;
2083 + brcm,function = <1>; /* output */
2084 + };
2085 +
2086 + i2c0_pins: i2c0 {
2087 + brcm,pins = <0 1>;
2088 + brcm,function = <4>;
2089 + };
2090 +
2091 + i2c1_pins: i2c1 {
2092 + brcm,pins = <2 3>;
2093 + brcm,function = <4>;
2094 + };
2095 +
2096 + i2s_pins: i2s {
2097 + brcm,pins = <18 19 20 21>;
2098 + brcm,function = <4>; /* alt0 */
2099 + };
2100 +
2101 + sdio_pins: sdio_pins {
2102 + brcm,pins = <34 35 36 37 38 39>;
2103 + brcm,function = <7>; // alt3 = SD1
2104 + brcm,pull = <0 2 2 2 2 2>;
2105 + };
2106 +
2107 + bt_pins: bt_pins {
2108 + brcm,pins = <43>;
2109 + brcm,function = <4>; /* alt0:GPCLK2 */
2110 + brcm,pull = <0>;
2111 + };
2112 +
2113 + uart0_pins: uart0_pins {
2114 + brcm,pins = <32 33>;
2115 + brcm,function = <7>; /* alt3=UART0 */
2116 + brcm,pull = <0 2>;
2117 + };
2118 +
2119 + uart1_pins: uart1_pins {
2120 + brcm,pins;
2121 + brcm,function;
2122 + brcm,pull;
2123 + };
2124 +
2125 + audio_pins: audio_pins {
2126 + brcm,pins = <40 41>;
2127 + brcm,function = <4>;
2128 + };
2129 +};
2130 +
2131 +&mmcnr {
2132 + pinctrl-names = "default";
2133 + pinctrl-0 = <&sdio_pins>;
2134 + bus-width = <4>;
2135 + status = "okay";
2136 +};
2137 +
2138 +&firmware {
2139 + expgpio: expgpio {
2140 + compatible = "raspberrypi,firmware-gpio";
2141 + gpio-controller;
2142 + #gpio-cells = <2>;
2143 + status = "okay";
2144 + };
2145 +};
2146 +
2147 +&uart0 {
2148 + pinctrl-names = "default";
2149 + pinctrl-0 = <&uart0_pins &bt_pins>;
2150 + status = "okay";
2151 +};
2152 +
2153 +&uart1 {
2154 + pinctrl-names = "default";
2155 + pinctrl-0 = <&uart1_pins>;
2156 + status = "okay";
2157 +};
2158 +
2159 +&spi0 {
2160 + pinctrl-names = "default";
2161 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2162 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2163 +
2164 + spidev0: spidev@0{
2165 + compatible = "spidev";
2166 + reg = <0>; /* CE0 */
2167 + #address-cells = <1>;
2168 + #size-cells = <0>;
2169 + spi-max-frequency = <125000000>;
2170 + };
2171 +
2172 + spidev1: spidev@1{
2173 + compatible = "spidev";
2174 + reg = <1>; /* CE1 */
2175 + #address-cells = <1>;
2176 + #size-cells = <0>;
2177 + spi-max-frequency = <125000000>;
2178 + };
2179 +};
2180 +
2181 +&i2c0 {
2182 + pinctrl-names = "default";
2183 + pinctrl-0 = <&i2c0_pins>;
2184 + clock-frequency = <100000>;
2185 +};
2186 +
2187 +&i2c1 {
2188 + pinctrl-names = "default";
2189 + pinctrl-0 = <&i2c1_pins>;
2190 + clock-frequency = <100000>;
2191 +};
2192 +
2193 +&i2c2 {
2194 + clock-frequency = <100000>;
2195 +};
2196 +
2197 +&i2s {
2198 + pinctrl-names = "default";
2199 + pinctrl-0 = <&i2s_pins>;
2200 +};
2201 +
2202 +&leds {
2203 + act_led: act {
2204 + label = "led0";
2205 + linux,default-trigger = "mmc0";
2206 + gpios = <&gpio 29 0>;
2207 + };
2208 +
2209 + pwr_led: pwr {
2210 + label = "led1";
2211 + linux,default-trigger = "default-on";
2212 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
2213 + };
2214 +};
2215 +
2216 +&hdmi {
2217 + hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
2218 +};
2219 +
2220 +&audio {
2221 + pinctrl-names = "default";
2222 + pinctrl-0 = <&audio_pins>;
2223 +};
2224 +
2225 +/ {
2226 + __overrides__ {
2227 + act_led_gpio = <&act_led>,"gpios:4";
2228 + act_led_activelow = <&act_led>,"gpios:8";
2229 + act_led_trigger = <&act_led>,"linux,default-trigger";
2230 +
2231 + pwr_led_gpio = <&pwr_led>,"gpios:4";
2232 + pwr_led_activelow = <&pwr_led>,"gpios:8";
2233 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
2234 + };
2235 +};
2236 diff --git a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
2237 new file mode 100644
2238 index 000000000000..261827cdb957
2239 --- /dev/null
2240 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
2241 @@ -0,0 +1,194 @@
2242 +/dts-v1/;
2243 +
2244 +#include "bcm2710.dtsi"
2245 +#include "bcm2709-rpi.dtsi"
2246 +#include "bcm283x-rpi-smsc9514.dtsi"
2247 +#include "bcm283x-rpi-csi1-2lane.dtsi"
2248 +
2249 +/ {
2250 + compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
2251 + model = "Raspberry Pi 3 Model B";
2252 +
2253 + chosen {
2254 + bootargs = "coherent_pool=1M 8250.nr_uarts=1";
2255 + };
2256 +
2257 + aliases {
2258 + serial0 = &uart1;
2259 + serial1 = &uart0;
2260 + mmc1 = &mmcnr;
2261 + };
2262 +};
2263 +
2264 +&gpio {
2265 + spi0_pins: spi0_pins {
2266 + brcm,pins = <9 10 11>;
2267 + brcm,function = <4>; /* alt0 */
2268 + };
2269 +
2270 + spi0_cs_pins: spi0_cs_pins {
2271 + brcm,pins = <8 7>;
2272 + brcm,function = <1>; /* output */
2273 + };
2274 +
2275 + i2c0_pins: i2c0 {
2276 + brcm,pins = <0 1>;
2277 + brcm,function = <4>;
2278 + };
2279 +
2280 + i2c1_pins: i2c1 {
2281 + brcm,pins = <2 3>;
2282 + brcm,function = <4>;
2283 + };
2284 +
2285 + i2s_pins: i2s {
2286 + brcm,pins = <18 19 20 21>;
2287 + brcm,function = <4>; /* alt0 */
2288 + };
2289 +
2290 + sdio_pins: sdio_pins {
2291 + brcm,pins = <34 35 36 37 38 39>;
2292 + brcm,function = <7>; // alt3 = SD1
2293 + brcm,pull = <0 2 2 2 2 2>;
2294 + };
2295 +
2296 + bt_pins: bt_pins {
2297 + brcm,pins = <43>;
2298 + brcm,function = <4>; /* alt0:GPCLK2 */
2299 + brcm,pull = <0>;
2300 + };
2301 +
2302 + uart0_pins: uart0_pins {
2303 + brcm,pins = <32 33>;
2304 + brcm,function = <7>; /* alt3=UART0 */
2305 + brcm,pull = <0 2>;
2306 + };
2307 +
2308 + uart1_pins: uart1_pins {
2309 + brcm,pins;
2310 + brcm,function;
2311 + brcm,pull;
2312 + };
2313 +
2314 + audio_pins: audio_pins {
2315 + brcm,pins = <40 41>;
2316 + brcm,function = <4>;
2317 + };
2318 +};
2319 +
2320 +&mmcnr {
2321 + pinctrl-names = "default";
2322 + pinctrl-0 = <&sdio_pins>;
2323 + bus-width = <4>;
2324 + status = "okay";
2325 +};
2326 +
2327 +&soc {
2328 + virtgpio: virtgpio {
2329 + compatible = "brcm,bcm2835-virtgpio";
2330 + gpio-controller;
2331 + #gpio-cells = <2>;
2332 + firmware = <&firmware>;
2333 + status = "okay";
2334 + };
2335 +
2336 +};
2337 +
2338 +&firmware {
2339 + expgpio: expgpio {
2340 + compatible = "raspberrypi,firmware-gpio";
2341 + gpio-controller;
2342 + #gpio-cells = <2>;
2343 + status = "okay";
2344 + };
2345 +};
2346 +
2347 +&uart0 {
2348 + pinctrl-names = "default";
2349 + pinctrl-0 = <&uart0_pins &bt_pins>;
2350 + status = "okay";
2351 +};
2352 +
2353 +&uart1 {
2354 + pinctrl-names = "default";
2355 + pinctrl-0 = <&uart1_pins>;
2356 + status = "okay";
2357 +};
2358 +
2359 +&spi0 {
2360 + pinctrl-names = "default";
2361 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2362 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2363 +
2364 + spidev0: spidev@0{
2365 + compatible = "spidev";
2366 + reg = <0>; /* CE0 */
2367 + #address-cells = <1>;
2368 + #size-cells = <0>;
2369 + spi-max-frequency = <125000000>;
2370 + };
2371 +
2372 + spidev1: spidev@1{
2373 + compatible = "spidev";
2374 + reg = <1>; /* CE1 */
2375 + #address-cells = <1>;
2376 + #size-cells = <0>;
2377 + spi-max-frequency = <125000000>;
2378 + };
2379 +};
2380 +
2381 +&i2c0 {
2382 + pinctrl-names = "default";
2383 + pinctrl-0 = <&i2c0_pins>;
2384 + clock-frequency = <100000>;
2385 +};
2386 +
2387 +&i2c1 {
2388 + pinctrl-names = "default";
2389 + pinctrl-0 = <&i2c1_pins>;
2390 + clock-frequency = <100000>;
2391 +};
2392 +
2393 +&i2c2 {
2394 + clock-frequency = <100000>;
2395 +};
2396 +
2397 +&i2s {
2398 + pinctrl-names = "default";
2399 + pinctrl-0 = <&i2s_pins>;
2400 +};
2401 +
2402 +&leds {
2403 + act_led: act {
2404 + label = "led0";
2405 + linux,default-trigger = "mmc0";
2406 + gpios = <&virtgpio 0 0>;
2407 + };
2408 +
2409 + pwr_led: pwr {
2410 + label = "led1";
2411 + linux,default-trigger = "input";
2412 + gpios = <&expgpio 7 0>;
2413 + };
2414 +};
2415 +
2416 +&hdmi {
2417 + hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
2418 +};
2419 +
2420 +&audio {
2421 + pinctrl-names = "default";
2422 + pinctrl-0 = <&audio_pins>;
2423 +};
2424 +
2425 +/ {
2426 + __overrides__ {
2427 + act_led_gpio = <&act_led>,"gpios:4";
2428 + act_led_activelow = <&act_led>,"gpios:8";
2429 + act_led_trigger = <&act_led>,"linux,default-trigger";
2430 +
2431 + pwr_led_gpio = <&pwr_led>,"gpios:4";
2432 + pwr_led_activelow = <&pwr_led>,"gpios:8";
2433 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
2434 + };
2435 +};
2436 diff --git a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
2437 new file mode 100644
2438 index 000000000000..addebe448e32
2439 --- /dev/null
2440 +++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
2441 @@ -0,0 +1,135 @@
2442 +/dts-v1/;
2443 +
2444 +#include "bcm2710.dtsi"
2445 +#include "bcm2709-rpi.dtsi"
2446 +#include "bcm283x-rpi-csi0-2lane.dtsi"
2447 +#include "bcm283x-rpi-csi1-4lane.dtsi"
2448 +
2449 +/ {
2450 + compatible = "raspberrypi,3-compute-module", "brcm,bcm2837";
2451 + model = "Raspberry Pi Compute Module 3";
2452 +};
2453 +
2454 +&uart0 {
2455 + status = "okay";
2456 +};
2457 +
2458 +&gpio {
2459 + spi0_pins: spi0_pins {
2460 + brcm,pins = <9 10 11>;
2461 + brcm,function = <4>; /* alt0 */
2462 + };
2463 +
2464 + spi0_cs_pins: spi0_cs_pins {
2465 + brcm,pins = <8 7>;
2466 + brcm,function = <1>; /* output */
2467 + };
2468 +
2469 + i2c0_pins: i2c0 {
2470 + brcm,pins = <0 1>;
2471 + brcm,function = <4>;
2472 + };
2473 +
2474 + i2c1_pins: i2c1 {
2475 + brcm,pins = <2 3>;
2476 + brcm,function = <4>;
2477 + };
2478 +
2479 + i2s_pins: i2s {
2480 + brcm,pins = <18 19 20 21>;
2481 + brcm,function = <4>; /* alt0 */
2482 + };
2483 +
2484 + audio_pins: audio_pins {
2485 + brcm,pins;
2486 + brcm,function;
2487 + };
2488 +};
2489 +
2490 +&soc {
2491 + virtgpio: virtgpio {
2492 + compatible = "brcm,bcm2835-virtgpio";
2493 + gpio-controller;
2494 + #gpio-cells = <2>;
2495 + firmware = <&firmware>;
2496 + status = "okay";
2497 + };
2498 +
2499 +};
2500 +
2501 +&firmware {
2502 + expgpio: expgpio {
2503 + compatible = "raspberrypi,firmware-gpio";
2504 + gpio-controller;
2505 + #gpio-cells = <2>;
2506 + status = "okay";
2507 + };
2508 +};
2509 +
2510 +&spi0 {
2511 + pinctrl-names = "default";
2512 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2513 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2514 +
2515 + spidev0: spidev@0{
2516 + compatible = "spidev";
2517 + reg = <0>; /* CE0 */
2518 + #address-cells = <1>;
2519 + #size-cells = <0>;
2520 + spi-max-frequency = <125000000>;
2521 + };
2522 +
2523 + spidev1: spidev@1{
2524 + compatible = "spidev";
2525 + reg = <1>; /* CE1 */
2526 + #address-cells = <1>;
2527 + #size-cells = <0>;
2528 + spi-max-frequency = <125000000>;
2529 + };
2530 +};
2531 +
2532 +&i2c0 {
2533 + pinctrl-names = "default";
2534 + pinctrl-0 = <&i2c0_pins>;
2535 + clock-frequency = <100000>;
2536 +};
2537 +
2538 +&i2c1 {
2539 + pinctrl-names = "default";
2540 + pinctrl-0 = <&i2c1_pins>;
2541 + clock-frequency = <100000>;
2542 +};
2543 +
2544 +&i2c2 {
2545 + clock-frequency = <100000>;
2546 +};
2547 +
2548 +&i2s {
2549 + pinctrl-names = "default";
2550 + pinctrl-0 = <&i2s_pins>;
2551 +};
2552 +
2553 +&leds {
2554 + act_led: act {
2555 + label = "led0";
2556 + linux,default-trigger = "mmc0";
2557 + gpios = <&virtgpio 0 0>;
2558 + };
2559 +};
2560 +
2561 +&hdmi {
2562 + hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>;
2563 +};
2564 +
2565 +&audio {
2566 + pinctrl-names = "default";
2567 + pinctrl-0 = <&audio_pins>;
2568 +};
2569 +
2570 +/ {
2571 + __overrides__ {
2572 + act_led_gpio = <&act_led>,"gpios:4";
2573 + act_led_activelow = <&act_led>,"gpios:8";
2574 + act_led_trigger = <&act_led>,"linux,default-trigger";
2575 + };
2576 +};
2577 diff --git a/arch/arm/boot/dts/bcm2710.dtsi b/arch/arm/boot/dts/bcm2710.dtsi
2578 new file mode 100644
2579 index 000000000000..5c45ded273fe
2580 --- /dev/null
2581 +++ b/arch/arm/boot/dts/bcm2710.dtsi
2582 @@ -0,0 +1,25 @@
2583 +#include "bcm2837.dtsi"
2584 +#include "bcm270x.dtsi"
2585 +
2586 +/ {
2587 + compatible = "brcm,bcm2837", "brcm,bcm2836";
2588 +
2589 + arm-pmu {
2590 +#ifdef RPI364
2591 + compatible = "arm,armv8-pmuv3", "arm,cortex-a7-pmu";
2592 +#else
2593 + compatible = "arm,cortex-a7-pmu";
2594 +#endif
2595 + };
2596 +
2597 + soc {
2598 + /delete-node/ timer@7e003000;
2599 + };
2600 +
2601 + __overrides__ {
2602 + arm_freq = <&cpu0>, "clock-frequency:0",
2603 + <&cpu1>, "clock-frequency:0",
2604 + <&cpu2>, "clock-frequency:0",
2605 + <&cpu3>, "clock-frequency:0";
2606 + };
2607 +};
2608 diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
2609 new file mode 100644
2610 index 000000000000..ccdc274665c0
2611 --- /dev/null
2612 +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
2613 @@ -0,0 +1,338 @@
2614 +/dts-v1/;
2615 +
2616 +#include "bcm2711.dtsi"
2617 +#include "bcm2711-rpi.dtsi"
2618 +#include "bcm283x-rpi-csi1-2lane.dtsi"
2619 +
2620 +/ {
2621 + compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
2622 + model = "Raspberry Pi 4 Model B";
2623 +
2624 + memory@0 {
2625 + device_type = "memory";
2626 + reg = <0x0 0x0 0x0>;
2627 + };
2628 +
2629 + chosen {
2630 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 cma=64M";
2631 + };
2632 +
2633 + aliases {
2634 + serial0 = &uart1;
2635 + serial1 = &uart0;
2636 + mmc0 = &emmc2;
2637 + mmc1 = &mmcnr;
2638 + mmc2 = &sdhost;
2639 + i2c3 = &i2c3;
2640 + i2c4 = &i2c4;
2641 + i2c5 = &i2c5;
2642 + i2c6 = &i2c6;
2643 + /delete-property/ ethernet;
2644 + /delete-property/ intc;
2645 + ethernet0 = &genet;
2646 + };
2647 +};
2648 +
2649 +&soc {
2650 + virtgpio: virtgpio {
2651 + compatible = "brcm,bcm2835-virtgpio";
2652 + gpio-controller;
2653 + #gpio-cells = <2>;
2654 + firmware = <&firmware>;
2655 + status = "okay";
2656 + };
2657 +};
2658 +
2659 +&mmcnr {
2660 + pinctrl-names = "default";
2661 + pinctrl-0 = <&sdio_pins>;
2662 + bus-width = <4>;
2663 + status = "okay";
2664 +};
2665 +
2666 +&firmware {
2667 + expgpio: gpio {
2668 + compatible = "raspberrypi,firmware-gpio";
2669 + gpio-controller;
2670 + #gpio-cells = <2>;
2671 + gpio-line-names = "BT_ON",
2672 + "WL_ON",
2673 + "PWR_LED_OFF",
2674 + "GLOBAL_RESET",
2675 + "VDD_SD_IO_SEL",
2676 + "CAM_GPIO",
2677 + "",
2678 + "";
2679 + status = "okay";
2680 + };
2681 +};
2682 +
2683 +&uart0 {
2684 + pinctrl-names = "default";
2685 + pinctrl-0 = <&uart0_pins &bt_pins>;
2686 + status = "okay";
2687 +};
2688 +
2689 +&uart1 {
2690 + pinctrl-names = "default";
2691 + pinctrl-0 = <&uart1_pins>;
2692 + status = "okay";
2693 +};
2694 +
2695 +&spi0 {
2696 + pinctrl-names = "default";
2697 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2698 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2699 +
2700 + spidev0: spidev@0{
2701 + compatible = "spidev";
2702 + reg = <0>; /* CE0 */
2703 + #address-cells = <1>;
2704 + #size-cells = <0>;
2705 + spi-max-frequency = <125000000>;
2706 + };
2707 +
2708 + spidev1: spidev@1{
2709 + compatible = "spidev";
2710 + reg = <1>; /* CE1 */
2711 + #address-cells = <1>;
2712 + #size-cells = <0>;
2713 + spi-max-frequency = <125000000>;
2714 + };
2715 +};
2716 +
2717 +// =============================================
2718 +// Board specific stuff here
2719 +
2720 +/ {
2721 +
2722 + sd_io_1v8_reg: sd_io_1v8_reg {
2723 + status = "okay";
2724 + compatible = "regulator-gpio";
2725 + vin-supply = <&vdd_5v0_reg>;
2726 + regulator-name = "vdd-sd-io";
2727 + regulator-min-microvolt = <1800000>;
2728 + regulator-max-microvolt = <3300000>;
2729 + regulator-boot-on;
2730 + regulator-always-on;
2731 + regulator-settling-time-us = <5000>;
2732 +
2733 + gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
2734 + states = <1800000 0x1
2735 + 3300000 0x0>;
2736 + };
2737 +};
2738 +
2739 +&sdhost {
2740 + status = "disabled";
2741 +};
2742 +
2743 +&emmc2 {
2744 + status = "okay";
2745 + broken-cd;
2746 + vqmmc-supply = <&sd_io_1v8_reg>;
2747 +};
2748 +
2749 +&leds {
2750 + act_led: act {
2751 + label = "led0";
2752 + linux,default-trigger = "mmc0";
2753 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
2754 + };
2755 +
2756 + pwr_led: pwr {
2757 + label = "led1";
2758 + linux,default-trigger = "default-on";
2759 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
2760 + };
2761 +};
2762 +
2763 +&audio {
2764 + pinctrl-names = "default";
2765 + pinctrl-0 = <&audio_pins>;
2766 +};
2767 +
2768 +&sdhost_gpio48 {
2769 + brcm,pins = <22 23 24 25 26 27>;
2770 + brcm,function = <BCM2835_FSEL_ALT0>;
2771 +};
2772 +
2773 +&gpio {
2774 + spi0_pins: spi0_pins {
2775 + brcm,pins = <9 10 11>;
2776 + brcm,function = <BCM2835_FSEL_ALT0>;
2777 + };
2778 +
2779 + spi0_cs_pins: spi0_cs_pins {
2780 + brcm,pins = <8 7>;
2781 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
2782 + };
2783 +
2784 + spi3_pins: spi3_pins {
2785 + brcm,pins = <1 2 3>;
2786 + brcm,function = <BCM2835_FSEL_ALT3>;
2787 + };
2788 +
2789 + spi3_cs_pins: spi3_cs_pins {
2790 + brcm,pins = <0 24>;
2791 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
2792 + };
2793 +
2794 + spi4_pins: spi4_pins {
2795 + brcm,pins = <5 6 7>;
2796 + brcm,function = <BCM2835_FSEL_ALT3>;
2797 + };
2798 +
2799 + spi4_cs_pins: spi4_cs_pins {
2800 + brcm,pins = <4 25>;
2801 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
2802 + };
2803 +
2804 + spi5_pins: spi5_pins {
2805 + brcm,pins = <13 14 15>;
2806 + brcm,function = <BCM2835_FSEL_ALT3>;
2807 + };
2808 +
2809 + spi5_cs_pins: spi5_cs_pins {
2810 + brcm,pins = <12 26>;
2811 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
2812 + };
2813 +
2814 + spi6_pins: spi6_pins {
2815 + brcm,pins = <19 20 21>;
2816 + brcm,function = <BCM2835_FSEL_ALT3>;
2817 + };
2818 +
2819 + spi6_cs_pins: spi6_cs_pins {
2820 + brcm,pins = <18 27>;
2821 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
2822 + };
2823 +
2824 + i2c0_pins: i2c0 {
2825 + brcm,pins = <0 1>;
2826 + brcm,function = <BCM2835_FSEL_ALT0>;
2827 + brcm,pull = <BCM2835_PUD_UP>;
2828 + };
2829 +
2830 + i2c1_pins: i2c1 {
2831 + brcm,pins = <2 3>;
2832 + brcm,function = <BCM2835_FSEL_ALT0>;
2833 + brcm,pull = <BCM2835_PUD_UP>;
2834 + };
2835 +
2836 + i2c3_pins: i2c3 {
2837 + brcm,pins = <4 5>;
2838 + brcm,function = <BCM2835_FSEL_ALT5>;
2839 + brcm,pull = <BCM2835_PUD_UP>;
2840 + };
2841 +
2842 + i2c4_pins: i2c4 {
2843 + brcm,pins = <8 9>;
2844 + brcm,function = <BCM2835_FSEL_ALT5>;
2845 + brcm,pull = <BCM2835_PUD_UP>;
2846 + };
2847 +
2848 + i2c5_pins: i2c5 {
2849 + brcm,pins = <12 13>;
2850 + brcm,function = <BCM2835_FSEL_ALT5>;
2851 + brcm,pull = <BCM2835_PUD_UP>;
2852 + };
2853 +
2854 + i2c6_pins: i2c6 {
2855 + brcm,pins = <22 23>;
2856 + brcm,function = <BCM2835_FSEL_ALT5>;
2857 + brcm,pull = <BCM2835_PUD_UP>;
2858 + };
2859 +
2860 + i2s_pins: i2s {
2861 + brcm,pins = <18 19 20 21>;
2862 + brcm,function = <BCM2835_FSEL_ALT0>;
2863 + };
2864 +
2865 + sdio_pins: sdio_pins {
2866 + brcm,pins = <34 35 36 37 38 39>;
2867 + brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
2868 + brcm,pull = <0 2 2 2 2 2>;
2869 + };
2870 +
2871 + bt_pins: bt_pins {
2872 + brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
2873 + // to fool pinctrl
2874 + brcm,function = <0>;
2875 + brcm,pull = <2>;
2876 + };
2877 +
2878 + uart0_pins: uart0_pins {
2879 + brcm,pins = <32 33>;
2880 + brcm,function = <BCM2835_FSEL_ALT3>;
2881 + brcm,pull = <0 2>;
2882 + };
2883 +
2884 + uart1_pins: uart1_pins {
2885 + brcm,pins;
2886 + brcm,function;
2887 + brcm,pull;
2888 + };
2889 +
2890 + uart2_pins: uart2_pins {
2891 + brcm,pins = <0 1>;
2892 + brcm,function = <BCM2835_FSEL_ALT4>;
2893 + brcm,pull = <0 2>;
2894 + };
2895 +
2896 + uart3_pins: uart3_pins {
2897 + brcm,pins = <4 5>;
2898 + brcm,function = <BCM2835_FSEL_ALT4>;
2899 + brcm,pull = <0 2>;
2900 + };
2901 +
2902 + uart4_pins: uart4_pins {
2903 + brcm,pins = <8 9>;
2904 + brcm,function = <BCM2835_FSEL_ALT4>;
2905 + brcm,pull = <0 2>;
2906 + };
2907 +
2908 + uart5_pins: uart5_pins {
2909 + brcm,pins = <12 13>;
2910 + brcm,function = <BCM2835_FSEL_ALT4>;
2911 + brcm,pull = <0 2>;
2912 + };
2913 +
2914 + audio_pins: audio_pins {
2915 + brcm,pins = <40 41>;
2916 + brcm,function = <4>;
2917 + };
2918 +};
2919 +
2920 +&i2c0 {
2921 + pinctrl-names = "default";
2922 + pinctrl-0 = <&i2c0_pins>;
2923 + clock-frequency = <100000>;
2924 +};
2925 +
2926 +&i2c1 {
2927 + pinctrl-names = "default";
2928 + pinctrl-0 = <&i2c1_pins>;
2929 + clock-frequency = <100000>;
2930 +};
2931 +
2932 +&i2c2 {
2933 + clock-frequency = <100000>;
2934 +};
2935 +
2936 +&i2s {
2937 + pinctrl-names = "default";
2938 + pinctrl-0 = <&i2s_pins>;
2939 +};
2940 +
2941 +/ {
2942 + __overrides__ {
2943 + act_led_gpio = <&act_led>,"gpios:4";
2944 + act_led_activelow = <&act_led>,"gpios:8";
2945 + act_led_trigger = <&act_led>,"linux,default-trigger";
2946 +
2947 + pwr_led_gpio = <&pwr_led>,"gpios:4";
2948 + pwr_led_activelow = <&pwr_led>,"gpios:8";
2949 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
2950 + };
2951 +};
2952 diff --git a/arch/arm/boot/dts/bcm2711-rpi.dtsi b/arch/arm/boot/dts/bcm2711-rpi.dtsi
2953 new file mode 100644
2954 index 000000000000..d8ffaab8e86a
2955 --- /dev/null
2956 +++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi
2957 @@ -0,0 +1,7 @@
2958 +#include "bcm2708-rpi.dtsi"
2959 +#include "bcm2838-rpi.dtsi"
2960 +
2961 +&v3d {
2962 + /* Undo the overwriting by bcm270x.dtsi */
2963 + power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
2964 +};
2965 diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
2966 new file mode 100644
2967 index 000000000000..f134aba2badb
2968 --- /dev/null
2969 +++ b/arch/arm/boot/dts/bcm2711.dtsi
2970 @@ -0,0 +1,44 @@
2971 +#include "bcm2838.dtsi"
2972 +#include "bcm270x.dtsi"
2973 +
2974 +/ {
2975 + soc {
2976 + /delete-node/ v3d@7ec00000;
2977 + };
2978 +
2979 + __overrides__ {
2980 + arm_freq;
2981 + };
2982 +};
2983 +
2984 +&v3d {
2985 + status = "disabled";
2986 +};
2987 +
2988 +&firmwarekms {
2989 + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2990 +};
2991 +
2992 +&smi {
2993 + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2994 +};
2995 +
2996 +&mmc {
2997 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
2998 +};
2999 +
3000 +&mmcnr {
3001 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
3002 +};
3003 +
3004 +&usb {
3005 + reg = <0x7e980000 0x10000>,
3006 + <0x7e00b200 0x200>;
3007 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
3008 + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
3009 +};
3010 +
3011 +&gpio {
3012 + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
3013 + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
3014 +};
3015 diff --git a/arch/arm/boot/dts/bcm2835-common.dtsi b/arch/arm/boot/dts/bcm2835-common.dtsi
3016 new file mode 100644
3017 index 000000000000..eceb170fd5b7
3018 --- /dev/null
3019 +++ b/arch/arm/boot/dts/bcm2835-common.dtsi
3020 @@ -0,0 +1,54 @@
3021 +// SPDX-License-Identifier: GPL-2.0
3022 +
3023 +/* This include file covers the common peripherals and configuration between
3024 + * bcm2835, bcm2836 and bcm2837 implementations.
3025 + */
3026 +
3027 +/ {
3028 + soc {
3029 + timer@7e003000 {
3030 + compatible = "brcm,bcm2835-system-timer";
3031 + reg = <0x7e003000 0x1000>;
3032 + interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
3033 + /* This could be a reference to BCM2835_CLOCK_TIMER,
3034 + * but we don't have the driver using the common clock
3035 + * support yet.
3036 + */
3037 + clock-frequency = <1000000>;
3038 + };
3039 +
3040 + intc: interrupt-controller@7e00b200 {
3041 + compatible = "brcm,bcm2835-armctrl-ic";
3042 + reg = <0x7e00b200 0x200>;
3043 + interrupt-controller;
3044 + #interrupt-cells = <2>;
3045 + };
3046 +
3047 + thermal: thermal@7e212000 {
3048 + compatible = "brcm,bcm2835-thermal";
3049 + reg = <0x7e212000 0x8>;
3050 + clocks = <&clocks BCM2835_CLOCK_TSENS>;
3051 + #thermal-sensor-cells = <0>;
3052 + status = "disabled";
3053 + };
3054 +
3055 + v3d: v3d@7ec00000 {
3056 + compatible = "brcm,bcm2835-v3d";
3057 + reg = <0x7ec00000 0x1000>;
3058 + interrupts = <1 10>;
3059 + power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
3060 + };
3061 + };
3062 +};
3063 +
3064 +&gpio {
3065 + i2c_slave_gpio18: i2c_slave_gpio18 {
3066 + brcm,pins = <18 19 20 21>;
3067 + brcm,function = <BCM2835_FSEL_ALT3>;
3068 + };
3069 +
3070 + jtag_gpio4: jtag_gpio4 {
3071 + brcm,pins = <4 5 6 12 13>;
3072 + brcm,function = <BCM2835_FSEL_ALT5>;
3073 + };
3074 +};
3075 diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
3076 index 6c8ce39833bf..0cc6355a8c06 100644
3077 --- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
3078 +++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
3079 @@ -3,6 +3,7 @@
3080 #include "bcm2835.dtsi"
3081 #include "bcm2835-rpi.dtsi"
3082 #include "bcm283x-rpi-usb-host.dtsi"
3083 +#include "bcm283x-rpi-csi1-2lane.dtsi"
3084
3085 / {
3086 compatible = "raspberrypi,model-a-plus", "brcm,bcm2835";
3087 diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
3088 index 17fdd48346ff..21593978e851 100644
3089 --- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
3090 +++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
3091 @@ -3,6 +3,7 @@
3092 #include "bcm2835.dtsi"
3093 #include "bcm2835-rpi.dtsi"
3094 #include "bcm283x-rpi-usb-host.dtsi"
3095 +#include "bcm283x-rpi-csi1-2lane.dtsi"
3096
3097 / {
3098 compatible = "raspberrypi,model-a", "brcm,bcm2835";
3099 diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
3100 index b0355c229cdc..7c63ba90b827 100644
3101 --- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
3102 +++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
3103 @@ -4,6 +4,7 @@
3104 #include "bcm2835-rpi.dtsi"
3105 #include "bcm283x-rpi-smsc9514.dtsi"
3106 #include "bcm283x-rpi-usb-host.dtsi"
3107 +#include "bcm283x-rpi-csi1-2lane.dtsi"
3108
3109 / {
3110 compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
3111 diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
3112 index 33b3b5c02521..83e54a5fa3b4 100644
3113 --- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
3114 +++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
3115 @@ -4,6 +4,7 @@
3116 #include "bcm2835-rpi.dtsi"
3117 #include "bcm283x-rpi-smsc9512.dtsi"
3118 #include "bcm283x-rpi-usb-host.dtsi"
3119 +#include "bcm283x-rpi-csi1-2lane.dtsi"
3120
3121 / {
3122 compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835";
3123 diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
3124 index 2b69957e0113..c9d04b1f14fd 100644
3125 --- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
3126 +++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
3127 @@ -4,6 +4,7 @@
3128 #include "bcm2835-rpi.dtsi"
3129 #include "bcm283x-rpi-smsc9512.dtsi"
3130 #include "bcm283x-rpi-usb-host.dtsi"
3131 +#include "bcm283x-rpi-csi1-2lane.dtsi"
3132
3133 / {
3134 compatible = "raspberrypi,model-b", "brcm,bcm2835";
3135 diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
3136 index 6dd93c6f4966..42ce8b606354 100644
3137 --- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts
3138 +++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
3139 @@ -7,6 +7,7 @@
3140 #include "bcm2835.dtsi"
3141 #include "bcm2835-rpi.dtsi"
3142 #include "bcm283x-rpi-usb-otg.dtsi"
3143 +#include "bcm283x-rpi-csi1-2lane.dtsi"
3144
3145 / {
3146 compatible = "raspberrypi,model-zero", "brcm,bcm2835";
3147 diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
3148 index 6c6a7f620d8b..c77971e27175 100644
3149 --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
3150 +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
3151 @@ -29,6 +29,22 @@
3152 interrupts = <0 2>;
3153 };
3154 };
3155 +
3156 + vdd_3v3_reg: fixedregulator_3v3 {
3157 + compatible = "regulator-fixed";
3158 + regulator-name = "3v3";
3159 + regulator-min-microvolt = <3300000>;
3160 + regulator-max-microvolt = <3300000>;
3161 + regulator-always-on;
3162 + };
3163 +
3164 + vdd_5v0_reg: fixedregulator_5v0 {
3165 + compatible = "regulator-fixed";
3166 + regulator-name = "5v0";
3167 + regulator-min-microvolt = <5000000>;
3168 + regulator-max-microvolt = <5000000>;
3169 + regulator-always-on;
3170 + };
3171 };
3172
3173 &gpio {
3174 @@ -67,6 +83,15 @@
3175 power-domains = <&power RPI_POWER_DOMAIN_USB>;
3176 };
3177
3178 +&hdmi {
3179 + power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
3180 + status = "okay";
3181 +};
3182 +
3183 +&v3d {
3184 + power-domains = <&power RPI_POWER_DOMAIN_V3D>;
3185 +};
3186 +
3187 &vec {
3188 power-domains = <&power RPI_POWER_DOMAIN_VEC>;
3189 status = "okay";
3190 @@ -79,3 +104,11 @@
3191 &dsi1 {
3192 power-domains = <&power RPI_POWER_DOMAIN_DSI1>;
3193 };
3194 +
3195 +&csi0 {
3196 + power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>;
3197 +};
3198 +
3199 +&csi1 {
3200 + power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>;
3201 +};
3202 diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
3203 index a5c3824c8056..53bf4579cc22 100644
3204 --- a/arch/arm/boot/dts/bcm2835.dtsi
3205 +++ b/arch/arm/boot/dts/bcm2835.dtsi
3206 @@ -1,5 +1,6 @@
3207 // SPDX-License-Identifier: GPL-2.0
3208 #include "bcm283x.dtsi"
3209 +#include "bcm2835-common.dtsi"
3210
3211 / {
3212 compatible = "brcm,bcm2835";
3213 diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
3214 index 0455a680394a..6b0a6d5d5ca4 100644
3215 --- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
3216 +++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
3217 @@ -4,6 +4,7 @@
3218 #include "bcm2836-rpi.dtsi"
3219 #include "bcm283x-rpi-smsc9514.dtsi"
3220 #include "bcm283x-rpi-usb-host.dtsi"
3221 +#include "bcm283x-rpi-csi1-2lane.dtsi"
3222
3223 / {
3224 compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
3225 diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi
3226 index c933e8413884..82d6c4662ae4 100644
3227 --- a/arch/arm/boot/dts/bcm2836.dtsi
3228 +++ b/arch/arm/boot/dts/bcm2836.dtsi
3229 @@ -1,5 +1,6 @@
3230 // SPDX-License-Identifier: GPL-2.0
3231 #include "bcm283x.dtsi"
3232 +#include "bcm2835-common.dtsi"
3233
3234 / {
3235 compatible = "brcm,bcm2836";
3236 diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
3237 index 054ecaa355c9..3d03e7d0fbf0 100644
3238 --- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
3239 +++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
3240 @@ -4,6 +4,7 @@
3241 #include "bcm2836-rpi.dtsi"
3242 #include "bcm283x-rpi-smsc9514.dtsi"
3243 #include "bcm283x-rpi-usb-host.dtsi"
3244 +#include "bcm283x-rpi-csi1-2lane.dtsi"
3245
3246 / {
3247 compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
3248 diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
3249 index beb6c502dadc..9e95fee78e19 100644
3250 --- a/arch/arm/boot/dts/bcm2837.dtsi
3251 +++ b/arch/arm/boot/dts/bcm2837.dtsi
3252 @@ -1,4 +1,5 @@
3253 #include "bcm283x.dtsi"
3254 +#include "bcm2835-common.dtsi"
3255
3256 / {
3257 compatible = "brcm,bcm2837";
3258 diff --git a/arch/arm/boot/dts/bcm2838-rpi-4-b.dts b/arch/arm/boot/dts/bcm2838-rpi-4-b.dts
3259 new file mode 100644
3260 index 000000000000..7170a97bd3e4
3261 --- /dev/null
3262 +++ b/arch/arm/boot/dts/bcm2838-rpi-4-b.dts
3263 @@ -0,0 +1,118 @@
3264 +// SPDX-License-Identifier: GPL-2.0
3265 +/dts-v1/;
3266 +#include "bcm2838.dtsi"
3267 +#include "bcm2835-rpi.dtsi"
3268 +#include "bcm2838-rpi.dtsi"
3269 +
3270 +/ {
3271 + compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
3272 + model = "Raspberry Pi 4 Model B";
3273 +
3274 + chosen {
3275 + /* 8250 auxiliary UART instead of pl011 */
3276 + stdout-path = "serial1:115200n8";
3277 + };
3278 +
3279 + memory@0 {
3280 + reg = <0 0 0x40000000>;
3281 + };
3282 +
3283 + leds {
3284 + act {
3285 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
3286 + };
3287 +
3288 + pwr {
3289 + label = "PWR";
3290 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
3291 + };
3292 + };
3293 +
3294 + wifi_pwrseq: wifi-pwrseq {
3295 + compatible = "mmc-pwrseq-simple";
3296 + reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
3297 + };
3298 +
3299 + sd_io_1v8_reg: sd_io_1v8_reg {
3300 + status = "okay";
3301 + compatible = "regulator-gpio";
3302 + vin-supply = <&vdd_5v0_reg>;
3303 + regulator-name = "vdd-sd-io";
3304 + regulator-min-microvolt = <1800000>;
3305 + regulator-max-microvolt = <3300000>;
3306 + regulator-boot-on;
3307 + regulator-always-on;
3308 + regulator-settling-time-us = <5000>;
3309 +
3310 + gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
3311 + states = <1800000 0x1
3312 + 3300000 0x0>;
3313 + };
3314 +};
3315 +
3316 +&firmware {
3317 + expgpio: gpio {
3318 + compatible = "raspberrypi,firmware-gpio";
3319 + gpio-controller;
3320 + #gpio-cells = <2>;
3321 + gpio-line-names = "BT_ON",
3322 + "WL_ON",
3323 + "PWR_LED_OFF",
3324 + "GLOBAL_RESET",
3325 + "VDD_SD_IO_SEL",
3326 + "CAM_GPIO",
3327 + "",
3328 + "";
3329 + status = "okay";
3330 + };
3331 +};
3332 +
3333 +&pwm1 {
3334 + pinctrl-names = "default";
3335 + pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio41>;
3336 + status = "okay";
3337 +};
3338 +
3339 +/* SDHCI is used to control the SDIO for wireless */
3340 +&sdhci {
3341 + #address-cells = <1>;
3342 + #size-cells = <0>;
3343 + pinctrl-names = "default";
3344 + pinctrl-0 = <&emmc_gpio34>;
3345 + status = "okay";
3346 + bus-width = <4>;
3347 + non-removable;
3348 + mmc-pwrseq = <&wifi_pwrseq>;
3349 +
3350 + brcmf: wifi@1 {
3351 + reg = <1>;
3352 + compatible = "brcm,bcm4329-fmac";
3353 + };
3354 +};
3355 +
3356 +/* EMMC2 is used to drive the SD card */
3357 +&emmc2 {
3358 + status = "okay";
3359 + broken-cd;
3360 + vqmmc-supply = <&sd_io_1v8_reg>;
3361 +};
3362 +
3363 +/* uart0 communicates with the BT module */
3364 +&uart0 {
3365 + pinctrl-names = "default";
3366 + pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32 &gpclk2_gpio43>;
3367 + status = "okay";
3368 +
3369 + bluetooth {
3370 + compatible = "brcm,bcm43438-bt";
3371 + max-speed = <2000000>;
3372 + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
3373 + };
3374 +};
3375 +
3376 +/* uart1 is mapped to the pin header */
3377 +&uart1 {
3378 + pinctrl-names = "default";
3379 + pinctrl-0 = <&uart1_gpio14>;
3380 + status = "okay";
3381 +};
3382 diff --git a/arch/arm/boot/dts/bcm2838-rpi.dtsi b/arch/arm/boot/dts/bcm2838-rpi.dtsi
3383 new file mode 100644
3384 index 000000000000..140cfa312d1a
3385 --- /dev/null
3386 +++ b/arch/arm/boot/dts/bcm2838-rpi.dtsi
3387 @@ -0,0 +1,25 @@
3388 +// SPDX-License-Identifier: GPL-2.0
3389 +
3390 +/ {
3391 + soc {
3392 + /delete-node/ mailbox@7e00b840;
3393 + };
3394 +};
3395 +
3396 +&scb {
3397 + vchiq: mailbox@7e00b840 {
3398 + compatible = "brcm,bcm2838-vchiq";
3399 + reg = <0 0x7e00b840 0x3c>;
3400 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
3401 + };
3402 +};
3403 +
3404 +&dma {
3405 + /* The VPU firmware uses DMA channel 11 for VCHIQ */
3406 + brcm,dma-channel-mask = <0x1f5>;
3407 +};
3408 +
3409 +&dma40 {
3410 + /* The VPU firmware DMA channel 11 for VCHIQ */
3411 + brcm,dma-channel-mask = <0x7000>;
3412 +};
3413 diff --git a/arch/arm/boot/dts/bcm2838.dtsi b/arch/arm/boot/dts/bcm2838.dtsi
3414 new file mode 100644
3415 index 000000000000..a8614cc3ad6a
3416 --- /dev/null
3417 +++ b/arch/arm/boot/dts/bcm2838.dtsi
3418 @@ -0,0 +1,746 @@
3419 +// SPDX-License-Identifier: GPL-2.0
3420 +#include "bcm283x.dtsi"
3421 +
3422 +#include <dt-bindings/interrupt-controller/arm-gic.h>
3423 +#include <dt-bindings/soc/bcm2835-pm.h>
3424 +
3425 +/ {
3426 + compatible = "brcm,bcm2838";
3427 +
3428 + #address-cells = <2>;
3429 + #size-cells = <1>;
3430 +
3431 + interrupt-parent = <&gicv2>;
3432 +
3433 + soc {
3434 + ranges = <0x7e000000 0x0 0xfe000000 0x01800000>,
3435 + <0x7c000000 0x0 0xfc000000 0x02000000>,
3436 + <0x40000000 0x0 0xff800000 0x00800000>;
3437 + /* Emulate a contiguous 30-bit address range for DMA */
3438 + dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>;
3439 +
3440 + /delete-node/ interrupt-controller@7e00f300;
3441 + /delete-node/ v3d@7ec00000;
3442 +
3443 + local_intc: local_intc@40000000 {
3444 + compatible = "brcm,bcm2836-l1-intc";
3445 + reg = <0x40000000 0x100>;
3446 + };
3447 +
3448 + gicv2: gic400@40041000 {
3449 + interrupt-controller;
3450 + #interrupt-cells = <3>;
3451 + compatible = "arm,gic-400";
3452 + reg = <0x40041000 0x1000>,
3453 + <0x40042000 0x2000>,
3454 + <0x40044000 0x2000>,
3455 + <0x40046000 0x2000>;
3456 + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
3457 + IRQ_TYPE_LEVEL_HIGH)>;
3458 + };
3459 +
3460 + thermal: thermal@7d5d2200 {
3461 + compatible = "brcm,avs-tmon-bcm2838";
3462 + reg = <0x7d5d2200 0x2c>;
3463 + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
3464 + interrupt-names = "tmon";
3465 + clocks = <&clocks BCM2835_CLOCK_TSENS>;
3466 + #thermal-sensor-cells = <0>;
3467 + status = "okay";
3468 + };
3469 +
3470 + pm: watchdog@7e100000 {
3471 + reg = <0x7e100000 0x114>,
3472 + <0x7e00a000 0x24>,
3473 + <0x7ec11000 0x20>;
3474 + };
3475 +
3476 + rng@7e104000 {
3477 + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
3478 + };
3479 +
3480 + uart2: serial@7e201400 {
3481 + compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
3482 + reg = <0x7e201400 0x200>;
3483 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
3484 + clocks = <&clocks BCM2835_CLOCK_UART>,
3485 + <&clocks BCM2835_CLOCK_VPU>;
3486 + clock-names = "uartclk", "apb_pclk";
3487 + arm,primecell-periphid = <0x00241011>;
3488 + status = "disabled";
3489 + };
3490 +
3491 + uart3: serial@7e201600 {
3492 + compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
3493 + reg = <0x7e201600 0x200>;
3494 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
3495 + clocks = <&clocks BCM2835_CLOCK_UART>,
3496 + <&clocks BCM2835_CLOCK_VPU>;
3497 + clock-names = "uartclk", "apb_pclk";
3498 + arm,primecell-periphid = <0x00241011>;
3499 + status = "disabled";
3500 + };
3501 +
3502 + uart4: serial@7e201800 {
3503 + compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
3504 + reg = <0x7e201800 0x200>;
3505 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
3506 + clocks = <&clocks BCM2835_CLOCK_UART>,
3507 + <&clocks BCM2835_CLOCK_VPU>;
3508 + clock-names = "uartclk", "apb_pclk";
3509 + arm,primecell-periphid = <0x00241011>;
3510 + status = "disabled";
3511 + };
3512 +
3513 + uart5: serial@7e201a00 {
3514 + compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
3515 + reg = <0x7e201a00 0x200>;
3516 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
3517 + clocks = <&clocks BCM2835_CLOCK_UART>,
3518 + <&clocks BCM2835_CLOCK_VPU>;
3519 + clock-names = "uartclk", "apb_pclk";
3520 + arm,primecell-periphid = <0x00241011>;
3521 + status = "disabled";
3522 + };
3523 +
3524 + spi@7e204000 {
3525 + reg = <0x7e204000 0x0200>;
3526 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
3527 + };
3528 +
3529 + spi3: spi@7e204600 {
3530 + compatible = "brcm,bcm2835-spi";
3531 + reg = <0x7e204600 0x0200>;
3532 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
3533 + clocks = <&clocks BCM2835_CLOCK_VPU>;
3534 + #address-cells = <1>;
3535 + #size-cells = <0>;
3536 + status = "disabled";
3537 + };
3538 +
3539 + spi4: spi@7e204800 {
3540 + compatible = "brcm,bcm2835-spi";
3541 + reg = <0x7e204800 0x0200>;
3542 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
3543 + clocks = <&clocks BCM2835_CLOCK_VPU>;
3544 + #address-cells = <1>;
3545 + #size-cells = <0>;
3546 + status = "disabled";
3547 + };
3548 +
3549 + spi5: spi@7e204a00 {
3550 + compatible = "brcm,bcm2835-spi";
3551 + reg = <0x7e204a00 0x0200>;
3552 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
3553 + clocks = <&clocks BCM2835_CLOCK_VPU>;
3554 + #address-cells = <1>;
3555 + #size-cells = <0>;
3556 + status = "disabled";
3557 + };
3558 +
3559 + spi6: spi@7e204c00 {
3560 + compatible = "brcm,bcm2835-spi";
3561 + reg = <0x7e204c00 0x0200>;
3562 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
3563 + clocks = <&clocks BCM2835_CLOCK_VPU>;
3564 + #address-cells = <1>;
3565 + #size-cells = <0>;
3566 + status = "disabled";
3567 + };
3568 +
3569 + i2c3: i2c@7e205600 {
3570 + compatible = "brcm,bcm2835-i2c";
3571 + reg = <0x7e205600 0x200>;
3572 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
3573 + clocks = <&clocks BCM2835_CLOCK_VPU>;
3574 + #address-cells = <1>;
3575 + #size-cells = <0>;
3576 + status = "disabled";
3577 + };
3578 +
3579 + i2c4: i2c@7e205800 {
3580 + compatible = "brcm,bcm2835-i2c";
3581 + reg = <0x7e205800 0x200>;
3582 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
3583 + clocks = <&clocks BCM2835_CLOCK_VPU>;
3584 + #address-cells = <1>;
3585 + #size-cells = <0>;
3586 + status = "disabled";
3587 + };
3588 +
3589 + i2c5: i2c@7e205a00 {
3590 + compatible = "brcm,bcm2835-i2c";
3591 + reg = <0x7e205a00 0x200>;
3592 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
3593 + clocks = <&clocks BCM2835_CLOCK_VPU>;
3594 + #address-cells = <1>;
3595 + #size-cells = <0>;
3596 + status = "disabled";
3597 + };
3598 +
3599 + i2c6: i2c@7e205c00 {
3600 + compatible = "brcm,bcm2835-i2c";
3601 + reg = <0x7e205c00 0x200>;
3602 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
3603 + clocks = <&clocks BCM2835_CLOCK_VPU>;
3604 + #address-cells = <1>;
3605 + #size-cells = <0>;
3606 + status = "disabled";
3607 + };
3608 +
3609 + pixelvalve@7e206000 {
3610 + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
3611 + };
3612 +
3613 + pixelvalve@7e207000 {
3614 + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
3615 + };
3616 +
3617 + pwm1: pwm@7e20c800 {
3618 + compatible = "brcm,bcm2835-pwm";
3619 + reg = <0x7e20c800 0x28>;
3620 + clocks = <&clocks BCM2835_CLOCK_PWM>;
3621 + assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
3622 + assigned-clock-rates = <10000000>;
3623 + #pwm-cells = <2>;
3624 + status = "disabled";
3625 + };
3626 +
3627 + emmc2: emmc2@7e340000 {
3628 + compatible = "brcm,bcm2711-emmc2";
3629 + status = "okay";
3630 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
3631 + clocks = <&clocks BCM2711_CLOCK_EMMC2>;
3632 + reg = <0x7e340000 0x100>;
3633 + };
3634 +
3635 + hvs@7e400000 {
3636 + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
3637 + };
3638 +
3639 + pixelvalve@7e807000 {
3640 + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
3641 + };
3642 + };
3643 +
3644 + arm-pmu {
3645 + compatible = "arm,cortex-a72-pmu";
3646 + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
3647 + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
3648 + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
3649 + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
3650 + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
3651 + };
3652 +
3653 + timer {
3654 + compatible = "arm,armv7-timer";
3655 + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
3656 + IRQ_TYPE_LEVEL_LOW)>,
3657 + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
3658 + IRQ_TYPE_LEVEL_LOW)>,
3659 + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
3660 + IRQ_TYPE_LEVEL_LOW)>,
3661 + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
3662 + IRQ_TYPE_LEVEL_LOW)>;
3663 + arm,cpu-registers-not-fw-configured;
3664 + always-on;
3665 + };
3666 +
3667 + cpus: cpus {
3668 + #address-cells = <1>;
3669 + #size-cells = <0>;
3670 + enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
3671 +
3672 + cpu0: cpu@0 {
3673 + device_type = "cpu";
3674 + compatible = "arm,cortex-a72";
3675 + reg = <0>;
3676 + enable-method = "spin-table";
3677 + cpu-release-addr = <0x0 0x000000d8>;
3678 + };
3679 +
3680 + cpu1: cpu@1 {
3681 + device_type = "cpu";
3682 + compatible = "arm,cortex-a72";
3683 + reg = <1>;
3684 + enable-method = "spin-table";
3685 + cpu-release-addr = <0x0 0x000000e0>;
3686 + };
3687 +
3688 + cpu2: cpu@2 {
3689 + device_type = "cpu";
3690 + compatible = "arm,cortex-a72";
3691 + reg = <2>;
3692 + enable-method = "spin-table";
3693 + cpu-release-addr = <0x0 0x000000e8>;
3694 + };
3695 +
3696 + cpu3: cpu@3 {
3697 + device_type = "cpu";
3698 + compatible = "arm,cortex-a72";
3699 + reg = <3>;
3700 + enable-method = "spin-table";
3701 + cpu-release-addr = <0x0 0x000000f0>;
3702 + };
3703 + };
3704 +
3705 + v3dbus {
3706 + compatible = "simple-bus";
3707 + #address-cells = <1>;
3708 + #size-cells = <2>;
3709 + ranges = <0x7c500000 0x0 0xfc500000 0x0 0x03300000>,
3710 + <0x40000000 0x0 0xff800000 0x0 0x00800000>;
3711 + dma-ranges = <0x00000000 0x0 0x00000000 0x4 0x00000000>;
3712 +
3713 + v3d: v3d@7ec04000 {
3714 + compatible = "brcm,2711-v3d";
3715 + reg =
3716 + <0x7ec00000 0x0 0x4000>,
3717 + <0x7ec04000 0x0 0x4000>;
3718 + reg-names = "hub", "core0";
3719 +
3720 + power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
3721 + resets = <&pm BCM2835_RESET_V3D>;
3722 + clocks = <&clocks BCM2835_CLOCK_V3D>;
3723 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
3724 + status = "okay";
3725 + };
3726 + };
3727 +
3728 + scb: scb {
3729 + compatible = "simple-bus";
3730 + #address-cells = <2>;
3731 + #size-cells = <1>;
3732 +
3733 + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>,
3734 + <0x0 0x40000000 0x0 0xff800000 0x00800000>,
3735 + <0x6 0x00000000 0x6 0x00000000 0x40000000>,
3736 + <0x0 0x00000000 0x0 0x00000000 0xfc000000>;
3737 + dma-ranges = <0x0 0x00000000 0x0 0x00000000 0xfc000000>;
3738 +
3739 + pcie_0: pcie@7d500000 {
3740 + reg = <0x0 0x7d500000 0x9310>,
3741 + <0x0 0x7e00f300 0x20>;
3742 + msi-controller;
3743 + msi-parent = <&pcie_0>;
3744 + #address-cells = <3>;
3745 + #interrupt-cells = <1>;
3746 + #size-cells = <2>;
3747 + bus-range = <0x0 0x01>;
3748 + compatible = "brcm,bcm7211-pcie", "brcm,bcm7445-pcie",
3749 + "brcm,pci-plat-dev";
3750 + max-link-speed = <2>;
3751 + tot-num-pcie = <1>;
3752 + linux,pci-domain = <0>;
3753 + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
3754 + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
3755 + interrupt-names = "pcie", "msi";
3756 + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
3757 + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143
3758 + IRQ_TYPE_LEVEL_HIGH
3759 + 0 0 0 2 &gicv2 GIC_SPI 144
3760 + IRQ_TYPE_LEVEL_HIGH
3761 + 0 0 0 3 &gicv2 GIC_SPI 145
3762 + IRQ_TYPE_LEVEL_HIGH
3763 + 0 0 0 4 &gicv2 GIC_SPI 146
3764 + IRQ_TYPE_LEVEL_HIGH>;
3765 +
3766 + /* Map outbound accesses from scb:0x6_00000000-03ffffff
3767 + * to pci:0x0_f8000000-fbffffff
3768 + */
3769 + ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000
3770 + 0x0 0x04000000>;
3771 + /* Map inbound accesses from pci:0x0_00000000..ffffffff
3772 + * to scb:0x0_00000000-ffffffff
3773 + */
3774 + dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
3775 + 0x1 0x00000000>;
3776 + status = "okay";
3777 + };
3778 +
3779 + genet: genet@7d580000 {
3780 + compatible = "brcm,genet-v5";
3781 + reg = <0x0 0x7d580000 0x10000>;
3782 + status = "okay";
3783 + #address-cells = <0x1>;
3784 + #size-cells = <0x1>;
3785 + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
3786 + <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
3787 + phy-handle = <&phy1>;
3788 + phy-mode = "rgmii";
3789 + mdio@e14 {
3790 + #address-cells = <0x0>;
3791 + #size-cells = <0x1>;
3792 + compatible = "brcm,genet-mdio-v5";
3793 + reg = <0xe14 0x8>;
3794 + reg-names = "mdio";
3795 + phy1: genet-phy@0 {
3796 + compatible =
3797 + "ethernet-phy-ieee802.3-c22";
3798 + /* No interrupts - use PHY_POLL */
3799 + max-speed = <1000>;
3800 + reg = <0x1>;
3801 + };
3802 + };
3803 + };
3804 +
3805 + dma40: dma@7e007b00 {
3806 + compatible = "brcm,bcm2838-dma";
3807 + reg = <0x0 0x7e007b00 0x400>;
3808 + interrupts =
3809 + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, /* dma4 11 */
3810 + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* dma4 12 */
3811 + <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, /* dma4 13 */
3812 + <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; /* dma4 14 */
3813 + interrupt-names = "dma11",
3814 + "dma12",
3815 + "dma13",
3816 + "dma14";
3817 + #dma-cells = <1>;
3818 + brcm,dma-channel-mask = <0x7800>;
3819 + };
3820 + /* DMA4 - 40 bit DMA engines */
3821 +
3822 + xhci: xhci@7e9c0000 {
3823 + compatible = "generic-xhci";
3824 + status = "disabled";
3825 + reg = <0x0 0x7e9c0000 0x100000>;
3826 + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
3827 + };
3828 +
3829 + hevc-decoder@7eb00000 {
3830 + compatible = "raspberrypi,rpivid-hevc-decoder";
3831 + reg = <0x0 0x7eb00000 0x10000>;
3832 + status = "okay";
3833 + };
3834 +
3835 + rpivid-local-intc@7eb10000 {
3836 + compatible = "raspberrypi,rpivid-local-intc";
3837 + reg = <0x0 0x7eb10000 0x1000>;
3838 + status = "okay";
3839 + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
3840 + };
3841 +
3842 + h264-decoder@7eb20000 {
3843 + compatible = "raspberrypi,rpivid-h264-decoder";
3844 + reg = <0x0 0x7eb20000 0x10000>;
3845 + status = "okay";
3846 + };
3847 +
3848 + vp9-decoder@7eb30000 {
3849 + compatible = "raspberrypi,rpivid-vp9-decoder";
3850 + reg = <0x0 0x7eb30000 0x10000>;
3851 + status = "okay";
3852 + };
3853 + };
3854 +};
3855 +
3856 +&clk_osc {
3857 + clock-frequency = <54000000>;
3858 +};
3859 +
3860 +&clocks {
3861 + compatible = "brcm,bcm2711-cprman";
3862 +};
3863 +
3864 +&cpu_thermal {
3865 + coefficients = <(-487) 410040>;
3866 +};
3867 +
3868 +&dsi0 {
3869 + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
3870 +};
3871 +
3872 +&dsi1 {
3873 + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
3874 +};
3875 +
3876 +&gpio {
3877 + compatible = "brcm,bcm2711-gpio", "brcm,bcm2835-gpio";
3878 +
3879 + gpclk0_gpio49: gpclk0_gpio49 {
3880 + brcm,pins = <49>;
3881 + brcm,function = <BCM2835_FSEL_ALT1>;
3882 + brcm,pull = <BCM2835_PUD_OFF>;
3883 + };
3884 + gpclk1_gpio50: gpclk1_gpio50 {
3885 + brcm,pins = <50>;
3886 + brcm,function = <BCM2835_FSEL_ALT1>;
3887 + brcm,pull = <BCM2835_PUD_OFF>;
3888 + };
3889 + gpclk2_gpio51: gpclk2_gpio51 {
3890 + brcm,pins = <51>;
3891 + brcm,function = <BCM2835_FSEL_ALT1>;
3892 + brcm,pull = <BCM2835_PUD_OFF>;
3893 + };
3894 +
3895 + i2c0_gpio46: i2c0_gpio46 {
3896 + brcm,pins = <46 47>;
3897 + brcm,function = <BCM2835_FSEL_ALT0>;
3898 + };
3899 + i2c1_gpio46: i2c1_gpio46 {
3900 + brcm,pins = <46 47>;
3901 + brcm,function = <BCM2835_FSEL_ALT1>;
3902 + };
3903 + i2c3_gpio2: i2c3_gpio2 {
3904 + brcm,pins = <2 3>;
3905 + brcm,function = <BCM2835_FSEL_ALT5>;
3906 + };
3907 + i2c3_gpio4: i2c3_gpio4 {
3908 + brcm,pins = <4 5>;
3909 + brcm,function = <BCM2835_FSEL_ALT5>;
3910 + };
3911 + i2c4_gpio6: i2c4_gpio6 {
3912 + brcm,pins = <6 7>;
3913 + brcm,function = <BCM2835_FSEL_ALT5>;
3914 + };
3915 + i2c4_gpio8: i2c4_gpio8 {
3916 + brcm,pins = <8 9>;
3917 + brcm,function = <BCM2835_FSEL_ALT5>;
3918 + };
3919 + i2c5_gpio10: i2c5_gpio10 {
3920 + brcm,pins = <10 11>;
3921 + brcm,function = <BCM2835_FSEL_ALT5>;
3922 + };
3923 + i2c5_gpio12: i2c5_gpio12 {
3924 + brcm,pins = <12 13>;
3925 + brcm,function = <BCM2835_FSEL_ALT5>;
3926 + };
3927 + i2c6_gpio0: i2c6_gpio0 {
3928 + brcm,pins = <0 1>;
3929 + brcm,function = <BCM2835_FSEL_ALT5>;
3930 + };
3931 + i2c6_gpio22: i2c6_gpio22 {
3932 + brcm,pins = <22 23>;
3933 + brcm,function = <BCM2835_FSEL_ALT5>;
3934 + };
3935 + i2c_slave_gpio8: i2c_slave_gpio8 {
3936 + brcm,pins = <8 9 10 11>;
3937 + brcm,function = <BCM2835_FSEL_ALT3>;
3938 + };
3939 +
3940 + jtag_gpio48: jtag_gpio48 {
3941 + brcm,pins = <48 49 50 51 52 53>;
3942 + brcm,function = <BCM2835_FSEL_ALT4>;
3943 + };
3944 +
3945 + mii_gpio28: mii_gpio28 {
3946 + brcm,pins = <28 29 30 31>;
3947 + brcm,function = <BCM2835_FSEL_ALT4>;
3948 + };
3949 + mii_gpio36: mii_gpio36 {
3950 + brcm,pins = <36 37 38 39>;
3951 + brcm,function = <BCM2835_FSEL_ALT5>;
3952 + };
3953 +
3954 + pcm_gpio50: pcm_gpio50 {
3955 + brcm,pins = <50 51 52 53>;
3956 + brcm,function = <BCM2835_FSEL_ALT2>;
3957 + };
3958 +
3959 + pwm0_gpio52: pwm0_gpio52 {
3960 + brcm,pins = <52>;
3961 + brcm,function = <BCM2835_FSEL_ALT1>;
3962 + brcm,pull = <BCM2835_PUD_OFF>;
3963 + };
3964 + pwm1_gpio53: pwm1_gpio53 {
3965 + brcm,pins = <53>;
3966 + brcm,function = <BCM2835_FSEL_ALT1>;
3967 + brcm,pull = <BCM2835_PUD_OFF>;
3968 + };
3969 +
3970 + /* The following group consists of:
3971 + * RGMII_START_STOP
3972 + * RGMII_RX_OK
3973 + */
3974 + rgmii_gpio35: rgmii_gpio35 {
3975 + brcm,pins = <35 36>;
3976 + brcm,function = <BCM2835_FSEL_ALT4>;
3977 + };
3978 + rgmii_irq_gpio34: rgmii_irq_gpio34 {
3979 + brcm,pins = <34>;
3980 + brcm,function = <BCM2835_FSEL_ALT5>;
3981 + };
3982 + rgmii_irq_gpio39: rgmii_irq_gpio39 {
3983 + brcm,pins = <39>;
3984 + brcm,function = <BCM2835_FSEL_ALT4>;
3985 + };
3986 + rgmii_mdio_gpio28: rgmii_mdio_gpio28 {
3987 + brcm,pins = <28 29>;
3988 + brcm,function = <BCM2835_FSEL_ALT5>;
3989 + };
3990 + rgmii_mdio_gpio37: rgmii_mdio_gpio37 {
3991 + brcm,pins = <37 38>;
3992 + brcm,function = <BCM2835_FSEL_ALT4>;
3993 + };
3994 +
3995 + spi0_gpio46: spi0_gpio46 {
3996 + brcm,pins = <46 47 48 49>;
3997 + brcm,function = <BCM2835_FSEL_ALT2>;
3998 + };
3999 + spi2_gpio46: spi2_gpio46 {
4000 + brcm,pins = <46 47 48 49 50>;
4001 + brcm,function = <BCM2835_FSEL_ALT5>;
4002 + };
4003 + spi3_gpio0: spi3_gpio0 {
4004 + brcm,pins = <0 1 2 3>;
4005 + brcm,function = <BCM2835_FSEL_ALT3>;
4006 + };
4007 + spi4_gpio4: spi4_gpio4 {
4008 + brcm,pins = <4 5 6 7>;
4009 + brcm,function = <BCM2835_FSEL_ALT3>;
4010 + };
4011 + spi5_gpio12: spi5_gpio12 {
4012 + brcm,pins = <12 13 14 15>;
4013 + brcm,function = <BCM2835_FSEL_ALT3>;
4014 + };
4015 + spi6_gpio18: spi6_gpio18 {
4016 + brcm,pins = <18 19 20 21>;
4017 + brcm,function = <BCM2835_FSEL_ALT3>;
4018 + };
4019 +
4020 + uart2_gpio0: uart2_gpio0 {
4021 + brcm,pins = <0 1>;
4022 + brcm,function = <BCM2835_FSEL_ALT4>;
4023 + brcm,pull = <BCM2835_PUD_OFF BCM2835_PUD_UP>;
4024 + };
4025 + uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 {
4026 + brcm,pins = <2 3>;
4027 + brcm,function = <BCM2835_FSEL_ALT4>;
4028 + brcm,pull = <BCM2835_PUD_UP BCM2835_PUD_OFF>;
4029 + };
4030 + uart3_gpio4: uart3_gpio4 {
4031 + brcm,pins = <4 5>;
4032 + brcm,function = <BCM2835_FSEL_ALT4>;
4033 + brcm,pull = <BCM2835_PUD_OFF BCM2835_PUD_UP>;
4034 + };
4035 + uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 {
4036 + brcm,pins = <6 7>;
4037 + brcm,function = <BCM2835_FSEL_ALT4>;
4038 + brcm,pull = <BCM2835_PUD_UP BCM2835_PUD_OFF>;
4039 + };
4040 + uart4_gpio8: uart4_gpio8 {
4041 + brcm,pins = <8 9>;
4042 + brcm,function = <BCM2835_FSEL_ALT4>;
4043 + brcm,pull = <BCM2835_PUD_OFF BCM2835_PUD_UP>;
4044 + };
4045 + uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 {
4046 + brcm,pins = <10 11>;
4047 + brcm,function = <BCM2835_FSEL_ALT4>;
4048 + brcm,pull = <BCM2835_PUD_UP BCM2835_PUD_OFF>;
4049 + };
4050 + uart5_gpio12: uart5_gpio12 {
4051 + brcm,pins = <12 13>;
4052 + brcm,function = <BCM2835_FSEL_ALT4>;
4053 + brcm,pull = <BCM2835_PUD_OFF BCM2835_PUD_UP>;
4054 + };
4055 + uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 {
4056 + brcm,pins = <14 15>;
4057 + brcm,function = <BCM2835_FSEL_ALT4>;
4058 + brcm,pull = <BCM2835_PUD_UP BCM2835_PUD_OFF>;
4059 + };
4060 +};
4061 +
4062 +&vec {
4063 + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
4064 +};
4065 +
4066 +&usb {
4067 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
4068 + status = "disabled";
4069 +};
4070 +
4071 +&hdmi {
4072 + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
4073 + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
4074 +};
4075 +
4076 +&uart1 {
4077 + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
4078 +};
4079 +
4080 +&spi1 {
4081 + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
4082 +};
4083 +
4084 +&spi2 {
4085 + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
4086 +};
4087 +
4088 +&csi0 {
4089 + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
4090 +};
4091 +
4092 +&csi1 {
4093 + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
4094 +};
4095 +
4096 +&sdhci {
4097 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
4098 +};
4099 +
4100 +&i2c0 {
4101 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
4102 +};
4103 +
4104 +&i2c1 {
4105 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
4106 +};
4107 +
4108 +&i2c2 {
4109 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
4110 +};
4111 +
4112 +&gpio {
4113 + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
4114 + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
4115 + <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
4116 + <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
4117 +};
4118 +
4119 +&mailbox {
4120 + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
4121 +};
4122 +
4123 +&rng {
4124 + compatible = "brcm,bcm2838-rng200";
4125 +};
4126 +
4127 +&sdhost {
4128 + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
4129 +};
4130 +
4131 +&uart0 {
4132 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
4133 +};
4134 +
4135 +&dma {
4136 + reg = <0x7e007000 0xb00>;
4137 + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
4138 + <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
4139 + <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
4140 + <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
4141 + <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
4142 + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
4143 + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
4144 + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* dmalite 7 */
4145 + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* dmalite 8 */
4146 + <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, /* dmalite 9 */
4147 + <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; /* dmalite 10 */
4148 + interrupt-names = "dma0",
4149 + "dma1",
4150 + "dma2",
4151 + "dma3",
4152 + "dma4",
4153 + "dma5",
4154 + "dma6",
4155 + "dma7",
4156 + "dma8",
4157 + "dma9",
4158 + "dma10";
4159 + brcm,dma-channel-mask = <0x07f5>;
4160 +};
4161 +
4162 +&txp {
4163 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
4164 +};
4165 diff --git a/arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi b/arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi
4166 new file mode 100644
4167 index 000000000000..952a28eaf616
4168 --- /dev/null
4169 +++ b/arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi
4170 @@ -0,0 +1,8 @@
4171 +// SPDX-License-Identifier: GPL-2.0-only
4172 +&csi0 {
4173 + port {
4174 + endpoint {
4175 + data-lanes = <1 2>;
4176 + };
4177 + };
4178 +};
4179 diff --git a/arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi b/arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
4180 new file mode 100644
4181 index 000000000000..451fb4bb4ab8
4182 --- /dev/null
4183 +++ b/arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
4184 @@ -0,0 +1,8 @@
4185 +// SPDX-License-Identifier: GPL-2.0-only
4186 +&csi1 {
4187 + port {
4188 + endpoint {
4189 + data-lanes = <1 2>;
4190 + };
4191 + };
4192 +};
4193 diff --git a/arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi b/arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi
4194 new file mode 100644
4195 index 000000000000..9279d4b0bfae
4196 --- /dev/null
4197 +++ b/arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi
4198 @@ -0,0 +1,8 @@
4199 +// SPDX-License-Identifier: GPL-2.0-only
4200 +&csi1 {
4201 + port {
4202 + endpoint {
4203 + data-lanes = <1 2 3 4>;
4204 + };
4205 + };
4206 +};
4207 diff --git a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
4208 index 70bece63f9a7..7c6c054459b7 100644
4209 --- a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
4210 +++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
4211 @@ -29,6 +29,9 @@
4212 #size-cells = <0x0>;
4213 eth_phy: ethernet-phy@1 {
4214 reg = <1>;
4215 + microchip,eee-enabled;
4216 + microchip,tx-lpi-timer = <600>; /* non-aggressive*/
4217 + microchip,downshift-after = <2>;
4218 microchip,led-modes = <
4219 LAN78XX_LINK_1000_ACTIVITY
4220 LAN78XX_LINK_10_100_ACTIVITY
4221 @@ -39,3 +42,15 @@
4222 };
4223 };
4224 };
4225 +
4226 +
4227 +/ {
4228 + __overrides__ {
4229 + eee = <&eth_phy>,"microchip,eee-enabled?";
4230 + tx_lpi_timer = <&eth_phy>,"microchip,tx-lpi-timer:0";
4231 + eth_led0 = <&eth_phy>,"microchip,led-modes:0";
4232 + eth_led1 = <&eth_phy>,"microchip,led-modes:4";
4233 + eth_downshift_after = <&eth_phy>,"microchip,downshift-after:0";
4234 + eth_max_speed = <&eth_phy>,"max-speed:0";
4235 + };
4236 +};
4237 diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
4238 index 90125ce19a1b..d7c955443138 100644
4239 --- a/arch/arm/boot/dts/bcm283x.dtsi
4240 +++ b/arch/arm/boot/dts/bcm283x.dtsi
4241 @@ -56,18 +56,7 @@
4242 #address-cells = <1>;
4243 #size-cells = <1>;
4244
4245 - timer@7e003000 {
4246 - compatible = "brcm,bcm2835-system-timer";
4247 - reg = <0x7e003000 0x1000>;
4248 - interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
4249 - /* This could be a reference to BCM2835_CLOCK_TIMER,
4250 - * but we don't have the driver using the common clock
4251 - * support yet.
4252 - */
4253 - clock-frequency = <1000000>;
4254 - };
4255 -
4256 - txp@7e004000 {
4257 + txp: txp@7e004000 {
4258 compatible = "brcm,bcm2835-txp";
4259 reg = <0x7e004000 0x20>;
4260 interrupts = <1 11>;
4261 @@ -114,13 +103,6 @@
4262 brcm,dma-channel-mask = <0x7f35>;
4263 };
4264
4265 - intc: interrupt-controller@7e00b200 {
4266 - compatible = "brcm,bcm2835-armctrl-ic";
4267 - reg = <0x7e00b200 0x200>;
4268 - interrupt-controller;
4269 - #interrupt-cells = <2>;
4270 - };
4271 -
4272 pm: watchdog@7e100000 {
4273 compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
4274 #power-domain-cells = <1>;
4275 @@ -149,7 +131,7 @@
4276 <&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
4277 };
4278
4279 - rng@7e104000 {
4280 + rng: rng@7e104000 {
4281 compatible = "brcm,bcm2835-rng";
4282 reg = <0x7e104000 0x10>;
4283 interrupts = <2 29>;
4284 @@ -184,8 +166,7 @@
4285 interrupt-controller;
4286 #interrupt-cells = <2>;
4287
4288 - /* Defines pin muxing groups according to
4289 - * BCM2835-ARM-Peripherals.pdf page 102.
4290 + /* Defines common pin muxing groups
4291 *
4292 * While each pin can have its mux selected
4293 * for various functions individually, some
4294 @@ -263,15 +244,7 @@
4295 brcm,pins = <44 45>;
4296 brcm,function = <BCM2835_FSEL_ALT2>;
4297 };
4298 - i2c_slave_gpio18: i2c_slave_gpio18 {
4299 - brcm,pins = <18 19 20 21>;
4300 - brcm,function = <BCM2835_FSEL_ALT3>;
4301 - };
4302
4303 - jtag_gpio4: jtag_gpio4 {
4304 - brcm,pins = <4 5 6 12 13>;
4305 - brcm,function = <BCM2835_FSEL_ALT5>;
4306 - };
4307 jtag_gpio22: jtag_gpio22 {
4308 brcm,pins = <22 23 24 25 26 27>;
4309 brcm,function = <BCM2835_FSEL_ALT4>;
4310 @@ -410,7 +383,7 @@
4311 reg = <0x7e202000 0x100>;
4312 interrupts = <2 24>;
4313 clocks = <&clocks BCM2835_CLOCK_VPU>;
4314 - dmas = <&dma 13>;
4315 + dmas = <&dma (13|(1<<29))>;
4316 dma-names = "rx-tx";
4317 status = "disabled";
4318 };
4319 @@ -490,14 +463,6 @@
4320
4321 };
4322
4323 - thermal: thermal@7e212000 {
4324 - compatible = "brcm,bcm2835-thermal";
4325 - reg = <0x7e212000 0x8>;
4326 - clocks = <&clocks BCM2835_CLOCK_TSENS>;
4327 - #thermal-sensor-cells = <0>;
4328 - status = "disabled";
4329 - };
4330 -
4331 aux: aux@7e215000 {
4332 compatible = "brcm,bcm2835-aux";
4333 #clock-cells = <1>;
4334 @@ -577,6 +542,32 @@
4335 status = "disabled";
4336 };
4337
4338 + csi0: csi@7e800000 {
4339 + compatible = "brcm,bcm2835-unicam";
4340 + reg = <0x7e800000 0x800>,
4341 + <0x7e802000 0x4>;
4342 + interrupts = <2 6>;
4343 + clocks = <&clocks BCM2835_CLOCK_CAM0>;
4344 + clock-names = "lp";
4345 + #address-cells = <1>;
4346 + #size-cells = <0>;
4347 + #clock-cells = <1>;
4348 + status = "disabled";
4349 + };
4350 +
4351 + csi1: csi@7e801000 {
4352 + compatible = "brcm,bcm2835-unicam";
4353 + reg = <0x7e801000 0x800>,
4354 + <0x7e802004 0x4>;
4355 + interrupts = <2 7>;
4356 + clocks = <&clocks BCM2835_CLOCK_CAM1>;
4357 + clock-names = "lp";
4358 + #address-cells = <1>;
4359 + #size-cells = <0>;
4360 + #clock-cells = <1>;
4361 + status = "disabled";
4362 + };
4363 +
4364 i2c1: i2c@7e804000 {
4365 compatible = "brcm,bcm2835-i2c";
4366 reg = <0x7e804000 0x1000>;
4367 @@ -637,13 +628,6 @@
4368 phy-names = "usb2-phy";
4369 };
4370
4371 - v3d: v3d@7ec00000 {
4372 - compatible = "brcm,bcm2835-v3d";
4373 - reg = <0x7ec00000 0x1000>;
4374 - interrupts = <1 10>;
4375 - power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
4376 - };
4377 -
4378 vc4: gpu {
4379 compatible = "brcm,bcm2835-vc4";
4380 };
4381 diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile
4382 new file mode 100644
4383 index 000000000000..e9cd9722bb94
4384 --- /dev/null
4385 +++ b/arch/arm/boot/dts/overlays/Makefile
4386 @@ -0,0 +1,194 @@
4387 +# Overlays for the Raspberry Pi platform
4388 +
4389 +dtbo-$(CONFIG_ARCH_BCM2835) += \
4390 + act-led.dtbo \
4391 + adau1977-adc.dtbo \
4392 + adau7002-simple.dtbo \
4393 + ads1015.dtbo \
4394 + ads1115.dtbo \
4395 + ads7846.dtbo \
4396 + adv7282m.dtbo \
4397 + adv728x-m.dtbo \
4398 + akkordion-iqdacplus.dtbo \
4399 + allo-boss-dac-pcm512x-audio.dtbo \
4400 + allo-digione.dtbo \
4401 + allo-katana-dac-audio.dtbo \
4402 + allo-piano-dac-pcm512x-audio.dtbo \
4403 + allo-piano-dac-plus-pcm512x-audio.dtbo \
4404 + applepi-dac.dtbo \
4405 + at86rf233.dtbo \
4406 + audioinjector-addons.dtbo \
4407 + audioinjector-ultra.dtbo \
4408 + audioinjector-wm8731-audio.dtbo \
4409 + audiosense-pi.dtbo \
4410 + audremap.dtbo \
4411 + balena-fin.dtbo \
4412 + bmp085_i2c-sensor.dtbo \
4413 + dht11.dtbo \
4414 + dionaudio-loco.dtbo \
4415 + dionaudio-loco-v2.dtbo \
4416 + disable-bt.dtbo \
4417 + disable-wifi.dtbo \
4418 + dpi18.dtbo \
4419 + dpi24.dtbo \
4420 + draws.dtbo \
4421 + dwc-otg.dtbo \
4422 + dwc2.dtbo \
4423 + enc28j60.dtbo \
4424 + enc28j60-spi2.dtbo \
4425 + exc3000.dtbo \
4426 + fe-pi-audio.dtbo \
4427 + goodix.dtbo \
4428 + googlevoicehat-soundcard.dtbo \
4429 + gpio-fan.dtbo \
4430 + gpio-ir.dtbo \
4431 + gpio-ir-tx.dtbo \
4432 + gpio-key.dtbo \
4433 + gpio-no-bank0-irq.dtbo \
4434 + gpio-no-irq.dtbo \
4435 + gpio-poweroff.dtbo \
4436 + gpio-shutdown.dtbo \
4437 + hd44780-lcd.dtbo \
4438 + hifiberry-amp.dtbo \
4439 + hifiberry-dac.dtbo \
4440 + hifiberry-dacplus.dtbo \
4441 + hifiberry-dacplusadc.dtbo \
4442 + hifiberry-dacplusadcpro.dtbo \
4443 + hifiberry-dacplusdsp.dtbo \
4444 + hifiberry-digi.dtbo \
4445 + hifiberry-digi-pro.dtbo \
4446 + hy28a.dtbo \
4447 + hy28b.dtbo \
4448 + hy28b-2017.dtbo \
4449 + i-sabre-q2m.dtbo \
4450 + i2c-bcm2708.dtbo \
4451 + i2c-gpio.dtbo \
4452 + i2c-mux.dtbo \
4453 + i2c-pwm-pca9685a.dtbo \
4454 + i2c-rtc.dtbo \
4455 + i2c-rtc-gpio.dtbo \
4456 + i2c-sensor.dtbo \
4457 + i2c0.dtbo \
4458 + i2c0-bcm2708.dtbo \
4459 + i2c1.dtbo \
4460 + i2c1-bcm2708.dtbo \
4461 + i2c3.dtbo \
4462 + i2c4.dtbo \
4463 + i2c5.dtbo \
4464 + i2c6.dtbo \
4465 + i2s-gpio28-31.dtbo \
4466 + ilitek251x.dtbo \
4467 + imx219.dtbo \
4468 + iqaudio-codec.dtbo \
4469 + iqaudio-dac.dtbo \
4470 + iqaudio-dacplus.dtbo \
4471 + iqaudio-digi-wm8804-audio.dtbo \
4472 + irs1125.dtbo \
4473 + jedec-spi-nor.dtbo \
4474 + justboom-dac.dtbo \
4475 + justboom-digi.dtbo \
4476 + ltc294x.dtbo \
4477 + max98357a.dtbo \
4478 + mbed-dac.dtbo \
4479 + mcp23017.dtbo \
4480 + mcp23s17.dtbo \
4481 + mcp2515-can0.dtbo \
4482 + mcp2515-can1.dtbo \
4483 + mcp3008.dtbo \
4484 + mcp3202.dtbo \
4485 + mcp342x.dtbo \
4486 + media-center.dtbo \
4487 + midi-uart0.dtbo \
4488 + midi-uart1.dtbo \
4489 + miniuart-bt.dtbo \
4490 + mmc.dtbo \
4491 + mpu6050.dtbo \
4492 + mz61581.dtbo \
4493 + ov5647.dtbo \
4494 + papirus.dtbo \
4495 + pi3-act-led.dtbo \
4496 + pi3-disable-bt.dtbo \
4497 + pi3-disable-wifi.dtbo \
4498 + pi3-miniuart-bt.dtbo \
4499 + pibell.dtbo \
4500 + piglow.dtbo \
4501 + piscreen.dtbo \
4502 + piscreen2r.dtbo \
4503 + pisound.dtbo \
4504 + pitft22.dtbo \
4505 + pitft28-capacitive.dtbo \
4506 + pitft28-resistive.dtbo \
4507 + pitft35-resistive.dtbo \
4508 + pps-gpio.dtbo \
4509 + pwm.dtbo \
4510 + pwm-2chan.dtbo \
4511 + pwm-ir-tx.dtbo \
4512 + qca7000.dtbo \
4513 + rotary-encoder.dtbo \
4514 + rpi-backlight.dtbo \
4515 + rpi-cirrus-wm5102.dtbo \
4516 + rpi-dac.dtbo \
4517 + rpi-display.dtbo \
4518 + rpi-ft5406.dtbo \
4519 + rpi-poe.dtbo \
4520 + rpi-proto.dtbo \
4521 + rpi-sense.dtbo \
4522 + rpi-tv.dtbo \
4523 + rra-digidac1-wm8741-audio.dtbo \
4524 + sc16is750-i2c.dtbo \
4525 + sc16is752-i2c.dtbo \
4526 + sc16is752-spi1.dtbo \
4527 + sdhost.dtbo \
4528 + sdio.dtbo \
4529 + sdtweak.dtbo \
4530 + smi.dtbo \
4531 + smi-dev.dtbo \
4532 + smi-nand.dtbo \
4533 + spi-gpio35-39.dtbo \
4534 + spi-gpio40-45.dtbo \
4535 + spi-rtc.dtbo \
4536 + spi0-cs.dtbo \
4537 + spi0-hw-cs.dtbo \
4538 + spi1-1cs.dtbo \
4539 + spi1-2cs.dtbo \
4540 + spi1-3cs.dtbo \
4541 + spi2-1cs.dtbo \
4542 + spi2-2cs.dtbo \
4543 + spi2-3cs.dtbo \
4544 + spi3-1cs.dtbo \
4545 + spi3-2cs.dtbo \
4546 + spi4-1cs.dtbo \
4547 + spi4-2cs.dtbo \
4548 + spi5-1cs.dtbo \
4549 + spi5-2cs.dtbo \
4550 + spi6-1cs.dtbo \
4551 + spi6-2cs.dtbo \
4552 + ssd1306.dtbo \
4553 + superaudioboard.dtbo \
4554 + sx150x.dtbo \
4555 + tc358743.dtbo \
4556 + tc358743-audio.dtbo \
4557 + tinylcd35.dtbo \
4558 + tpm-slb9670.dtbo \
4559 + uart0.dtbo \
4560 + uart1.dtbo \
4561 + uart2.dtbo \
4562 + uart3.dtbo \
4563 + uart4.dtbo \
4564 + uart5.dtbo \
4565 + udrc.dtbo \
4566 + upstream.dtbo \
4567 + vc4-fkms-v3d.dtbo \
4568 + vc4-kms-kippah-7inch.dtbo \
4569 + vc4-kms-v3d.dtbo \
4570 + vga666.dtbo \
4571 + w1-gpio.dtbo \
4572 + w1-gpio-pullup.dtbo \
4573 + w5500.dtbo \
4574 + wittypi.dtbo
4575 +
4576 +targets += dtbs dtbs_install
4577 +targets += $(dtbo-y)
4578 +
4579 +always := $(dtbo-y)
4580 +clean-files := *.dtbo
4581 diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README
4582 new file mode 100644
4583 index 000000000000..8ce8cf05a2c8
4584 --- /dev/null
4585 +++ b/arch/arm/boot/dts/overlays/README
4586 @@ -0,0 +1,2591 @@
4587 +Introduction
4588 +============
4589 +
4590 +This directory contains Device Tree overlays. Device Tree makes it possible
4591 +to support many hardware configurations with a single kernel and without the
4592 +need to explicitly load or blacklist kernel modules. Note that this isn't a
4593 +"pure" Device Tree configuration (c.f. MACH_BCM2835) - some on-board devices
4594 +are still configured by the board support code, but the intention is to
4595 +eventually reach that goal.
4596 +
4597 +On Raspberry Pi, Device Tree usage is controlled from /boot/config.txt. By
4598 +default, the Raspberry Pi kernel boots with device tree enabled. You can
4599 +completely disable DT usage (for now) by adding:
4600 +
4601 + device_tree=
4602 +
4603 +to your config.txt, which should cause your Pi to revert to the old way of
4604 +doing things after a reboot.
4605 +
4606 +In /boot you will find a .dtb for each base platform. This describes the
4607 +hardware that is part of the Raspberry Pi board. The loader (start.elf and its
4608 +siblings) selects the .dtb file appropriate for the platform by name, and reads
4609 +it into memory. At this point, all of the optional interfaces (i2c, i2s, spi)
4610 +are disabled, but they can be enabled using Device Tree parameters:
4611 +
4612 + dtparam=i2c=on,i2s=on,spi=on
4613 +
4614 +However, this shouldn't be necessary in many use cases because loading an
4615 +overlay that requires one of those interfaces will cause it to be enabled
4616 +automatically, and it is advisable to only enable interfaces if they are
4617 +needed.
4618 +
4619 +Configuring additional, optional hardware is done using Device Tree overlays
4620 +(see below).
4621 +
4622 +GPIO numbering uses the hardware pin numbering scheme (aka BCM scheme) and
4623 +not the physical pin numbers.
4624 +
4625 +raspi-config
4626 +============
4627 +
4628 +The Advanced Options section of the raspi-config utility can enable and disable
4629 +Device Tree use, as well as toggling the I2C and SPI interfaces. Note that it
4630 +is possible to both enable an interface and blacklist the driver, if for some
4631 +reason you should want to defer the loading.
4632 +
4633 +Modules
4634 +=======
4635 +
4636 +As well as describing the hardware, Device Tree also gives enough information
4637 +to allow suitable driver modules to be located and loaded, with the corollary
4638 +that unneeded modules are not loaded. As a result it should be possible to
4639 +remove lines from /etc/modules, and /etc/modprobe.d/raspi-blacklist.conf can
4640 +have its contents deleted (or commented out).
4641 +
4642 +Using Overlays
4643 +==============
4644 +
4645 +Overlays are loaded using the "dtoverlay" config.txt setting. As an example,
4646 +consider I2C Real Time Clock drivers. In the pre-DT world these would be loaded
4647 +by writing a magic string comprising a device identifier and an I2C address to
4648 +a special file in /sys/class/i2c-adapter, having first loaded the driver for
4649 +the I2C interface and the RTC device - something like this:
4650 +
4651 + modprobe i2c-bcm2835
4652 + modprobe rtc-ds1307
4653 + echo ds1307 0x68 > /sys/class/i2c-adapter/i2c-1/new_device
4654 +
4655 +With DT enabled, this becomes a line in config.txt:
4656 +
4657 + dtoverlay=i2c-rtc,ds1307
4658 +
4659 +This causes the file /boot/overlays/i2c-rtc.dtbo to be loaded and a "node"
4660 +describing the DS1307 I2C device to be added to the Device Tree for the Pi. By
4661 +default it usees address 0x68, but this can be modified with an additional DT
4662 +parameter:
4663 +
4664 + dtoverlay=i2c-rtc,ds1307,addr=0x68
4665 +
4666 +Parameters usually have default values, although certain parameters are
4667 +mandatory. See the list of overlays below for a description of the parameters
4668 +and their defaults.
4669 +
4670 +The Overlay and Parameter Reference
4671 +===================================
4672 +
4673 +N.B. When editing this file, please preserve the indentation levels to make it
4674 +simple to parse programmatically. NO HARD TABS.
4675 +
4676 +
4677 +Name: <The base DTB>
4678 +Info: Configures the base Raspberry Pi hardware
4679 +Load: <loaded automatically>
4680 +Params:
4681 + audio Set to "on" to enable the onboard ALSA audio
4682 + interface (default "off")
4683 +
4684 + axiperf Set to "on" to enable the AXI bus performance
4685 + monitors.
4686 + See /sys/kernel/debug/raspberrypi_axi_monitor
4687 + for the results.
4688 +
4689 + eee Enable Energy Efficient Ethernet support for
4690 + compatible devices (default "on"). See also
4691 + "tx_lpi_timer".
4692 +
4693 + eth_downshift_after Set the number of auto-negotiation failures
4694 + after which the 1000Mbps modes are disabled.
4695 + Legal values are 2, 3, 4, 5 and 0, where
4696 + 0 means never downshift (default 2).
4697 +
4698 + eth_led0 Set mode of LED0 (usually orange) (default
4699 + "1"). The legal values are:
4700 + 0=link/activity 1=link1000/activity
4701 + 2=link100/activity 3=link10/activity
4702 + 4=link100/1000/activity 5=link10/1000/activity
4703 + 6=link10/100/activity 14=off 15=on
4704 +
4705 + eth_led1 Set mode of LED1 (usually green) (default
4706 + "6"). See eth_led0 for legal values.
4707 +
4708 + eth_max_speed Set the maximum speed a link is allowed
4709 + to negotiate. Legal values are 10, 100 and
4710 + 1000 (default 1000).
4711 +
4712 + i2c_arm Set to "on" to enable the ARM's i2c interface
4713 + (default "off")
4714 +
4715 + i2c_vc Set to "on" to enable the i2c interface
4716 + usually reserved for the VideoCore processor
4717 + (default "off")
4718 +
4719 + i2c An alias for i2c_arm
4720 +
4721 + i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
4722 + (default "100000")
4723 +
4724 + i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface
4725 + (default "100000")
4726 +
4727 + i2c_baudrate An alias for i2c_arm_baudrate
4728 +
4729 + i2s Set to "on" to enable the i2s interface
4730 + (default "off")
4731 +
4732 + spi Set to "on" to enable the spi interfaces
4733 + (default "off")
4734 +
4735 + random Set to "on" to enable the hardware random
4736 + number generator (default "on")
4737 +
4738 + sd_overclock Clock (in MHz) to use when the MMC framework
4739 + requests 50MHz
4740 +
4741 + sd_force_pio Disable DMA support for SD driver (default off)
4742 +
4743 + sd_pio_limit Number of blocks above which to use DMA for
4744 + SD card (default 1)
4745 +
4746 + sd_debug Enable debug output from SD driver (default off)
4747 +
4748 + sdio_overclock Clock (in MHz) to use when the MMC framework
4749 + requests 50MHz for the SDIO/WiFi interface.
4750 +
4751 + tx_lpi_timer Set the delay in microseconds between going idle
4752 + and entering the low power state (default 600).
4753 + Requires EEE to be enabled - see "eee".
4754 +
4755 + uart0 Set to "off" to disable uart0 (default "on")
4756 +
4757 + uart1 Set to "on" or "off" to enable or disable uart1
4758 + (default varies)
4759 +
4760 + watchdog Set to "on" to enable the hardware watchdog
4761 + (default "off")
4762 +
4763 + act_led_trigger Choose which activity the LED tracks.
4764 + Use "heartbeat" for a nice load indicator.
4765 + (default "mmc")
4766 +
4767 + act_led_activelow Set to "on" to invert the sense of the LED
4768 + (default "off")
4769 + N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led
4770 + overlay.
4771 +
4772 + act_led_gpio Set which GPIO to use for the activity LED
4773 + (in case you want to connect it to an external
4774 + device)
4775 + (default "16" on a non-Plus board, "47" on a
4776 + Plus or Pi 2)
4777 + N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led
4778 + overlay.
4779 +
4780 + pwr_led_trigger
4781 + pwr_led_activelow
4782 + pwr_led_gpio
4783 + As for act_led_*, but using the PWR LED.
4784 + Not available on Model A/B boards.
4785 +
4786 + N.B. It is recommended to only enable those interfaces that are needed.
4787 + Leaving all interfaces enabled can lead to unwanted behaviour (i2c_vc
4788 + interfering with Pi Camera, I2S and SPI hogging GPIO pins, etc.)
4789 + Note also that i2c, i2c_arm and i2c_vc are aliases for the physical
4790 + interfaces i2c0 and i2c1. Use of the numeric variants is still possible
4791 + but deprecated because the ARM/VC assignments differ between board
4792 + revisions. The same board-specific mapping applies to i2c_baudrate,
4793 + and the other i2c baudrate parameters.
4794 +
4795 +
4796 +Name: act-led
4797 +Info: Pi 3B, 3B+, 3A+ and 4B use a GPIO expander to drive the LEDs which can
4798 + only be accessed from the VPU. There is a special driver for this with a
4799 + separate DT node, which has the unfortunate consequence of breaking the
4800 + act_led_gpio and act_led_activelow dtparams.
4801 + This overlay changes the GPIO controller back to the standard one and
4802 + restores the dtparams.
4803 +Load: dtoverlay=act-led,<param>=<val>
4804 +Params: activelow Set to "on" to invert the sense of the LED
4805 + (default "off")
4806 +
4807 + gpio Set which GPIO to use for the activity LED
4808 + (in case you want to connect it to an external
4809 + device)
4810 + REQUIRED
4811 +
4812 +
4813 +Name: adau1977-adc
4814 +Info: Overlay for activation of ADAU1977 ADC codec over I2C for control
4815 + and I2S for data.
4816 +Load: dtoverlay=adau1977-adc
4817 +Params: <None>
4818 +
4819 +
4820 +Name: adau7002-simple
4821 +Info: Overlay for the activation of ADAU7002 stereo PDM to I2S converter.
4822 +Load: dtoverlay=adau7002-simple,<param>=<val>
4823 +Params: card-name Override the default, "adau7002", card name.
4824 +
4825 +
4826 +Name: ads1015
4827 +Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C
4828 +Load: dtoverlay=ads1015,<param>=<val>
4829 +Params: addr I2C bus address of device. Set based on how the
4830 + addr pin is wired. (default=0x48 assumes addr
4831 + is pulled to GND)
4832 + cha_enable Enable virtual channel a. (default=true)
4833 + cha_cfg Set the configuration for virtual channel a.
4834 + (default=4 configures this channel for the
4835 + voltage at A0 with respect to GND)
4836 + cha_datarate Set the datarate (samples/sec) for this channel.
4837 + (default=4 sets 1600 sps)
4838 + cha_gain Set the gain of the Programmable Gain
4839 + Amplifier for this channel. (default=2 sets the
4840 + full scale of the channel to 2.048 Volts)
4841 +
4842 + Channel (ch) parameters can be set for each enabled channel.
4843 + A maximum of 4 channels can be enabled (letters a thru d).
4844 + For more information refer to the device datasheet at:
4845 + http://www.ti.com/lit/ds/symlink/ads1015.pdf
4846 +
4847 +
4848 +Name: ads1115
4849 +Info: Texas Instruments ADS1115 ADC
4850 +Load: dtoverlay=ads1115,<param>[=<val>]
4851 +Params: addr I2C bus address of device. Set based on how the
4852 + addr pin is wired. (default=0x48 assumes addr
4853 + is pulled to GND)
4854 + cha_enable Enable virtual channel a.
4855 + cha_cfg Set the configuration for virtual channel a.
4856 + (default=4 configures this channel for the
4857 + voltage at A0 with respect to GND)
4858 + cha_datarate Set the datarate (samples/sec) for this channel.
4859 + (default=7 sets 860 sps)
4860 + cha_gain Set the gain of the Programmable Gain
4861 + Amplifier for this channel. (Default 1 sets the
4862 + full scale of the channel to 4.096 Volts)
4863 +
4864 + Channel parameters can be set for each enabled channel.
4865 + A maximum of 4 channels can be enabled (letters a thru d).
4866 + For more information refer to the device datasheet at:
4867 + http://www.ti.com/lit/ds/symlink/ads1115.pdf
4868 +
4869 +
4870 +Name: ads7846
4871 +Info: ADS7846 Touch controller
4872 +Load: dtoverlay=ads7846,<param>=<val>
4873 +Params: cs SPI bus Chip Select (default 1)
4874 + speed SPI bus speed (default 2MHz, max 3.25MHz)
4875 + penirq GPIO used for PENIRQ. REQUIRED
4876 + penirq_pull Set GPIO pull (default 0=none, 2=pullup)
4877 + swapxy Swap x and y axis
4878 + xmin Minimum value on the X axis (default 0)
4879 + ymin Minimum value on the Y axis (default 0)
4880 + xmax Maximum value on the X axis (default 4095)
4881 + ymax Maximum value on the Y axis (default 4095)
4882 + pmin Minimum reported pressure value (default 0)
4883 + pmax Maximum reported pressure value (default 65535)
4884 + xohms Touchpanel sensitivity (X-plate resistance)
4885 + (default 400)
4886 +
4887 + penirq is required and usually xohms (60-100) has to be set as well.
4888 + Apart from that, pmax (255) and swapxy are also common.
4889 + The rest of the calibration can be done with xinput-calibrator.
4890 + See: github.com/notro/fbtft/wiki/FBTFT-on-Raspian
4891 + Device Tree binding document:
4892 + www.kernel.org/doc/Documentation/devicetree/bindings/input/ads7846.txt
4893 +
4894 +
4895 +Name: adv7282m
4896 +Info: Analog Devices ADV7282M analogue video to CSI2 bridge.
4897 + Uses Unicam1, which is the standard camera connector on most Pi
4898 + variants.
4899 +Load: dtoverlay=adv7282m,<param>=<val>
4900 +Params: i2c_pins_0_1 Use pins 0&1 for the I2C instead of 44&45.
4901 + Useful on Compute Modules.
4902 + i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45.
4903 + This is required for Pi B+, 2, 0, and 0W.
4904 + addr Overrides the I2C address (default 0x21)
4905 +
4906 +
4907 +Name: adv728x-m
4908 +Info: Analog Devices ADV728[0|1|2]-M analogue video to CSI2 bridges.
4909 + This is a wrapper for adv7282m, and defaults to ADV7282M.
4910 +Load: dtoverlay=adv728x-m,<param>=<val>
4911 +Params: i2c_pins_0_1 Use pins 0&1 for the I2C instead of 44&45.
4912 + Useful on Compute Modules.
4913 + i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45.
4914 + This is required for Pi B+, 2, 0, and 0W.
4915 + addr Overrides the I2C address (default 0x21)
4916 + adv7280m Select ADV7280-M.
4917 + adv7281m Select ADV7281-M.
4918 + adv7281ma Select ADV7281-MA.
4919 +
4920 +
4921 +Name: akkordion-iqdacplus
4922 +Info: Configures the Digital Dreamtime Akkordion Music Player (based on the
4923 + OEM IQAudIO DAC+ or DAC Zero module).
4924 +Load: dtoverlay=akkordion-iqdacplus,<param>=<val>
4925 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
4926 + Digital volume control. Enable with
4927 + dtoverlay=akkordion-iqdacplus,24db_digital_gain
4928 + (The default behaviour is that the Digital
4929 + volume control is limited to a maximum of
4930 + 0dB. ie. it can attenuate but not provide
4931 + gain. For most users, this will be desired
4932 + as it will prevent clipping. By appending
4933 + the 24db_digital_gain parameter, the Digital
4934 + volume control will allow up to 24dB of
4935 + gain. If this parameter is enabled, it is the
4936 + responsibility of the user to ensure that
4937 + the Digital volume control is set to a value
4938 + that does not result in clipping/distortion!)
4939 +
4940 +
4941 +Name: allo-boss-dac-pcm512x-audio
4942 +Info: Configures the Allo Boss DAC audio cards.
4943 +Load: dtoverlay=allo-boss-dac-pcm512x-audio,<param>
4944 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
4945 + Digital volume control. Enable with
4946 + "dtoverlay=allo-boss-dac-pcm512x-audio,
4947 + 24db_digital_gain"
4948 + (The default behaviour is that the Digital
4949 + volume control is limited to a maximum of
4950 + 0dB. ie. it can attenuate but not provide
4951 + gain. For most users, this will be desired
4952 + as it will prevent clipping. By appending
4953 + the 24db_digital_gain parameter, the Digital
4954 + volume control will allow up to 24dB of
4955 + gain. If this parameter is enabled, it is the
4956 + responsibility of the user to ensure that
4957 + the Digital volume control is set to a value
4958 + that does not result in clipping/distortion!)
4959 + slave Force Boss DAC into slave mode, using Pi a
4960 + master for bit clock and frame clock. Enable
4961 + with "dtoverlay=allo-boss-dac-pcm512x-audio,
4962 + slave"
4963 +
4964 +
4965 +Name: allo-digione
4966 +Info: Configures the Allo Digione audio card
4967 +Load: dtoverlay=allo-digione
4968 +Params: <None>
4969 +
4970 +
4971 +Name: allo-katana-dac-audio
4972 +Info: Configures the Allo Katana DAC audio card
4973 +Load: dtoverlay=allo-katana-dac-audio
4974 +Params: <None>
4975 +
4976 +
4977 +Name: allo-piano-dac-pcm512x-audio
4978 +Info: Configures the Allo Piano DAC (2.0/2.1) audio cards.
4979 + (NB. This initial support is for 2.0 channel audio ONLY! ie. stereo.
4980 + The subwoofer outputs on the Piano 2.1 are not currently supported!)
4981 +Load: dtoverlay=allo-piano-dac-pcm512x-audio,<param>
4982 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
4983 + Digital volume control.
4984 + (The default behaviour is that the Digital
4985 + volume control is limited to a maximum of
4986 + 0dB. ie. it can attenuate but not provide
4987 + gain. For most users, this will be desired
4988 + as it will prevent clipping. By appending
4989 + the 24db_digital_gain parameter, the Digital
4990 + volume control will allow up to 24dB of
4991 + gain. If this parameter is enabled, it is the
4992 + responsibility of the user to ensure that
4993 + the Digital volume control is set to a value
4994 + that does not result in clipping/distortion!)
4995 +
4996 +
4997 +Name: allo-piano-dac-plus-pcm512x-audio
4998 +Info: Configures the Allo Piano DAC (2.1) audio cards.
4999 +Load: dtoverlay=allo-piano-dac-plus-pcm512x-audio,<param>
5000 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5001 + Digital volume control.
5002 + (The default behaviour is that the Digital
5003 + volume control is limited to a maximum of
5004 + 0dB. ie. it can attenuate but not provide
5005 + gain. For most users, this will be desired
5006 + as it will prevent clipping. By appending
5007 + the 24db_digital_gain parameter, the Digital
5008 + volume control will allow up to 24dB of
5009 + gain. If this parameter is enabled, it is the
5010 + responsibility of the user to ensure that
5011 + the Digital volume control is set to a value
5012 + that does not result in clipping/distortion!)
5013 + glb_mclk This option is only with Kali board. If enabled,
5014 + MCLK for Kali is used and PLL is disabled for
5015 + better voice quality. (default Off)
5016 +
5017 +
5018 +Name: applepi-dac
5019 +Info: Configures the Orchard Audio ApplePi-DAC audio card
5020 +Load: dtoverlay=applepi-dac
5021 +Params: <None>
5022 +
5023 +
5024 +Name: at86rf233
5025 +Info: Configures the Atmel AT86RF233 802.15.4 low-power WPAN transceiver,
5026 + connected to spi0.0
5027 +Load: dtoverlay=at86rf233,<param>=<val>
5028 +Params: interrupt GPIO used for INT (default 23)
5029 + reset GPIO used for Reset (default 24)
5030 + sleep GPIO used for Sleep (default 25)
5031 + speed SPI bus speed in Hz (default 3000000)
5032 + trim Fine tuning of the internal capacitance
5033 + arrays (0=+0pF, 15=+4.5pF, default 15)
5034 +
5035 +
5036 +Name: audioinjector-addons
5037 +Info: Configures the audioinjector.net audio add on soundcards
5038 +Load: dtoverlay=audioinjector-addons,<param>=<val>
5039 +Params: non-stop-clocks Keeps the clocks running even when the stream
5040 + is paused or stopped (default off)
5041 +
5042 +
5043 +Name: audioinjector-ultra
5044 +Info: Configures the audioinjector.net ultra soundcard
5045 +Load: dtoverlay=audioinjector-ultra
5046 +Params: <None>
5047 +
5048 +
5049 +Name: audioinjector-wm8731-audio
5050 +Info: Configures the audioinjector.net audio add on soundcard
5051 +Load: dtoverlay=audioinjector-wm8731-audio
5052 +Params: <None>
5053 +
5054 +
5055 +Name: audiosense-pi
5056 +Info: Configures the audiosense-pi add on soundcard
5057 + For more information refer to
5058 + https://gitlab.com/kakar0t/audiosense-pi
5059 +Load: dtoverlay=audiosense-pi
5060 +Params: <None>
5061 +
5062 +
5063 +Name: audremap
5064 +Info: Switches PWM sound output to GPIOs on the 40-pin header
5065 +Load: dtoverlay=audremap,<param>=<val>
5066 +Params: swap_lr Reverse the channel allocation, which will also
5067 + swap the audio jack outputs (default off)
5068 + enable_jack Don't switch off the audio jack output
5069 + (default off)
5070 + pins_12_13 Select GPIOs 12 & 13 (default)
5071 + pins_18_19 Select GPIOs 18 & 19
5072 +
5073 +
5074 +Name: balena-fin
5075 +Info: Overlay that enables WiFi, Bluetooth and the GPIO expander on the
5076 + balenaFin carrier board for the Raspberry Pi Compute Module 3/3+ Lite.
5077 +Load: dtoverlay=balena-fin
5078 +Params: <None>
5079 +
5080 +
5081 +Name: bmp085_i2c-sensor
5082 +Info: This overlay is now deprecated - see i2c-sensor
5083 +Load: <Deprecated>
5084 +
5085 +
5086 +Name: dht11
5087 +Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
5088 + Also sometimes found with the part number(s) AM230x.
5089 +Load: dtoverlay=dht11,<param>=<val>
5090 +Params: gpiopin GPIO connected to the sensor's DATA output.
5091 + (default 4)
5092 +
5093 +
5094 +Name: dionaudio-loco
5095 +Info: Configures the Dion Audio LOCO DAC-AMP
5096 +Load: dtoverlay=dionaudio-loco
5097 +Params: <None>
5098 +
5099 +
5100 +Name: dionaudio-loco-v2
5101 +Info: Configures the Dion Audio LOCO-V2 DAC-AMP
5102 +Load: dtoverlay=dionaudio-loco-v2,<param>=<val>
5103 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5104 + Digital volume control. Enable with
5105 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
5106 + (The default behaviour is that the Digital
5107 + volume control is limited to a maximum of
5108 + 0dB. ie. it can attenuate but not provide
5109 + gain. For most users, this will be desired
5110 + as it will prevent clipping. By appending
5111 + the 24dB_digital_gain parameter, the Digital
5112 + volume control will allow up to 24dB of
5113 + gain. If this parameter is enabled, it is the
5114 + responsibility of the user to ensure that
5115 + the Digital volume control is set to a value
5116 + that does not result in clipping/distortion!)
5117 +
5118 +
5119 +Name: disable-bt
5120 +Info: Disable onboard Bluetooth on Pi 3B, 3B+, 3A+, 4B and Zero W, restoring
5121 + UART0/ttyAMA0 over GPIOs 14 & 15.
5122 + N.B. To disable the systemd service that initialises the modem so it
5123 + doesn't use the UART, use 'sudo systemctl disable hciuart'.
5124 +Load: dtoverlay=disable-bt
5125 +Params: <None>
5126 +
5127 +
5128 +Name: disable-wifi
5129 +Info: Disable onboard WiFi on Pi 3B, 3B+, 3A+, 4B and Zero W.
5130 +Load: dtoverlay=disable-wifi
5131 +Params: <None>
5132 +
5133 +
5134 +Name: dpi18
5135 +Info: Overlay for a generic 18-bit DPI display
5136 + This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output
5137 + 2-3 seconds after the kernel has started.
5138 +Load: dtoverlay=dpi18
5139 +Params: <None>
5140 +
5141 +
5142 +Name: dpi24
5143 +Info: Overlay for a generic 24-bit DPI display
5144 + This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output
5145 + 2-3 seconds after the kernel has started.
5146 +Load: dtoverlay=dpi24
5147 +Params: <None>
5148 +
5149 +
5150 +Name: draws
5151 +Info: Configures the NW Digital Radio DRAWS Hat
5152 +
5153 + The board includes an ADC to measure various board values and also
5154 + provides two analog user inputs on the expansion header. The ADC
5155 + can be configured for various sample rates and gain values to adjust
5156 + the input range. Tables describing the two parameters follow.
5157 +
5158 + ADC Gain Values:
5159 + 0 = +/- 6.144V
5160 + 1 = +/- 4.096V
5161 + 2 = +/- 2.048V
5162 + 3 = +/- 1.024V
5163 + 4 = +/- 0.512V
5164 + 5 = +/- 0.256V
5165 + 6 = +/- 0.256V
5166 + 7 = +/- 0.256V
5167 +
5168 + ADC Datarate Values:
5169 + 0 = 128sps
5170 + 1 = 250sps
5171 + 2 = 490sps
5172 + 3 = 920sps
5173 + 4 = 1600sps (default)
5174 + 5 = 2400sps
5175 + 6 = 3300sps
5176 + 7 = 3300sps
5177 +Load: dtoverlay=draws,<param>=<val>
5178 +Params: draws_adc_ch4_gain Sets the full scale resolution of the ADCs
5179 + input voltage sensor (default 1)
5180 +
5181 + draws_adc_ch4_datarate Sets the datarate of the ADCs input voltage
5182 + sensor
5183 +
5184 + draws_adc_ch5_gain Sets the full scale resolution of the ADCs
5185 + 5V rail voltage sensor (default 1)
5186 +
5187 + draws_adc_ch5_datarate Sets the datarate of the ADCs 4V rail voltage
5188 + sensor
5189 +
5190 + draws_adc_ch6_gain Sets the full scale resolution of the ADCs
5191 + AIN2 input (default 2)
5192 +
5193 + draws_adc_ch6_datarate Sets the datarate of the ADCs AIN2 input
5194 +
5195 + draws_adc_ch7_gain Sets the full scale resolution of the ADCs
5196 + AIN3 input (default 2)
5197 +
5198 + draws_adc_ch7_datarate Sets the datarate of the ADCs AIN3 input
5199 +
5200 + alsaname Name of the ALSA audio device (default "draws")
5201 +
5202 +
5203 +Name: dwc-otg
5204 +Info: Selects the dwc_otg USB controller driver which has fiq support. This
5205 + is the default on all except the Pi Zero which defaults to dwc2.
5206 +Load: dtoverlay=dwc-otg
5207 +Params: <None>
5208 +
5209 +
5210 +Name: dwc2
5211 +Info: Selects the dwc2 USB controller driver
5212 +Load: dtoverlay=dwc2,<param>=<val>
5213 +Params: dr_mode Dual role mode: "host", "peripheral" or "otg"
5214 +
5215 + g-rx-fifo-size Size of rx fifo size in gadget mode
5216 +
5217 + g-np-tx-fifo-size Size of non-periodic tx fifo size in gadget
5218 + mode
5219 +
5220 +
5221 +[ The ds1307-rtc overlay has been deleted. See i2c-rtc. ]
5222 +
5223 +
5224 +Name: enc28j60
5225 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI0
5226 +Load: dtoverlay=enc28j60,<param>=<val>
5227 +Params: int_pin GPIO used for INT (default 25)
5228 +
5229 + speed SPI bus speed (default 12000000)
5230 +
5231 +
5232 +Name: enc28j60-spi2
5233 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI2
5234 +Load: dtoverlay=enc28j60-spi2,<param>=<val>
5235 +Params: int_pin GPIO used for INT (default 39)
5236 +
5237 + speed SPI bus speed (default 12000000)
5238 +
5239 +
5240 +Name: exc3000
5241 +Info: Enables I2C connected EETI EXC3000 multiple touch controller using
5242 + GPIO 4 (pin 7 on GPIO header) for interrupt.
5243 +Load: dtoverlay=exc3000,<param>=<val>
5244 +Params: interrupt GPIO used for interrupt (default 4)
5245 + sizex Touchscreen size x (default 4096)
5246 + sizey Touchscreen size y (default 4096)
5247 + invx Touchscreen inverted x axis
5248 + invy Touchscreen inverted y axis
5249 + swapxy Touchscreen swapped x y axis
5250 +
5251 +
5252 +Name: fe-pi-audio
5253 +Info: Configures the Fe-Pi Audio Sound Card
5254 +Load: dtoverlay=fe-pi-audio
5255 +Params: <None>
5256 +
5257 +
5258 +Name: goodix
5259 +Info: Enables I2C connected Goodix gt9271 multiple touch controller using
5260 + GPIOs 4 and 17 (pins 7 and 11 on GPIO header) for interrupt and reset.
5261 +Load: dtoverlay=goodix,<param>=<val>
5262 +Params: interrupt GPIO used for interrupt (default 4)
5263 + reset GPIO used for reset (default 17)
5264 +
5265 +
5266 +Name: googlevoicehat-soundcard
5267 +Info: Configures the Google voiceHAT soundcard
5268 +Load: dtoverlay=googlevoicehat-soundcard
5269 +Params: <None>
5270 +
5271 +
5272 +Name: gpio-fan
5273 +Info: Configure a GPIO pin to control a cooling fan.
5274 +Load: dtoverlay=gpio-fan,<param>=<val>
5275 +Params: gpiopin GPIO used to control the fan (default 12)
5276 + temp Temperature at which the fan switches on, in
5277 + millicelcius (default 55000)
5278 +
5279 +
5280 +Name: gpio-ir
5281 +Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core-
5282 + based gpio_ir_recv driver maps received keys directly to a
5283 + /dev/input/event* device, all decoding is done by the kernel - LIRC is
5284 + not required! The key mapping and other decoding parameters can be
5285 + configured by "ir-keytable" tool.
5286 +Load: dtoverlay=gpio-ir,<param>=<val>
5287 +Params: gpio_pin Input pin number. Default is 18.
5288 +
5289 + gpio_pull Desired pull-up/down state (off, down, up)
5290 + Default is "up".
5291 +
5292 + rc-map-name Default rc keymap (can also be changed by
5293 + ir-keytable), defaults to "rc-rc6-mce"
5294 +
5295 +
5296 +Name: gpio-ir-tx
5297 +Info: Use GPIO pin as bit-banged infrared transmitter output.
5298 + This is an alternative to "pwm-ir-tx". gpio-ir-tx doesn't require
5299 + a PWM so it can be used together with onboard analog audio.
5300 +Load: dtoverlay=gpio-ir-tx,<param>=<val>
5301 +Params: gpio_pin Output GPIO (default 18)
5302 +
5303 + invert "1" = invert the output (make it active-low).
5304 + Default is "0" (active-high).
5305 +
5306 +
5307 +Name: gpio-key
5308 +Info: This is a generic overlay for activating GPIO keypresses using
5309 + the gpio-keys library and this dtoverlay. Multiple keys can be
5310 + set up using multiple calls to the overlay for configuring
5311 + additional buttons or joysticks. You can see available keycodes
5312 + at https://github.com/torvalds/linux/blob/v4.12/include/uapi/
5313 + linux/input-event-codes.h#L64
5314 +Load: dtoverlay=gpio-key,<param>=<val>
5315 +Params: gpio GPIO pin to trigger on (default 3)
5316 + active_low When this is 1 (active low), a falling
5317 + edge generates a key down event and a
5318 + rising edge generates a key up event.
5319 + When this is 0 (active high), this is
5320 + reversed. The default is 1 (active low)
5321 + gpio_pull Desired pull-up/down state (off, down, up)
5322 + Default is "up". Note that the default pin
5323 + (GPIO3) has an external pullup
5324 + label Set a label for the key
5325 + keycode Set the key code for the button
5326 +
5327 +
5328 +Name: gpio-no-bank0-irq
5329 +Info: Use this overlay to disable GPIO interrupts for GPIOs in bank 0 (0-27),
5330 + which can be useful for UIO drivers.
5331 + N.B. Using this overlay will trigger a kernel WARN during booting, but
5332 + this can safely be ignored - the system should work as expected.
5333 +Load: dtoverlay=gpio-no-bank0-irq
5334 +Params: <None>
5335 +
5336 +
5337 +Name: gpio-no-irq
5338 +Info: Use this overlay to disable all GPIO interrupts, which can be useful
5339 + for user-space GPIO edge detection systems.
5340 +Load: dtoverlay=gpio-no-irq
5341 +Params: <None>
5342 +
5343 +
5344 +Name: gpio-poweroff
5345 +Info: Drives a GPIO high or low on poweroff (including halt). Enabling this
5346 + overlay will prevent the ability to boot by driving GPIO3 low.
5347 +Load: dtoverlay=gpio-poweroff,<param>=<val>
5348 +Params: gpiopin GPIO for signalling (default 26)
5349 +
5350 + active_low Set if the power control device requires a
5351 + high->low transition to trigger a power-down.
5352 + Note that this will require the support of a
5353 + custom dt-blob.bin to prevent a power-down
5354 + during the boot process, and that a reboot
5355 + will also cause the pin to go low.
5356 + input Set if the gpio pin should be configured as
5357 + an input.
5358 + export Set to export the configured pin to sysfs
5359 +
5360 +
5361 +Name: gpio-shutdown
5362 +Info: Initiates a shutdown when GPIO pin changes. The given GPIO pin
5363 + is configured as an input key that generates KEY_POWER events.
5364 + This event is handled by systemd-logind by initiating a
5365 + shutdown. Systemd versions older than 225 need an udev rule
5366 + enable listening to the input device:
5367 +
5368 + ACTION!="REMOVE", SUBSYSTEM=="input", KERNEL=="event*", \
5369 + SUBSYSTEMS=="platform", DRIVERS=="gpio-keys", \
5370 + ATTRS{keys}=="116", TAG+="power-switch"
5371 +
5372 + This overlay only handles shutdown. After shutdown, the system
5373 + can be powered up again by driving GPIO3 low. The default
5374 + configuration uses GPIO3 with a pullup, so if you connect a
5375 + button between GPIO3 and GND (pin 5 and 6 on the 40-pin header),
5376 + you get a shutdown and power-up button.
5377 +Load: dtoverlay=gpio-shutdown,<param>=<val>
5378 +Params: gpio_pin GPIO pin to trigger on (default 3)
5379 +
5380 + active_low When this is 1 (active low), a falling
5381 + edge generates a key down event and a
5382 + rising edge generates a key up event.
5383 + When this is 0 (active high), this is
5384 + reversed. The default is 1 (active low).
5385 +
5386 + gpio_pull Desired pull-up/down state (off, down, up)
5387 + Default is "up".
5388 +
5389 + Note that the default pin (GPIO3) has an
5390 + external pullup.
5391 +
5392 + debounce Specify the debounce interval in milliseconds
5393 + (default 100)
5394 +
5395 +
5396 +Name: hd44780-lcd
5397 +Info: Configures an HD44780 compatible LCD display. Uses 4 gpio pins for
5398 + data, 2 gpio pins for enable and register select and 1 optional pin
5399 + for enabling/disabling the backlight display.
5400 +Load: dtoverlay=hd44780-lcd,<param>=<val>
5401 +Params: pin_d4 GPIO pin for data pin D4 (default 6)
5402 +
5403 + pin_d5 GPIO pin for data pin D5 (default 13)
5404 +
5405 + pin_d6 GPIO pin for data pin D6 (default 19)
5406 +
5407 + pin_d7 GPIO pin for data pin D7 (default 26)
5408 +
5409 + pin_en GPIO pin for "Enable" (default 21)
5410 +
5411 + pin_rs GPIO pin for "Register Select" (default 20)
5412 +
5413 + pin_bl Optional pin for enabling/disabling the
5414 + display backlight. (default disabled)
5415 +
5416 + display_height Height of the display in characters
5417 +
5418 + display_width Width of the display in characters
5419 +
5420 +
5421 +Name: hifiberry-amp
5422 +Info: Configures the HifiBerry Amp and Amp+ audio cards
5423 +Load: dtoverlay=hifiberry-amp
5424 +Params: <None>
5425 +
5426 +
5427 +Name: hifiberry-dac
5428 +Info: Configures the HifiBerry DAC audio card
5429 +Load: dtoverlay=hifiberry-dac
5430 +Params: <None>
5431 +
5432 +
5433 +Name: hifiberry-dacplus
5434 +Info: Configures the HifiBerry DAC+ audio card
5435 +Load: dtoverlay=hifiberry-dacplus,<param>=<val>
5436 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5437 + Digital volume control. Enable with
5438 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
5439 + (The default behaviour is that the Digital
5440 + volume control is limited to a maximum of
5441 + 0dB. ie. it can attenuate but not provide
5442 + gain. For most users, this will be desired
5443 + as it will prevent clipping. By appending
5444 + the 24dB_digital_gain parameter, the Digital
5445 + volume control will allow up to 24dB of
5446 + gain. If this parameter is enabled, it is the
5447 + responsibility of the user to ensure that
5448 + the Digital volume control is set to a value
5449 + that does not result in clipping/distortion!)
5450 + slave Force DAC+ Pro into slave mode, using Pi as
5451 + master for bit clock and frame clock.
5452 +
5453 +
5454 +Name: hifiberry-dacplusadc
5455 +Info: Configures the HifiBerry DAC+ADC audio card
5456 +Load: dtoverlay=hifiberry-dacplusadc,<param>=<val>
5457 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5458 + Digital volume control. Enable with
5459 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
5460 + (The default behaviour is that the Digital
5461 + volume control is limited to a maximum of
5462 + 0dB. ie. it can attenuate but not provide
5463 + gain. For most users, this will be desired
5464 + as it will prevent clipping. By appending
5465 + the 24dB_digital_gain parameter, the Digital
5466 + volume control will allow up to 24dB of
5467 + gain. If this parameter is enabled, it is the
5468 + responsibility of the user to ensure that
5469 + the Digital volume control is set to a value
5470 + that does not result in clipping/distortion!)
5471 + slave Force DAC+ Pro into slave mode, using Pi as
5472 + master for bit clock and frame clock.
5473 +
5474 +
5475 +Name: hifiberry-dacplusadcpro
5476 +Info: Configures the HifiBerry DAC+ADC PRO audio card
5477 +Load: dtoverlay=hifiberry-dacplusadcpro,<param>=<val>
5478 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5479 + Digital volume control. Enable with
5480 + "dtoverlay=hifiberry-dacplusadcpro,24db_digital_gain"
5481 + (The default behaviour is that the Digital
5482 + volume control is limited to a maximum of
5483 + 0dB. ie. it can attenuate but not provide
5484 + gain. For most users, this will be desired
5485 + as it will prevent clipping. By appending
5486 + the 24dB_digital_gain parameter, the Digital
5487 + volume control will allow up to 24dB of
5488 + gain. If this parameter is enabled, it is the
5489 + responsibility of the user to ensure that
5490 + the Digital volume control is set to a value
5491 + that does not result in clipping/distortion!)
5492 + slave Force DAC+ADC Pro into slave mode, using Pi as
5493 + master for bit clock and frame clock.
5494 +
5495 +
5496 +Name: hifiberry-dacplusdsp
5497 +Info: Configures the HifiBerry DAC+DSP audio card
5498 +Load: dtoverlay=hifiberry-dacplusdsp
5499 +Params: <None>
5500 +
5501 +
5502 +Name: hifiberry-digi
5503 +Info: Configures the HifiBerry Digi and Digi+ audio card
5504 +Load: dtoverlay=hifiberry-digi
5505 +Params: <None>
5506 +
5507 +
5508 +Name: hifiberry-digi-pro
5509 +Info: Configures the HifiBerry Digi+ Pro audio card
5510 +Load: dtoverlay=hifiberry-digi-pro
5511 +Params: <None>
5512 +
5513 +
5514 +Name: hy28a
5515 +Info: HY28A - 2.8" TFT LCD Display Module by HAOYU Electronics
5516 + Default values match Texy's display shield
5517 +Load: dtoverlay=hy28a,<param>=<val>
5518 +Params: speed Display SPI bus speed
5519 +
5520 + rotate Display rotation {0,90,180,270}
5521 +
5522 + fps Delay between frame updates
5523 +
5524 + debug Debug output level {0-7}
5525 +
5526 + xohms Touchpanel sensitivity (X-plate resistance)
5527 +
5528 + resetgpio GPIO used to reset controller
5529 +
5530 + ledgpio GPIO used to control backlight
5531 +
5532 +
5533 +Name: hy28b
5534 +Info: HY28B - 2.8" TFT LCD Display Module by HAOYU Electronics
5535 + Default values match Texy's display shield
5536 +Load: dtoverlay=hy28b,<param>=<val>
5537 +Params: speed Display SPI bus speed
5538 +
5539 + rotate Display rotation {0,90,180,270}
5540 +
5541 + fps Delay between frame updates
5542 +
5543 + debug Debug output level {0-7}
5544 +
5545 + xohms Touchpanel sensitivity (X-plate resistance)
5546 +
5547 + resetgpio GPIO used to reset controller
5548 +
5549 + ledgpio GPIO used to control backlight
5550 +
5551 +
5552 +Name: hy28b-2017
5553 +Info: HY28B 2017 version - 2.8" TFT LCD Display Module by HAOYU Electronics
5554 + Default values match Texy's display shield
5555 +Load: dtoverlay=hy28b-2017,<param>=<val>
5556 +Params: speed Display SPI bus speed
5557 +
5558 + rotate Display rotation {0,90,180,270}
5559 +
5560 + fps Delay between frame updates
5561 +
5562 + debug Debug output level {0-7}
5563 +
5564 + xohms Touchpanel sensitivity (X-plate resistance)
5565 +
5566 + resetgpio GPIO used to reset controller
5567 +
5568 + ledgpio GPIO used to control backlight
5569 +
5570 +
5571 +Name: i-sabre-q2m
5572 +Info: Configures the Audiophonics I-SABRE Q2M DAC
5573 +Load: dtoverlay=i-sabre-q2m
5574 +Params: <None>
5575 +
5576 +
5577 +Name: i2c-bcm2708
5578 +Info: Fall back to the i2c_bcm2708 driver for the i2c_arm bus.
5579 +Load: dtoverlay=i2c-bcm2708
5580 +Params: <None>
5581 +
5582 +
5583 +Name: i2c-gpio
5584 +Info: Adds support for software i2c controller on gpio pins
5585 +Load: dtoverlay=i2c-gpio,<param>=<val>
5586 +Params: i2c_gpio_sda GPIO used for I2C data (default "23")
5587 +
5588 + i2c_gpio_scl GPIO used for I2C clock (default "24")
5589 +
5590 + i2c_gpio_delay_us Clock delay in microseconds
5591 + (default "2" = ~100kHz)
5592 +
5593 + bus Set to a unique, non-zero value if wanting
5594 + multiple i2c-gpio busses. If set, will be used
5595 + as the preferred bus number (/dev/i2c-<n>). If
5596 + not set, the default value is 0, but the bus
5597 + number will be dynamically assigned - probably
5598 + 3.
5599 +
5600 +
5601 +Name: i2c-mux
5602 +Info: Adds support for a number of I2C bus multiplexers on i2c_arm
5603 +Load: dtoverlay=i2c-mux,<param>=<val>
5604 +Params: pca9542 Select the NXP PCA9542 device
5605 +
5606 + pca9545 Select the NXP PCA9545 device
5607 +
5608 + pca9548 Select the NXP PCA9548 device
5609 +
5610 + addr Change I2C address of the device (default 0x70)
5611 +
5612 +
5613 +[ The i2c-mux-pca9548a overlay has been deleted. See i2c-mux. ]
5614 +
5615 +
5616 +Name: i2c-pwm-pca9685a
5617 +Info: Adds support for an NXP PCA9685A I2C PWM controller on i2c_arm
5618 +Load: dtoverlay=i2c-pwm-pca9685a,<param>=<val>
5619 +Params: addr I2C address of PCA9685A (default 0x40)
5620 +
5621 +
5622 +Name: i2c-rtc
5623 +Info: Adds support for a number of I2C Real Time Clock devices
5624 +Load: dtoverlay=i2c-rtc,<param>=<val>
5625 +Params: abx80x Select one of the ABx80x family:
5626 + AB0801, AB0803, AB0804, AB0805,
5627 + AB1801, AB1803, AB1804, AB1805
5628 +
5629 + ds1307 Select the DS1307 device
5630 +
5631 + ds1339 Select the DS1339 device
5632 +
5633 + ds3231 Select the DS3231 device
5634 +
5635 + m41t62 Select the M41T62 device
5636 +
5637 + mcp7940x Select the MCP7940x device
5638 +
5639 + mcp7941x Select the MCP7941x device
5640 +
5641 + pcf2127 Select the PCF2127 device
5642 +
5643 + pcf2129 Select the PCF2129 device
5644 +
5645 + pcf8523 Select the PCF8523 device
5646 +
5647 + pcf8563 Select the PCF8563 device
5648 +
5649 + rv3028 Select the Micro Crystal RV3028 device
5650 +
5651 + addr Sets the address for the RTC. Note that the
5652 + device must be configured to use the specified
5653 + address.
5654 +
5655 + trickle-diode-type Diode type for trickle charge - "standard" or
5656 + "schottky" (ABx80x only)
5657 +
5658 + trickle-resistor-ohms Resistor value for trickle charge (DS1339,
5659 + ABx80x, RV3028)
5660 +
5661 + wakeup-source Specify that the RTC can be used as a wakeup
5662 + source
5663 +
5664 + backup-switchover-mode Backup power supply switch mode. Must be 0 for
5665 + off or 1 for Vdd < VBackup (RV3028 only)
5666 +
5667 +
5668 +Name: i2c-rtc-gpio
5669 +Info: Adds support for a number of I2C Real Time Clock devices
5670 + using the software i2c controller
5671 +Load: dtoverlay=i2c-rtc-gpio,<param>=<val>
5672 +Params: abx80x Select one of the ABx80x family:
5673 + AB0801, AB0803, AB0804, AB0805,
5674 + AB1801, AB1803, AB1804, AB1805
5675 +
5676 + ds1307 Select the DS1307 device
5677 +
5678 + ds1339 Select the DS1339 device
5679 +
5680 + ds3231 Select the DS3231 device
5681 +
5682 + m41t62 Select the M41T62 device
5683 +
5684 + mcp7940x Select the MCP7940x device
5685 +
5686 + mcp7941x Select the MCP7941x device
5687 +
5688 + pcf2127 Select the PCF2127 device
5689 +
5690 + pcf2129 Select the PCF2129 device
5691 +
5692 + pcf8523 Select the PCF8523 device
5693 +
5694 + pcf8563 Select the PCF8563 device
5695 +
5696 + rv3028 Select the Micro Crystal RV3028 device
5697 +
5698 + addr Sets the address for the RTC. Note that the
5699 + device must be configured to use the specified
5700 + address.
5701 +
5702 + trickle-diode-type Diode type for trickle charge - "standard" or
5703 + "schottky" (ABx80x only)
5704 +
5705 + trickle-resistor-ohms Resistor value for trickle charge (DS1339,
5706 + ABx80x, RV3028)
5707 +
5708 + wakeup-source Specify that the RTC can be used as a wakeup
5709 + source
5710 +
5711 + backup-switchover-mode Backup power supply switch mode. Must be 0 for
5712 + off or 1 for Vdd < VBackup (RV3028 only)
5713 +
5714 + i2c_gpio_sda GPIO used for I2C data (default "23")
5715 +
5716 + i2c_gpio_scl GPIO used for I2C clock (default "24")
5717 +
5718 + i2c_gpio_delay_us Clock delay in microseconds
5719 + (default "2" = ~100kHz)
5720 +
5721 +
5722 +Name: i2c-sensor
5723 +Info: Adds support for a number of I2C barometric pressure and temperature
5724 + sensors on i2c_arm
5725 +Load: dtoverlay=i2c-sensor,<param>=<val>
5726 +Params: addr Set the address for the BME280, BMP280, DS1621,
5727 + HDC100X, LM75, SHT3x or TMP102
5728 +
5729 + bme280 Select the Bosch Sensortronic BME280
5730 + Valid addresses 0x76-0x77, default 0x76
5731 +
5732 + bmp085 Select the Bosch Sensortronic BMP085
5733 +
5734 + bmp180 Select the Bosch Sensortronic BMP180
5735 +
5736 + bmp280 Select the Bosch Sensortronic BMP280
5737 + Valid addresses 0x76-0x77, default 0x76
5738 +
5739 + ds1621 Select the Dallas Semiconductors DS1621 temp
5740 + sensor. Valid addresses 0x48-0x4f, default 0x48
5741 +
5742 + hdc100x Select the Texas Instruments HDC100x temp sensor
5743 + Valid addresses 0x40-0x43, default 0x40
5744 +
5745 + htu21 Select the HTU21 temperature and humidity sensor
5746 +
5747 + lm75 Select the Maxim LM75 temperature sensor
5748 + Valid addresses 0x48-0x4f, default 0x4f
5749 +
5750 + lm75addr Deprecated - use addr parameter instead
5751 +
5752 + max17040 Select the Maxim Integrated MAX17040 battery
5753 + monitor
5754 +
5755 + sht3x Select the Sensiron SHT3x temperature and
5756 + humidity sensor. Valid addresses 0x44-0x45,
5757 + default 0x44
5758 +
5759 + si7020 Select the Silicon Labs Si7013/20/21 humidity/
5760 + temperature sensor
5761 +
5762 + tmp102 Select the Texas Instruments TMP102 temp sensor
5763 + Valid addresses 0x48-0x4b, default 0x48
5764 +
5765 + tsl4531 Select the AMS TSL4531 digital ambient light
5766 + sensor
5767 +
5768 + veml6070 Select the Vishay VEML6070 ultraviolet light
5769 + sensor
5770 +
5771 +
5772 +Name: i2c0
5773 +Info: Change i2c0 pin usage. Not all pin combinations are usable on all
5774 + platforms - platforms other then Compute Modules can only use this
5775 + to disable transaction combining.
5776 +Load: dtoverlay=i2c0,<param>=<val>
5777 +Params: pins_0_1 Use pins 0 and 1 (default)
5778 + pins_28_29 Use pins 28 and 29
5779 + pins_44_45 Use pins 44 and 45
5780 + pins_46_47 Use pins 46 and 47
5781 + combine Allow transactions to be combined (default
5782 + "yes")
5783 +
5784 +
5785 +Name: i2c0-bcm2708
5786 +Info: Deprecated, legacy version of i2c0, from which it inherits its
5787 + parameters, just adding the explicit individual pin specifiers.
5788 +Load: <Deprecated>
5789 +Params: sda0_pin GPIO pin for SDA0 (deprecated - use pins_*)
5790 + scl0_pin GPIO pin for SCL0 (deprecated - use pins_*)
5791 +
5792 +
5793 +Name: i2c1
5794 +Info: Change i2c1 pin usage. Not all pin combinations are usable on all
5795 + platforms - platforms other then Compute Modules can only use this
5796 + to disable transaction combining.
5797 +Load: dtoverlay=i2c1,<param>=<val>
5798 +Params: pins_2_3 Use pins 2 and 3 (default)
5799 + pins_44_45 Use pins 44 and 45
5800 + combine Allow transactions to be combined (default
5801 + "yes")
5802 +
5803 +
5804 +Name: i2c1-bcm2708
5805 +Info: Deprecated, legacy version of i2c1, from which it inherits its
5806 + parameters, just adding the explicit individual pin specifiers.
5807 +Load: <Deprecated>
5808 +Params: sda1_pin GPIO pin for SDA1 (2 or 44 - default 2)
5809 + scl1_pin GPIO pin for SCL1 (3 or 45 - default 3)
5810 + pin_func Alternative pin function (4 (alt0), 6 (alt2) -
5811 + default 4)
5812 +
5813 +
5814 +Name: i2c3
5815 +Info: Enable the i2c3 bus
5816 +Load: dtoverlay=i2c3,<param>
5817 +Params: pins_2_3 Use GPIOs 2 and 3
5818 + pins_4_5 Use GPIOs 4 and 5 (default)
5819 + baudrate Set the baudrate for the interface (default
5820 + "100000")
5821 +
5822 +
5823 +Name: i2c4
5824 +Info: Enable the i2c4 bus
5825 +Load: dtoverlay=i2c4,<param>
5826 +Params: pins_6_7 Use GPIOs 6 and 7
5827 + pins_8_9 Use GPIOs 8 and 9 (default)
5828 + baudrate Set the baudrate for the interface (default
5829 + "100000")
5830 +
5831 +
5832 +Name: i2c5
5833 +Info: Enable the i2c5 bus
5834 +Load: dtoverlay=i2c5,<param>
5835 +Params: pins_10_11 Use GPIOs 10 and 11
5836 + pins_12_13 Use GPIOs 12 and 13 (default)
5837 + baudrate Set the baudrate for the interface (default
5838 + "100000")
5839 +
5840 +
5841 +Name: i2c6
5842 +Info: Enable the i2c6 bus
5843 +Load: dtoverlay=i2c6,<param>
5844 +Params: pins_0_1 Use GPIOs 0 and 1
5845 + pins_22_23 Use GPIOs 22 and 23 (default)
5846 + baudrate Set the baudrate for the interface (default
5847 + "100000")
5848 +
5849 +
5850 +Name: i2s-gpio28-31
5851 +Info: move I2S function block to GPIO 28 to 31
5852 +Load: dtoverlay=i2s-gpio28-31
5853 +Params: <None>
5854 +
5855 +
5856 +Name: ilitek251x
5857 +Info: Enables I2C connected Ilitek 251x multiple touch controller using
5858 + GPIO 4 (pin 7 on GPIO header) for interrupt.
5859 +Load: dtoverlay=ilitek251x,<param>=<val>
5860 +Params: interrupt GPIO used for interrupt (default 4)
5861 + sizex Touchscreen size x, horizontal resolution of
5862 + touchscreen (in pixels)
5863 + sizey Touchscreen size y, vertical resolution of
5864 + touchscreen (in pixels)
5865 +
5866 +
5867 +Name: imx219
5868 +Info: Sony IMX219 camera module.
5869 + Uses Unicam 1, which is the standard camera connector on most Pi
5870 + variants.
5871 +Load: dtoverlay=imx219,<param>=<val>
5872 +Params: i2c_pins_0_1 Use pins 0&1 for the I2C instead of 44&45.
5873 + Useful on Compute Modules.
5874 +
5875 + i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45.
5876 + This is required for Pi B+, 2, 0, and 0W.
5877 +
5878 +
5879 +Name: iqaudio-codec
5880 +Info: Configures the IQaudio Codec audio card
5881 +Load: dtoverlay=iqaudio-codec
5882 +Params: <None>
5883 +
5884 +
5885 +Name: iqaudio-dac
5886 +Info: Configures the IQaudio DAC audio card
5887 +Load: dtoverlay=iqaudio-dac,<param>
5888 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5889 + Digital volume control. Enable with
5890 + "dtoverlay=iqaudio-dac,24db_digital_gain"
5891 + (The default behaviour is that the Digital
5892 + volume control is limited to a maximum of
5893 + 0dB. ie. it can attenuate but not provide
5894 + gain. For most users, this will be desired
5895 + as it will prevent clipping. By appending
5896 + the 24db_digital_gain parameter, the Digital
5897 + volume control will allow up to 24dB of
5898 + gain. If this parameter is enabled, it is the
5899 + responsibility of the user to ensure that
5900 + the Digital volume control is set to a value
5901 + that does not result in clipping/distortion!)
5902 +
5903 +
5904 +Name: iqaudio-dacplus
5905 +Info: Configures the IQaudio DAC+ audio card
5906 +Load: dtoverlay=iqaudio-dacplus,<param>=<val>
5907 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5908 + Digital volume control. Enable with
5909 + "dtoverlay=iqaudio-dacplus,24db_digital_gain"
5910 + (The default behaviour is that the Digital
5911 + volume control is limited to a maximum of
5912 + 0dB. ie. it can attenuate but not provide
5913 + gain. For most users, this will be desired
5914 + as it will prevent clipping. By appending
5915 + the 24db_digital_gain parameter, the Digital
5916 + volume control will allow up to 24dB of
5917 + gain. If this parameter is enabled, it is the
5918 + responsibility of the user to ensure that
5919 + the Digital volume control is set to a value
5920 + that does not result in clipping/distortion!)
5921 + auto_mute_amp If specified, unmute/mute the IQaudIO amp when
5922 + starting/stopping audio playback.
5923 + unmute_amp If specified, unmute the IQaudIO amp once when
5924 + the DAC driver module loads.
5925 +
5926 +
5927 +Name: iqaudio-digi-wm8804-audio
5928 +Info: Configures the IQAudIO Digi WM8804 audio card
5929 +Load: dtoverlay=iqaudio-digi-wm8804-audio,<param>=<val>
5930 +Params: card_name Override the default, "IQAudIODigi", card name.
5931 + dai_name Override the default, "IQAudIO Digi", dai name.
5932 + dai_stream_name Override the default, "IQAudIO Digi HiFi",
5933 + dai stream name.
5934 +
5935 +
5936 +Name: irs1125
5937 +Info: Infineon irs1125 TOF camera module.
5938 + Uses Unicam 1, which is the standard camera connector on most Pi
5939 + variants.
5940 +Load: dtoverlay=irs1125,<param>=<val>
5941 +Params: i2c_pins_0_1 Use pins 0&1 for the I2C instead of 44&45.
5942 + Useful on Compute Modules.
5943 +
5944 + i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45.
5945 + This is required for Pi B+, 2, 0, and 0W.
5946 +
5947 +
5948 +Name: jedec-spi-nor
5949 +Info: Adds support for JEDEC-compliant SPI NOR flash devices. (Note: The
5950 + "jedec,spi-nor" kernel driver was formerly known as "m25p80".)
5951 +Load: dtoverlay=jedec-spi-nor,<param>=<val>
5952 +Params: flash-spi<n>-<m> Enables flash device on SPI<n>, CS#<m>.
5953 + flash-fastr-spi<n>-<m> Enables flash device with fast read capability
5954 + on SPI<n>, CS#<m>.
5955 +
5956 +
5957 +Name: justboom-dac
5958 +Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
5959 + cards
5960 +Load: dtoverlay=justboom-dac,<param>=<val>
5961 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5962 + Digital volume control. Enable with
5963 + "dtoverlay=justboom-dac,24db_digital_gain"
5964 + (The default behaviour is that the Digital
5965 + volume control is limited to a maximum of
5966 + 0dB. ie. it can attenuate but not provide
5967 + gain. For most users, this will be desired
5968 + as it will prevent clipping. By appending
5969 + the 24dB_digital_gain parameter, the Digital
5970 + volume control will allow up to 24dB of
5971 + gain. If this parameter is enabled, it is the
5972 + responsibility of the user to ensure that
5973 + the Digital volume control is set to a value
5974 + that does not result in clipping/distortion!)
5975 +
5976 +
5977 +Name: justboom-digi
5978 +Info: Configures the JustBoom Digi HAT and Digi Zero audio cards
5979 +Load: dtoverlay=justboom-digi
5980 +Params: <None>
5981 +
5982 +
5983 +Name: lirc-rpi
5984 +Info: This overlay has been deprecated and removed - see gpio-ir
5985 +Load: <Deprecated>
5986 +
5987 +
5988 +Name: ltc294x
5989 +Info: Adds support for the ltc294x family of battery gauges
5990 +Load: dtoverlay=ltc294x,<param>=<val>
5991 +Params: ltc2941 Select the ltc2941 device
5992 +
5993 + ltc2942 Select the ltc2942 device
5994 +
5995 + ltc2943 Select the ltc2943 device
5996 +
5997 + ltc2944 Select the ltc2944 device
5998 +
5999 + resistor-sense The sense resistor value in milli-ohms.
6000 + Can be a 32-bit negative value when the battery
6001 + has been connected to the wrong end of the
6002 + resistor.
6003 +
6004 + prescaler-exponent Range and accuracy of the gauge. The value is
6005 + programmed into the chip only if it differs
6006 + from the current setting.
6007 + For LTC2941 only:
6008 + - Default value is 128
6009 + - the exponent is in the range 0-7 (default 7)
6010 + See the datasheet for more information.
6011 +
6012 +
6013 +Name: max98357a
6014 +Info: Configures the Maxim MAX98357A I2S DAC
6015 +Load: dtoverlay=max98357a,<param>=<val>
6016 +Params: no-sdmode Driver does not manage the state of the DAC's
6017 + SD_MODE pin (i.e. chip is always on).
6018 + sdmode-pin integer, GPIO pin connected to the SD_MODE input
6019 + of the DAC (default GPIO4 if parameter omitted).
6020 +
6021 +
6022 +Name: mbed-dac
6023 +Info: Configures the mbed AudioCODEC (TLV320AIC23B)
6024 +Load: dtoverlay=mbed-dac
6025 +Params: <None>
6026 +
6027 +
6028 +Name: mcp23017
6029 +Info: Configures the MCP23017 I2C GPIO expander
6030 +Load: dtoverlay=mcp23017,<param>=<val>
6031 +Params: gpiopin Gpio pin connected to the INTA output of the
6032 + MCP23017 (default: 4)
6033 +
6034 + addr I2C address of the MCP23017 (default: 0x20)
6035 +
6036 + mcp23008 Configure an MCP23008 instead.
6037 + noints Disable the interrupt GPIO line.
6038 +
6039 +
6040 +Name: mcp23s17
6041 +Info: Configures the MCP23S08/17 SPI GPIO expanders.
6042 + If devices are present on SPI1 or SPI2, those interfaces must be enabled
6043 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
6044 + If interrupts are enabled for a device on a given CS# on a SPI bus, that
6045 + device must be the only one present on that SPI bus/CS#.
6046 +Load: dtoverlay=mcp23s17,<param>=<val>
6047 +Params: s08-spi<n>-<m>-present 4-bit integer, bitmap indicating MCP23S08
6048 + devices present on SPI<n>, CS#<m>
6049 +
6050 + s17-spi<n>-<m>-present 8-bit integer, bitmap indicating MCP23S17
6051 + devices present on SPI<n>, CS#<m>
6052 +
6053 + s08-spi<n>-<m>-int-gpio integer, enables interrupts on a single
6054 + MCP23S08 device on SPI<n>, CS#<m>, specifies
6055 + the GPIO pin to which INT output of MCP23S08
6056 + is connected.
6057 +
6058 + s17-spi<n>-<m>-int-gpio integer, enables mirrored interrupts on a
6059 + single MCP23S17 device on SPI<n>, CS#<m>,
6060 + specifies the GPIO pin to which either INTA
6061 + or INTB output of MCP23S17 is connected.
6062 +
6063 +
6064 +Name: mcp2515-can0
6065 +Info: Configures the MCP2515 CAN controller on spi0.0
6066 +Load: dtoverlay=mcp2515-can0,<param>=<val>
6067 +Params: oscillator Clock frequency for the CAN controller (Hz)
6068 +
6069 + spimaxfrequency Maximum SPI frequence (Hz)
6070 +
6071 + interrupt GPIO for interrupt signal
6072 +
6073 +
6074 +Name: mcp2515-can1
6075 +Info: Configures the MCP2515 CAN controller on spi0.1
6076 +Load: dtoverlay=mcp2515-can1,<param>=<val>
6077 +Params: oscillator Clock frequency for the CAN controller (Hz)
6078 +
6079 + spimaxfrequency Maximum SPI frequence (Hz)
6080 +
6081 + interrupt GPIO for interrupt signal
6082 +
6083 +
6084 +Name: mcp3008
6085 +Info: Configures MCP3008 A/D converters
6086 + For devices on spi1 or spi2, the interfaces should be enabled
6087 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
6088 +Load: dtoverlay=mcp3008,<param>[=<val>]
6089 +Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
6090 + spi<n>-<m>-speed integer, set the spi bus speed for this device
6091 +
6092 +
6093 +Name: mcp3202
6094 +Info: Configures MCP3202 A/D converters
6095 + For devices on spi1 or spi2, the interfaces should be enabled
6096 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
6097 +Load: dtoverlay=mcp3202,<param>[=<val>]
6098 +Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
6099 + spi<n>-<m>-speed integer, set the spi bus speed for this device
6100 +
6101 +
6102 +Name: mcp342x
6103 +Info: Overlay for activation of Microchip MCP3421-3428 ADCs over I2C
6104 +Load: dtoverlay=mcp342x,<param>=<val>
6105 +Params: addr I2C bus address of device, for devices with
6106 + addresses that are configurable, e.g. by
6107 + hardware links (default=0x68)
6108 + mcp3421 The device is an MCP3421
6109 + mcp3422 The device is an MCP3422
6110 + mcp3423 The device is an MCP3423
6111 + mcp3424 The device is an MCP3424
6112 + mcp3425 The device is an MCP3425
6113 + mcp3426 The device is an MCP3426
6114 + mcp3427 The device is an MCP3427
6115 + mcp3428 The device is an MCP3428
6116 +
6117 +
6118 +Name: media-center
6119 +Info: Media Center HAT - 2.83" Touch Display + extras by Pi Supply
6120 +Load: dtoverlay=media-center,<param>=<val>
6121 +Params: speed Display SPI bus speed
6122 + rotate Display rotation {0,90,180,270}
6123 + fps Delay between frame updates
6124 + xohms Touchpanel sensitivity (X-plate resistance)
6125 + swapxy Swap x and y axis
6126 + backlight Change backlight GPIO pin {e.g. 12, 18}
6127 + gpio_out_pin GPIO for output (default "17")
6128 + gpio_in_pin GPIO for input (default "18")
6129 + gpio_in_pull Pull up/down/off on the input pin
6130 + (default "down")
6131 + sense Override the IR receive auto-detection logic:
6132 + "0" = force active-high
6133 + "1" = force active-low
6134 + "-1" = use auto-detection
6135 + (default "-1")
6136 + softcarrier Turn the software carrier "on" or "off"
6137 + (default "on")
6138 + invert "on" = invert the output pin (default "off")
6139 + debug "on" = enable additional debug messages
6140 + (default "off")
6141 +
6142 +
6143 +Name: midi-uart0
6144 +Info: Configures UART0 (ttyAMA0) so that a requested 38.4kbaud actually gets
6145 + 31.25kbaud, the frequency required for MIDI
6146 +Load: dtoverlay=midi-uart0
6147 +Params: <None>
6148 +
6149 +
6150 +Name: midi-uart1
6151 +Info: Configures UART1 (ttyS0) so that a requested 38.4kbaud actually gets
6152 + 31.25kbaud, the frequency required for MIDI
6153 +Load: dtoverlay=midi-uart1
6154 +Params: <None>
6155 +
6156 +
6157 +Name: miniuart-bt
6158 +Info: Switch the onboard Bluetooth function on Pi 3B, 3B+, 3A+, 4B and Zero W
6159 + to use the mini-UART (ttyS0) and restore UART0/ttyAMA0 over GPIOs 14 &
6160 + 15. Note that this may reduce the maximum usable baudrate.
6161 + N.B. It is also necessary to edit /lib/systemd/system/hciuart.service
6162 + and replace ttyAMA0 with ttyS0, unless using Raspbian or another
6163 + distribution with udev rules that create /dev/serial0 and /dev/serial1,
6164 + in which case use /dev/serial1 instead because it will always be
6165 + correct. Furthermore, you must also set core_freq and core_freq_min to
6166 + the same value in config.txt or the miniuart will not work.
6167 +Load: dtoverlay=miniuart-bt
6168 +Params: <None>
6169 +
6170 +
6171 +Name: mmc
6172 +Info: Selects the bcm2835-mmc SD/MMC driver, optionally with overclock
6173 +Load: dtoverlay=mmc,<param>=<val>
6174 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
6175 + requests 50MHz
6176 +
6177 +
6178 +Name: mpu6050
6179 +Info: Overlay for i2c connected mpu6050 imu
6180 +Load: dtoverlay=mpu6050,<param>=<val>
6181 +Params: interrupt GPIO pin for interrupt (default 4)
6182 +
6183 +
6184 +Name: mz61581
6185 +Info: MZ61581 display by Tontec
6186 +Load: dtoverlay=mz61581,<param>=<val>
6187 +Params: speed Display SPI bus speed
6188 +
6189 + rotate Display rotation {0,90,180,270}
6190 +
6191 + fps Delay between frame updates
6192 +
6193 + txbuflen Transmit buffer length (default 32768)
6194 +
6195 + debug Debug output level {0-7}
6196 +
6197 + xohms Touchpanel sensitivity (X-plate resistance)
6198 +
6199 +
6200 +Name: ov5647
6201 +Info: Omnivision OV5647 camera module.
6202 + Uses Unicam 1, which is the standard camera connector on most Pi
6203 + variants.
6204 +Load: dtoverlay=ov5647,<param>=<val>
6205 +Params: i2c_pins_0_1 Use pins 0&1 for the I2C instead of 44&45.
6206 + Useful on Compute Modules.
6207 +
6208 + i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45.
6209 + This is required for Pi B+, 2, 0, and 0W.
6210 +
6211 +
6212 +Name: papirus
6213 +Info: PaPiRus ePaper Screen by Pi Supply (both HAT and pHAT)
6214 +Load: dtoverlay=papirus,<param>=<val>
6215 +Params: panel Display panel (required):
6216 + 1.44": e1144cs021
6217 + 2.0": e2200cs021
6218 + 2.7": e2271cs021
6219 +
6220 + speed Display SPI bus speed
6221 +
6222 +
6223 +[ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ]
6224 +
6225 +
6226 +[ The pcf8523-rtc overlay has been deleted. See i2c-rtc. ]
6227 +
6228 +
6229 +[ The pcf8563-rtc overlay has been deleted. See i2c-rtc. ]
6230 +
6231 +
6232 +Name: pi3-act-led
6233 +Info: This overlay has been renamed act-led, keeping pi3-act-led as an alias
6234 + for backwards compatibility.
6235 +Load: <Deprecated>
6236 +
6237 +
6238 +Name: pi3-disable-bt
6239 +Info: This overlay has been renamed disable-bt, keeping pi3-disable-bt as an
6240 + alias for backwards compatibility.
6241 +Load: <Deprecated>
6242 +
6243 +
6244 +Name: pi3-disable-wifi
6245 +Info: This overlay has been renamed disable-wifi, keeping pi3-disable-wifi as
6246 + an alias for backwards compatibility.
6247 +Load: <Deprecated>
6248 +
6249 +
6250 +Name: pi3-miniuart-bt
6251 +Info: This overlay has been renamed miniuart-bt, keeping pi3-miniuart-bt as
6252 + an alias for backwards compatibility.
6253 +Load: <Deprecated>
6254 +
6255 +
6256 +Name: pibell
6257 +Info: Configures the pibell audio card.
6258 +Load: dtoverlay=pibell,<param>=<val>
6259 +Params: alsaname Set the name as it appears in ALSA (default
6260 + "PiBell")
6261 +
6262 +
6263 +Name: piglow
6264 +Info: Configures the PiGlow by pimoroni.com
6265 +Load: dtoverlay=piglow
6266 +Params: <None>
6267 +
6268 +
6269 +Name: piscreen
6270 +Info: PiScreen display by OzzMaker.com
6271 +Load: dtoverlay=piscreen,<param>=<val>
6272 +Params: speed Display SPI bus speed
6273 +
6274 + rotate Display rotation {0,90,180,270}
6275 +
6276 + fps Delay between frame updates
6277 +
6278 + debug Debug output level {0-7}
6279 +
6280 + xohms Touchpanel sensitivity (X-plate resistance)
6281 +
6282 +
6283 +Name: piscreen2r
6284 +Info: PiScreen 2 with resistive TP display by OzzMaker.com
6285 +Load: dtoverlay=piscreen2r,<param>=<val>
6286 +Params: speed Display SPI bus speed
6287 +
6288 + rotate Display rotation {0,90,180,270}
6289 +
6290 + fps Delay between frame updates
6291 +
6292 + debug Debug output level {0-7}
6293 +
6294 + xohms Touchpanel sensitivity (X-plate resistance)
6295 +
6296 +
6297 +Name: pisound
6298 +Info: Configures the Blokas Labs pisound card
6299 +Load: dtoverlay=pisound
6300 +Params: <None>
6301 +
6302 +
6303 +Name: pitft22
6304 +Info: Adafruit PiTFT 2.2" screen
6305 +Load: dtoverlay=pitft22,<param>=<val>
6306 +Params: speed Display SPI bus speed
6307 +
6308 + rotate Display rotation {0,90,180,270}
6309 +
6310 + fps Delay between frame updates
6311 +
6312 + debug Debug output level {0-7}
6313 +
6314 +
6315 +Name: pitft28-capacitive
6316 +Info: Adafruit PiTFT 2.8" capacitive touch screen
6317 +Load: dtoverlay=pitft28-capacitive,<param>=<val>
6318 +Params: speed Display SPI bus speed
6319 +
6320 + rotate Display rotation {0,90,180,270}
6321 +
6322 + fps Delay between frame updates
6323 +
6324 + debug Debug output level {0-7}
6325 +
6326 + touch-sizex Touchscreen size x (default 240)
6327 +
6328 + touch-sizey Touchscreen size y (default 320)
6329 +
6330 + touch-invx Touchscreen inverted x axis
6331 +
6332 + touch-invy Touchscreen inverted y axis
6333 +
6334 + touch-swapxy Touchscreen swapped x y axis
6335 +
6336 +
6337 +Name: pitft28-resistive
6338 +Info: Adafruit PiTFT 2.8" resistive touch screen
6339 +Load: dtoverlay=pitft28-resistive,<param>=<val>
6340 +Params: speed Display SPI bus speed
6341 +
6342 + rotate Display rotation {0,90,180,270}
6343 +
6344 + fps Delay between frame updates
6345 +
6346 + debug Debug output level {0-7}
6347 +
6348 +
6349 +Name: pitft35-resistive
6350 +Info: Adafruit PiTFT 3.5" resistive touch screen
6351 +Load: dtoverlay=pitft35-resistive,<param>=<val>
6352 +Params: speed Display SPI bus speed
6353 +
6354 + rotate Display rotation {0,90,180,270}
6355 +
6356 + fps Delay between frame updates
6357 +
6358 + debug Debug output level {0-7}
6359 +
6360 +
6361 +Name: pps-gpio
6362 +Info: Configures the pps-gpio (pulse-per-second time signal via GPIO).
6363 +Load: dtoverlay=pps-gpio,<param>=<val>
6364 +Params: gpiopin Input GPIO (default "18")
6365 + assert_falling_edge When present, assert is indicated by a falling
6366 + edge, rather than by a rising edge (default
6367 + off)
6368 + capture_clear Generate clear events on the trailing edge
6369 + (default off)
6370 +
6371 +
6372 +Name: pwm
6373 +Info: Configures a single PWM channel
6374 + Legal pin,function combinations for each channel:
6375 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
6376 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
6377 + N.B.:
6378 + 1) Pin 18 is the only one available on all platforms, and
6379 + it is the one used by the I2S audio interface.
6380 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
6381 + 2) The onboard analogue audio output uses both PWM channels.
6382 + 3) So be careful mixing audio and PWM.
6383 + 4) Currently the clock must have been enabled and configured
6384 + by other means.
6385 +Load: dtoverlay=pwm,<param>=<val>
6386 +Params: pin Output pin (default 18) - see table
6387 + func Pin function (default 2 = Alt5) - see above
6388 + clock PWM clock frequency (informational)
6389 +
6390 +
6391 +Name: pwm-2chan
6392 +Info: Configures both PWM channels
6393 + Legal pin,function combinations for each channel:
6394 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
6395 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
6396 + N.B.:
6397 + 1) Pin 18 is the only one available on all platforms, and
6398 + it is the one used by the I2S audio interface.
6399 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
6400 + 2) The onboard analogue audio output uses both PWM channels.
6401 + 3) So be careful mixing audio and PWM.
6402 + 4) Currently the clock must have been enabled and configured
6403 + by other means.
6404 +Load: dtoverlay=pwm-2chan,<param>=<val>
6405 +Params: pin Output pin (default 18) - see table
6406 + pin2 Output pin for other channel (default 19)
6407 + func Pin function (default 2 = Alt5) - see above
6408 + func2 Function for pin2 (default 2 = Alt5)
6409 + clock PWM clock frequency (informational)
6410 +
6411 +
6412 +Name: pwm-ir-tx
6413 +Info: Use GPIO pin as pwm-assisted infrared transmitter output.
6414 + This is an alternative to "gpio-ir-tx". pwm-ir-tx makes use
6415 + of PWM0 to reduce the CPU load during transmission compared to
6416 + gpio-ir-tx which uses bit-banging.
6417 + Legal pin,function combinations are:
6418 + 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
6419 +Load: dtoverlay=pwm-ir-tx,<param>=<val>
6420 +Params: gpio_pin Output GPIO (default 18)
6421 +
6422 + func Pin function (default 2 = Alt5)
6423 +
6424 +
6425 +Name: qca7000
6426 +Info: I2SE's Evaluation Board for PLC Stamp micro
6427 +Load: dtoverlay=qca7000,<param>=<val>
6428 +Params: int_pin GPIO pin for interrupt signal (default 23)
6429 +
6430 + speed SPI bus speed (default 12 MHz)
6431 +
6432 +
6433 +Name: rotary-encoder
6434 +Info: Overlay for GPIO connected rotary encoder.
6435 +Load: dtoverlay=rotary-encoder,<param>=<val>
6436 +Params: pin_a GPIO connected to rotary encoder channel A
6437 + (default 4).
6438 + pin_b GPIO connected to rotary encoder channel B
6439 + (default 17).
6440 + relative_axis register a relative axis rather than an
6441 + absolute one. Relative axis will only
6442 + generate +1/-1 events on the input device,
6443 + hence no steps need to be passed.
6444 + linux_axis the input subsystem axis to map to this
6445 + rotary encoder. Defaults to 0 (ABS_X / REL_X)
6446 + rollover Automatic rollover when the rotary value
6447 + becomes greater than the specified steps or
6448 + smaller than 0. For absolute axis only.
6449 + steps-per-period Number of steps (stable states) per period.
6450 + The values have the following meaning:
6451 + 1: Full-period mode (default)
6452 + 2: Half-period mode
6453 + 4: Quarter-period mode
6454 + steps Number of steps in a full turnaround of the
6455 + encoder. Only relevant for absolute axis.
6456 + Defaults to 24 which is a typical value for
6457 + such devices.
6458 + wakeup Boolean, rotary encoder can wake up the
6459 + system.
6460 + encoding String, the method used to encode steps.
6461 + Supported are "gray" (the default and more
6462 + common) and "binary".
6463 +
6464 +
6465 +Name: rpi-backlight
6466 +Info: Raspberry Pi official display backlight driver
6467 +Load: dtoverlay=rpi-backlight
6468 +Params: <None>
6469 +
6470 +
6471 +Name: rpi-cirrus-wm5102
6472 +Info: Configures the Cirrus Logic Audio Card
6473 +Load: dtoverlay=rpi-cirrus-wm5102
6474 +Params: <None>
6475 +
6476 +
6477 +Name: rpi-dac
6478 +Info: Configures the RPi DAC audio card
6479 +Load: dtoverlay=rpi-dac
6480 +Params: <None>
6481 +
6482 +
6483 +Name: rpi-display
6484 +Info: RPi-Display - 2.8" Touch Display by Watterott
6485 +Load: dtoverlay=rpi-display,<param>=<val>
6486 +Params: speed Display SPI bus speed
6487 + rotate Display rotation {0,90,180,270}
6488 + fps Delay between frame updates
6489 + debug Debug output level {0-7}
6490 + xohms Touchpanel sensitivity (X-plate resistance)
6491 + swapxy Swap x and y axis
6492 + backlight Change backlight GPIO pin {e.g. 12, 18}
6493 +
6494 +
6495 +Name: rpi-ft5406
6496 +Info: Official Raspberry Pi display touchscreen
6497 +Load: dtoverlay=rpi-ft5406,<param>=<val>
6498 +Params: touchscreen-size-x Touchscreen X resolution (default 800)
6499 + touchscreen-size-y Touchscreen Y resolution (default 600);
6500 + touchscreen-inverted-x Invert touchscreen X coordinates (default 0);
6501 + touchscreen-inverted-y Invert touchscreen Y coordinates (default 0);
6502 + touchscreen-swapped-x-y Swap X and Y cordinates (default 0);
6503 +
6504 +
6505 +Name: rpi-poe
6506 +Info: Raspberry Pi PoE HAT fan
6507 +Load: dtoverlay=rpi-poe,<param>[=<val>]
6508 +Params: poe_fan_temp0 Temperature (in millicelcius) at which the fan
6509 + turns on (default 50000)
6510 + poe_fan_temp0_hyst Temperature delta (in millicelcius) at which
6511 + the fan turns off (default 5000)
6512 + poe_fan_temp1 Temperature (in millicelcius) at which the fan
6513 + speeds up (default 55000)
6514 + poe_fan_temp1_hyst Temperature delta (in millicelcius) at which
6515 + the fan slows down (default 5000)
6516 +
6517 +
6518 +Name: rpi-proto
6519 +Info: Configures the RPi Proto audio card
6520 +Load: dtoverlay=rpi-proto
6521 +Params: <None>
6522 +
6523 +
6524 +Name: rpi-sense
6525 +Info: Raspberry Pi Sense HAT
6526 +Load: dtoverlay=rpi-sense
6527 +Params: <None>
6528 +
6529 +
6530 +Name: rpi-tv
6531 +Info: Raspberry Pi TV HAT
6532 +Load: dtoverlay=rpi-tv
6533 +Params: <None>
6534 +
6535 +
6536 +Name: rra-digidac1-wm8741-audio
6537 +Info: Configures the Red Rocks Audio DigiDAC1 soundcard
6538 +Load: dtoverlay=rra-digidac1-wm8741-audio
6539 +Params: <None>
6540 +
6541 +
6542 +Name: sc16is750-i2c
6543 +Info: Overlay for the NXP SC16IS750 UART with I2C Interface
6544 + Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
6545 + select another address, please refer to table 10 in reference manual.
6546 +Load: dtoverlay=sc16is750-i2c,<param>=<val>
6547 +Params: int_pin GPIO used for IRQ (default 24)
6548 + addr Address (default 0x48)
6549 + xtal On-board crystal frequency (default 14745600)
6550 +
6551 +
6552 +Name: sc16is752-i2c
6553 +Info: Overlay for the NXP SC16IS752 dual UART with I2C Interface
6554 + Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
6555 + select another address, please refer to table 10 in reference manual.
6556 +Load: dtoverlay=sc16is752-i2c,<param>=<val>
6557 +Params: int_pin GPIO used for IRQ (default 24)
6558 + addr Address (default 0x48)
6559 + xtal On-board crystal frequency (default 14745600)
6560 +
6561 +
6562 +Name: sc16is752-spi1
6563 +Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
6564 + Enables the chip on SPI1.
6565 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
6566 + A+, B+, Zero and PI2 B; as well as the Compute Module.
6567 +
6568 +Load: dtoverlay=sc16is752-spi1,<param>=<val>
6569 +Params: int_pin GPIO used for IRQ (default 24)
6570 +
6571 +
6572 +Name: sdhost
6573 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
6574 + N.B. This overlay is designed for situations where the mmc driver is
6575 + the default, so it disables the other (mmc) interface - this will kill
6576 + WiFi on a Pi3. If this isn't what you want, either use the sdtweak
6577 + overlay or the new sd_* dtparams of the base DTBs.
6578 +Load: dtoverlay=sdhost,<param>=<val>
6579 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
6580 + requests 50MHz
6581 +
6582 + force_pio Disable DMA support (default off)
6583 +
6584 + pio_limit Number of blocks above which to use DMA
6585 + (default 1)
6586 +
6587 + debug Enable debug output (default off)
6588 +
6589 +
6590 +Name: sdio
6591 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock,
6592 + and enables SDIO via GPIOs 22-27. An example of use in 1-bit mode is
6593 + "dtoverlay=sdio,bus_width=1,gpios_22_25"
6594 +Load: dtoverlay=sdio,<param>=<val>
6595 +Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC
6596 + framework requests 50MHz
6597 +
6598 + poll_once Disable SDIO-device polling every second
6599 + (default on: polling once at boot-time)
6600 +
6601 + bus_width Set the SDIO host bus width (default 4 bits)
6602 +
6603 + gpios_22_25 Select GPIOs 22-25 for 1-bit mode. Must be used
6604 + with bus_width=1. This replaces the sdio-1bit
6605 + overlay, which is now deprecated.
6606 +
6607 + gpios_34_37 Select GPIOs 34-37 for 1-bit mode. Must be used
6608 + with bus_width=1.
6609 +
6610 + gpios_34_39 Select GPIOs 34-39 for 4-bit mode. Must be used
6611 + with bus_width=4 (the default).
6612 +
6613 +
6614 +Name: sdio-1bit
6615 +Info: This overlay is now deprecated. Use
6616 + "dtoverlay=sdio,bus_width=1,gpios_22_25" instead.
6617 +Load: <Deprecated>
6618 +
6619 +
6620 +Name: sdtweak
6621 +Info: Tunes the bcm2835-sdhost SD/MMC driver
6622 + N.B. This functionality is now available via the sd_* dtparams in the
6623 + base DTB.
6624 +Load: dtoverlay=sdtweak,<param>=<val>
6625 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
6626 + requests 50MHz
6627 +
6628 + force_pio Disable DMA support (default off)
6629 +
6630 + pio_limit Number of blocks above which to use DMA
6631 + (default 1)
6632 +
6633 + debug Enable debug output (default off)
6634 +
6635 + poll_once Looks for a card once after booting. Useful
6636 + for network booting scenarios to avoid the
6637 + overhead of continuous polling. N.B. Using
6638 + this option restricts the system to using a
6639 + single card per boot (or none at all).
6640 + (default off)
6641 +
6642 + enable Set to off to completely disable the interface
6643 + (default on)
6644 +
6645 +
6646 +Name: smi
6647 +Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25!
6648 +Load: dtoverlay=smi
6649 +Params: <None>
6650 +
6651 +
6652 +Name: smi-dev
6653 +Info: Enables the userspace interface for the SMI driver
6654 +Load: dtoverlay=smi-dev
6655 +Params: <None>
6656 +
6657 +
6658 +Name: smi-nand
6659 +Info: Enables access to NAND flash via the SMI interface
6660 +Load: dtoverlay=smi-nand
6661 +Params: <None>
6662 +
6663 +
6664 +Name: spi-gpio35-39
6665 +Info: Move SPI function block to GPIO 35 to 39
6666 +Load: dtoverlay=spi-gpio35-39
6667 +Params: <None>
6668 +
6669 +
6670 +Name: spi-gpio40-45
6671 +Info: Move SPI function block to GPIOs 40 to 45
6672 +Load: dtoverlay=spi-gpio40-45
6673 +Params: <None>
6674 +
6675 +
6676 +Name: spi-rtc
6677 +Info: Adds support for a number of SPI Real Time Clock devices
6678 +Load: dtoverlay=spi-rtc,<param>=<val>
6679 +Params: pcf2123 Select the PCF2123 device
6680 +
6681 +
6682 +Name: spi0-cs
6683 +Info: Allows the (software) CS pins for SPI0 to be changed
6684 +Load: dtoverlay=spi0-cs,<param>=<val>
6685 +Params: cs0_pin GPIO pin for CS0 (default 8)
6686 + cs1_pin GPIO pin for CS1 (default 7)
6687 +
6688 +
6689 +Name: spi0-hw-cs
6690 +Info: Re-enables hardware CS/CE (chip selects) for SPI0
6691 +Load: dtoverlay=spi0-hw-cs
6692 +Params: <None>
6693 +
6694 +
6695 +Name: spi1-1cs
6696 +Info: Enables spi1 with a single chip select (CS) line and associated spidev
6697 + dev node. The gpio pin number for the CS line and spidev device node
6698 + creation are configurable.
6699 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
6700 + A+, B+, Zero and PI2 B; as well as the Compute Module.
6701 +Load: dtoverlay=spi1-1cs,<param>=<val>
6702 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
6703 + cs0_spidev Set to 'disabled' to stop the creation of a
6704 + userspace device node /dev/spidev1.0 (default
6705 + is 'okay' or enabled).
6706 +
6707 +
6708 +Name: spi1-2cs
6709 +Info: Enables spi1 with two chip select (CS) lines and associated spidev
6710 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
6711 + creation are configurable.
6712 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
6713 + A+, B+, Zero and PI2 B; as well as the Compute Module.
6714 +Load: dtoverlay=spi1-2cs,<param>=<val>
6715 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
6716 + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
6717 + cs0_spidev Set to 'disabled' to stop the creation of a
6718 + userspace device node /dev/spidev1.0 (default
6719 + is 'okay' or enabled).
6720 + cs1_spidev Set to 'disabled' to stop the creation of a
6721 + userspace device node /dev/spidev1.1 (default
6722 + is 'okay' or enabled).
6723 +
6724 +
6725 +Name: spi1-3cs
6726 +Info: Enables spi1 with three chip select (CS) lines and associated spidev
6727 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
6728 + creation are configurable.
6729 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
6730 + A+, B+, Zero and PI2 B; as well as the Compute Module.
6731 +Load: dtoverlay=spi1-3cs,<param>=<val>
6732 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
6733 + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
6734 + cs2_pin GPIO pin for CS2 (default 16 - BCM SPI1_CE2).
6735 + cs0_spidev Set to 'disabled' to stop the creation of a
6736 + userspace device node /dev/spidev1.0 (default
6737 + is 'okay' or enabled).
6738 + cs1_spidev Set to 'disabled' to stop the creation of a
6739 + userspace device node /dev/spidev1.1 (default
6740 + is 'okay' or enabled).
6741 + cs2_spidev Set to 'disabled' to stop the creation of a
6742 + userspace device node /dev/spidev1.2 (default
6743 + is 'okay' or enabled).
6744 +
6745 +
6746 +Name: spi2-1cs
6747 +Info: Enables spi2 with a single chip select (CS) line and associated spidev
6748 + dev node. The gpio pin number for the CS line and spidev device node
6749 + creation are configurable.
6750 + N.B.: spi2 is only accessible with the Compute Module.
6751 +Load: dtoverlay=spi2-1cs,<param>=<val>
6752 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
6753 + cs0_spidev Set to 'disabled' to stop the creation of a
6754 + userspace device node /dev/spidev2.0 (default
6755 + is 'okay' or enabled).
6756 +
6757 +
6758 +Name: spi2-2cs
6759 +Info: Enables spi2 with two chip select (CS) lines and associated spidev
6760 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
6761 + creation are configurable.
6762 + N.B.: spi2 is only accessible with the Compute Module.
6763 +Load: dtoverlay=spi2-2cs,<param>=<val>
6764 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
6765 + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
6766 + cs0_spidev Set to 'disabled' to stop the creation of a
6767 + userspace device node /dev/spidev2.0 (default
6768 + is 'okay' or enabled).
6769 + cs1_spidev Set to 'disabled' to stop the creation of a
6770 + userspace device node /dev/spidev2.1 (default
6771 + is 'okay' or enabled).
6772 +
6773 +
6774 +Name: spi2-3cs
6775 +Info: Enables spi2 with three chip select (CS) lines and associated spidev
6776 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
6777 + creation are configurable.
6778 + N.B.: spi2 is only accessible with the Compute Module.
6779 +Load: dtoverlay=spi2-3cs,<param>=<val>
6780 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
6781 + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
6782 + cs2_pin GPIO pin for CS2 (default 45 - BCM SPI2_CE2).
6783 + cs0_spidev Set to 'disabled' to stop the creation of a
6784 + userspace device node /dev/spidev2.0 (default
6785 + is 'okay' or enabled).
6786 + cs1_spidev Set to 'disabled' to stop the creation of a
6787 + userspace device node /dev/spidev2.1 (default
6788 + is 'okay' or enabled).
6789 + cs2_spidev Set to 'disabled' to stop the creation of a
6790 + userspace device node /dev/spidev2.2 (default
6791 + is 'okay' or enabled).
6792 +
6793 +
6794 +Name: spi3-1cs
6795 +Info: Enables spi3 with a single chip select (CS) line and associated spidev
6796 + dev node. The gpio pin number for the CS line and spidev device node
6797 + creation are configurable.
6798 +Load: dtoverlay=spi3-1cs,<param>=<val>
6799 +Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
6800 + cs0_spidev Set to 'off' to prevent the creation of a
6801 + userspace device node /dev/spidev3.0 (default
6802 + is 'on' or enabled).
6803 +
6804 +
6805 +Name: spi3-2cs
6806 +Info: Enables spi3 with two chip select (CS) lines and associated spidev
6807 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
6808 + creation are configurable.
6809 +Load: dtoverlay=spi3-2cs,<param>=<val>
6810 +Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
6811 + cs1_pin GPIO pin for CS1 (default 24 - BCM SPI3_CE1).
6812 + cs0_spidev Set to 'off' to prevent the creation of a
6813 + userspace device node /dev/spidev3.0 (default
6814 + is 'on' or enabled).
6815 + cs1_spidev Set to 'off' to prevent the creation of a
6816 + userspace device node /dev/spidev3.1 (default
6817 + is 'on' or enabled).
6818 +
6819 +
6820 +Name: spi4-1cs
6821 +Info: Enables spi4 with a single chip select (CS) line and associated spidev
6822 + dev node. The gpio pin number for the CS line and spidev device node
6823 + creation are configurable.
6824 +Load: dtoverlay=spi4-1cs,<param>=<val>
6825 +Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
6826 + cs0_spidev Set to 'off' to prevent the creation of a
6827 + userspace device node /dev/spidev4.0 (default
6828 + is 'on' or enabled).
6829 +
6830 +
6831 +Name: spi4-2cs
6832 +Info: Enables spi4 with two chip select (CS) lines and associated spidev
6833 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
6834 + creation are configurable.
6835 +Load: dtoverlay=spi4-2cs,<param>=<val>
6836 +Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
6837 + cs1_pin GPIO pin for CS1 (default 25 - BCM SPI4_CE1).
6838 + cs0_spidev Set to 'off' to prevent the creation of a
6839 + userspace device node /dev/spidev4.0 (default
6840 + is 'on' or enabled).
6841 + cs1_spidev Set to 'off' to prevent the creation of a
6842 + userspace device node /dev/spidev4.1 (default
6843 + is 'on' or enabled).
6844 +
6845 +
6846 +Name: spi5-1cs
6847 +Info: Enables spi5 with a single chip select (CS) line and associated spidev
6848 + dev node. The gpio pin numbers for the CS lines and spidev device node
6849 + creation are configurable.
6850 +Load: dtoverlay=spi5-1cs,<param>=<val>
6851 +Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
6852 + cs0_spidev Set to 'off' to prevent the creation of a
6853 + userspace device node /dev/spidev5.0 (default
6854 + is 'on' or enabled).
6855 +
6856 +
6857 +Name: spi5-2cs
6858 +Info: Enables spi5 with two chip select (CS) lines and associated spidev
6859 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
6860 + creation are configurable.
6861 +Load: dtoverlay=spi5-2cs,<param>=<val>
6862 +Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
6863 + cs1_pin GPIO pin for CS1 (default 26 - BCM SPI5_CE1).
6864 + cs0_spidev Set to 'off' to prevent the creation of a
6865 + userspace device node /dev/spidev5.0 (default
6866 + is 'on' or enabled).
6867 + cs1_spidev Set to 'off' to prevent the creation of a
6868 + userspace device node /dev/spidev5.1 (default
6869 + is 'on' or enabled).
6870 +
6871 +
6872 +Name: spi6-1cs
6873 +Info: Enables spi6 with a single chip select (CS) line and associated spidev
6874 + dev node. The gpio pin number for the CS line and spidev device node
6875 + creation are configurable.
6876 +Load: dtoverlay=spi6-1cs,<param>=<val>
6877 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
6878 + cs0_spidev Set to 'off' to prevent the creation of a
6879 + userspace device node /dev/spidev6.0 (default
6880 + is 'on' or enabled).
6881 +
6882 +
6883 +Name: spi6-2cs
6884 +Info: Enables spi6 with two chip select (CS) lines and associated spidev
6885 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
6886 + creation are configurable.
6887 +Load: dtoverlay=spi6-2cs,<param>=<val>
6888 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
6889 + cs1_pin GPIO pin for CS1 (default 27 - BCM SPI6_CE1).
6890 + cs0_spidev Set to 'off' to prevent the creation of a
6891 + userspace device node /dev/spidev6.0 (default
6892 + is 'on' or enabled).
6893 + cs1_spidev Set to 'off' to prevent the creation of a
6894 + userspace device node /dev/spidev6.1 (default
6895 + is 'on' or enabled).
6896 +
6897 +
6898 +Name: ssd1306
6899 +Info: Overlay for activation of SSD1306 over I2C OLED display framebuffer.
6900 +Load: dtoverlay=ssd1306,<param>=<val>
6901 +Params: address Location in display memory of first character.
6902 + (default=0)
6903 + width Width of display. (default=128)
6904 + height Height of display. (default=64)
6905 + offset virtual channel a. (default=0)
6906 + normal Has no effect on displays tested. (default=not
6907 + set)
6908 + sequential Set this if every other scan line is missing.
6909 + (default=not set)
6910 + remapped Set this if display is garbled. (default=not
6911 + set)
6912 + inverted Set this if display is inverted and mirrored.
6913 + (default=not set)
6914 +
6915 + Examples:
6916 + Typical usage for 128x64 display: dtoverlay=ssd1306,inverted
6917 +
6918 + Typical usage for 128x32 display: dtoverlay=ssd1306,inverted,sequential
6919 +
6920 + i2c_baudrate=400000 will speed up the display.
6921 +
6922 + i2c_baudrate=1000000 seems to work even though it's not officially
6923 + supported by the hardware, and is faster still.
6924 +
6925 + For more information refer to the device datasheet at:
6926 + https://cdn-shop.adafruit.com/datasheets/SSD1306.pdf
6927 +
6928 +
6929 +Name: superaudioboard
6930 +Info: Configures the SuperAudioBoard sound card
6931 +Load: dtoverlay=superaudioboard,<param>=<val>
6932 +Params: gpiopin GPIO pin for codec reset
6933 +
6934 +
6935 +Name: sx150x
6936 +Info: Configures the Semtech SX150X I2C GPIO expanders.
6937 +Load: dtoverlay=sx150x,<param>=<val>
6938 +Params: sx150<x>-<n>-<m> Enables SX150X device on I2C#<n> with slave
6939 + address <m>. <x> may be 1-9. <n> may be 0 or 1.
6940 + Permissible values of <m> (which is denoted in
6941 + hex) depend on the device variant. For SX1501,
6942 + SX1502, SX1504 and SX1505, <m> may be 20 or 21.
6943 + For SX1503 and SX1506, <m> may be 20. For
6944 + SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
6945 + For SX1508, <m> may be 20, 21, 22 or 23.
6946 +
6947 + sx150<x>-<n>-<m>-int-gpio
6948 + Integer, enables interrupts on SX150X device on
6949 + I2C#<n> with slave address <m>, specifies
6950 + the GPIO pin to which NINT output of SX150X is
6951 + connected.
6952 +
6953 +
6954 +Name: tc358743
6955 +Info: Toshiba TC358743 HDMI to CSI-2 bridge chip.
6956 + Uses Unicam 1, which is the standard camera connector on most Pi
6957 + variants.
6958 +Load: dtoverlay=tc358743,<param>=<val>
6959 +Params: 4lane Use 4 lanes (only applicable to Compute Modules
6960 + CAM1 connector).
6961 +
6962 + link-frequency Set the link frequency. Only values of 297000000
6963 + (574Mbit/s) and 486000000 (972Mbit/s - default)
6964 + are supported by the driver.
6965 +
6966 + i2c_pins_0_1 Use pins 0&1 for the I2C instead of 44&45.
6967 + Useful on Compute Modules.
6968 +
6969 + i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45.
6970 + This is required for Pi B+, 2, 0, and 0W.
6971 +
6972 +
6973 +Name: tc358743-audio
6974 +Info: Used in combination with the tc358743-fast overlay to route the audio
6975 + from the TC358743 over I2S to the Pi.
6976 + Wiring is LRCK/WFS to GPIO 19, BCK/SCK to GPIO 18, and DATA/SD to GPIO
6977 + 20.
6978 +Load: dtoverlay=tc358743-audio,<param>=<val>
6979 +Params: card-name Override the default, "tc358743", card name.
6980 +
6981 +
6982 +Name: tinylcd35
6983 +Info: 3.5" Color TFT Display by www.tinylcd.com
6984 + Options: Touch, RTC, keypad
6985 +Load: dtoverlay=tinylcd35,<param>=<val>
6986 +Params: speed Display SPI bus speed
6987 +
6988 + rotate Display rotation {0,90,180,270}
6989 +
6990 + fps Delay between frame updates
6991 +
6992 + debug Debug output level {0-7}
6993 +
6994 + touch Enable touch panel
6995 +
6996 + touchgpio Touch controller IRQ GPIO
6997 +
6998 + xohms Touchpanel: Resistance of X-plate in ohms
6999 +
7000 + rtc-pcf PCF8563 Real Time Clock
7001 +
7002 + rtc-ds DS1307 Real Time Clock
7003 +
7004 + keypad Enable keypad
7005 +
7006 + Examples:
7007 + Display with touchpanel, PCF8563 RTC and keypad:
7008 + dtoverlay=tinylcd35,touch,rtc-pcf,keypad
7009 + Old touch display:
7010 + dtoverlay=tinylcd35,touch,touchgpio=3
7011 +
7012 +
7013 +Name: tpm-slb9670
7014 +Info: Enables support for Infineon SLB9670 Trusted Platform Module add-on
7015 + boards, which can be used as a secure key storage and hwrng,
7016 + available as "Iridium SLB9670" by Infineon and "LetsTrust TPM" by pi3g.
7017 +Load: dtoverlay=tpm-slb9670
7018 +Params: <None>
7019 +
7020 +
7021 +Name: uart0
7022 +Info: Change the pin usage of uart0
7023 +Load: dtoverlay=uart0,<param>=<val>
7024 +Params: txd0_pin GPIO pin for TXD0 (14, 32 or 36 - default 14)
7025 +
7026 + rxd0_pin GPIO pin for RXD0 (15, 33 or 37 - default 15)
7027 +
7028 + pin_func Alternative pin function - 4(Alt0) for 14&15,
7029 + 7(Alt3) for 32&33, 6(Alt2) for 36&37
7030 +
7031 +
7032 +Name: uart1
7033 +Info: Change the pin usage of uart1
7034 +Load: dtoverlay=uart1,<param>=<val>
7035 +Params: txd1_pin GPIO pin for TXD1 (14, 32 or 40 - default 14)
7036 +
7037 + rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
7038 +
7039 +
7040 +Name: uart2
7041 +Info: Enable uart 2 on GPIOs 0-3
7042 +Load: dtoverlay=uart2,<param>
7043 +Params: ctsrts Enable CTS/RTS on GPIOs 2-3 (default off)
7044 +
7045 +
7046 +Name: uart3
7047 +Info: Enable uart 3 on GPIOs 4-7
7048 +Load: dtoverlay=uart3,<param>
7049 +Params: ctsrts Enable CTS/RTS on GPIOs 6-7 (default off)
7050 +
7051 +
7052 +Name: uart4
7053 +Info: Enable uart 4 on GPIOs 8-11
7054 +Load: dtoverlay=uart4,<param>
7055 +Params: ctsrts Enable CTS/RTS on GPIOs 10-11 (default off)
7056 +
7057 +
7058 +Name: uart5
7059 +Info: Enable uart 5 on GPIOs 12-15
7060 +Load: dtoverlay=uart5,<param>
7061 +Params: ctsrts Enable CTS/RTS on GPIOs 14-15 (default off)
7062 +
7063 +
7064 +Name: udrc
7065 +Info: Configures the NW Digital Radio UDRC Hat
7066 +Load: dtoverlay=udrc,<param>=<val>
7067 +Params: alsaname Name of the ALSA audio device (default "udrc")
7068 +
7069 +
7070 +Name: upstream
7071 +Info: Allow usage of downstream .dtb with upstream kernel. Comprises the
7072 + vc4-kms-v3d and dwc2 overlays.
7073 +Load: dtoverlay=upstream
7074 +Params: <None>
7075 +
7076 +
7077 +Name: upstream-aux-interrupt
7078 +Info: This overlay has been deprecated and removed because it is no longer
7079 + necessary.
7080 +Load: <Deprecated>
7081 +
7082 +
7083 +Name: vc4-fkms-v3d
7084 +Info: Enable Eric Anholt's DRM VC4 V3D driver on top of the dispmanx
7085 + display stack.
7086 +Load: dtoverlay=vc4-fkms-v3d,<param>
7087 +Params: cma-256 CMA is 256MB (needs 1GB)
7088 + cma-192 CMA is 192MB (needs 1GB)
7089 + cma-128 CMA is 128MB
7090 + cma-96 CMA is 96MB
7091 + cma-64 CMA is 64MB
7092 +
7093 +
7094 +Name: vc4-kms-kippah-7inch
7095 +Info: Enable the Adafruit DPI Kippah with the 7" Ontat panel attached.
7096 + Requires vc4-kms-v3d to be loaded.
7097 +Load: dtoverlay=vc4-kms-kippah-7inch
7098 +Params: <None>
7099 +
7100 +
7101 +Name: vc4-kms-v3d
7102 +Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver. Running startx or
7103 + booting to GUI while this overlay is in use will cause interesting
7104 + lockups.
7105 +Load: dtoverlay=vc4-kms-v3d,<param>
7106 +Params: cma-256 CMA is 256MB (needs 1GB)
7107 + cma-192 CMA is 192MB (needs 1GB)
7108 + cma-128 CMA is 128MB
7109 + cma-96 CMA is 96MB
7110 + cma-64 CMA is 64MB
7111 + audio Enable or disable audio over HDMI (default "on")
7112 +
7113 +
7114 +Name: vga666
7115 +Info: Overlay for the Fen Logic VGA666 board
7116 + This uses GPIOs 2-21 (so no I2C), and activates the output 2-3 seconds
7117 + after the kernel has started.
7118 +Load: dtoverlay=vga666
7119 +Params: <None>
7120 +
7121 +
7122 +Name: w1-gpio
7123 +Info: Configures the w1-gpio Onewire interface module.
7124 + Use this overlay if you *don't* need a GPIO to drive an external pullup.
7125 +Load: dtoverlay=w1-gpio,<param>=<val>
7126 +Params: gpiopin GPIO for I/O (default "4")
7127 + pullup Now enabled by default (ignored)
7128 +
7129 +
7130 +Name: w1-gpio-pullup
7131 +Info: Configures the w1-gpio Onewire interface module.
7132 + Use this overlay if you *do* need a GPIO to drive an external pullup.
7133 +Load: dtoverlay=w1-gpio-pullup,<param>=<val>
7134 +Params: gpiopin GPIO for I/O (default "4")
7135 + extpullup GPIO for external pullup (default "5")
7136 + pullup Now enabled by default (ignored)
7137 +
7138 +
7139 +Name: w5500
7140 +Info: Overlay for the Wiznet W5500 Ethernet Controller on SPI0
7141 +Load: dtoverlay=w5500,<param>=<val>
7142 +Params: int_pin GPIO used for INT (default 25)
7143 +
7144 + speed SPI bus speed (default 30000000)
7145 +
7146 + cs SPI bus Chip Select (default 0)
7147 +
7148 +
7149 +Name: wittypi
7150 +Info: Configures the wittypi RTC module.
7151 +Load: dtoverlay=wittypi,<param>=<val>
7152 +Params: led_gpio GPIO for LED (default "17")
7153 + led_trigger Choose which activity the LED tracks (default
7154 + "default-on")
7155 +
7156 +
7157 +Troubleshooting
7158 +===============
7159 +
7160 +If you are experiencing problems that you think are DT-related, enable DT
7161 +diagnostic output by adding this to /boot/config.txt:
7162 +
7163 + dtdebug=on
7164 +
7165 +and rebooting. Then run:
7166 +
7167 + sudo vcdbg log msg
7168 +
7169 +and look for relevant messages.
7170 +
7171 +Further reading
7172 +===============
7173 +
7174 +This is only meant to be a quick introduction to the subject of Device Tree on
7175 +Raspberry Pi. There is a more complete explanation here:
7176 +
7177 +http://www.raspberrypi.org/documentation/configuration/device-tree.md
7178 diff --git a/arch/arm/boot/dts/overlays/act-led-overlay.dts b/arch/arm/boot/dts/overlays/act-led-overlay.dts
7179 new file mode 100644
7180 index 000000000000..2f4bbb407f89
7181 --- /dev/null
7182 +++ b/arch/arm/boot/dts/overlays/act-led-overlay.dts
7183 @@ -0,0 +1,27 @@
7184 +/dts-v1/;
7185 +/plugin/;
7186 +
7187 +/* Pi3 uses a GPIO expander to drive the LEDs which can only be accessed
7188 + from the VPU. There is a special driver for this with a separate DT node,
7189 + which has the unfortunate consequence of breaking the act_led_gpio and
7190 + act_led_activelow dtparams.
7191 +
7192 + This overlay changes the GPIO controller back to the standard one and
7193 + restores the dtparams.
7194 +*/
7195 +
7196 +/{
7197 + compatible = "brcm,bcm2835";
7198 +
7199 + fragment@0 {
7200 + target = <&act_led>;
7201 + frag0: __overlay__ {
7202 + gpios = <&gpio 0 0>;
7203 + };
7204 + };
7205 +
7206 + __overrides__ {
7207 + gpio = <&frag0>,"gpios:4";
7208 + activelow = <&frag0>,"gpios:8";
7209 + };
7210 +};
7211 diff --git a/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
7212 new file mode 100644
7213 index 000000000000..298488e19156
7214 --- /dev/null
7215 +++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
7216 @@ -0,0 +1,40 @@
7217 +// Definitions for ADAU1977 ADC
7218 +/dts-v1/;
7219 +/plugin/;
7220 +
7221 +/ {
7222 + compatible = "brcm,bcm2835";
7223 +
7224 + fragment@0 {
7225 + target = <&i2c>;
7226 +
7227 + __overlay__ {
7228 + #address-cells = <1>;
7229 + #size-cells = <0>;
7230 + status = "okay";
7231 +
7232 + adau1977: codec@11 {
7233 + compatible = "adi,adau1977";
7234 + reg = <0x11>;
7235 + reset-gpios = <&gpio 5 0>;
7236 + AVDD-supply = <&vdd_3v3_reg>;
7237 + };
7238 + };
7239 + };
7240 +
7241 + fragment@1 {
7242 + target = <&i2s>;
7243 + __overlay__ {
7244 + status = "okay";
7245 + };
7246 + };
7247 +
7248 + fragment@2 {
7249 + target = <&sound>;
7250 + __overlay__ {
7251 + compatible = "adi,adau1977-adc";
7252 + i2s-controller = <&i2s>;
7253 + status = "okay";
7254 + };
7255 + };
7256 +};
7257 diff --git a/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
7258 new file mode 100644
7259 index 000000000000..5fed769d2526
7260 --- /dev/null
7261 +++ b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
7262 @@ -0,0 +1,52 @@
7263 +/dts-v1/;
7264 +/plugin/;
7265 +
7266 +/ {
7267 + compatible = "brcm,bcm2835";
7268 +
7269 + fragment@0 {
7270 + target = <&i2s>;
7271 + __overlay__ {
7272 + status = "okay";
7273 + };
7274 + };
7275 +
7276 + fragment@1 {
7277 + target-path = "/";
7278 + __overlay__ {
7279 + adau7002_codec: adau7002-codec {
7280 + #sound-dai-cells = <0>;
7281 + compatible = "adi,adau7002";
7282 +/* IOVDD-supply = <&supply>;*/
7283 + status = "okay";
7284 + };
7285 + };
7286 + };
7287 +
7288 + fragment@2 {
7289 + target = <&sound>;
7290 + sound_overlay: __overlay__ {
7291 + compatible = "simple-audio-card";
7292 + simple-audio-card,format = "i2s";
7293 + simple-audio-card,name = "adau7002";
7294 + simple-audio-card,bitclock-slave = <&dailink0_slave>;
7295 + simple-audio-card,frame-slave = <&dailink0_slave>;
7296 + simple-audio-card,widgets =
7297 + "Microphone", "Microphone Jack";
7298 + simple-audio-card,routing =
7299 + "PDM_DAT", "Microphone Jack";
7300 + status = "okay";
7301 + simple-audio-card,cpu {
7302 + sound-dai = <&i2s>;
7303 + };
7304 + dailink0_slave: simple-audio-card,codec {
7305 + sound-dai = <&adau7002_codec>;
7306 + };
7307 + };
7308 + };
7309 +
7310 +
7311 + __overrides__ {
7312 + card-name = <&sound_overlay>,"simple-audio-card,name";
7313 + };
7314 +};
7315 diff --git a/arch/arm/boot/dts/overlays/ads1015-overlay.dts b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
7316 new file mode 100644
7317 index 000000000000..26d68fccc6a8
7318 --- /dev/null
7319 +++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
7320 @@ -0,0 +1,98 @@
7321 +/*
7322 + * 2016 - Erik Sejr
7323 + */
7324 +/dts-v1/;
7325 +/plugin/;
7326 +
7327 +/ {
7328 + compatible = "brcm,bcm2835";
7329 + /* ----------- ADS1015 ------------ */
7330 + fragment@0 {
7331 + target = <&i2c_arm>;
7332 + __overlay__ {
7333 + #address-cells = <1>;
7334 + #size-cells = <0>;
7335 + status = "okay";
7336 + ads1015: ads1015 {
7337 + compatible = "ti,ads1015";
7338 + status = "okay";
7339 + #address-cells = <1>;
7340 + #size-cells = <0>;
7341 + reg = <0x48>;
7342 + };
7343 + };
7344 + };
7345 +
7346 + fragment@1 {
7347 + target-path = "i2c_arm/ads1015";
7348 + __overlay__ {
7349 + #address-cells = <1>;
7350 + #size-cells = <0>;
7351 + channel_a: channel_a {
7352 + reg = <4>;
7353 + ti,gain = <2>;
7354 + ti,datarate = <4>;
7355 + };
7356 + };
7357 + };
7358 +
7359 + fragment@2 {
7360 + target-path = "i2c_arm/ads1015";
7361 + __dormant__ {
7362 + #address-cells = <1>;
7363 + #size-cells = <0>;
7364 + channel_b: channel_b {
7365 + reg = <5>;
7366 + ti,gain = <2>;
7367 + ti,datarate = <4>;
7368 + };
7369 + };
7370 + };
7371 +
7372 + fragment@3 {
7373 + target-path = "i2c_arm/ads1015";
7374 + __dormant__ {
7375 + #address-cells = <1>;
7376 + #size-cells = <0>;
7377 + channel_c: channel_c {
7378 + reg = <6>;
7379 + ti,gain = <2>;
7380 + ti,datarate = <4>;
7381 + };
7382 + };
7383 + };
7384 +
7385 + fragment@4 {
7386 + target-path = "i2c_arm/ads1015";
7387 + __dormant__ {
7388 + #address-cells = <1>;
7389 + #size-cells = <0>;
7390 + channel_d: channel_d {
7391 + reg = <7>;
7392 + ti,gain = <2>;
7393 + ti,datarate = <4>;
7394 + };
7395 + };
7396 + };
7397 +
7398 + __overrides__ {
7399 + addr = <&ads1015>,"reg:0";
7400 + cha_enable = <0>,"=1";
7401 + cha_cfg = <&channel_a>,"reg:0";
7402 + cha_gain = <&channel_a>,"ti,gain:0";
7403 + cha_datarate = <&channel_a>,"ti,datarate:0";
7404 + chb_enable = <0>,"=2";
7405 + chb_cfg = <&channel_b>,"reg:0";
7406 + chb_gain = <&channel_b>,"ti,gain:0";
7407 + chb_datarate = <&channel_b>,"ti,datarate:0";
7408 + chc_enable = <0>,"=3";
7409 + chc_cfg = <&channel_c>,"reg:0";
7410 + chc_gain = <&channel_c>,"ti,gain:0";
7411 + chc_datarate = <&channel_c>,"ti,datarate:0";
7412 + chd_enable = <0>,"=4";
7413 + chd_cfg = <&channel_d>,"reg:0";
7414 + chd_gain = <&channel_d>,"ti,gain:0";
7415 + chd_datarate = <&channel_d>,"ti,datarate:0";
7416 + };
7417 +
7418 +};
7419 diff --git a/arch/arm/boot/dts/overlays/ads1115-overlay.dts b/arch/arm/boot/dts/overlays/ads1115-overlay.dts
7420 new file mode 100644
7421 index 000000000000..b380d925f0a5
7422 --- /dev/null
7423 +++ b/arch/arm/boot/dts/overlays/ads1115-overlay.dts
7424 @@ -0,0 +1,103 @@
7425 +/*
7426 + * TI ADS1115 multi-channel ADC overlay
7427 + */
7428 +
7429 +/dts-v1/;
7430 +/plugin/;
7431 +
7432 +/ {
7433 + compatible = "brcm,bcm2835";
7434 +
7435 + fragment@0 {
7436 + target = <&i2c_arm>;
7437 + __overlay__ {
7438 + #address-cells = <1>;
7439 + #size-cells = <0>;
7440 + status = "okay";
7441 +
7442 + ads1115: ads1115 {
7443 + compatible = "ti,ads1115";
7444 + status = "okay";
7445 + #address-cells = <1>;
7446 + #size-cells = <0>;
7447 + reg = <0x48>;
7448 + };
7449 + };
7450 + };
7451 +
7452 + fragment@1 {
7453 + target-path = "i2c_arm/ads1115";
7454 + __dormant__ {
7455 + #address-cells = <1>;
7456 + #size-cells = <0>;
7457 +
7458 + channel_a: channel_a {
7459 + reg = <4>;
7460 + ti,gain = <1>;
7461 + ti,datarate = <7>;
7462 + };
7463 + };
7464 + };
7465 +
7466 + fragment@2 {
7467 + target-path = "i2c_arm/ads1115";
7468 + __dormant__ {
7469 + #address-cells = <1>;
7470 + #size-cells = <0>;
7471 +
7472 + channel_b: channel_b {
7473 + reg = <5>;
7474 + ti,gain = <1>;
7475 + ti,datarate = <7>;
7476 + };
7477 + };
7478 + };
7479 +
7480 + fragment@3 {
7481 + target-path = "i2c_arm/ads1115";
7482 + __dormant__ {
7483 + #address-cells = <1>;
7484 + #size-cells = <0>;
7485 +
7486 + channel_c: channel_c {
7487 + reg = <6>;
7488 + ti,gain = <1>;
7489 + ti,datarate = <7>;
7490 + };
7491 + };
7492 + };
7493 +
7494 + fragment@4 {
7495 + target-path = "i2c_arm/ads1115";
7496 + __dormant__ {
7497 + #address-cells = <1>;
7498 + #size-cells = <0>;
7499 +
7500 + channel_d: channel_d {
7501 + reg = <7>;
7502 + ti,gain = <1>;
7503 + ti,datarate = <7>;
7504 + };
7505 + };
7506 + };
7507 +
7508 + __overrides__ {
7509 + addr = <&ads1115>,"reg:0";
7510 + cha_enable = <0>,"=1";
7511 + cha_cfg = <&channel_a>,"reg:0";
7512 + cha_gain = <&channel_a>,"ti,gain:0";
7513 + cha_datarate = <&channel_a>,"ti,datarate:0";
7514 + chb_enable = <0>,"=2";
7515 + chb_cfg = <&channel_b>,"reg:0";
7516 + chb_gain = <&channel_b>,"ti,gain:0";
7517 + chb_datarate = <&channel_b>,"ti,datarate:0";
7518 + chc_enable = <0>,"=3";
7519 + chc_cfg = <&channel_c>,"reg:0";
7520 + chc_gain = <&channel_c>,"ti,gain:0";
7521 + chc_datarate = <&channel_c>,"ti,datarate:0";
7522 + chd_enable = <0>,"=4";
7523 + chd_cfg = <&channel_d>,"reg:0";
7524 + chd_gain = <&channel_d>,"ti,gain:0";
7525 + chd_datarate = <&channel_d>,"ti,datarate:0";
7526 + };
7527 +};
7528 diff --git a/arch/arm/boot/dts/overlays/ads7846-overlay.dts b/arch/arm/boot/dts/overlays/ads7846-overlay.dts
7529 new file mode 100644
7530 index 000000000000..1c5c9b6bb6ff
7531 --- /dev/null
7532 +++ b/arch/arm/boot/dts/overlays/ads7846-overlay.dts
7533 @@ -0,0 +1,89 @@
7534 +/*
7535 + * Generic Device Tree overlay for the ADS7846 touch controller
7536 + *
7537 + */
7538 +
7539 +/dts-v1/;
7540 +/plugin/;
7541 +
7542 +/ {
7543 + compatible = "brcm,bcm2835";
7544 +
7545 + fragment@0 {
7546 + target = <&spi0>;
7547 + __overlay__ {
7548 + status = "okay";
7549 + };
7550 + };
7551 +
7552 + fragment@1 {
7553 + target = <&spidev0>;
7554 + __overlay__ {
7555 + status = "disabled";
7556 + };
7557 + };
7558 +
7559 + fragment@2 {
7560 + target = <&spidev1>;
7561 + __overlay__ {
7562 + status = "disabled";
7563 + };
7564 + };
7565 +
7566 + fragment@3 {
7567 + target = <&gpio>;
7568 + __overlay__ {
7569 + ads7846_pins: ads7846_pins {
7570 + brcm,pins = <255>; /* illegal default value */
7571 + brcm,function = <0>; /* in */
7572 + brcm,pull = <0>; /* none */
7573 + };
7574 + };
7575 + };
7576 +
7577 + fragment@4 {
7578 + target = <&spi0>;
7579 + __overlay__ {
7580 + /* needed to avoid dtc warning */
7581 + #address-cells = <1>;
7582 + #size-cells = <0>;
7583 +
7584 + ads7846: ads7846@1 {
7585 + compatible = "ti,ads7846";
7586 + reg = <1>;
7587 + pinctrl-names = "default";
7588 + pinctrl-0 = <&ads7846_pins>;
7589 +
7590 + spi-max-frequency = <2000000>;
7591 + interrupts = <255 2>; /* high-to-low edge triggered */
7592 + interrupt-parent = <&gpio>;
7593 + pendown-gpio = <&gpio 255 0>;
7594 +
7595 + /* driver defaults */
7596 + ti,x-min = /bits/ 16 <0>;
7597 + ti,y-min = /bits/ 16 <0>;
7598 + ti,x-max = /bits/ 16 <0x0FFF>;
7599 + ti,y-max = /bits/ 16 <0x0FFF>;
7600 + ti,pressure-min = /bits/ 16 <0>;
7601 + ti,pressure-max = /bits/ 16 <0xFFFF>;
7602 + ti,x-plate-ohms = /bits/ 16 <400>;
7603 + };
7604 + };
7605 + };
7606 + __overrides__ {
7607 + cs = <&ads7846>,"reg:0";
7608 + speed = <&ads7846>,"spi-max-frequency:0";
7609 + penirq = <&ads7846_pins>,"brcm,pins:0", /* REQUIRED */
7610 + <&ads7846>,"interrupts:0",
7611 + <&ads7846>,"pendown-gpio:4";
7612 + penirq_pull = <&ads7846_pins>,"brcm,pull:0";
7613 + swapxy = <&ads7846>,"ti,swap-xy?";
7614 + xmin = <&ads7846>,"ti,x-min;0";
7615 + ymin = <&ads7846>,"ti,y-min;0";
7616 + xmax = <&ads7846>,"ti,x-max;0";
7617 + ymax = <&ads7846>,"ti,y-max;0";
7618 + pmin = <&ads7846>,"ti,pressure-min;0";
7619 + pmax = <&ads7846>,"ti,pressure-max;0";
7620 + xohms = <&ads7846>,"ti,x-plate-ohms;0";
7621 + };
7622 +};
7623 diff --git a/arch/arm/boot/dts/overlays/adv7282m-overlay.dts b/arch/arm/boot/dts/overlays/adv7282m-overlay.dts
7624 new file mode 100644
7625 index 000000000000..197c8f41a265
7626 --- /dev/null
7627 +++ b/arch/arm/boot/dts/overlays/adv7282m-overlay.dts
7628 @@ -0,0 +1,81 @@
7629 +// SPDX-License-Identifier: GPL-2.0-only
7630 +// Definitions for Analog Devices ADV7282-M video to CSI2 bridge on VC I2C bus
7631 +/dts-v1/;
7632 +/plugin/;
7633 +
7634 +/{
7635 + compatible = "brcm,bcm2835";
7636 +
7637 + fragment@0 {
7638 + target = <&i2c_vc>;
7639 + __overlay__ {
7640 + #address-cells = <1>;
7641 + #size-cells = <0>;
7642 + status = "okay";
7643 +
7644 + adv728x: adv728x@21 {
7645 + compatible = "adi,adv7282-m";
7646 + reg = <0x21>;
7647 + status = "okay";
7648 + clock-frequency = <24000000>;
7649 + port {
7650 + adv728x_0: endpoint {
7651 + remote-endpoint = <&csi1_ep>;
7652 + clock-lanes = <0>;
7653 + data-lanes = <1>;
7654 + link-frequencies =
7655 + /bits/ 64 <297000000>;
7656 +
7657 + mclk-frequency = <12000000>;
7658 + };
7659 + };
7660 + };
7661 + };
7662 + };
7663 + fragment@1 {
7664 + target = <&csi1>;
7665 + __overlay__ {
7666 + status = "okay";
7667 +
7668 + port {
7669 + csi1_ep: endpoint {
7670 + remote-endpoint = <&adv728x_0>;
7671 + };
7672 + };
7673 + };
7674 + };
7675 + fragment@2 {
7676 + target = <&i2c0_pins>;
7677 + __dormant__ {
7678 + brcm,pins = <28 29>;
7679 + brcm,function = <4>; /* alt0 */
7680 + };
7681 +
7682 + };
7683 + fragment@3 {
7684 + target = <&i2c0_pins>;
7685 + __overlay__ {
7686 + brcm,pins = <44 45>;
7687 + brcm,function = <5>; /* alt1 */
7688 + };
7689 + };
7690 + fragment@4 {
7691 + target = <&i2c0_pins>;
7692 + __dormant__ {
7693 + brcm,pins = <0 1>;
7694 + brcm,function = <4>; /* alt0 */
7695 + };
7696 + };
7697 + fragment@5 {
7698 + target = <&i2c_vc>;
7699 + __overlay__ {
7700 + status = "okay";
7701 + };
7702 + };
7703 +
7704 + __overrides__ {
7705 + i2c_pins_0_1 = <0>,"-2-3+4";
7706 + i2c_pins_28_29 = <0>,"+2-3-4";
7707 + addr = <&adv728x>,"reg:0";
7708 + };
7709 +};
7710 diff --git a/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts b/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts
7711 new file mode 100644
7712 index 000000000000..ea392e886984
7713 --- /dev/null
7714 +++ b/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts
7715 @@ -0,0 +1,37 @@
7716 +// SPDX-License-Identifier: GPL-2.0-only
7717 +// Definitions for Analog Devices ADV728[0|1|2]-M video to CSI2 bridges on VC
7718 +// I2C bus
7719 +
7720 +#include "adv7282m-overlay.dts"
7721 +
7722 +/{
7723 + compatible = "brcm,bcm2835";
7724 +
7725 + // Fragment numbers deliberately high to avoid conflicts with the
7726 + // included adv7282m overlay file.
7727 +
7728 + fragment@101 {
7729 + target = <&adv728x>;
7730 + __dormant__ {
7731 + compatible = "adi,adv7280-m";
7732 + };
7733 + };
7734 + fragment@102 {
7735 + target = <&adv728x>;
7736 + __dormant__ {
7737 + compatible = "adi,adv7281-m";
7738 + };
7739 + };
7740 + fragment@103 {
7741 + target = <&adv728x>;
7742 + __dormant__ {
7743 + compatible = "adi,adv7281-ma";
7744 + };
7745 + };
7746 +
7747 + __overrides__ {
7748 + adv7280m = <0>, "+101";
7749 + adv7281m = <0>, "+102";
7750 + adv7281ma = <0>, "+103";
7751 + };
7752 +};
7753 diff --git a/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
7754 new file mode 100644
7755 index 000000000000..82f9b3734fb1
7756 --- /dev/null
7757 +++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
7758 @@ -0,0 +1,49 @@
7759 +// Definitions for Digital Dreamtime Akkordion using IQaudIO DAC+ or DACZero
7760 +/dts-v1/;
7761 +/plugin/;
7762 +
7763 +/ {
7764 + compatible = "brcm,bcm2835";
7765 +
7766 + fragment@0 {
7767 + target = <&i2s>;
7768 + __overlay__ {
7769 + status = "okay";
7770 + };
7771 + };
7772 +
7773 + fragment@1 {
7774 + target = <&i2c1>;
7775 + __overlay__ {
7776 + #address-cells = <1>;
7777 + #size-cells = <0>;
7778 + status = "okay";
7779 +
7780 + pcm5122@4c {
7781 + #sound-dai-cells = <0>;
7782 + compatible = "ti,pcm5122";
7783 + reg = <0x4c>;
7784 + AVDD-supply = <&vdd_3v3_reg>;
7785 + DVDD-supply = <&vdd_3v3_reg>;
7786 + CPVDD-supply = <&vdd_3v3_reg>;
7787 + status = "okay";
7788 + };
7789 + };
7790 + };
7791 +
7792 + fragment@2 {
7793 + target = <&sound>;
7794 + frag2: __overlay__ {
7795 + compatible = "iqaudio,iqaudio-dac";
7796 + card_name = "Akkordion";
7797 + dai_name = "IQaudIO DAC";
7798 + dai_stream_name = "IQaudIO DAC HiFi";
7799 + i2s-controller = <&i2s>;
7800 + status = "okay";
7801 + };
7802 + };
7803 +
7804 + __overrides__ {
7805 + 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
7806 + };
7807 +};
7808 diff --git a/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
7809 new file mode 100644
7810 index 000000000000..dd69916fcb3c
7811 --- /dev/null
7812 +++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
7813 @@ -0,0 +1,59 @@
7814 +/*
7815 + * Definitions for Allo Boss DAC board
7816 + */
7817 +
7818 +/dts-v1/;
7819 +/plugin/;
7820 +
7821 +/ {
7822 + compatible = "brcm,bcm2835";
7823 +
7824 + fragment@0 {
7825 + target-path = "/clocks";
7826 + __overlay__ {
7827 + boss_osc: boss_osc {
7828 + compatible = "allo,dac-clk";
7829 + #clock-cells = <0>;
7830 + };
7831 + };
7832 + };
7833 +
7834 + fragment@1 {
7835 + target = <&i2s>;
7836 + __overlay__ {
7837 + status = "okay";
7838 + };
7839 + };
7840 +
7841 + fragment@2 {
7842 + target = <&i2c1>;
7843 + __overlay__ {
7844 + #address-cells = <1>;
7845 + #size-cells = <0>;
7846 + status = "okay";
7847 +
7848 + pcm5122@4d {
7849 + #sound-dai-cells = <0>;
7850 + compatible = "ti,pcm5122";
7851 + clocks = <&boss_osc>;
7852 + reg = <0x4d>;
7853 + status = "okay";
7854 + };
7855 + };
7856 + };
7857 +
7858 + fragment@3 {
7859 + target = <&sound>;
7860 + boss_dac: __overlay__ {
7861 + compatible = "allo,boss-dac";
7862 + i2s-controller = <&i2s>;
7863 + mute-gpios = <&gpio 6 1>;
7864 + status = "okay";
7865 + };
7866 + };
7867 +
7868 + __overrides__ {
7869 + 24db_digital_gain = <&boss_dac>,"allo,24db_digital_gain?";
7870 + slave = <&boss_dac>,"allo,slave?";
7871 + };
7872 +};
7873 diff --git a/arch/arm/boot/dts/overlays/allo-digione-overlay.dts b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
7874 new file mode 100644
7875 index 000000000000..ea018ace34d4
7876 --- /dev/null
7877 +++ b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
7878 @@ -0,0 +1,44 @@
7879 +// Definitions for Allo DigiOne
7880 +/dts-v1/;
7881 +/plugin/;
7882 +
7883 +/ {
7884 + compatible = "brcm,bcm2835";
7885 +
7886 + fragment@0 {
7887 + target = <&i2s>;
7888 + __overlay__ {
7889 + status = "okay";
7890 + };
7891 + };
7892 +
7893 + fragment@1 {
7894 + target = <&i2c1>;
7895 + __overlay__ {
7896 + #address-cells = <1>;
7897 + #size-cells = <0>;
7898 + status = "okay";
7899 +
7900 + wm8804@3b {
7901 + #sound-dai-cells = <0>;
7902 + compatible = "wlf,wm8804";
7903 + reg = <0x3b>;
7904 + PVDD-supply = <&vdd_3v3_reg>;
7905 + DVDD-supply = <&vdd_3v3_reg>;
7906 + status = "okay";
7907 + wlf,reset-gpio = <&gpio 17 0>;
7908 + };
7909 + };
7910 + };
7911 +
7912 + fragment@2 {
7913 + target = <&sound>;
7914 + __overlay__ {
7915 + compatible = "allo,allo-digione";
7916 + i2s-controller = <&i2s>;
7917 + status = "okay";
7918 + clock44-gpio = <&gpio 5 0>;
7919 + clock48-gpio = <&gpio 6 0>;
7920 + };
7921 + };
7922 +};
7923 diff --git a/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
7924 new file mode 100644
7925 index 000000000000..b25fd681f09f
7926 --- /dev/null
7927 +++ b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
7928 @@ -0,0 +1,57 @@
7929 +/*
7930 + * Definitions for Allo Katana DAC boards
7931 + */
7932 +
7933 +/dts-v1/;
7934 +/plugin/;
7935 +
7936 +/ {
7937 + compatible = "brcm,bcm2835";
7938 +
7939 + fragment@0 {
7940 + target = <&i2s>;
7941 + __overlay__ {
7942 + #sound-dai-cells = <0>;
7943 + status = "okay";
7944 + cpu_port: port {
7945 + cpu_endpoint: endpoint {
7946 + remote-endpoint = <&codec_endpoint>;
7947 + bitclock-master = <&codec_endpoint>;
7948 + frame-master = <&codec_endpoint>;
7949 + dai-format = "i2s";
7950 + };
7951 + };
7952 + };
7953 + };
7954 +
7955 + fragment@1 {
7956 + target = <&i2c1>;
7957 + __overlay__ {
7958 + #address-cells = <1>;
7959 + #size-cells = <0>;
7960 + status = "okay";
7961 +
7962 + allo-katana-codec@30 {
7963 + #sound-dai-cells = <0>;
7964 + compatible = "allo,allo-katana-codec";
7965 + reg = <0x30>;
7966 + port {
7967 + codec_endpoint: endpoint {
7968 + remote-endpoint = <&cpu_endpoint>;
7969 + };
7970 + };
7971 + };
7972 + };
7973 + };
7974 +
7975 + fragment@2 {
7976 + target = <&sound>;
7977 + katana_dac: __overlay__ {
7978 + compatible = "audio-graph-card";
7979 + label = "Allo Katana";
7980 + dais = <&cpu_port>;
7981 + status = "okay";
7982 + };
7983 + };
7984 +};
7985 +
7986 diff --git a/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
7987 new file mode 100644
7988 index 000000000000..bfc66da6295a
7989 --- /dev/null
7990 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
7991 @@ -0,0 +1,54 @@
7992 +/*
7993 + * Definitions for Allo Piano DAC (2.0/2.1) boards
7994 + *
7995 + * NB. The Piano DAC 2.1 board contains 2x TI PCM5142 DAC's. One DAC is stereo
7996 + * (left/right) and the other provides a subwoofer output, using DSP on the
7997 + * chip for digital high/low pass crossover.
7998 + * The initial support for this hardware, that doesn't require any codec driver
7999 + * modifications, uses only one DAC chip for stereo (left/right) output, the
8000 + * chip with 0x4c slave address. The other chip at 0x4d is currently ignored!
8001 + */
8002 +
8003 +/dts-v1/;
8004 +/plugin/;
8005 +
8006 +/ {
8007 + compatible = "brcm,bcm2835";
8008 +
8009 + fragment@0 {
8010 + target = <&i2s>;
8011 + __overlay__ {
8012 + status = "okay";
8013 + };
8014 + };
8015 +
8016 + fragment@1 {
8017 + target = <&i2c1>;
8018 + __overlay__ {
8019 + #address-cells = <1>;
8020 + #size-cells = <0>;
8021 + status = "okay";
8022 +
8023 + pcm5142@4c {
8024 + #sound-dai-cells = <0>;
8025 + compatible = "ti,pcm5142";
8026 + reg = <0x4c>;
8027 + status = "okay";
8028 + };
8029 + };
8030 + };
8031 +
8032 + fragment@2 {
8033 + target = <&sound>;
8034 + piano_dac: __overlay__ {
8035 + compatible = "allo,piano-dac";
8036 + i2s-controller = <&i2s>;
8037 + status = "okay";
8038 + };
8039 + };
8040 +
8041 + __overrides__ {
8042 + 24db_digital_gain =
8043 + <&piano_dac>,"allo,24db_digital_gain?";
8044 + };
8045 +};
8046 diff --git a/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
8047 new file mode 100644
8048 index 000000000000..374c553db062
8049 --- /dev/null
8050 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
8051 @@ -0,0 +1,55 @@
8052 +// Definitions for Piano DAC
8053 +/dts-v1/;
8054 +/plugin/;
8055 +
8056 +/ {
8057 + compatible = "brcm,bcm2835";
8058 +
8059 + fragment@0 {
8060 + target = <&i2s>;
8061 + __overlay__ {
8062 + status = "okay";
8063 + };
8064 + };
8065 +
8066 + fragment@1 {
8067 + target = <&i2c1>;
8068 + __overlay__ {
8069 + #address-cells = <1>;
8070 + #size-cells = <0>;
8071 + status = "okay";
8072 +
8073 + allo_pcm5122_4c: pcm5122@4c {
8074 + #sound-dai-cells = <0>;
8075 + compatible = "ti,pcm5122";
8076 + reg = <0x4c>;
8077 + status = "okay";
8078 + };
8079 + allo_pcm5122_4d: pcm5122@4d {
8080 + #sound-dai-cells = <0>;
8081 + compatible = "ti,pcm5122";
8082 + reg = <0x4d>;
8083 + status = "okay";
8084 + };
8085 + };
8086 + };
8087 +
8088 + fragment@2 {
8089 + target = <&sound>;
8090 + piano_dac: __overlay__ {
8091 + compatible = "allo,piano-dac-plus";
8092 + audio-codec = <&allo_pcm5122_4c &allo_pcm5122_4d>;
8093 + i2s-controller = <&i2s>;
8094 + mute1-gpios = <&gpio 6 1>;
8095 + mute2-gpios = <&gpio 25 1>;
8096 + status = "okay";
8097 + };
8098 + };
8099 +
8100 + __overrides__ {
8101 + 24db_digital_gain =
8102 + <&piano_dac>,"allo,24db_digital_gain?";
8103 + glb_mclk =
8104 + <&piano_dac>,"allo,glb_mclk?";
8105 + };
8106 +};
8107 diff --git a/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
8108 new file mode 100644
8109 index 000000000000..4769296ec9d6
8110 --- /dev/null
8111 +++ b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
8112 @@ -0,0 +1,57 @@
8113 +/dts-v1/;
8114 +/plugin/;
8115 +
8116 +/ {
8117 + compatible = "brcm,bcm2835";
8118 +
8119 + fragment@0 {
8120 + target = <&sound>;
8121 + __overlay__ {
8122 + compatible = "simple-audio-card";
8123 + simple-audio-card,name = "ApplePi-DAC";
8124 +
8125 + status = "okay";
8126 +
8127 + playback_link: simple-audio-card,dai-link@1 {
8128 + format = "i2s";
8129 +
8130 + p_cpu_dai: cpu {
8131 + sound-dai = <&i2s>;
8132 + dai-tdm-slot-num = <2>;
8133 + dai-tdm-slot-width = <32>;
8134 + };
8135 +
8136 + p_codec_dai: codec {
8137 + sound-dai = <&codec_out>;
8138 + };
8139 + };
8140 + };
8141 + };
8142 +
8143 + fragment@1 {
8144 + target-path = "/";
8145 + __overlay__ {
8146 + codec_out: pcm1794a-codec {
8147 + #sound-dai-cells = <0>;
8148 + compatible = "ti,pcm1794a";
8149 + status = "okay";
8150 + };
8151 + };
8152 + };
8153 +
8154 + fragment@2 {
8155 + target = <&i2s>;
8156 + __overlay__ {
8157 + #sound-dai-cells = <0>;
8158 + status = "okay";
8159 + };
8160 + };
8161 +};
8162 +
8163 +/*
8164 + Written by: Leonid Ayzenshtat
8165 + Company: Orchard Audio (www.orchardaudio.com)
8166 +
8167 + compile with:
8168 + dtc -@ -H epapr -O dtb -o ApplePi-DAC.dtbo -W no-unit_address_vs_reg ApplePi-DAC.dts
8169 +*/
8170 diff --git a/arch/arm/boot/dts/overlays/at86rf233-overlay.dts b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts
8171 new file mode 100644
8172 index 000000000000..5a3f4571ee78
8173 --- /dev/null
8174 +++ b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts
8175 @@ -0,0 +1,57 @@
8176 +/dts-v1/;
8177 +/plugin/;
8178 +
8179 +/* Overlay for Atmel AT86RF233 IEEE 802.15.4 WPAN transceiver on spi0.0 */
8180 +
8181 +/ {
8182 + compatible = "brcm,bcm2835";
8183 +
8184 + fragment@0 {
8185 + target = <&spi0>;
8186 + __overlay__ {
8187 + #address-cells = <1>;
8188 + #size-cells = <0>;
8189 +
8190 + status = "okay";
8191 +
8192 + lowpan0: at86rf233@0 {
8193 + compatible = "atmel,at86rf233";
8194 + reg = <0>;
8195 + interrupt-parent = <&gpio>;
8196 + interrupts = <23 4>; /* active high */
8197 + reset-gpio = <&gpio 24 1>;
8198 + sleep-gpio = <&gpio 25 1>;
8199 + spi-max-frequency = <3000000>;
8200 + xtal-trim = /bits/ 8 <0xf>;
8201 + };
8202 + };
8203 + };
8204 +
8205 + fragment@1 {
8206 + target = <&spidev0>;
8207 + __overlay__ {
8208 + status = "disabled";
8209 + };
8210 + };
8211 +
8212 + fragment@2 {
8213 + target = <&gpio>;
8214 + __overlay__ {
8215 + lowpan0_pins: lowpan0_pins {
8216 + brcm,pins = <23 24 25>;
8217 + brcm,function = <0 1 1>; /* in out out */
8218 + };
8219 + };
8220 + };
8221 +
8222 + __overrides__ {
8223 + interrupt = <&lowpan0>, "interrupts:0",
8224 + <&lowpan0_pins>, "brcm,pins:0";
8225 + reset = <&lowpan0>, "reset-gpio:4",
8226 + <&lowpan0_pins>, "brcm,pins:4";
8227 + sleep = <&lowpan0>, "sleep-gpio:4",
8228 + <&lowpan0_pins>, "brcm,pins:8";
8229 + speed = <&lowpan0>, "spi-max-frequency:0";
8230 + trim = <&lowpan0>, "xtal-trim.0";
8231 + };
8232 +};
8233 diff --git a/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
8234 new file mode 100644
8235 index 000000000000..57a66eac8e9b
8236 --- /dev/null
8237 +++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
8238 @@ -0,0 +1,60 @@
8239 +// Definitions for audioinjector.net audio add on soundcard
8240 +/dts-v1/;
8241 +/plugin/;
8242 +
8243 +/ {
8244 + compatible = "brcm,bcm2835";
8245 +
8246 + fragment@0 {
8247 + target = <&i2s>;
8248 + __overlay__ {
8249 + status = "okay";
8250 + };
8251 + };
8252 +
8253 + fragment@1 {
8254 + target-path = "/";
8255 + __overlay__ {
8256 + cs42448_mclk: codec-mclk {
8257 + compatible = "fixed-clock";
8258 + #clock-cells = <0>;
8259 + clock-frequency = <49152000>;
8260 + };
8261 + };
8262 + };
8263 +
8264 + fragment@2 {
8265 + target = <&i2c1>;
8266 + __overlay__ {
8267 + #address-cells = <1>;
8268 + #size-cells = <0>;
8269 + status = "okay";
8270 +
8271 + cs42448: cs42448@48 {
8272 + #sound-dai-cells = <0>;
8273 + compatible = "cirrus,cs42448";
8274 + reg = <0x48>;
8275 + clocks = <&cs42448_mclk>;
8276 + clock-names = "mclk";
8277 + status = "okay";
8278 + };
8279 + };
8280 + };
8281 +
8282 + fragment@3 {
8283 + target = <&sound>;
8284 + snd: __overlay__ {
8285 + compatible = "ai,audioinjector-octo-soundcard";
8286 + mult-gpios = <&gpio 27 0>, <&gpio 22 0>, <&gpio 23 0>,
8287 + <&gpio 24 0>;
8288 + reset-gpios = <&gpio 5 0>;
8289 + i2s-controller = <&i2s>;
8290 + codec = <&cs42448>;
8291 + status = "okay";
8292 + };
8293 + };
8294 +
8295 + __overrides__ {
8296 + non-stop-clocks = <&snd>, "non-stop-clocks?";
8297 + };
8298 +};
8299 diff --git a/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
8300 new file mode 100644
8301 index 000000000000..fb4a4678a17a
8302 --- /dev/null
8303 +++ b/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
8304 @@ -0,0 +1,71 @@
8305 +// Definitions for audioinjector.net audio add on soundcard
8306 +/dts-v1/;
8307 +/plugin/;
8308 +
8309 +/ {
8310 + compatible = "brcm,bcm2835";
8311 +
8312 + fragment@0 {
8313 + target = <&i2s>;
8314 + __overlay__ {
8315 + status = "okay";
8316 + };
8317 + };
8318 +
8319 + fragment@1 {
8320 + target = <&i2c1>;
8321 + __overlay__ {
8322 + #address-cells = <1>;
8323 + #size-cells = <0>;
8324 + status = "okay";
8325 +
8326 + cs4265: cs4265@4e {
8327 + #sound-dai-cells = <0>;
8328 + compatible = "cirrus,cs4265";
8329 + reg = <0x4e>;
8330 + reset-gpios = <&gpio 5 0>;
8331 + status = "okay";
8332 + };
8333 + };
8334 + };
8335 +
8336 + fragment@2 {
8337 + target = <&sound>;
8338 + __overlay__ {
8339 + compatible = "simple-audio-card";
8340 + i2s-controller = <&i2s>;
8341 + status = "okay";
8342 +
8343 + simple-audio-card,name = "audioinjector-ultra";
8344 +
8345 + simple-audio-card,widgets =
8346 + "Line", "OUTPUTS",
8347 + "Line", "INPUTS";
8348 +
8349 + simple-audio-card,routing =
8350 + "OUTPUTS","LINEOUTL",
8351 + "OUTPUTS","LINEOUTR",
8352 + "OUTPUTS","SPDIFOUT",
8353 + "LINEINL","INPUTS",
8354 + "LINEINR","INPUTS",
8355 + "MICL","INPUTS",
8356 + "MICR","INPUTS";
8357 +
8358 + simple-audio-card,format = "i2s";
8359 +
8360 + simple-audio-card,bitclock-master = <&sound_master>;
8361 + simple-audio-card,frame-master = <&sound_master>;
8362 +
8363 + simple-audio-card,cpu {
8364 + sound-dai = <&i2s>;
8365 + dai-tdm-slot-num = <2>;
8366 + dai-tdm-slot-width = <32>;
8367 + };
8368 +
8369 + sound_master: simple-audio-card,codec {
8370 + sound-dai = <&cs4265>;
8371 + system-clock-frequency = <12288000>;
8372 + };
8373 + };
8374 + };
8375 +};
8376 diff --git a/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
8377 new file mode 100644
8378 index 000000000000..68f4427d86c3
8379 --- /dev/null
8380 +++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
8381 @@ -0,0 +1,39 @@
8382 +// Definitions for audioinjector.net audio add on soundcard
8383 +/dts-v1/;
8384 +/plugin/;
8385 +
8386 +/ {
8387 + compatible = "brcm,bcm2835";
8388 +
8389 + fragment@0 {
8390 + target = <&i2s>;
8391 + __overlay__ {
8392 + status = "okay";
8393 + };
8394 + };
8395 +
8396 + fragment@1 {
8397 + target = <&i2c1>;
8398 + __overlay__ {
8399 + #address-cells = <1>;
8400 + #size-cells = <0>;
8401 + status = "okay";
8402 +
8403 + wm8731@1a {
8404 + #sound-dai-cells = <0>;
8405 + compatible = "wlf,wm8731";
8406 + reg = <0x1a>;
8407 + status = "okay";
8408 + };
8409 + };
8410 + };
8411 +
8412 + fragment@2 {
8413 + target = <&sound>;
8414 + __overlay__ {
8415 + compatible = "ai,audioinjector-pi-soundcard";
8416 + i2s-controller = <&i2s>;
8417 + status = "okay";
8418 + };
8419 + };
8420 +};
8421 diff --git a/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts b/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
8422 new file mode 100644
8423 index 000000000000..4b96a3a8a14a
8424 --- /dev/null
8425 +++ b/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
8426 @@ -0,0 +1,82 @@
8427 +// Definitions for audiosense add on soundcard
8428 +/dts-v1/;
8429 +/plugin/;
8430 +#include <dt-bindings/pinctrl/bcm2835.h>
8431 +#include <dt-bindings/gpio/gpio.h>
8432 +
8433 +/ {
8434 + compatible = "brcm,bcm2835";
8435 +
8436 + fragment@0 {
8437 + target = <&i2s>;
8438 + __overlay__ {
8439 + status = "okay";
8440 + };
8441 + };
8442 +
8443 + fragment@1 {
8444 + target-path = "/";
8445 + __overlay__ {
8446 + codec_reg_1v8: codec-reg-1v8 {
8447 + compatible = "regulator-fixed";
8448 + regulator-name = "tlv320aic3204_1v8";
8449 + regulator-min-microvolt = <1800000>;
8450 + regulator-max-microvolt = <1800000>;
8451 + regulator-always-on;
8452 + };
8453 + };
8454 + };
8455 +
8456 + fragment@2 {
8457 + target = <&gpio>;
8458 + __overlay__ {
8459 + codec_rst: codec-rst {
8460 + brcm,pins = <26>;
8461 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
8462 + };
8463 + };
8464 + };
8465 +
8466 + fragment@3 {
8467 + target = <&i2c1>;
8468 + __overlay__ {
8469 + #address-cells = <1>;
8470 + #size-cells = <0>;
8471 + status = "okay";
8472 +
8473 + /* audio external oscillator */
8474 + codec_osc: codec_osc {
8475 + compatible = "fixed-clock";
8476 + #clock-cells = <0>;
8477 + clock-frequency = <12000000>; /* 12 MHz */
8478 + };
8479 +
8480 + codec: tlv320aic32x4@18 {
8481 + #sound-dai-cells = <0>;
8482 + compatible = "ti,tlv320aic32x4";
8483 + reg = <0x18>;
8484 +
8485 + clocks = <&codec_osc>;
8486 + clock-names = "mclk";
8487 +
8488 + iov-supply = <&vdd_3v3_reg>;
8489 + ldoin-supply = <&vdd_3v3_reg>;
8490 +
8491 + gpio-controller;
8492 + #gpio-cells = <2>;
8493 + reset-gpios = <&gpio 26 GPIO_ACTIVE_HIGH>;
8494 +
8495 + status = "okay";
8496 + };
8497 + };
8498 + };
8499 +
8500 + fragment@4 {
8501 + target = <&sound>;
8502 + __overlay__ {
8503 + compatible = "as,audiosense-pi";
8504 + i2s-controller = <&i2s>;
8505 + status = "okay";
8506 + };
8507 + };
8508 +};
8509 diff --git a/arch/arm/boot/dts/overlays/audremap-overlay.dts b/arch/arm/boot/dts/overlays/audremap-overlay.dts
8510 new file mode 100644
8511 index 000000000000..d624bb3a3fea
8512 --- /dev/null
8513 +++ b/arch/arm/boot/dts/overlays/audremap-overlay.dts
8514 @@ -0,0 +1,35 @@
8515 +/dts-v1/;
8516 +/plugin/;
8517 +
8518 +/ {
8519 + compatible = "brcm,bcm2835";
8520 +
8521 + fragment@0 {
8522 + target = <&audio_pins>;
8523 + frag0: __overlay__ {
8524 + };
8525 + };
8526 +
8527 + fragment@1 {
8528 + target = <&audio_pins>;
8529 + __overlay__ {
8530 + brcm,pins = < 12 13 >;
8531 + brcm,function = < 4 >; /* alt0 alt0 */
8532 + };
8533 + };
8534 +
8535 + fragment@2 {
8536 + target = <&audio_pins>;
8537 + __dormant__ {
8538 + brcm,pins = < 18 19 >;
8539 + brcm,function = < 2 >; /* alt5 alt5 */
8540 + };
8541 + };
8542 +
8543 + __overrides__ {
8544 + swap_lr = <&frag0>, "swap_lr?";
8545 + enable_jack = <&frag0>, "enable_jack?";
8546 + pins_12_13 = <0>,"+1-2";
8547 + pins_18_19 = <0>,"-1+2";
8548 + };
8549 +};
8550 diff --git a/arch/arm/boot/dts/overlays/balena-fin-overlay.dts b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts
8551 new file mode 100644
8552 index 000000000000..249c8202b2ed
8553 --- /dev/null
8554 +++ b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts
8555 @@ -0,0 +1,122 @@
8556 +/dts-v1/;
8557 +/plugin/;
8558 +
8559 +/{
8560 + compatible = "brcm,bcm2835";
8561 +
8562 + fragment@0 {
8563 + target = <&mmcnr>;
8564 + __overlay__ {
8565 + pinctrl-names = "default";
8566 + pinctrl-0 = <&sdio_pins>;
8567 + bus-width = <4>;
8568 + brcm,overclock-50 = <35>;
8569 + status = "okay";
8570 + };
8571 + };
8572 +
8573 + fragment@1 {
8574 + target = <&gpio>;
8575 + __overlay__ {
8576 + sdio_pins: sdio_pins {
8577 + brcm,pins = <34 35 36 37 38 39>;
8578 + brcm,function = <7>; /* ALT3 = SD1 */
8579 + brcm,pull = <0 2 2 2 2 2>;
8580 + };
8581 +
8582 + power_ctrl_pins: power_ctrl_pins {
8583 + brcm,pins = <40>;
8584 + brcm,function = <1>; // out
8585 + };
8586 + };
8587 + };
8588 +
8589 + fragment@2 {
8590 + target-path = "/";
8591 + __overlay__ {
8592 + // We should switch to mmc-pwrseq-sd8787 after making it
8593 + // compatible with sd8887
8594 + // Currently that module requires two GPIOs to function since it
8595 + // targets a slightly different chip
8596 + power_ctrl: power_ctrl {
8597 + compatible = "gpio-poweroff";
8598 + gpios = <&gpio 40 1>;
8599 + force;
8600 + pinctrl-names = "default";
8601 + pinctrl-0 = <&power_ctrl_pins>;
8602 + };
8603 +
8604 + i2c_soft: i2c@0 {
8605 + compatible = "i2c-gpio";
8606 + gpios = <&gpio 43 0 /* sda */ &gpio 42 0 /* scl */>;
8607 + i2c-gpio,delay-us = <5>;
8608 + i2c-gpio,scl-open-drain;
8609 + i2c-gpio,sda-open-drain;
8610 + #address-cells = <1>;
8611 + #size-cells = <0>;
8612 + };
8613 +
8614 + sd8xxx-wlan {
8615 + drvdbg = <0x6>;
8616 + drv_mode = <0x1>;
8617 + cfg80211_wext = <0xf>;
8618 + sta_name = "wlan";
8619 + wfd_name = "p2p";
8620 + cal_data_cfg = "none";
8621 + };
8622 + };
8623 + };
8624 +
8625 + fragment@3 {
8626 + target = <&i2c_soft>;
8627 + __overlay__ {
8628 + #address-cells = <1>;
8629 + #size-cells = <0>;
8630 + status = "okay";
8631 +
8632 + gpio_expander: gpio_expander@20 {
8633 + compatible = "nxp,pca9554";
8634 + gpio-controller;
8635 + #gpio-cells = <2>;
8636 + reg = <0x20>;
8637 + status = "okay";
8638 + };
8639 +
8640 + // rtc clock
8641 + ds1307: ds1307@68 {
8642 + compatible = "dallas,ds1307";
8643 + reg = <0x68>;
8644 + status = "okay";
8645 + };
8646 +
8647 + // RGB LEDs (>= v1.1.0)
8648 + pca9633: pca9633@62 {
8649 + compatible = "nxp,pca9633";
8650 + reg = <0x62>;
8651 + #address-cells = <1>;
8652 + #size-cells = <0>;
8653 +
8654 + red@0 {
8655 + label = "red";
8656 + reg = <0>;
8657 + linux,default-trigger = "none";
8658 + };
8659 + green@1 {
8660 + label = "green";
8661 + reg = <1>;
8662 + linux,default-trigger = "none";
8663 + };
8664 + blue@2 {
8665 + label = "blue";
8666 + reg = <2>;
8667 + linux,default-trigger = "none";
8668 + };
8669 + unused@3 {
8670 + label = "unused";
8671 + reg = <3>;
8672 + linux,default-trigger = "none";
8673 + };
8674 + };
8675 + };
8676 + };
8677 +};
8678 diff --git a/arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts b/arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts
8679 new file mode 100644
8680 index 000000000000..26dbbdd03ce5
8681 --- /dev/null
8682 +++ b/arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts
8683 @@ -0,0 +1,23 @@
8684 +// Definitions for BMP085/BMP180 digital barometric pressure and temperature sensors from Bosch Sensortec
8685 +/dts-v1/;
8686 +/plugin/;
8687 +
8688 +/ {
8689 + compatible = "brcm,bcm2835";
8690 +
8691 + fragment@0 {
8692 + target = <&i2c_arm>;
8693 + __overlay__ {
8694 + #address-cells = <1>;
8695 + #size-cells = <0>;
8696 + status = "okay";
8697 +
8698 + bmp085@77 {
8699 + compatible = "bosch,bmp085";
8700 + reg = <0x77>;
8701 + default-oversampling = <3>;
8702 + status = "okay";
8703 + };
8704 + };
8705 + };
8706 +};
8707 diff --git a/arch/arm/boot/dts/overlays/dht11-overlay.dts b/arch/arm/boot/dts/overlays/dht11-overlay.dts
8708 new file mode 100644
8709 index 000000000000..8de67527e317
8710 --- /dev/null
8711 +++ b/arch/arm/boot/dts/overlays/dht11-overlay.dts
8712 @@ -0,0 +1,39 @@
8713 +/*
8714 + * Overlay for the DHT11/21/22 humidity/temperature sensor modules.
8715 + */
8716 +/dts-v1/;
8717 +/plugin/;
8718 +
8719 +/ {
8720 + compatible = "brcm,bcm2835";
8721 +
8722 + fragment@0 {
8723 + target-path = "/";
8724 + __overlay__ {
8725 +
8726 + dht11: dht11@0 {
8727 + compatible = "dht11";
8728 + pinctrl-names = "default";
8729 + pinctrl-0 = <&dht11_pins>;
8730 + gpios = <&gpio 4 0>;
8731 + status = "okay";
8732 + };
8733 + };
8734 + };
8735 +
8736 + fragment@1 {
8737 + target = <&gpio>;
8738 + __overlay__ {
8739 + dht11_pins: dht11_pins {
8740 + brcm,pins = <4>;
8741 + brcm,function = <0>; // in
8742 + brcm,pull = <0>; // off
8743 + };
8744 + };
8745 + };
8746 +
8747 + __overrides__ {
8748 + gpiopin = <&dht11_pins>,"brcm,pins:0",
8749 + <&dht11>,"gpios:4";
8750 + };
8751 +};
8752 diff --git a/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
8753 new file mode 100644
8754 index 000000000000..d863e5c167cc
8755 --- /dev/null
8756 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
8757 @@ -0,0 +1,39 @@
8758 +// Definitions for Dion Audio LOCO DAC-AMP
8759 +
8760 +/*
8761 + * PCM5242 DAC (in hardware mode) and TPA3118 AMP.
8762 + */
8763 +
8764 +/dts-v1/;
8765 +/plugin/;
8766 +
8767 +/ {
8768 + compatible = "brcm,bcm2835";
8769 +
8770 + fragment@0 {
8771 + target = <&i2s>;
8772 + __overlay__ {
8773 + status = "okay";
8774 + };
8775 + };
8776 +
8777 + fragment@1 {
8778 + target-path = "/";
8779 + __overlay__ {
8780 + pcm5102a-codec {
8781 + #sound-dai-cells = <0>;
8782 + compatible = "ti,pcm5102a";
8783 + status = "okay";
8784 + };
8785 + };
8786 + };
8787 +
8788 + fragment@2 {
8789 + target = <&sound>;
8790 + __overlay__ {
8791 + compatible = "dionaudio,loco-pcm5242-tpa3118";
8792 + i2s-controller = <&i2s>;
8793 + status = "okay";
8794 + };
8795 + };
8796 +};
8797 diff --git a/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
8798 new file mode 100644
8799 index 000000000000..dfb8922a654b
8800 --- /dev/null
8801 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
8802 @@ -0,0 +1,49 @@
8803 +/*
8804 + * Definitions for Dion Audio LOCO-V2 DAC-AMP
8805 + * eg. dtoverlay=dionaudio-loco-v2
8806 + *
8807 + * PCM5242 DAC (in software mode) and TPA3255 AMP.
8808 + */
8809 +
8810 +/dts-v1/;
8811 +/plugin/;
8812 +
8813 +/ {
8814 + compatible = "brcm,bcm2835";
8815 +
8816 + fragment@0 {
8817 + target = <&sound>;
8818 + frag0: __overlay__ {
8819 + compatible = "dionaudio,dionaudio-loco-v2";
8820 + i2s-controller = <&i2s>;
8821 + status = "okay";
8822 + };
8823 + };
8824 +
8825 + fragment@1 {
8826 + target = <&i2s>;
8827 + __overlay__ {
8828 + status = "okay";
8829 + };
8830 + };
8831 +
8832 + fragment@2 {
8833 + target = <&i2c1>;
8834 + __overlay__ {
8835 + #address-cells = <1>;
8836 + #size-cells = <0>;
8837 + status = "okay";
8838 +
8839 + pcm5122@4c {
8840 + #sound-dai-cells = <0>;
8841 + compatible = "ti,pcm5122";
8842 + reg = <0x4d>;
8843 + status = "okay";
8844 + };
8845 + };
8846 + };
8847 +
8848 + __overrides__ {
8849 + 24db_digital_gain = <&frag0>,"dionaudio,24db_digital_gain?";
8850 + };
8851 +};
8852 diff --git a/arch/arm/boot/dts/overlays/disable-bt-overlay.dts b/arch/arm/boot/dts/overlays/disable-bt-overlay.dts
8853 new file mode 100644
8854 index 000000000000..2f1b655a133c
8855 --- /dev/null
8856 +++ b/arch/arm/boot/dts/overlays/disable-bt-overlay.dts
8857 @@ -0,0 +1,55 @@
8858 +/dts-v1/;
8859 +/plugin/;
8860 +
8861 +/* Disable Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15.
8862 + To disable the systemd service that initialises the modem so it doesn't use
8863 + the UART:
8864 +
8865 + sudo systemctl disable hciuart
8866 +*/
8867 +
8868 +/{
8869 + compatible = "brcm,bcm2835";
8870 +
8871 + fragment@0 {
8872 + target = <&uart1>;
8873 + __overlay__ {
8874 + status = "disabled";
8875 + };
8876 + };
8877 +
8878 + fragment@1 {
8879 + target = <&uart0>;
8880 + __overlay__ {
8881 + pinctrl-names = "default";
8882 + pinctrl-0 = <&uart0_pins>;
8883 + status = "okay";
8884 + };
8885 + };
8886 +
8887 + fragment@2 {
8888 + target = <&uart0_pins>;
8889 + __overlay__ {
8890 + brcm,pins;
8891 + brcm,function;
8892 + brcm,pull;
8893 + };
8894 + };
8895 +
8896 + fragment@3 {
8897 + target = <&bt_pins>;
8898 + __overlay__ {
8899 + brcm,pins;
8900 + brcm,function;
8901 + brcm,pull;
8902 + };
8903 + };
8904 +
8905 + fragment@4 {
8906 + target-path = "/aliases";
8907 + __overlay__ {
8908 + serial0 = "/soc/serial@7e201000";
8909 + serial1 = "/soc/serial@7e215040";
8910 + };
8911 + };
8912 +};
8913 diff --git a/arch/arm/boot/dts/overlays/disable-wifi-overlay.dts b/arch/arm/boot/dts/overlays/disable-wifi-overlay.dts
8914 new file mode 100644
8915 index 000000000000..75e046463900
8916 --- /dev/null
8917 +++ b/arch/arm/boot/dts/overlays/disable-wifi-overlay.dts
8918 @@ -0,0 +1,20 @@
8919 +/dts-v1/;
8920 +/plugin/;
8921 +
8922 +/{
8923 + compatible = "brcm,bcm2835";
8924 +
8925 + fragment@0 {
8926 + target = <&mmc>;
8927 + __overlay__ {
8928 + status = "disabled";
8929 + };
8930 + };
8931 +
8932 + fragment@1 {
8933 + target = <&mmcnr>;
8934 + __overlay__ {
8935 + status = "disabled";
8936 + };
8937 + };
8938 +};
8939 diff --git a/arch/arm/boot/dts/overlays/dpi18-overlay.dts b/arch/arm/boot/dts/overlays/dpi18-overlay.dts
8940 new file mode 100644
8941 index 000000000000..4abe5be744db
8942 --- /dev/null
8943 +++ b/arch/arm/boot/dts/overlays/dpi18-overlay.dts
8944 @@ -0,0 +1,39 @@
8945 +/dts-v1/;
8946 +/plugin/;
8947 +
8948 +/{
8949 + compatible = "brcm,bcm2835";
8950 +
8951 + // There is no DPI driver module, but we need a platform device
8952 + // node (that doesn't already use pinctrl) to hang the pinctrl
8953 + // reference on - leds will do
8954 +
8955 + fragment@0 {
8956 + target = <&fb>;
8957 + __overlay__ {
8958 + pinctrl-names = "default";
8959 + pinctrl-0 = <&dpi18_pins>;
8960 + };
8961 + };
8962 +
8963 + fragment@1 {
8964 + target = <&vc4>;
8965 + __overlay__ {
8966 + pinctrl-names = "default";
8967 + pinctrl-0 = <&dpi18_pins>;
8968 + };
8969 + };
8970 +
8971 + fragment@2 {
8972 + target = <&gpio>;
8973 + __overlay__ {
8974 + dpi18_pins: dpi18_pins {
8975 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
8976 + 12 13 14 15 16 17 18 19 20
8977 + 21>;
8978 + brcm,function = <6>; /* alt2 */
8979 + brcm,pull = <0>; /* no pull */
8980 + };
8981 + };
8982 + };
8983 +};
8984 diff --git a/arch/arm/boot/dts/overlays/dpi24-overlay.dts b/arch/arm/boot/dts/overlays/dpi24-overlay.dts
8985 new file mode 100644
8986 index 000000000000..44335cc81277
8987 --- /dev/null
8988 +++ b/arch/arm/boot/dts/overlays/dpi24-overlay.dts
8989 @@ -0,0 +1,39 @@
8990 +/dts-v1/;
8991 +/plugin/;
8992 +
8993 +/{
8994 + compatible = "brcm,bcm2835";
8995 +
8996 + // There is no DPI driver module, but we need a platform device
8997 + // node (that doesn't already use pinctrl) to hang the pinctrl
8998 + // reference on - leds will do
8999 +
9000 + fragment@0 {
9001 + target = <&fb>;
9002 + __overlay__ {
9003 + pinctrl-names = "default";
9004 + pinctrl-0 = <&dpi24_pins>;
9005 + };
9006 + };
9007 +
9008 + fragment@1 {
9009 + target = <&vc4>;
9010 + __overlay__ {
9011 + pinctrl-names = "default";
9012 + pinctrl-0 = <&dpi24_pins>;
9013 + };
9014 + };
9015 +
9016 + fragment@2 {
9017 + target = <&gpio>;
9018 + __overlay__ {
9019 + dpi24_pins: dpi24_pins {
9020 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
9021 + 12 13 14 15 16 17 18 19 20
9022 + 21 22 23 24 25 26 27>;
9023 + brcm,function = <6>; /* alt2 */
9024 + brcm,pull = <0>; /* no pull */
9025 + };
9026 + };
9027 + };
9028 +};
9029 diff --git a/arch/arm/boot/dts/overlays/draws-overlay.dts b/arch/arm/boot/dts/overlays/draws-overlay.dts
9030 new file mode 100644
9031 index 000000000000..32b665c3934b
9032 --- /dev/null
9033 +++ b/arch/arm/boot/dts/overlays/draws-overlay.dts
9034 @@ -0,0 +1,200 @@
9035 +#include <dt-bindings/clock/bcm2835.h>
9036 +/*
9037 + * Device tree overlay for the DRAWS Hardware
9038 + */
9039 +
9040 +/dts-v1/;
9041 +/plugin/;
9042 +
9043 +/ {
9044 + compatible = "brcm,bcm2835";
9045 + fragment@0 {
9046 + target = <&i2s>;
9047 + __overlay__ {
9048 + status = "okay";
9049 + };
9050 + };
9051 +
9052 + fragment@1 {
9053 + target-path = "/";
9054 + __overlay__ {
9055 + regulators {
9056 + compatible = "simple-bus";
9057 + #address-cells = <1>;
9058 + #size-cells = <0>;
9059 +
9060 + udrc0_ldoin: udrc0_ldoin {
9061 + compatible = "regulator-fixed";
9062 + regulator-name = "ldoin";
9063 + regulator-min-microvolt = <3300000>;
9064 + regulator-max-microvolt = <3300000>;
9065 + regulator-always-on;
9066 + };
9067 + };
9068 +
9069 + pps: pps {
9070 + compatible = "pps-gpio";
9071 + pinctrl-names = "default";
9072 + pinctrl-0 = <&pps_pins>;
9073 + gpios = <&gpio 7 0>;
9074 + status = "okay";
9075 + };
9076 + };
9077 + };
9078 +
9079 + fragment@2 {
9080 + target = <&i2c_arm>;
9081 + __overlay__ {
9082 + #address-cells = <1>;
9083 + #size-cells = <0>;
9084 + status = "okay";
9085 +
9086 + tlv320aic32x4: tlv320aic32x4@18 {
9087 + compatible = "ti,tlv320aic32x4";
9088 + reg = <0x18>;
9089 + #sound-dai-cells = <0>;
9090 + status = "okay";
9091 +
9092 + clocks = <&clocks BCM2835_CLOCK_GP0>;
9093 + clock-names = "mclk";
9094 + assigned-clocks = <&clocks BCM2835_CLOCK_GP0>;
9095 + assigned-clock-rates = <25000000>;
9096 +
9097 + pinctrl-names = "default";
9098 + pinctrl-0 = <&gpclk0_pin &aic3204_reset>;
9099 +
9100 + reset-gpios = <&gpio 13 0>;
9101 +
9102 + iov-supply = <&udrc0_ldoin>;
9103 + ldoin-supply = <&udrc0_ldoin>;
9104 + };
9105 +
9106 + sc16is752: sc16is752@50 {
9107 + compatible = "nxp,sc16is752";
9108 + reg = <0x50>;
9109 + clocks = <&sc16is752_clk>;
9110 + interrupt-parent = <&gpio>;
9111 + interrupts = <17 2>; /* IRQ_TYPE_EDGE_FALLING */
9112 +
9113 + pinctrl-names = "default";
9114 + pinctrl-0 = <&sc16is752_irq>;
9115 +
9116 + sc16is752_clk: sc16is752_clk {
9117 + compatible = "fixed-clock";
9118 + #clock-cells = <0>;
9119 + clock-frequency = <1843200>;
9120 + };
9121 + };
9122 +
9123 + tla2024: tla2024@48 {
9124 + compatible = "ti,ads1015";
9125 + reg = <0x48>;
9126 + #address-cells = <1>;
9127 + #size-cells = <0>;
9128 +
9129 + adc_ch4: channel@4 {
9130 + reg = <4>;
9131 + ti,gain = <1>;
9132 + ti,datarate = <4>;
9133 + };
9134 +
9135 + adc_ch5: channel@5 {
9136 + reg = <5>;
9137 + ti,gain = <1>;
9138 + ti,datarate = <4>;
9139 + };
9140 +
9141 + adc_ch6: channel@6 {
9142 + reg = <6>;
9143 + ti,gain = <2>;
9144 + ti,datarate = <4>;
9145 + };
9146 +
9147 + adc_ch7: channel@7 {
9148 + reg = <7>;
9149 + ti,gain = <2>;
9150 + ti,datarate = <4>;
9151 + };
9152 + };
9153 + };
9154 + };
9155 +
9156 + fragment@3 {
9157 + target = <&sound>;
9158 + snd: __overlay__ {
9159 + compatible = "simple-audio-card";
9160 + i2s-controller = <&i2s>;
9161 + status = "okay";
9162 +
9163 + simple-audio-card,name = "draws";
9164 + simple-audio-card,format = "i2s";
9165 +
9166 + simple-audio-card,bitclock-master = <&dailink0_master>;
9167 + simple-audio-card,frame-master = <&dailink0_master>;
9168 +
9169 + simple-audio-card,widgets =
9170 + "Line", "Line In",
9171 + "Line", "Line Out";
9172 +
9173 + simple-audio-card,routing =
9174 + "IN1_R", "Line In",
9175 + "IN1_L", "Line In",
9176 + "CM_L", "Line In",
9177 + "CM_R", "Line In",
9178 + "Line Out", "LOR",
9179 + "Line Out", "LOL";
9180 +
9181 + dailink0_master: simple-audio-card,cpu {
9182 + sound-dai = <&i2s>;
9183 + };
9184 +
9185 + simple-audio-card,codec {
9186 + sound-dai = <&tlv320aic32x4>;
9187 + };
9188 + };
9189 + };
9190 +
9191 + fragment@4 {
9192 + target = <&gpio>;
9193 + __overlay__ {
9194 + gpclk0_pin: gpclk0_pin {
9195 + brcm,pins = <4>;
9196 + brcm,function = <4>;
9197 + };
9198 +
9199 + aic3204_reset: aic3204_reset {
9200 + brcm,pins = <13>;
9201 + brcm,function = <1>;
9202 + brcm,pull = <1>;
9203 + };
9204 +
9205 + aic3204_gpio: aic3204_gpio {
9206 + brcm,pins = <26>;
9207 + };
9208 +
9209 + sc16is752_irq: sc16is752_irq {
9210 + brcm,pins = <17>;
9211 + brcm,function = <0>;
9212 + brcm,pull = <2>;
9213 + };
9214 +
9215 + pps_pins: pps_pins {
9216 + brcm,pins = <7>;
9217 + brcm,function = <0>;
9218 + brcm,pull = <0>;
9219 + };
9220 + };
9221 + };
9222 +
9223 + __overrides__ {
9224 + draws_adc_ch4_gain = <&adc_ch4>,"ti,gain:0";
9225 + draws_adc_ch4_datarate = <&adc_ch4>,"ti,datarate:0";
9226 + draws_adc_ch5_gain = <&adc_ch5>,"ti,gain:0";
9227 + draws_adc_ch5_datarate = <&adc_ch5>,"ti,datarate:0";
9228 + draws_adc_ch6_gain = <&adc_ch6>,"ti,gain:0";
9229 + draws_adc_ch6_datarate = <&adc_ch6>,"ti,datarate:0";
9230 + draws_adc_ch7_gain = <&adc_ch7>,"ti,gain:0";
9231 + draws_adc_ch7_datarate = <&adc_ch7>,"ti,datarate:0";
9232 + alsaname = <&snd>, "simple-audio-card,name";
9233 + };
9234 +};
9235 diff --git a/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
9236 new file mode 100644
9237 index 000000000000..78c5e9f85048
9238 --- /dev/null
9239 +++ b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
9240 @@ -0,0 +1,14 @@
9241 +/dts-v1/;
9242 +/plugin/;
9243 +
9244 +/{
9245 + compatible = "brcm,bcm2835";
9246 +
9247 + fragment@0 {
9248 + target = <&usb>;
9249 + __overlay__ {
9250 + compatible = "brcm,bcm2708-usb";
9251 + status = "okay";
9252 + };
9253 + };
9254 +};
9255 diff --git a/arch/arm/boot/dts/overlays/dwc2-overlay.dts b/arch/arm/boot/dts/overlays/dwc2-overlay.dts
9256 new file mode 100644
9257 index 000000000000..732adbe3faaf
9258 --- /dev/null
9259 +++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts
9260 @@ -0,0 +1,26 @@
9261 +/dts-v1/;
9262 +/plugin/;
9263 +
9264 +/{
9265 + compatible = "brcm,bcm2835";
9266 +
9267 + fragment@0 {
9268 + target = <&usb>;
9269 + #address-cells = <1>;
9270 + #size-cells = <1>;
9271 + dwc2_usb: __overlay__ {
9272 + compatible = "brcm,bcm2835-usb";
9273 + dr_mode = "otg";
9274 + g-np-tx-fifo-size = <32>;
9275 + g-rx-fifo-size = <256>;
9276 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
9277 + status = "okay";
9278 + };
9279 + };
9280 +
9281 + __overrides__ {
9282 + dr_mode = <&dwc2_usb>, "dr_mode";
9283 + g-np-tx-fifo-size = <&dwc2_usb>,"g-np-tx-fifo-size:0";
9284 + g-rx-fifo-size = <&dwc2_usb>,"g-rx-fifo-size:0";
9285 + };
9286 +};
9287 diff --git a/arch/arm/boot/dts/overlays/enc28j60-overlay.dts b/arch/arm/boot/dts/overlays/enc28j60-overlay.dts
9288 new file mode 100644
9289 index 000000000000..7af5c2e607ea
9290 --- /dev/null
9291 +++ b/arch/arm/boot/dts/overlays/enc28j60-overlay.dts
9292 @@ -0,0 +1,53 @@
9293 +// Overlay for the Microchip ENC28J60 Ethernet Controller
9294 +/dts-v1/;
9295 +/plugin/;
9296 +
9297 +/ {
9298 + compatible = "brcm,bcm2835";
9299 +
9300 + fragment@0 {
9301 + target = <&spi0>;
9302 + __overlay__ {
9303 + /* needed to avoid dtc warning */
9304 + #address-cells = <1>;
9305 + #size-cells = <0>;
9306 +
9307 + status = "okay";
9308 +
9309 + eth1: enc28j60@0{
9310 + compatible = "microchip,enc28j60";
9311 + reg = <0>; /* CE0 */
9312 + pinctrl-names = "default";
9313 + pinctrl-0 = <&eth1_pins>;
9314 + interrupt-parent = <&gpio>;
9315 + interrupts = <25 0x2>; /* falling edge */
9316 + spi-max-frequency = <12000000>;
9317 + status = "okay";
9318 + };
9319 + };
9320 + };
9321 +
9322 + fragment@1 {
9323 + target = <&spidev0>;
9324 + __overlay__ {
9325 + status = "disabled";
9326 + };
9327 + };
9328 +
9329 + fragment@2 {
9330 + target = <&gpio>;
9331 + __overlay__ {
9332 + eth1_pins: eth1_pins {
9333 + brcm,pins = <25>;
9334 + brcm,function = <0>; /* in */
9335 + brcm,pull = <0>; /* none */
9336 + };
9337 + };
9338 + };
9339 +
9340 + __overrides__ {
9341 + int_pin = <&eth1>, "interrupts:0",
9342 + <&eth1_pins>, "brcm,pins:0";
9343 + speed = <&eth1>, "spi-max-frequency:0";
9344 + };
9345 +};
9346 diff --git a/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
9347 new file mode 100644
9348 index 000000000000..17cb5b8fa485
9349 --- /dev/null
9350 +++ b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
9351 @@ -0,0 +1,47 @@
9352 +// Overlay for the Microchip ENC28J60 Ethernet Controller - SPI2 Compute Module
9353 +// Interrupt pin: 39
9354 +/dts-v1/;
9355 +/plugin/;
9356 +
9357 +/ {
9358 + compatible = "brcm,bcm2835";
9359 +
9360 + fragment@0 {
9361 + target = <&spi2>;
9362 + __overlay__ {
9363 + /* needed to avoid dtc warning */
9364 + #address-cells = <1>;
9365 + #size-cells = <0>;
9366 +
9367 + status = "okay";
9368 +
9369 + eth1: enc28j60@0{
9370 + compatible = "microchip,enc28j60";
9371 + reg = <0>; /* CE0 */
9372 + pinctrl-names = "default";
9373 + pinctrl-0 = <&eth1_pins>;
9374 + interrupt-parent = <&gpio>;
9375 + interrupts = <39 0x2>; /* falling edge */
9376 + spi-max-frequency = <12000000>;
9377 + status = "okay";
9378 + };
9379 + };
9380 + };
9381 +
9382 + fragment@1 {
9383 + target = <&gpio>;
9384 + __overlay__ {
9385 + eth1_pins: eth1_pins {
9386 + brcm,pins = <39>;
9387 + brcm,function = <0>; /* in */
9388 + brcm,pull = <0>; /* none */
9389 + };
9390 + };
9391 + };
9392 +
9393 + __overrides__ {
9394 + int_pin = <&eth1>, "interrupts:0",
9395 + <&eth1_pins>, "brcm,pins:0";
9396 + speed = <&eth1>, "spi-max-frequency:0";
9397 + };
9398 +};
9399 diff --git a/arch/arm/boot/dts/overlays/exc3000-overlay.dts b/arch/arm/boot/dts/overlays/exc3000-overlay.dts
9400 new file mode 100644
9401 index 000000000000..6f087fb20661
9402 --- /dev/null
9403 +++ b/arch/arm/boot/dts/overlays/exc3000-overlay.dts
9404 @@ -0,0 +1,48 @@
9405 +// Device tree overlay for I2C connected EETI EXC3000 multiple touch controller
9406 +/dts-v1/;
9407 +/plugin/;
9408 +
9409 +/ {
9410 + compatible = "brcm,bcm2835";
9411 +
9412 + fragment@0 {
9413 + target = <&gpio>;
9414 + __overlay__ {
9415 + exc3000_pins: exc3000_pins {
9416 + brcm,pins = <4>; // interrupt
9417 + brcm,function = <0>; // in
9418 + brcm,pull = <2>; // pull-up
9419 + };
9420 + };
9421 + };
9422 +
9423 + fragment@1 {
9424 + target = <&i2c1>;
9425 + __overlay__ {
9426 + #address-cells = <1>;
9427 + #size-cells = <0>;
9428 + status = "okay";
9429 +
9430 + exc3000: exc3000@2a {
9431 + compatible = "eeti,exc3000";
9432 + reg = <0x2a>;
9433 + pinctrl-names = "default";
9434 + pinctrl-0 = <&exc3000_pins>;
9435 + interrupt-parent = <&gpio>;
9436 + interrupts = <4 8>; // active low level-sensitive
9437 + touchscreen-size-x = <4096>;
9438 + touchscreen-size-y = <4096>;
9439 + };
9440 + };
9441 + };
9442 +
9443 + __overrides__ {
9444 + interrupt = <&exc3000_pins>,"brcm,pins:0",
9445 + <&exc3000>,"interrupts:0";
9446 + sizex = <&exc3000>,"touchscreen-size-x:0";
9447 + sizey = <&exc3000>,"touchscreen-size-y:0";
9448 + invx = <&exc3000>,"touchscreen-inverted-x?";
9449 + invy = <&exc3000>,"touchscreen-inverted-y?";
9450 + swapxy = <&exc3000>,"touchscreen-swapped-x-y?";
9451 + };
9452 +};
9453 diff --git a/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
9454 new file mode 100644
9455 index 000000000000..1c3ec3e21a18
9456 --- /dev/null
9457 +++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
9458 @@ -0,0 +1,70 @@
9459 +// Definitions for Fe-Pi Audio
9460 +/dts-v1/;
9461 +/plugin/;
9462 +
9463 +/ {
9464 + compatible = "brcm,bcm2835";
9465 +
9466 + fragment@0 {
9467 + target = <&clocks>;
9468 + __overlay__ {
9469 + sgtl5000_mclk: sgtl5000_mclk {
9470 + compatible = "fixed-clock";
9471 + #clock-cells = <0>;
9472 + clock-frequency = <12288000>;
9473 + clock-output-names = "sgtl5000-mclk";
9474 + };
9475 + };
9476 + };
9477 +
9478 + fragment@1 {
9479 + target = <&soc>;
9480 + __overlay__ {
9481 + reg_1v8: reg_1v8@0 {
9482 + compatible = "regulator-fixed";
9483 + regulator-name = "1V8";
9484 + regulator-min-microvolt = <1800000>;
9485 + regulator-max-microvolt = <1800000>;
9486 + regulator-always-on;
9487 + };
9488 + };
9489 + };
9490 +
9491 + fragment@2 {
9492 + target = <&i2c1>;
9493 + __overlay__ {
9494 + #address-cells = <1>;
9495 + #size-cells = <0>;
9496 + status = "okay";
9497 +
9498 + sgtl5000@0a {
9499 + #sound-dai-cells = <0>;
9500 + compatible = "fsl,sgtl5000";
9501 + reg = <0x0a>;
9502 + clocks = <&sgtl5000_mclk>;
9503 + micbias-resistor-k-ohms = <2>;
9504 + micbias-voltage-m-volts = <3000>;
9505 + VDDA-supply = <&vdd_3v3_reg>;
9506 + VDDIO-supply = <&vdd_3v3_reg>;
9507 + VDDD-supply = <&reg_1v8>;
9508 + status = "okay";
9509 + };
9510 + };
9511 + };
9512 +
9513 + fragment@3 {
9514 + target = <&i2s>;
9515 + __overlay__ {
9516 + status = "okay";
9517 + };
9518 + };
9519 +
9520 + fragment@4 {
9521 + target = <&sound>;
9522 + __overlay__ {
9523 + compatible = "fe-pi,fe-pi-audio";
9524 + i2s-controller = <&i2s>;
9525 + status = "okay";
9526 + };
9527 + };
9528 +};
9529 diff --git a/arch/arm/boot/dts/overlays/goodix-overlay.dts b/arch/arm/boot/dts/overlays/goodix-overlay.dts
9530 new file mode 100644
9531 index 000000000000..8571527de49a
9532 --- /dev/null
9533 +++ b/arch/arm/boot/dts/overlays/goodix-overlay.dts
9534 @@ -0,0 +1,46 @@
9535 +// Device tree overlay for I2C connected Goodix gt9271 multiple touch controller
9536 +/dts-v1/;
9537 +/plugin/;
9538 +
9539 +/ {
9540 + compatible = "brcm,bcm2835";
9541 +
9542 + fragment@0 {
9543 + target = <&gpio>;
9544 + __overlay__ {
9545 + goodix_pins: goodix_pins {
9546 + brcm,pins = <4 17>; // interrupt and reset
9547 + brcm,function = <0 0>; // in
9548 + brcm,pull = <2 2>; // pull-up
9549 + };
9550 + };
9551 + };
9552 +
9553 + fragment@1 {
9554 + target = <&i2c1>;
9555 + __overlay__ {
9556 + #address-cells = <1>;
9557 + #size-cells = <0>;
9558 + status = "okay";
9559 +
9560 + gt9271: gt9271@14 {
9561 + compatible = "goodix,gt9271";
9562 + reg = <0x14>;
9563 + pinctrl-names = "default";
9564 + pinctrl-0 = <&goodix_pins>;
9565 + interrupt-parent = <&gpio>;
9566 + interrupts = <4 2>; // high-to-low edge triggered
9567 + irq-gpios = <&gpio 4 0>; // Pin7 on GPIO header
9568 + reset-gpios = <&gpio 17 0>; // Pin11 on GPIO header
9569 + };
9570 + };
9571 + };
9572 +
9573 + __overrides__ {
9574 + interrupt = <&goodix_pins>,"brcm,pins:0",
9575 + <&gt9271>,"interrupts:0",
9576 + <&gt9271>,"irq-gpios:4";
9577 + reset = <&goodix_pins>,"brcm,pins:4",
9578 + <&gt9271>,"reset-gpios:4";
9579 + };
9580 +};
9581 diff --git a/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
9582 new file mode 100644
9583 index 000000000000..e443be1f9a0e
9584 --- /dev/null
9585 +++ b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
9586 @@ -0,0 +1,49 @@
9587 +// Definitions for Google voiceHAT v1 soundcard overlay
9588 +/dts-v1/;
9589 +/plugin/;
9590 +
9591 +/ {
9592 + compatible = "brcm,bcm2835";
9593 +
9594 + fragment@0 {
9595 + target = <&i2s>;
9596 + __overlay__ {
9597 + status = "okay";
9598 + };
9599 + };
9600 +
9601 + fragment@1 {
9602 + target = <&gpio>;
9603 + __overlay__ {
9604 + googlevoicehat_pins: googlevoicehat_pins {
9605 + brcm,pins = <16>;
9606 + brcm,function = <1>; /* out */
9607 + brcm,pull = <0>; /* up */
9608 + };
9609 + };
9610 + };
9611 +
9612 +
9613 + fragment@2 {
9614 + target-path = "/";
9615 + __overlay__ {
9616 + voicehat-codec {
9617 + #sound-dai-cells = <0>;
9618 + compatible = "google,voicehat";
9619 + pinctrl-names = "default";
9620 + pinctrl-0 = <&googlevoicehat_pins>;
9621 + sdmode-gpios= <&gpio 16 0>;
9622 + status = "okay";
9623 + };
9624 + };
9625 + };
9626 +
9627 + fragment@3 {
9628 + target = <&sound>;
9629 + __overlay__ {
9630 + compatible = "googlevoicehat,googlevoicehat-soundcard";
9631 + i2s-controller = <&i2s>;
9632 + status = "okay";
9633 + };
9634 + };
9635 +};
9636 diff --git a/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts b/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts
9637 new file mode 100644
9638 index 000000000000..0b14981b4824
9639 --- /dev/null
9640 +++ b/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts
9641 @@ -0,0 +1,79 @@
9642 +/*
9643 + * Overlay for the Raspberry Pi GPIO Fan @ BCM GPIO12.
9644 + * References:
9645 + * - https://www.raspberrypi.org/forums/viewtopic.php?f=107&p=1367135#p1365084
9646 + *
9647 + * Optional parameters:
9648 + * - "gpiopin" - BCM number of the pin driving the fan, default 12 (GPIO12);
9649 + * - "temp" - CPU temperature at which fan is started in millicelsius, default 55000;
9650 + *
9651 + * Requires:
9652 + * - kernel configurations: CONFIG_SENSORS_GPIO_FAN=m;
9653 + * - kernel rebuild;
9654 + * - N-MOSFET connected to gpiopin, 2N7002-[https://en.wikipedia.org/wiki/2N7000];
9655 + * - DC Fan connected to N-MOSFET Drain terminal, a 12V fan is working fine and quite silently;
9656 + * [https://www.tme.eu/en/details/ee40101s1-999-a/dc12v-fans/sunon/ee40101s1-1000u-999/]
9657 + *
9658 + * ┌─────────────────────┐
9659 + * │Fan negative terminal│
9660 + * └┬────────────────────┘
9661 + * │D
9662 + * G │──┘
9663 + * [GPIO12]──────┤ │<─┐ 2N7002
9664 + * │──┤
9665 + * │S
9666 + * ─┴─
9667 + * GND
9668 + *
9669 + * Build:
9670 + * - `sudo dtc -W no-unit_address_vs_reg -@ -I dts -O dtb -o /boot/overlays/gpio-fan.dtbo gpio-fan-overlay.dts`
9671 + * Activate:
9672 + * - sudo nano /boot/config.txt add "dtoverlay=gpio-fan" or "dtoverlay=gpio-fan,gpiopin=12,temp=45000"
9673 + * or
9674 + * - sudo sh -c 'printf "\n# Enable PI GPIO-Fan Default\ndtoverlay=gpio-fan\n" >> /boot/config.txt'
9675 + * - sudo sh -c 'printf "\n# Enable PI GPIO-Fan Custom\ntoverlay=gpio-fan,gpiopin=12,temp=45000\n" >> /boot/config.txt'
9676 + *
9677 + */
9678 +/dts-v1/;
9679 +/plugin/;
9680 +
9681 +/ {
9682 + compatible = "brcm,bcm2835";
9683 +
9684 + fragment@0 {
9685 + target-path = "/";
9686 + __overlay__ {
9687 + fan0: gpio-fan@0 {
9688 + compatible = "gpio-fan";
9689 + gpios = <&gpio 12 0>;
9690 + gpio-fan,speed-map = <0 0>,
9691 + <5000 1>;
9692 + #cooling-cells = <2>;
9693 + };
9694 + };
9695 + };
9696 +
9697 + fragment@1 {
9698 + target = <&cpu_thermal>;
9699 + polling-delay = <2000>; /* milliseconds */
9700 + __overlay__ {
9701 + trips {
9702 + cpu_hot: trip-point@0 {
9703 + temperature = <55000>; /* (millicelsius) Fan started at 55°C */
9704 + hysteresis = <10000>; /* (millicelsius) Fan stopped at 45°C */
9705 + type = "active";
9706 + };
9707 + };
9708 + cooling-maps {
9709 + map0 {
9710 + trip = <&cpu_hot>;
9711 + cooling-device = <&fan0 1 1>;
9712 + };
9713 + };
9714 + };
9715 + };
9716 + __overrides__ {
9717 + gpiopin = <&fan0>,"gpios:4", <&fan0>,"brcm,pins:0";
9718 + temp = <&cpu_hot>,"temperature:0";
9719 + };
9720 +};
9721 diff --git a/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
9722 new file mode 100644
9723 index 000000000000..58f588498d68
9724 --- /dev/null
9725 +++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
9726 @@ -0,0 +1,48 @@
9727 +// Definitions for ir-gpio module
9728 +/dts-v1/;
9729 +/plugin/;
9730 +
9731 +/ {
9732 + compatible = "brcm,bcm2835";
9733 +
9734 + fragment@0 {
9735 + target-path = "/";
9736 + __overlay__ {
9737 + gpio_ir: ir-receiver@12 {
9738 + compatible = "gpio-ir-receiver";
9739 + pinctrl-names = "default";
9740 + pinctrl-0 = <&gpio_ir_pins>;
9741 +
9742 + // pin number, high or low
9743 + gpios = <&gpio 18 1>;
9744 +
9745 + // parameter for keymap name
9746 + linux,rc-map-name = "rc-rc6-mce";
9747 +
9748 + status = "okay";
9749 + };
9750 + };
9751 + };
9752 +
9753 + fragment@1 {
9754 + target = <&gpio>;
9755 + __overlay__ {
9756 + gpio_ir_pins: gpio_ir_pins@12 {
9757 + brcm,pins = <18>; // pin 18
9758 + brcm,function = <0>; // in
9759 + brcm,pull = <2>; // up
9760 + };
9761 + };
9762 + };
9763 +
9764 + __overrides__ {
9765 + // parameters
9766 + gpio_pin = <&gpio_ir>,"gpios:4", // pin number
9767 + <&gpio_ir>,"reg:0",
9768 + <&gpio_ir_pins>,"brcm,pins:0",
9769 + <&gpio_ir_pins>,"reg:0";
9770 + gpio_pull = <&gpio_ir_pins>,"brcm,pull:0"; // pull-up/down state
9771 +
9772 + rc-map-name = <&gpio_ir>,"linux,rc-map-name"; // default rc map
9773 + };
9774 +};
9775 diff --git a/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
9776 new file mode 100644
9777 index 000000000000..3625431b7560
9778 --- /dev/null
9779 +++ b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
9780 @@ -0,0 +1,36 @@
9781 +/dts-v1/;
9782 +/plugin/;
9783 +
9784 +/ {
9785 + compatible = "brcm,bcm2835";
9786 +
9787 + fragment@0 {
9788 + target = <&gpio>;
9789 + __overlay__ {
9790 + gpio_ir_tx_pins: gpio_ir_tx_pins@12 {
9791 + brcm,pins = <18>;
9792 + brcm,function = <1>; // out
9793 + };
9794 + };
9795 + };
9796 +
9797 + fragment@1 {
9798 + target-path = "/";
9799 + __overlay__ {
9800 + gpio_ir_tx: gpio-ir-transmitter@12 {
9801 + compatible = "gpio-ir-tx";
9802 + pinctrl-names = "default";
9803 + pinctrl-0 = <&gpio_ir_tx_pins>;
9804 + gpios = <&gpio 18 0>;
9805 + };
9806 + };
9807 + };
9808 +
9809 + __overrides__ {
9810 + gpio_pin = <&gpio_ir_tx>, "gpios:4", // pin number
9811 + <&gpio_ir_tx>, "reg:0",
9812 + <&gpio_ir_tx_pins>, "brcm,pins:0",
9813 + <&gpio_ir_tx_pins>, "reg:0";
9814 + invert = <&gpio_ir_tx>, "gpios:8"; // 1 = active low
9815 + };
9816 +};
9817 diff --git a/arch/arm/boot/dts/overlays/gpio-key-overlay.dts b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts
9818 new file mode 100644
9819 index 000000000000..2e7253d1d0ab
9820 --- /dev/null
9821 +++ b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts
9822 @@ -0,0 +1,48 @@
9823 +// Definitions for gpio-key module
9824 +/dts-v1/;
9825 +/plugin/;
9826 +
9827 +/ {
9828 + compatible = "brcm,bcm2835";
9829 +
9830 + fragment@0 {
9831 + // Configure the gpio pin controller
9832 + target = <&gpio>;
9833 + __overlay__ {
9834 + pin_state: button_pins@0 {
9835 + brcm,pins = <3>; // gpio number
9836 + brcm,function = <0>; // 0 = input, 1 = output
9837 + brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
9838 + };
9839 + };
9840 + };
9841 + fragment@1 {
9842 + target-path = "/";
9843 + __overlay__ {
9844 + button: button@0 {
9845 + compatible = "gpio-keys";
9846 + pinctrl-names = "default";
9847 + pinctrl-0 = <&pin_state>;
9848 + status = "okay";
9849 +
9850 + key: key {
9851 + linux,code = <116>;
9852 + gpios = <&gpio 3 1>;
9853 + label = "KEY_POWER";
9854 + };
9855 + };
9856 + };
9857 + };
9858 +
9859 + __overrides__ {
9860 + gpio = <&key>,"gpios:4",
9861 + <&button>,"reg:0",
9862 + <&pin_state>,"brcm,pins:0",
9863 + <&pin_state>,"reg:0";
9864 + label = <&key>,"label";
9865 + keycode = <&key>,"linux,code:0";
9866 + gpio_pull = <&pin_state>,"brcm,pull:0";
9867 + active_low = <&key>,"gpios:8";
9868 + };
9869 +
9870 +};
9871 diff --git a/arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts b/arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts
9872 new file mode 100755
9873 index 000000000000..96cbe80820b7
9874 --- /dev/null
9875 +++ b/arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts
9876 @@ -0,0 +1,14 @@
9877 +/dts-v1/;
9878 +/plugin/;
9879 +
9880 +/ {
9881 + compatible = "brcm,bcm2835";
9882 +
9883 + fragment@0 {
9884 + // Configure the gpio pin controller
9885 + target = <&gpio>;
9886 + __overlay__ {
9887 + interrupts = <255 255>, <2 18>;
9888 + };
9889 + };
9890 +};
9891 diff --git a/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts b/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
9892 new file mode 100644
9893 index 000000000000..55f9bff3a8f6
9894 --- /dev/null
9895 +++ b/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
9896 @@ -0,0 +1,14 @@
9897 +/dts-v1/;
9898 +/plugin/;
9899 +
9900 +/ {
9901 + compatible = "brcm,bcm2835";
9902 +
9903 + fragment@0 {
9904 + // Configure the gpio pin controller
9905 + target = <&gpio>;
9906 + __overlay__ {
9907 + interrupts;
9908 + };
9909 + };
9910 +};
9911 diff --git a/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
9912 new file mode 100644
9913 index 000000000000..bb8cd3bf264d
9914 --- /dev/null
9915 +++ b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
9916 @@ -0,0 +1,36 @@
9917 +// Definitions for gpio-poweroff module
9918 +/dts-v1/;
9919 +/plugin/;
9920 +
9921 +/ {
9922 + compatible = "brcm,bcm2835";
9923 +
9924 + fragment@0 {
9925 + target-path = "/";
9926 + __overlay__ {
9927 + power_ctrl: power_ctrl {
9928 + compatible = "gpio-poweroff";
9929 + gpios = <&gpio 26 0>;
9930 + force;
9931 + };
9932 + };
9933 + };
9934 +
9935 + fragment@1 {
9936 + target = <&gpio>;
9937 + __overlay__ {
9938 + power_ctrl_pins: power_ctrl_pins {
9939 + brcm,pins = <26>;
9940 + brcm,function = <1>; // out
9941 + };
9942 + };
9943 + };
9944 +
9945 + __overrides__ {
9946 + gpiopin = <&power_ctrl>,"gpios:4",
9947 + <&power_ctrl_pins>,"brcm,pins:0";
9948 + active_low = <&power_ctrl>,"gpios:8";
9949 + input = <&power_ctrl>,"input?";
9950 + export = <&power_ctrl>,"export?";
9951 + };
9952 +};
9953 diff --git a/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
9954 new file mode 100644
9955 index 000000000000..db07ba67781d
9956 --- /dev/null
9957 +++ b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
9958 @@ -0,0 +1,82 @@
9959 +// Definitions for gpio-poweroff module
9960 +/dts-v1/;
9961 +/plugin/;
9962 +
9963 +// This overlay sets up an input device that generates KEY_POWER events
9964 +// when a given GPIO pin changes. It defaults to using GPIO3, which can
9965 +// also be used to wake up (start) the Rpi again after shutdown. Since
9966 +// wakeup is active-low, this defaults to active-low with a pullup
9967 +// enabled, but all of this can be changed using overlay parameters (but
9968 +// note that GPIO3 has an external pullup on at least some boards).
9969 +
9970 +/ {
9971 + compatible = "brcm,bcm2835";
9972 +
9973 + fragment@0 {
9974 + // Configure the gpio pin controller
9975 + target = <&gpio>;
9976 + __overlay__ {
9977 + // Define a pinctrl state, that sets up the gpio
9978 + // as an input with a pullup enabled. This does
9979 + // not take effect by itself, only when referenced
9980 + // by a "pinctrl client", as is done below. See:
9981 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
9982 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
9983 + pin_state: shutdown_button_pins {
9984 + brcm,pins = <3>; // gpio number
9985 + brcm,function = <0>; // 0 = input, 1 = output
9986 + brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
9987 + };
9988 + };
9989 + };
9990 + fragment@1 {
9991 + // Add a new device to the /soc devicetree node
9992 + target-path = "/soc";
9993 + __overlay__ {
9994 + shutdown_button {
9995 + // Let the gpio-keys driver handle this device. See:
9996 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/input/gpio-keys.txt
9997 + compatible = "gpio-keys";
9998 +
9999 + // Declare a single pinctrl state (referencing the one declared above) and name it
10000 + // default, so it is activated automatically.
10001 + pinctrl-names = "default";
10002 + pinctrl-0 = <&pin_state>;
10003 +
10004 + // Enable this device
10005 + status = "okay";
10006 +
10007 + // Define a single key, called "shutdown" that monitors the gpio and sends KEY_POWER
10008 + // (keycode 116, see
10009 + // https://github.com/torvalds/linux/blob/v4.12/include/uapi/linux/input-event-codes.h#L190)
10010 + button: shutdown {
10011 + label = "shutdown";
10012 + linux,code = <116>; // KEY_POWER
10013 + gpios = <&gpio 3 1>;
10014 + debounce-interval = <100>; // ms
10015 + };
10016 + };
10017 + };
10018 + };
10019 +
10020 + // This defines parameters that can be specified when loading
10021 + // the overlay. Each foo = line specifies one parameter, named
10022 + // foo. The rest of the specification gives properties where the
10023 + // parameter value is inserted into (changing the values above
10024 + // or adding new ones).
10025 + __overrides__ {
10026 + // Allow overriding the GPIO number.
10027 + gpio_pin = <&button>,"gpios:4",
10028 + <&pin_state>,"brcm,pins:0";
10029 +
10030 + // Allow changing the internal pullup/down state. 0 = none, 1 = pulldown, 2 = pullup
10031 + // Note that GPIO3 and GPIO2 are the I2c pins and have an external pullup (at least
10032 + // on some boards).
10033 + gpio_pull = <&pin_state>,"brcm,pull:0";
10034 +
10035 + // Allow setting the active_low flag. 0 = active high, 1 = active low
10036 + active_low = <&button>,"gpios:8";
10037 + debounce = <&button>,"debounce-interval:0";
10038 + };
10039 +
10040 +};
10041 diff --git a/arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts b/arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts
10042 new file mode 100644
10043 index 000000000000..ee726669ff51
10044 --- /dev/null
10045 +++ b/arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts
10046 @@ -0,0 +1,46 @@
10047 +/dts-v1/;
10048 +/plugin/;
10049 +
10050 +/ {
10051 + compatible = "brcm,bcm2835";
10052 +
10053 + fragment@0 {
10054 + target-path = "/";
10055 + __overlay__ {
10056 + lcd_screen: auxdisplay {
10057 + compatible = "hit,hd44780";
10058 +
10059 + data-gpios = <&gpio 6 0>,
10060 + <&gpio 13 0>,
10061 + <&gpio 19 0>,
10062 + <&gpio 26 0>;
10063 + enable-gpios = <&gpio 21 0>;
10064 + rs-gpios = <&gpio 20 0>;
10065 +
10066 + display-height-chars = <2>;
10067 + display-width-chars = <16>;
10068 + };
10069 +
10070 + };
10071 + };
10072 +
10073 + fragment@1 {
10074 + target = <&lcd_screen>;
10075 + __dormant__ {
10076 + backlight-gpios = <&gpio 12 0>;
10077 + };
10078 + };
10079 +
10080 + __overrides__ {
10081 + pin_d4 = <&lcd_screen>,"data-gpios:4";
10082 + pin_d5 = <&lcd_screen>,"data-gpios:16";
10083 + pin_d6 = <&lcd_screen>,"data-gpios:28";
10084 + pin_d7 = <&lcd_screen>,"data-gpios:40";
10085 + pin_en = <&lcd_screen>,"enable-gpios:4";
10086 + pin_rs = <&lcd_screen>,"rs-gpios:4";
10087 + pin_bl = <0>,"+1", <&lcd_screen>,"backlight-gpios:4";
10088 + display_height = <&lcd_screen>,"display-height-chars:0";
10089 + display_width = <&lcd_screen>,"display-width-chars:0";
10090 + };
10091 +
10092 +};
10093 diff --git a/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
10094 new file mode 100644
10095 index 000000000000..142518ab348b
10096 --- /dev/null
10097 +++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
10098 @@ -0,0 +1,39 @@
10099 +// Definitions for HiFiBerry Amp/Amp+
10100 +/dts-v1/;
10101 +/plugin/;
10102 +
10103 +/ {
10104 + compatible = "brcm,bcm2835";
10105 +
10106 + fragment@0 {
10107 + target = <&i2s>;
10108 + __overlay__ {
10109 + status = "okay";
10110 + };
10111 + };
10112 +
10113 + fragment@1 {
10114 + target = <&i2c1>;
10115 + __overlay__ {
10116 + #address-cells = <1>;
10117 + #size-cells = <0>;
10118 + status = "okay";
10119 +
10120 + tas5713@1b {
10121 + #sound-dai-cells = <0>;
10122 + compatible = "ti,tas5713";
10123 + reg = <0x1b>;
10124 + status = "okay";
10125 + };
10126 + };
10127 + };
10128 +
10129 + fragment@2 {
10130 + target = <&sound>;
10131 + __overlay__ {
10132 + compatible = "hifiberry,hifiberry-amp";
10133 + i2s-controller = <&i2s>;
10134 + status = "okay";
10135 + };
10136 + };
10137 +};
10138 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
10139 new file mode 100644
10140 index 000000000000..ea8a6c8f36c0
10141 --- /dev/null
10142 +++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
10143 @@ -0,0 +1,34 @@
10144 +// Definitions for HiFiBerry DAC
10145 +/dts-v1/;
10146 +/plugin/;
10147 +
10148 +/ {
10149 + compatible = "brcm,bcm2835";
10150 +
10151 + fragment@0 {
10152 + target = <&i2s>;
10153 + __overlay__ {
10154 + status = "okay";
10155 + };
10156 + };
10157 +
10158 + fragment@1 {
10159 + target-path = "/";
10160 + __overlay__ {
10161 + pcm5102a-codec {
10162 + #sound-dai-cells = <0>;
10163 + compatible = "ti,pcm5102a";
10164 + status = "okay";
10165 + };
10166 + };
10167 + };
10168 +
10169 + fragment@2 {
10170 + target = <&sound>;
10171 + __overlay__ {
10172 + compatible = "hifiberry,hifiberry-dac";
10173 + i2s-controller = <&i2s>;
10174 + status = "okay";
10175 + };
10176 + };
10177 +};
10178 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
10179 new file mode 100644
10180 index 000000000000..5cd14aac3e45
10181 --- /dev/null
10182 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
10183 @@ -0,0 +1,59 @@
10184 +// Definitions for HiFiBerry DAC+
10185 +/dts-v1/;
10186 +/plugin/;
10187 +
10188 +/ {
10189 + compatible = "brcm,bcm2835";
10190 +
10191 + fragment@0 {
10192 + target-path = "/clocks";
10193 + __overlay__ {
10194 + dacpro_osc: dacpro_osc {
10195 + compatible = "hifiberry,dacpro-clk";
10196 + #clock-cells = <0>;
10197 + };
10198 + };
10199 + };
10200 +
10201 + fragment@1 {
10202 + target = <&i2s>;
10203 + __overlay__ {
10204 + status = "okay";
10205 + };
10206 + };
10207 +
10208 + fragment@2 {
10209 + target = <&i2c1>;
10210 + __overlay__ {
10211 + #address-cells = <1>;
10212 + #size-cells = <0>;
10213 + status = "okay";
10214 +
10215 + pcm5122@4d {
10216 + #sound-dai-cells = <0>;
10217 + compatible = "ti,pcm5122";
10218 + reg = <0x4d>;
10219 + clocks = <&dacpro_osc>;
10220 + AVDD-supply = <&vdd_3v3_reg>;
10221 + DVDD-supply = <&vdd_3v3_reg>;
10222 + CPVDD-supply = <&vdd_3v3_reg>;
10223 + status = "okay";
10224 + };
10225 + };
10226 + };
10227 +
10228 + fragment@3 {
10229 + target = <&sound>;
10230 + hifiberry_dacplus: __overlay__ {
10231 + compatible = "hifiberry,hifiberry-dacplus";
10232 + i2s-controller = <&i2s>;
10233 + status = "okay";
10234 + };
10235 + };
10236 +
10237 + __overrides__ {
10238 + 24db_digital_gain =
10239 + <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
10240 + slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
10241 + };
10242 +};
10243 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
10244 new file mode 100644
10245 index 000000000000..09adcea8fd37
10246 --- /dev/null
10247 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
10248 @@ -0,0 +1,71 @@
10249 +// Definitions for HiFiBerry DAC+ADC
10250 +/dts-v1/;
10251 +/plugin/;
10252 +
10253 +/ {
10254 + compatible = "brcm,bcm2835";
10255 +
10256 + fragment@0 {
10257 + target-path = "/clocks";
10258 + __overlay__ {
10259 + dacpro_osc: dacpro_osc {
10260 + compatible = "hifiberry,dacpro-clk";
10261 + #clock-cells = <0>;
10262 + };
10263 + };
10264 + };
10265 +
10266 + fragment@1 {
10267 + target = <&i2s>;
10268 + __overlay__ {
10269 + status = "okay";
10270 + };
10271 + };
10272 +
10273 + fragment@2 {
10274 + target = <&i2c1>;
10275 + __overlay__ {
10276 + #address-cells = <1>;
10277 + #size-cells = <0>;
10278 + status = "okay";
10279 +
10280 + pcm_codec: pcm5122@4d {
10281 + #sound-dai-cells = <0>;
10282 + compatible = "ti,pcm5122";
10283 + reg = <0x4d>;
10284 + clocks = <&dacpro_osc>;
10285 + AVDD-supply = <&vdd_3v3_reg>;
10286 + DVDD-supply = <&vdd_3v3_reg>;
10287 + CPVDD-supply = <&vdd_3v3_reg>;
10288 + status = "okay";
10289 + };
10290 + };
10291 + };
10292 +
10293 + fragment@3 {
10294 + target-path = "/";
10295 + __overlay__ {
10296 + dmic {
10297 + #sound-dai-cells = <0>;
10298 + compatible = "dmic-codec";
10299 + num-channels = <2>;
10300 + status = "okay";
10301 + };
10302 + };
10303 + };
10304 +
10305 + fragment@4 {
10306 + target = <&sound>;
10307 + hifiberry_dacplusadc: __overlay__ {
10308 + compatible = "hifiberry,hifiberry-dacplusadc";
10309 + i2s-controller = <&i2s>;
10310 + status = "okay";
10311 + };
10312 + };
10313 +
10314 + __overrides__ {
10315 + 24db_digital_gain =
10316 + <&hifiberry_dacplusadc>,"hifiberry,24db_digital_gain?";
10317 + slave = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,slave?";
10318 + };
10319 +};
10320 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
10321 new file mode 100644
10322 index 000000000000..00e5d450a88b
10323 --- /dev/null
10324 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
10325 @@ -0,0 +1,64 @@
10326 +// Definitions for HiFiBerry DAC+ADC PRO
10327 +/dts-v1/;
10328 +/plugin/;
10329 +
10330 +/ {
10331 + compatible = "brcm,bcm2708";
10332 +
10333 + fragment@0 {
10334 + target-path = "/clocks";
10335 + __overlay__ {
10336 + dacpro_osc: dacpro_osc {
10337 + compatible = "hifiberry,dacpro-clk";
10338 + #clock-cells = <0>;
10339 + };
10340 + };
10341 + };
10342 +
10343 + fragment@1 {
10344 + target = <&i2s>;
10345 + __overlay__ {
10346 + status = "okay";
10347 + };
10348 + };
10349 +
10350 + fragment@2 {
10351 + target = <&i2c1>;
10352 + __overlay__ {
10353 + #address-cells = <1>;
10354 + #size-cells = <0>;
10355 + status = "okay";
10356 +
10357 + hb_dac: pcm5122@4d {
10358 + #sound-dai-cells = <0>;
10359 + compatible = "ti,pcm5122";
10360 + reg = <0x4d>;
10361 + clocks = <&dacpro_osc>;
10362 + status = "okay";
10363 + };
10364 + hb_adc: pcm186x@4a {
10365 + #sound-dai-cells = <0>;
10366 + compatible = "ti,pcm1863";
10367 + reg = <0x4a>;
10368 + clocks = <&dacpro_osc>;
10369 + status = "okay";
10370 + };
10371 + };
10372 + };
10373 +
10374 + fragment@3 {
10375 + target = <&sound>;
10376 + hifiberry_dacplusadcpro: __overlay__ {
10377 + compatible = "hifiberry,hifiberry-dacplusadcpro";
10378 + audio-codec = <&hb_dac &hb_adc>;
10379 + i2s-controller = <&i2s>;
10380 + status = "okay";
10381 + };
10382 + };
10383 +
10384 + __overrides__ {
10385 + 24db_digital_gain =
10386 + <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,24db_digital_gain?";
10387 + slave = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,slave?";
10388 + };
10389 +};
10390 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
10391 new file mode 100644
10392 index 000000000000..63432e8b983f
10393 --- /dev/null
10394 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
10395 @@ -0,0 +1,34 @@
10396 +// Definitions for hifiberry DAC+DSP soundcard overlay
10397 +/dts-v1/;
10398 +/plugin/;
10399 +
10400 +/ {
10401 + compatible = "brcm,bcm2835";
10402 +
10403 + fragment@0 {
10404 + target = <&i2s>;
10405 + __overlay__ {
10406 + status = "okay";
10407 + };
10408 + };
10409 +
10410 + fragment@1 {
10411 + target-path = "/";
10412 + __overlay__ {
10413 + dacplusdsp-codec {
10414 + #sound-dai-cells = <0>;
10415 + compatible = "hifiberry,dacplusdsp";
10416 + status = "okay";
10417 + };
10418 + };
10419 + };
10420 +
10421 + fragment@2 {
10422 + target = <&sound>;
10423 + __overlay__ {
10424 + compatible = "hifiberrydacplusdsp,hifiberrydacplusdsp-soundcard";
10425 + i2s-controller = <&i2s>;
10426 + status = "okay";
10427 + };
10428 + };
10429 +};
10430 diff --git a/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
10431 new file mode 100644
10432 index 000000000000..a2309a50e8d8
10433 --- /dev/null
10434 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
10435 @@ -0,0 +1,41 @@
10436 +// Definitions for HiFiBerry Digi
10437 +/dts-v1/;
10438 +/plugin/;
10439 +
10440 +/ {
10441 + compatible = "brcm,bcm2835";
10442 +
10443 + fragment@0 {
10444 + target = <&i2s>;
10445 + __overlay__ {
10446 + status = "okay";
10447 + };
10448 + };
10449 +
10450 + fragment@1 {
10451 + target = <&i2c1>;
10452 + __overlay__ {
10453 + #address-cells = <1>;
10454 + #size-cells = <0>;
10455 + status = "okay";
10456 +
10457 + wm8804@3b {
10458 + #sound-dai-cells = <0>;
10459 + compatible = "wlf,wm8804";
10460 + reg = <0x3b>;
10461 + PVDD-supply = <&vdd_3v3_reg>;
10462 + DVDD-supply = <&vdd_3v3_reg>;
10463 + status = "okay";
10464 + };
10465 + };
10466 + };
10467 +
10468 + fragment@2 {
10469 + target = <&sound>;
10470 + __overlay__ {
10471 + compatible = "hifiberry,hifiberry-digi";
10472 + i2s-controller = <&i2s>;
10473 + status = "okay";
10474 + };
10475 + };
10476 +};
10477 diff --git a/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
10478 new file mode 100644
10479 index 000000000000..83de602e76ba
10480 --- /dev/null
10481 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
10482 @@ -0,0 +1,43 @@
10483 +// Definitions for HiFiBerry Digi Pro
10484 +/dts-v1/;
10485 +/plugin/;
10486 +
10487 +/ {
10488 + compatible = "brcm,bcm2835";
10489 +
10490 + fragment@0 {
10491 + target = <&i2s>;
10492 + __overlay__ {
10493 + status = "okay";
10494 + };
10495 + };
10496 +
10497 + fragment@1 {
10498 + target = <&i2c1>;
10499 + __overlay__ {
10500 + #address-cells = <1>;
10501 + #size-cells = <0>;
10502 + status = "okay";
10503 +
10504 + wm8804@3b {
10505 + #sound-dai-cells = <0>;
10506 + compatible = "wlf,wm8804";
10507 + reg = <0x3b>;
10508 + PVDD-supply = <&vdd_3v3_reg>;
10509 + DVDD-supply = <&vdd_3v3_reg>;
10510 + status = "okay";
10511 + };
10512 + };
10513 + };
10514 +
10515 + fragment@2 {
10516 + target = <&sound>;
10517 + __overlay__ {
10518 + compatible = "hifiberry,hifiberry-digi";
10519 + i2s-controller = <&i2s>;
10520 + status = "okay";
10521 + clock44-gpio = <&gpio 5 0>;
10522 + clock48-gpio = <&gpio 6 0>;
10523 + };
10524 + };
10525 +};
10526 diff --git a/arch/arm/boot/dts/overlays/hy28a-overlay.dts b/arch/arm/boot/dts/overlays/hy28a-overlay.dts
10527 new file mode 100644
10528 index 000000000000..aa6463e6e749
10529 --- /dev/null
10530 +++ b/arch/arm/boot/dts/overlays/hy28a-overlay.dts
10531 @@ -0,0 +1,93 @@
10532 +/*
10533 + * Device Tree overlay for HY28A display
10534 + *
10535 + */
10536 +
10537 +/dts-v1/;
10538 +/plugin/;
10539 +
10540 +/ {
10541 + compatible = "brcm,bcm2835";
10542 +
10543 + fragment@0 {
10544 + target = <&spi0>;
10545 + __overlay__ {
10546 + status = "okay";
10547 + };
10548 + };
10549 +
10550 + fragment@1 {
10551 + target = <&spidev0>;
10552 + __overlay__ {
10553 + status = "disabled";
10554 + };
10555 + };
10556 +
10557 + fragment@2 {
10558 + target = <&spidev1>;
10559 + __overlay__ {
10560 + status = "disabled";
10561 + };
10562 + };
10563 +
10564 + fragment@3 {
10565 + target = <&gpio>;
10566 + __overlay__ {
10567 + hy28a_pins: hy28a_pins {
10568 + brcm,pins = <17 25 18>;
10569 + brcm,function = <0 1 1>; /* in out out */
10570 + };
10571 + };
10572 + };
10573 +
10574 + fragment@4 {
10575 + target = <&spi0>;
10576 + __overlay__ {
10577 + /* needed to avoid dtc warning */
10578 + #address-cells = <1>;
10579 + #size-cells = <0>;
10580 +
10581 + hy28a: hy28a@0{
10582 + compatible = "ilitek,ili9320";
10583 + reg = <0>;
10584 + pinctrl-names = "default";
10585 + pinctrl-0 = <&hy28a_pins>;
10586 +
10587 + spi-max-frequency = <32000000>;
10588 + spi-cpol;
10589 + spi-cpha;
10590 + rotate = <270>;
10591 + bgr;
10592 + fps = <50>;
10593 + buswidth = <8>;
10594 + startbyte = <0x70>;
10595 + reset-gpios = <&gpio 25 0>;
10596 + led-gpios = <&gpio 18 1>;
10597 + debug = <0>;
10598 + };
10599 +
10600 + hy28a_ts: hy28a-ts@1 {
10601 + compatible = "ti,ads7846";
10602 + reg = <1>;
10603 +
10604 + spi-max-frequency = <2000000>;
10605 + interrupts = <17 2>; /* high-to-low edge triggered */
10606 + interrupt-parent = <&gpio>;
10607 + pendown-gpio = <&gpio 17 0>;
10608 + ti,x-plate-ohms = /bits/ 16 <100>;
10609 + ti,pressure-max = /bits/ 16 <255>;
10610 + };
10611 + };
10612 + };
10613 + __overrides__ {
10614 + speed = <&hy28a>,"spi-max-frequency:0";
10615 + rotate = <&hy28a>,"rotate:0";
10616 + fps = <&hy28a>,"fps:0";
10617 + debug = <&hy28a>,"debug:0";
10618 + xohms = <&hy28a_ts>,"ti,x-plate-ohms;0";
10619 + resetgpio = <&hy28a>,"reset-gpios:4",
10620 + <&hy28a_pins>, "brcm,pins:4";
10621 + ledgpio = <&hy28a>,"led-gpios:4",
10622 + <&hy28a_pins>, "brcm,pins:8";
10623 + };
10624 +};
10625 diff --git a/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts b/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts
10626 new file mode 100644
10627 index 000000000000..42b68b684bd0
10628 --- /dev/null
10629 +++ b/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts
10630 @@ -0,0 +1,152 @@
10631 +/*
10632 + * Device Tree overlay for HY28b display shield by Texy.
10633 + * Modified for 2017 version with ILI9325 D chip
10634 + */
10635 +
10636 +/dts-v1/;
10637 +/plugin/;
10638 +
10639 +/ {
10640 + compatible = "brcm,bcm2835";
10641 +
10642 + fragment@0 {
10643 + target = <&spi0>;
10644 + __overlay__ {
10645 + status = "okay";
10646 + };
10647 + };
10648 +
10649 + fragment@1 {
10650 + target = <&spidev0>;
10651 + __overlay__ {
10652 + status = "disabled";
10653 + };
10654 + };
10655 +
10656 + fragment@2 {
10657 + target = <&spidev1>;
10658 + __overlay__ {
10659 + status = "disabled";
10660 + };
10661 + };
10662 +
10663 + fragment@3 {
10664 + target = <&gpio>;
10665 + __overlay__ {
10666 + hy28b_pins: hy28b_pins {
10667 + brcm,pins = <17 25 18>;
10668 + brcm,function = <0 1 1>; /* in out out */
10669 + };
10670 + };
10671 + };
10672 +
10673 + fragment@4 {
10674 + target = <&spi0>;
10675 + __overlay__ {
10676 + /* needed to avoid dtc warning */
10677 + #address-cells = <1>;
10678 + #size-cells = <0>;
10679 +
10680 + hy28b: hy28b@0{
10681 + compatible = "ilitek,ili9325";
10682 + reg = <0>;
10683 + pinctrl-names = "default";
10684 + pinctrl-0 = <&hy28b_pins>;
10685 +
10686 + spi-max-frequency = <48000000>;
10687 + spi-cpol;
10688 + spi-cpha;
10689 + rotate = <270>;
10690 + bgr;
10691 + fps = <50>;
10692 + buswidth = <8>;
10693 + startbyte = <0x70>;
10694 + reset-gpios = <&gpio 25 0>;
10695 + led-gpios = <&gpio 18 1>;
10696 +
10697 + init = <0x10000e5 0x78F0
10698 + 0x1000001 0x0100
10699 + 0x1000002 0x0700
10700 + 0x1000003 0x1030
10701 + 0x1000004 0x0000
10702 + 0x1000008 0x0207
10703 + 0x1000009 0x0000
10704 + 0x100000a 0x0000
10705 + 0x100000c 0x0000
10706 + 0x100000d 0x0000
10707 + 0x100000f 0x0000
10708 + 0x1000010 0x0000
10709 + 0x1000011 0x0007
10710 + 0x1000012 0x0000
10711 + 0x1000013 0x0000
10712 + 0x1000007 0x0001
10713 + 0x2000032
10714 + 0x2000032
10715 + 0x2000032
10716 + 0x2000032
10717 + 0x1000010 0x1090
10718 + 0x1000011 0x0227
10719 + 0x2000032
10720 + 0x1000012 0x001f
10721 + 0x2000032
10722 + 0x1000013 0x1500
10723 + 0x1000029 0x0027
10724 + 0x100002b 0x000d
10725 + 0x2000032
10726 + 0x1000020 0x0000
10727 + 0x1000021 0x0000
10728 + 0x2000032
10729 + 0x1000030 0x0000
10730 + 0x1000031 0x0707
10731 + 0x1000032 0x0307
10732 + 0x1000035 0x0200
10733 + 0x1000036 0x0008
10734 + 0x1000037 0x0004
10735 + 0x1000038 0x0000
10736 + 0x1000039 0x0707
10737 + 0x100003c 0x0002
10738 + 0x100003d 0x1d04
10739 + 0x1000050 0x0000
10740 + 0x1000051 0x00ef
10741 + 0x1000052 0x0000
10742 + 0x1000053 0x013f
10743 + 0x1000060 0xa700
10744 + 0x1000061 0x0001
10745 + 0x100006a 0x0000
10746 + 0x1000080 0x0000
10747 + 0x1000081 0x0000
10748 + 0x1000082 0x0000
10749 + 0x1000083 0x0000
10750 + 0x1000084 0x0000
10751 + 0x1000085 0x0000
10752 + 0x1000090 0x0010
10753 + 0x1000092 0x0600
10754 + 0x1000007 0x0133>;
10755 + debug = <0>;
10756 + };
10757 +
10758 + hy28b_ts: hy28b-ts@1 {
10759 + compatible = "ti,ads7846";
10760 + reg = <1>;
10761 +
10762 + spi-max-frequency = <2000000>;
10763 + interrupts = <17 2>; /* high-to-low edge triggered */
10764 + interrupt-parent = <&gpio>;
10765 + pendown-gpio = <&gpio 17 0>;
10766 + ti,x-plate-ohms = /bits/ 16 <100>;
10767 + ti,pressure-max = /bits/ 16 <255>;
10768 + };
10769 + };
10770 + };
10771 + __overrides__ {
10772 + speed = <&hy28b>,"spi-max-frequency:0";
10773 + rotate = <&hy28b>,"rotate:0";
10774 + fps = <&hy28b>,"fps:0";
10775 + debug = <&hy28b>,"debug:0";
10776 + xohms = <&hy28b_ts>,"ti,x-plate-ohms;0";
10777 + resetgpio = <&hy28b>,"reset-gpios:4",
10778 + <&hy28b_pins>, "brcm,pins:4";
10779 + ledgpio = <&hy28b>,"led-gpios:4",
10780 + <&hy28b_pins>, "brcm,pins:8";
10781 + };
10782 +};
10783 diff --git a/arch/arm/boot/dts/overlays/hy28b-overlay.dts b/arch/arm/boot/dts/overlays/hy28b-overlay.dts
10784 new file mode 100644
10785 index 000000000000..2e5e20f327a3
10786 --- /dev/null
10787 +++ b/arch/arm/boot/dts/overlays/hy28b-overlay.dts
10788 @@ -0,0 +1,148 @@
10789 +/*
10790 + * Device Tree overlay for HY28b display shield by Texy
10791 + *
10792 + */
10793 +
10794 +/dts-v1/;
10795 +/plugin/;
10796 +
10797 +/ {
10798 + compatible = "brcm,bcm2835";
10799 +
10800 + fragment@0 {
10801 + target = <&spi0>;
10802 + __overlay__ {
10803 + status = "okay";
10804 + };
10805 + };
10806 +
10807 + fragment@1 {
10808 + target = <&spidev0>;
10809 + __overlay__ {
10810 + status = "disabled";
10811 + };
10812 + };
10813 +
10814 + fragment@2 {
10815 + target = <&spidev1>;
10816 + __overlay__ {
10817 + status = "disabled";
10818 + };
10819 + };
10820 +
10821 + fragment@3 {
10822 + target = <&gpio>;
10823 + __overlay__ {
10824 + hy28b_pins: hy28b_pins {
10825 + brcm,pins = <17 25 18>;
10826 + brcm,function = <0 1 1>; /* in out out */
10827 + };
10828 + };
10829 + };
10830 +
10831 + fragment@4 {
10832 + target = <&spi0>;
10833 + __overlay__ {
10834 + /* needed to avoid dtc warning */
10835 + #address-cells = <1>;
10836 + #size-cells = <0>;
10837 +
10838 + hy28b: hy28b@0{
10839 + compatible = "ilitek,ili9325";
10840 + reg = <0>;
10841 + pinctrl-names = "default";
10842 + pinctrl-0 = <&hy28b_pins>;
10843 +
10844 + spi-max-frequency = <48000000>;
10845 + spi-cpol;
10846 + spi-cpha;
10847 + rotate = <270>;
10848 + bgr;
10849 + fps = <50>;
10850 + buswidth = <8>;
10851 + startbyte = <0x70>;
10852 + reset-gpios = <&gpio 25 0>;
10853 + led-gpios = <&gpio 18 1>;
10854 +
10855 + gamma = "04 1F 4 7 7 0 7 7 6 0\n0F 00 1 7 4 0 0 0 6 7";
10856 +
10857 + init = <0x10000e7 0x0010
10858 + 0x1000000 0x0001
10859 + 0x1000001 0x0100
10860 + 0x1000002 0x0700
10861 + 0x1000003 0x1030
10862 + 0x1000004 0x0000
10863 + 0x1000008 0x0207
10864 + 0x1000009 0x0000
10865 + 0x100000a 0x0000
10866 + 0x100000c 0x0001
10867 + 0x100000d 0x0000
10868 + 0x100000f 0x0000
10869 + 0x1000010 0x0000
10870 + 0x1000011 0x0007
10871 + 0x1000012 0x0000
10872 + 0x1000013 0x0000
10873 + 0x2000032
10874 + 0x1000010 0x1590
10875 + 0x1000011 0x0227
10876 + 0x2000032
10877 + 0x1000012 0x009c
10878 + 0x2000032
10879 + 0x1000013 0x1900
10880 + 0x1000029 0x0023
10881 + 0x100002b 0x000e
10882 + 0x2000032
10883 + 0x1000020 0x0000
10884 + 0x1000021 0x0000
10885 + 0x2000032
10886 + 0x1000050 0x0000
10887 + 0x1000051 0x00ef
10888 + 0x1000052 0x0000
10889 + 0x1000053 0x013f
10890 + 0x1000060 0xa700
10891 + 0x1000061 0x0001
10892 + 0x100006a 0x0000
10893 + 0x1000080 0x0000
10894 + 0x1000081 0x0000
10895 + 0x1000082 0x0000
10896 + 0x1000083 0x0000
10897 + 0x1000084 0x0000
10898 + 0x1000085 0x0000
10899 + 0x1000090 0x0010
10900 + 0x1000092 0x0000
10901 + 0x1000093 0x0003
10902 + 0x1000095 0x0110
10903 + 0x1000097 0x0000
10904 + 0x1000098 0x0000
10905 + 0x1000007 0x0133
10906 + 0x1000020 0x0000
10907 + 0x1000021 0x0000
10908 + 0x2000064>;
10909 + debug = <0>;
10910 + };
10911 +
10912 + hy28b_ts: hy28b-ts@1 {
10913 + compatible = "ti,ads7846";
10914 + reg = <1>;
10915 +
10916 + spi-max-frequency = <2000000>;
10917 + interrupts = <17 2>; /* high-to-low edge triggered */
10918 + interrupt-parent = <&gpio>;
10919 + pendown-gpio = <&gpio 17 0>;
10920 + ti,x-plate-ohms = /bits/ 16 <100>;
10921 + ti,pressure-max = /bits/ 16 <255>;
10922 + };
10923 + };
10924 + };
10925 + __overrides__ {
10926 + speed = <&hy28b>,"spi-max-frequency:0";
10927 + rotate = <&hy28b>,"rotate:0";
10928 + fps = <&hy28b>,"fps:0";
10929 + debug = <&hy28b>,"debug:0";
10930 + xohms = <&hy28b_ts>,"ti,x-plate-ohms;0";
10931 + resetgpio = <&hy28b>,"reset-gpios:4",
10932 + <&hy28b_pins>, "brcm,pins:4";
10933 + ledgpio = <&hy28b>,"led-gpios:4",
10934 + <&hy28b_pins>, "brcm,pins:8";
10935 + };
10936 +};
10937 diff --git a/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts b/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
10938 new file mode 100644
10939 index 000000000000..0c4cff354674
10940 --- /dev/null
10941 +++ b/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
10942 @@ -0,0 +1,39 @@
10943 +// Definitions for I-Sabre Q2M
10944 +/dts-v1/;
10945 +/plugin/;
10946 +
10947 +/ {
10948 + compatible = "brcm,bcm2835";
10949 +
10950 + fragment@0 {
10951 + target = <&sound>;
10952 + frag0: __overlay__ {
10953 + compatible = "audiophonics,i-sabre-q2m";
10954 + i2s-controller = <&i2s>;
10955 + status = "okay";
10956 + };
10957 + };
10958 +
10959 + fragment@1 {
10960 + target = <&i2s>;
10961 + __overlay__ {
10962 + status = "okay";
10963 + };
10964 + };
10965 +
10966 + fragment@2 {
10967 + target = <&i2c1>;
10968 + __overlay__ {
10969 + #address-cells = <1>;
10970 + #size-cells = <0>;
10971 + status = "okay";
10972 +
10973 + i-sabre-codec@48 {
10974 + #sound-dai-cells = <0>;
10975 + compatible = "audiophonics,i-sabre-codec";
10976 + reg = <0x48>;
10977 + status = "okay";
10978 + };
10979 + };
10980 + };
10981 +};
10982 diff --git a/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts b/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
10983 new file mode 100644
10984 index 000000000000..8204b6b3aef8
10985 --- /dev/null
10986 +++ b/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
10987 @@ -0,0 +1,13 @@
10988 +/dts-v1/;
10989 +/plugin/;
10990 +
10991 +/{
10992 + compatible = "brcm,bcm2835";
10993 +
10994 + fragment@0 {
10995 + target = <&i2c_arm>;
10996 + __overlay__ {
10997 + compatible = "brcm,bcm2708-i2c";
10998 + };
10999 + };
11000 +};
11001 diff --git a/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
11002 new file mode 100644
11003 index 000000000000..39e7bc5fa9d8
11004 --- /dev/null
11005 +++ b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
11006 @@ -0,0 +1,45 @@
11007 +// Overlay for i2c_gpio bitbanging host bus.
11008 +/dts-v1/;
11009 +/plugin/;
11010 +
11011 +/ {
11012 + compatible = "brcm,bcm2835";
11013 +
11014 + fragment@0 {
11015 + target-path = "/";
11016 +
11017 + __overlay__ {
11018 + i2c_gpio: i2c@0 {
11019 + reg = <0xffffffff>;
11020 + compatible = "i2c-gpio";
11021 + gpios = <&gpio 23 0 /* sda */
11022 + &gpio 24 0 /* scl */
11023 + >;
11024 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
11025 + #address-cells = <1>;
11026 + #size-cells = <0>;
11027 + };
11028 + };
11029 + };
11030 +
11031 + fragment@1 {
11032 + target-path = "/aliases";
11033 + __overlay__ {
11034 + i2c_gpio = "/i2c@0";
11035 + };
11036 + };
11037 +
11038 + fragment@2 {
11039 + target-path = "/__symbols__";
11040 + __overlay__ {
11041 + i2c_gpio = "/i2c@0";
11042 + };
11043 + };
11044 +
11045 + __overrides__ {
11046 + i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
11047 + i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
11048 + i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
11049 + bus = <&i2c_gpio>, "reg:0";
11050 + };
11051 +};
11052 diff --git a/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
11053 new file mode 100644
11054 index 000000000000..112aed91ecb2
11055 --- /dev/null
11056 +++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
11057 @@ -0,0 +1,139 @@
11058 +// Umbrella I2C Mux overlay
11059 +
11060 +/dts-v1/;
11061 +/plugin/;
11062 +
11063 +/{
11064 + compatible = "brcm,bcm2835";
11065 +
11066 + fragment@0 {
11067 + target = <&i2c_arm>;
11068 + __dormant__ {
11069 + #address-cells = <1>;
11070 + #size-cells = <0>;
11071 + status = "okay";
11072 +
11073 + pca9542: mux@70 {
11074 + compatible = "nxp,pca9542";
11075 + reg = <0x70>;
11076 + #address-cells = <1>;
11077 + #size-cells = <0>;
11078 +
11079 + i2c@0 {
11080 + #address-cells = <1>;
11081 + #size-cells = <0>;
11082 + reg = <0>;
11083 + };
11084 + i2c@1 {
11085 + #address-cells = <1>;
11086 + #size-cells = <0>;
11087 + reg = <1>;
11088 + };
11089 + };
11090 + };
11091 + };
11092 +
11093 + fragment@1 {
11094 + target = <&i2c_arm>;
11095 + __dormant__ {
11096 + #address-cells = <1>;
11097 + #size-cells = <0>;
11098 + status = "okay";
11099 +
11100 + pca9545: mux@70 {
11101 + compatible = "nxp,pca9545";
11102 + reg = <0x70>;
11103 + #address-cells = <1>;
11104 + #size-cells = <0>;
11105 +
11106 + i2c@0 {
11107 + #address-cells = <1>;
11108 + #size-cells = <0>;
11109 + reg = <0>;
11110 + };
11111 + i2c@1 {
11112 + #address-cells = <1>;
11113 + #size-cells = <0>;
11114 + reg = <1>;
11115 + };
11116 + i2c@2 {
11117 + #address-cells = <1>;
11118 + #size-cells = <0>;
11119 + reg = <2>;
11120 + };
11121 + i2c@3 {
11122 + #address-cells = <1>;
11123 + #size-cells = <0>;
11124 + reg = <3>;
11125 + };
11126 + };
11127 + };
11128 + };
11129 +
11130 + fragment@2 {
11131 + target = <&i2c_arm>;
11132 + __dormant__ {
11133 + #address-cells = <1>;
11134 + #size-cells = <0>;
11135 + status = "okay";
11136 +
11137 + pca9548: mux@70 {
11138 + compatible = "nxp,pca9548";
11139 + reg = <0x70>;
11140 + #address-cells = <1>;
11141 + #size-cells = <0>;
11142 +
11143 + i2c@0 {
11144 + #address-cells = <1>;
11145 + #size-cells = <0>;
11146 + reg = <0>;
11147 + };
11148 + i2c@1 {
11149 + #address-cells = <1>;
11150 + #size-cells = <0>;
11151 + reg = <1>;
11152 + };
11153 + i2c@2 {
11154 + #address-cells = <1>;
11155 + #size-cells = <0>;
11156 + reg = <2>;
11157 + };
11158 + i2c@3 {
11159 + #address-cells = <1>;
11160 + #size-cells = <0>;
11161 + reg = <3>;
11162 + };
11163 + i2c@4 {
11164 + #address-cells = <1>;
11165 + #size-cells = <0>;
11166 + reg = <4>;
11167 + };
11168 + i2c@5 {
11169 + #address-cells = <1>;
11170 + #size-cells = <0>;
11171 + reg = <5>;
11172 + };
11173 + i2c@6 {
11174 + #address-cells = <1>;
11175 + #size-cells = <0>;
11176 + reg = <6>;
11177 + };
11178 + i2c@7 {
11179 + #address-cells = <1>;
11180 + #size-cells = <0>;
11181 + reg = <7>;
11182 + };
11183 + };
11184 + };
11185 + };
11186 +
11187 + __overrides__ {
11188 + pca9542 = <0>, "+0";
11189 + pca9545 = <0>, "+1";
11190 + pca9548 = <0>, "+2";
11191 +
11192 + addr = <&pca9542>,"reg:0",
11193 + <&pca9545>,"reg:0",
11194 + <&pca9548>,"reg:0";
11195 + };
11196 +};
11197 diff --git a/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
11198 new file mode 100644
11199 index 000000000000..108165df165e
11200 --- /dev/null
11201 +++ b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
11202 @@ -0,0 +1,26 @@
11203 +// Definitions for NXP PCA9685A I2C PWM controller on ARM I2C bus.
11204 +/dts-v1/;
11205 +/plugin/;
11206 +
11207 +/{
11208 + compatible = "brcm,bcm2835";
11209 +
11210 + fragment@0 {
11211 + target = <&i2c_arm>;
11212 + __overlay__ {
11213 + #address-cells = <1>;
11214 + #size-cells = <0>;
11215 + status = "okay";
11216 +
11217 + pca: pca@40 {
11218 + compatible = "nxp,pca9685";
11219 + #pwm-cells = <2>;
11220 + reg = <0x40>;
11221 + status = "okay";
11222 + };
11223 + };
11224 + };
11225 + __overrides__ {
11226 + addr = <&pca>,"reg:0";
11227 + };
11228 +};
11229 diff --git a/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
11230 new file mode 100644
11231 index 000000000000..44df77459520
11232 --- /dev/null
11233 +++ b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
11234 @@ -0,0 +1,244 @@
11235 +// Definitions for several I2C based Real Time Clocks
11236 +// Available through i2c-gpio
11237 +/dts-v1/;
11238 +/plugin/;
11239 +
11240 +/ {
11241 + compatible = "brcm,bcm2835";
11242 +
11243 + fragment@0 {
11244 + target-path = "/";
11245 + __overlay__ {
11246 + i2c_gpio: i2c-gpio-rtc@0 {
11247 + compatible = "i2c-gpio";
11248 + gpios = <&gpio 23 0 /* sda */
11249 + &gpio 24 0 /* scl */
11250 + >;
11251 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
11252 + #address-cells = <1>;
11253 + #size-cells = <0>;
11254 + };
11255 + };
11256 + };
11257 +
11258 + fragment@1 {
11259 + target = <&i2c_gpio>;
11260 + __dormant__ {
11261 + #address-cells = <1>;
11262 + #size-cells = <0>;
11263 + status = "okay";
11264 +
11265 + abx80x: abx80x@69 {
11266 + compatible = "abracon,abx80x";
11267 + reg = <0x69>;
11268 + abracon,tc-diode = "standard";
11269 + abracon,tc-resistor = <0>;
11270 + status = "okay";
11271 + };
11272 + };
11273 + };
11274 +
11275 + fragment@2 {
11276 + target = <&i2c_gpio>;
11277 + __dormant__ {
11278 + #address-cells = <1>;
11279 + #size-cells = <0>;
11280 + status = "okay";
11281 +
11282 + ds1307: ds1307@68 {
11283 + compatible = "dallas,ds1307";
11284 + reg = <0x68>;
11285 + status = "okay";
11286 + };
11287 + };
11288 + };
11289 +
11290 + fragment@3 {
11291 + target = <&i2c_gpio>;
11292 + __dormant__ {
11293 + #address-cells = <1>;
11294 + #size-cells = <0>;
11295 + status = "okay";
11296 +
11297 + ds1339: ds1339@68 {
11298 + compatible = "dallas,ds1339";
11299 + trickle-resistor-ohms = <0>;
11300 + reg = <0x68>;
11301 + status = "okay";
11302 + };
11303 + };
11304 + };
11305 +
11306 + fragment@4 {
11307 + target = <&i2c_gpio>;
11308 + __dormant__ {
11309 + #address-cells = <1>;
11310 + #size-cells = <0>;
11311 + status = "okay";
11312 +
11313 + ds3231: ds3231@68 {
11314 + compatible = "maxim,ds3231";
11315 + reg = <0x68>;
11316 + status = "okay";
11317 + };
11318 + };
11319 + };
11320 +
11321 + fragment@5 {
11322 + target = <&i2c_gpio>;
11323 + __dormant__ {
11324 + #address-cells = <1>;
11325 + #size-cells = <0>;
11326 + status = "okay";
11327 +
11328 + mcp7940x: mcp7940x@6f {
11329 + compatible = "microchip,mcp7940x";
11330 + reg = <0x6f>;
11331 + status = "okay";
11332 + };
11333 + };
11334 + };
11335 +
11336 + fragment@6 {
11337 + target = <&i2c_gpio>;
11338 + __dormant__ {
11339 + #address-cells = <1>;
11340 + #size-cells = <0>;
11341 + status = "okay";
11342 +
11343 + mcp7941x: mcp7941x@6f {
11344 + compatible = "microchip,mcp7941x";
11345 + reg = <0x6f>;
11346 + status = "okay";
11347 + };
11348 + };
11349 + };
11350 +
11351 + fragment@7 {
11352 + target = <&i2c_gpio>;
11353 + __dormant__ {
11354 + #address-cells = <1>;
11355 + #size-cells = <0>;
11356 + status = "okay";
11357 +
11358 + pcf2127@51 {
11359 + compatible = "nxp,pcf2127";
11360 + reg = <0x51>;
11361 + status = "okay";
11362 + };
11363 + };
11364 + };
11365 +
11366 + fragment@8 {
11367 + target = <&i2c_gpio>;
11368 + __dormant__ {
11369 + #address-cells = <1>;
11370 + #size-cells = <0>;
11371 + status = "okay";
11372 +
11373 + pcf8523: pcf8523@68 {
11374 + compatible = "nxp,pcf8523";
11375 + reg = <0x68>;
11376 + status = "okay";
11377 + };
11378 + };
11379 + };
11380 +
11381 + fragment@9 {
11382 + target = <&i2c_gpio>;
11383 + __dormant__ {
11384 + #address-cells = <1>;
11385 + #size-cells = <0>;
11386 + status = "okay";
11387 +
11388 + pcf8563: pcf8563@51 {
11389 + compatible = "nxp,pcf8563";
11390 + reg = <0x51>;
11391 + status = "okay";
11392 + };
11393 + };
11394 + };
11395 +
11396 + fragment@10 {
11397 + target = <&i2c_arm>;
11398 + __dormant__ {
11399 + #address-cells = <1>;
11400 + #size-cells = <0>;
11401 + status = "okay";
11402 +
11403 + m41t62: m41t62@68 {
11404 + compatible = "st,m41t62";
11405 + reg = <0x68>;
11406 + status = "okay";
11407 + };
11408 + };
11409 + };
11410 +
11411 + fragment@11 {
11412 + target = <&i2c_gpio>;
11413 + __dormant__ {
11414 + #address-cells = <1>;
11415 + #size-cells = <0>;
11416 + status = "okay";
11417 +
11418 + rv3028: rv3028@52 {
11419 + compatible = "microcrystal,rv3028";
11420 + reg = <0x52>;
11421 + status = "okay";
11422 + };
11423 + };
11424 + };
11425 +
11426 + fragment@12 {
11427 + target = <&i2c_gpio>;
11428 + __dormant__ {
11429 + #address-cells = <1>;
11430 + #size-cells = <0>;
11431 + status = "okay";
11432 +
11433 + pcf2129@51 {
11434 + compatible = "nxp,pcf2129";
11435 + reg = <0x51>;
11436 + status = "okay";
11437 + };
11438 + };
11439 + };
11440 +
11441 + __overrides__ {
11442 + abx80x = <0>,"+1";
11443 + ds1307 = <0>,"+2";
11444 + ds1339 = <0>,"+3";
11445 + ds3231 = <0>,"+4";
11446 + mcp7940x = <0>,"+5";
11447 + mcp7941x = <0>,"+6";
11448 + pcf2127 = <0>,"+7";
11449 + pcf8523 = <0>,"+8";
11450 + pcf8563 = <0>,"+9";
11451 + m41t62 = <0>,"+10";
11452 + rv3028 = <0>,"+11";
11453 + pcf2129 = <0>,"+12";
11454 +
11455 + addr = <&abx80x>, "reg:0",
11456 + <&ds1307>, "reg:0",
11457 + <&ds1339>, "reg:0",
11458 + <&ds3231>, "reg:0",
11459 + <&mcp7940x>, "reg:0",
11460 + <&mcp7941x>, "reg:0",
11461 + <&pcf8523>, "reg:0",
11462 + <&pcf8563>, "reg:0",
11463 + <&m41t62>, "reg:0";
11464 +
11465 + trickle-diode-type = <&abx80x>,"abracon,tc-diode";
11466 + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
11467 + <&abx80x>,"abracon,tc-resistor",
11468 + <&rv3028>,"trickle-resistor-ohms:0";
11469 + backup-switchover-mode = <&rv3028>,"backup-switchover-mode:0";
11470 + wakeup-source = <&ds1339>,"wakeup-source?",
11471 + <&ds3231>,"wakeup-source?",
11472 + <&mcp7940x>,"wakeup-source?",
11473 + <&mcp7941x>,"wakeup-source?";
11474 + i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
11475 + i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
11476 + i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
11477 + };
11478 +};
11479 diff --git a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
11480 new file mode 100644
11481 index 000000000000..af5ca042de75
11482 --- /dev/null
11483 +++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
11484 @@ -0,0 +1,225 @@
11485 +// Definitions for several I2C based Real Time Clocks
11486 +/dts-v1/;
11487 +/plugin/;
11488 +
11489 +/ {
11490 + compatible = "brcm,bcm2835";
11491 +
11492 + fragment@0 {
11493 + target = <&i2c_arm>;
11494 + __dormant__ {
11495 + #address-cells = <1>;
11496 + #size-cells = <0>;
11497 + status = "okay";
11498 +
11499 + abx80x: abx80x@69 {
11500 + compatible = "abracon,abx80x";
11501 + reg = <0x69>;
11502 + abracon,tc-diode = "standard";
11503 + abracon,tc-resistor = <0>;
11504 + status = "okay";
11505 + };
11506 + };
11507 + };
11508 +
11509 + fragment@1 {
11510 + target = <&i2c_arm>;
11511 + __dormant__ {
11512 + #address-cells = <1>;
11513 + #size-cells = <0>;
11514 + status = "okay";
11515 +
11516 + ds1307: ds1307@68 {
11517 + compatible = "dallas,ds1307";
11518 + reg = <0x68>;
11519 + status = "okay";
11520 + };
11521 + };
11522 + };
11523 +
11524 + fragment@2 {
11525 + target = <&i2c_arm>;
11526 + __dormant__ {
11527 + #address-cells = <1>;
11528 + #size-cells = <0>;
11529 + status = "okay";
11530 +
11531 + ds1339: ds1339@68 {
11532 + compatible = "dallas,ds1339";
11533 + trickle-resistor-ohms = <0>;
11534 + reg = <0x68>;
11535 + status = "okay";
11536 + };
11537 + };
11538 + };
11539 +
11540 + fragment@3 {
11541 + target = <&i2c_arm>;
11542 + __dormant__ {
11543 + #address-cells = <1>;
11544 + #size-cells = <0>;
11545 + status = "okay";
11546 +
11547 + ds3231: ds3231@68 {
11548 + compatible = "maxim,ds3231";
11549 + reg = <0x68>;
11550 + status = "okay";
11551 + };
11552 + };
11553 + };
11554 +
11555 + fragment@4 {
11556 + target = <&i2c_arm>;
11557 + __dormant__ {
11558 + #address-cells = <1>;
11559 + #size-cells = <0>;
11560 + status = "okay";
11561 +
11562 + mcp7940x: mcp7940x@6f {
11563 + compatible = "microchip,mcp7940x";
11564 + reg = <0x6f>;
11565 + status = "okay";
11566 + };
11567 + };
11568 + };
11569 +
11570 + fragment@5 {
11571 + target = <&i2c_arm>;
11572 + __dormant__ {
11573 + #address-cells = <1>;
11574 + #size-cells = <0>;
11575 + status = "okay";
11576 +
11577 + mcp7941x: mcp7941x@6f {
11578 + compatible = "microchip,mcp7941x";
11579 + reg = <0x6f>;
11580 + status = "okay";
11581 + };
11582 + };
11583 + };
11584 +
11585 + fragment@6 {
11586 + target = <&i2c_arm>;
11587 + __dormant__ {
11588 + #address-cells = <1>;
11589 + #size-cells = <0>;
11590 + status = "okay";
11591 +
11592 + pcf2127@51 {
11593 + compatible = "nxp,pcf2127";
11594 + reg = <0x51>;
11595 + status = "okay";
11596 + };
11597 + };
11598 + };
11599 +
11600 + fragment@7 {
11601 + target = <&i2c_arm>;
11602 + __dormant__ {
11603 + #address-cells = <1>;
11604 + #size-cells = <0>;
11605 + status = "okay";
11606 +
11607 + pcf8523: pcf8523@68 {
11608 + compatible = "nxp,pcf8523";
11609 + reg = <0x68>;
11610 + status = "okay";
11611 + };
11612 + };
11613 + };
11614 +
11615 + fragment@8 {
11616 + target = <&i2c_arm>;
11617 + __dormant__ {
11618 + #address-cells = <1>;
11619 + #size-cells = <0>;
11620 + status = "okay";
11621 +
11622 + pcf8563: pcf8563@51 {
11623 + compatible = "nxp,pcf8563";
11624 + reg = <0x51>;
11625 + status = "okay";
11626 + };
11627 + };
11628 + };
11629 +
11630 + fragment@9 {
11631 + target = <&i2c_arm>;
11632 + __dormant__ {
11633 + #address-cells = <1>;
11634 + #size-cells = <0>;
11635 + status = "okay";
11636 +
11637 + m41t62: m41t62@68 {
11638 + compatible = "st,m41t62";
11639 + reg = <0x68>;
11640 + status = "okay";
11641 + };
11642 + };
11643 + };
11644 +
11645 + fragment@10 {
11646 + target = <&i2c_arm>;
11647 + __dormant__ {
11648 + #address-cells = <1>;
11649 + #size-cells = <0>;
11650 + status = "okay";
11651 +
11652 + rv3028: rv3028@52 {
11653 + compatible = "microcrystal,rv3028";
11654 + reg = <0x52>;
11655 + status = "okay";
11656 + };
11657 + };
11658 + };
11659 +
11660 + fragment@11 {
11661 + target = <&i2c_arm>;
11662 + __dormant__ {
11663 + #address-cells = <1>;
11664 + #size-cells = <0>;
11665 + status = "okay";
11666 +
11667 + pcf2129@51 {
11668 + compatible = "nxp,pcf2129";
11669 + reg = <0x51>;
11670 + status = "okay";
11671 + };
11672 + };
11673 + };
11674 +
11675 + __overrides__ {
11676 + abx80x = <0>,"+0";
11677 + ds1307 = <0>,"+1";
11678 + ds1339 = <0>,"+2";
11679 + ds3231 = <0>,"+3";
11680 + mcp7940x = <0>,"+4";
11681 + mcp7941x = <0>,"+5";
11682 + pcf2127 = <0>,"+6";
11683 + pcf8523 = <0>,"+7";
11684 + pcf8563 = <0>,"+8";
11685 + m41t62 = <0>,"+9";
11686 + rv3028 = <0>,"+10";
11687 + pcf2129 = <0>,"+11";
11688 +
11689 + addr = <&abx80x>, "reg:0",
11690 + <&ds1307>, "reg:0",
11691 + <&ds1339>, "reg:0",
11692 + <&ds3231>, "reg:0",
11693 + <&mcp7940x>, "reg:0",
11694 + <&mcp7941x>, "reg:0",
11695 + <&pcf8523>, "reg:0",
11696 + <&pcf8563>, "reg:0",
11697 + <&m41t62>, "reg:0";
11698 + trickle-diode-type = <&abx80x>,"abracon,tc-diode";
11699 + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
11700 + <&abx80x>,"abracon,tc-resistor",
11701 + <&rv3028>,"trickle-resistor-ohms:0";
11702 + backup-switchover-mode = <&rv3028>,"backup-switchover-mode:0";
11703 + wakeup-source = <&ds1339>,"wakeup-source?",
11704 + <&ds3231>,"wakeup-source?",
11705 + <&mcp7940x>,"wakeup-source?",
11706 + <&mcp7941x>,"wakeup-source?",
11707 + <&m41t62>,"wakeup-source?";
11708 + };
11709 +};
11710 diff --git a/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
11711 new file mode 100644
11712 index 000000000000..777e4a68190a
11713 --- /dev/null
11714 +++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
11715 @@ -0,0 +1,239 @@
11716 +// Definitions for I2C based sensors using the Industrial IO or HWMON interface.
11717 +/dts-v1/;
11718 +/plugin/;
11719 +
11720 +/ {
11721 + compatible = "brcm,bcm2835";
11722 +
11723 + fragment@0 {
11724 + target = <&i2c_arm>;
11725 + __dormant__ {
11726 + #address-cells = <1>;
11727 + #size-cells = <0>;
11728 + status = "okay";
11729 +
11730 + bme280: bme280@76 {
11731 + compatible = "bosch,bme280";
11732 + reg = <0x76>;
11733 + status = "okay";
11734 + };
11735 + };
11736 + };
11737 +
11738 + fragment@1 {
11739 + target = <&i2c_arm>;
11740 + __dormant__ {
11741 + #address-cells = <1>;
11742 + #size-cells = <0>;
11743 + status = "okay";
11744 +
11745 + bmp085: bmp085@77 {
11746 + compatible = "bosch,bmp085";
11747 + reg = <0x77>;
11748 + default-oversampling = <3>;
11749 + status = "okay";
11750 + };
11751 + };
11752 + };
11753 +
11754 + fragment@2 {
11755 + target = <&i2c_arm>;
11756 + __dormant__ {
11757 + #address-cells = <1>;
11758 + #size-cells = <0>;
11759 + status = "okay";
11760 +
11761 + bmp180: bmp180@77 {
11762 + compatible = "bosch,bmp180";
11763 + reg = <0x77>;
11764 + status = "okay";
11765 + };
11766 + };
11767 + };
11768 +
11769 + fragment@3 {
11770 + target = <&i2c_arm>;
11771 + __dormant__ {
11772 + #address-cells = <1>;
11773 + #size-cells = <0>;
11774 + status = "okay";
11775 +
11776 + bmp280: bmp280@76 {
11777 + compatible = "bosch,bmp280";
11778 + reg = <0x76>;
11779 + status = "okay";
11780 + };
11781 + };
11782 + };
11783 +
11784 + fragment@4 {
11785 + target = <&i2c_arm>;
11786 + __dormant__ {
11787 + #address-cells = <1>;
11788 + #size-cells = <0>;
11789 + status = "okay";
11790 +
11791 + htu21: htu21@40 {
11792 + compatible = "htu21";
11793 + reg = <0x40>;
11794 + status = "okay";
11795 + };
11796 + };
11797 + };
11798 +
11799 + fragment@5 {
11800 + target = <&i2c_arm>;
11801 + __dormant__ {
11802 + #address-cells = <1>;
11803 + #size-cells = <0>;
11804 + status = "okay";
11805 +
11806 + lm75: lm75@4f {
11807 + compatible = "lm75";
11808 + reg = <0x4f>;
11809 + status = "okay";
11810 + };
11811 + };
11812 + };
11813 +
11814 + fragment@6 {
11815 + target = <&i2c_arm>;
11816 + __dormant__ {
11817 + #address-cells = <1>;
11818 + #size-cells = <0>;
11819 + status = "okay";
11820 +
11821 + si7020: si7020@40 {
11822 + compatible = "si7020";
11823 + reg = <0x40>;
11824 + status = "okay";
11825 + };
11826 + };
11827 + };
11828 +
11829 + fragment@7 {
11830 + target = <&i2c_arm>;
11831 + __dormant__ {
11832 + #address-cells = <1>;
11833 + #size-cells = <0>;
11834 + status = "okay";
11835 +
11836 + tmp102: tmp102@48 {
11837 + compatible = "ti,tmp102";
11838 + reg = <0x48>;
11839 + status = "okay";
11840 + };
11841 + };
11842 + };
11843 +
11844 + fragment@8 {
11845 + target = <&i2c_arm>;
11846 + __dormant__ {
11847 + #address-cells = <1>;
11848 + #size-cells = <0>;
11849 + status = "okay";
11850 +
11851 + hdc100x: hdc100x@40 {
11852 + compatible = "hdc100x";
11853 + reg = <0x40>;
11854 + status = "okay";
11855 + };
11856 + };
11857 + };
11858 +
11859 + fragment@9 {
11860 + target = <&i2c_arm>;
11861 + __dormant__ {
11862 + #address-cells = <1>;
11863 + #size-cells = <0>;
11864 + status = "okay";
11865 +
11866 + tsl4531: tsl4531@29 {
11867 + compatible = "tsl4531";
11868 + reg = <0x29>;
11869 + status = "okay";
11870 + };
11871 + };
11872 + };
11873 +
11874 + fragment@10 {
11875 + target = <&i2c_arm>;
11876 + __dormant__ {
11877 + #address-cells = <1>;
11878 + #size-cells = <0>;
11879 + status = "okay";
11880 +
11881 + veml6070: veml6070@38 {
11882 + compatible = "veml6070";
11883 + reg = <0x38>;
11884 + status = "okay";
11885 + };
11886 + };
11887 + };
11888 +
11889 + fragment@11 {
11890 + target = <&i2c_arm>;
11891 + __dormant__ {
11892 + #address-cells = <1>;
11893 + #size-cells = <0>;
11894 + status = "okay";
11895 +
11896 + sht3x: sht3x@44 {
11897 + compatible = "sht3x";
11898 + reg = <0x44>;
11899 + status = "okay";
11900 + };
11901 + };
11902 + };
11903 +
11904 + fragment@12 {
11905 + target = <&i2c_arm>;
11906 + __dormant__ {
11907 + #address-cells = <1>;
11908 + #size-cells = <0>;
11909 + status = "okay";
11910 +
11911 + ds1621: ds1621@48 {
11912 + compatible = "ds1621";
11913 + reg = <0x48>;
11914 + status = "okay";
11915 + };
11916 + };
11917 + };
11918 +
11919 + fragment@13 {
11920 + target = <&i2c_arm>;
11921 + __dormant__ {
11922 + #address-cells = <1>;
11923 + #size-cells = <0>;
11924 + status = "okay";
11925 +
11926 + max17040: max17040@36 {
11927 + compatible = "maxim,max17040";
11928 + reg = <0x36>;
11929 + status = "okay";
11930 + };
11931 + };
11932 + };
11933 +
11934 + __overrides__ {
11935 + addr = <&bme280>,"reg:0", <&bmp280>,"reg:0", <&tmp102>,"reg:0",
11936 + <&lm75>,"reg:0", <&hdc100x>,"reg:0", <&sht3x>,"reg:0",
11937 + <&ds1621>,"reg:0";
11938 + bme280 = <0>,"+0";
11939 + bmp085 = <0>,"+1";
11940 + bmp180 = <0>,"+2";
11941 + bmp280 = <0>,"+3";
11942 + htu21 = <0>,"+4";
11943 + lm75 = <0>,"+5";
11944 + lm75addr = <&lm75>,"reg:0";
11945 + si7020 = <0>,"+6";
11946 + tmp102 = <0>,"+7";
11947 + hdc100x = <0>,"+8";
11948 + tsl4531 = <0>,"+9";
11949 + veml6070 = <0>,"+10";
11950 + sht3x = <0>,"+11";
11951 + ds1621 = <0>,"+12";
11952 + max17040 = <0>,"+13";
11953 + };
11954 +};
11955 diff --git a/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts b/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
11956 new file mode 100644
11957 index 000000000000..02f7dca9b71e
11958 --- /dev/null
11959 +++ b/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
11960 @@ -0,0 +1,14 @@
11961 +#include "i2c0-overlay.dts"
11962 +
11963 +/{
11964 + __overrides__ {
11965 + sda0_pin = <&pins1>,"brcm,pins:0",
11966 + <&pins2>,"brcm,pins:0",
11967 + <&pins3>,"brcm,pins:0",
11968 + <&pins4>,"brcm,pins:0";
11969 + scl0_pin = <&pins1>,"brcm,pins:4",
11970 + <&pins2>,"brcm,pins:4",
11971 + <&pins3>,"brcm,pins:4",
11972 + <&pins4>,"brcm,pins:4";
11973 + };
11974 +};
11975 diff --git a/arch/arm/boot/dts/overlays/i2c0-overlay.dts b/arch/arm/boot/dts/overlays/i2c0-overlay.dts
11976 new file mode 100644
11977 index 000000000000..6b1f9ec6c878
11978 --- /dev/null
11979 +++ b/arch/arm/boot/dts/overlays/i2c0-overlay.dts
11980 @@ -0,0 +1,61 @@
11981 +/dts-v1/;
11982 +/plugin/;
11983 +
11984 +/{
11985 + compatible = "brcm,bcm2835";
11986 +
11987 + fragment@0 {
11988 + target = <&i2c0>;
11989 + __overlay__ {
11990 + status = "okay";
11991 + pinctrl-0 = <&i2c0_pins>;
11992 + };
11993 + };
11994 +
11995 + fragment@1 {
11996 + target = <&i2c0_pins>;
11997 + pins1: __overlay__ {
11998 + brcm,pins = <0 1>;
11999 + brcm,function = <4>; /* alt0 */
12000 + };
12001 + };
12002 +
12003 + fragment@2 {
12004 + target = <&i2c0_pins>;
12005 + pins2: __dormant__ {
12006 + brcm,pins = <28 29>;
12007 + brcm,function = <4>; /* alt0 */
12008 + };
12009 + };
12010 +
12011 + fragment@3 {
12012 + target = <&i2c0_pins>;
12013 + pins3: __dormant__ {
12014 + brcm,pins = <44 45>;
12015 + brcm,function = <5>; /* alt1 */
12016 + };
12017 + };
12018 +
12019 + fragment@4 {
12020 + target = <&i2c0_pins>;
12021 + pins4: __dormant__ {
12022 + brcm,pins = <46 47>;
12023 + brcm,function = <4>; /* alt0 */
12024 + };
12025 + };
12026 +
12027 + fragment@5 {
12028 + target = <&i2c0>;
12029 + __dormant__ {
12030 + compatible = "brcm,bcm2708-i2c";
12031 + };
12032 + };
12033 +
12034 + __overrides__ {
12035 + pins_0_1 = <0>,"+1-2-3-4";
12036 + pins_28_29 = <0>,"-1+2-3-4";
12037 + pins_44_45 = <0>,"-1-2+3-4";
12038 + pins_46_47 = <0>,"-1-2-3+4";
12039 + combine = <0>, "!5";
12040 + };
12041 +};
12042 diff --git a/arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts b/arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts
12043 new file mode 100644
12044 index 000000000000..09d8b16a6256
12045 --- /dev/null
12046 +++ b/arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts
12047 @@ -0,0 +1,9 @@
12048 +#include "i2c1-overlay.dts"
12049 +
12050 +/{
12051 + __overrides__ {
12052 + sda1_pin = <&pins1>,"brcm,pins:0", <&pins2>,"brcm,pins:0";
12053 + scl1_pin = <&pins1>,"brcm,pins:4", <&pins1>,"brcm,pins:4";
12054 + pin_func = <&pins1>,"brcm,function:0", <&pins2>,"brcm,function:0";
12055 + };
12056 +};
12057 diff --git a/arch/arm/boot/dts/overlays/i2c1-overlay.dts b/arch/arm/boot/dts/overlays/i2c1-overlay.dts
12058 new file mode 100644
12059 index 000000000000..addaed73e665
12060 --- /dev/null
12061 +++ b/arch/arm/boot/dts/overlays/i2c1-overlay.dts
12062 @@ -0,0 +1,44 @@
12063 +/dts-v1/;
12064 +/plugin/;
12065 +
12066 +/{
12067 + compatible = "brcm,bcm2835";
12068 +
12069 + fragment@0 {
12070 + target = <&i2c1>;
12071 + __overlay__ {
12072 + status = "okay";
12073 + pinctrl-names = "default";
12074 + pinctrl-0 = <&i2c1_pins>;
12075 + };
12076 + };
12077 +
12078 + fragment@1 {
12079 + target = <&i2c1_pins>;
12080 + pins1: __overlay__ {
12081 + brcm,pins = <2 3>;
12082 + brcm,function = <4>; /* alt 0 */
12083 + };
12084 + };
12085 +
12086 + fragment@2 {
12087 + target = <&i2c1_pins>;
12088 + pins2: __dormant__ {
12089 + brcm,pins = <44 45>;
12090 + brcm,function = <6>; /* alt 2 */
12091 + };
12092 + };
12093 +
12094 + fragment@3 {
12095 + target = <&i2c1>;
12096 + __dormant__ {
12097 + compatible = "brcm,bcm2708-i2c";
12098 + };
12099 + };
12100 +
12101 + __overrides__ {
12102 + pins_2_3 = <0>,"=1!2";
12103 + pins_44_45 = <0>,"!1=2";
12104 + combine = <0>, "!3";
12105 + };
12106 +};
12107 diff --git a/arch/arm/boot/dts/overlays/i2c3-overlay.dts b/arch/arm/boot/dts/overlays/i2c3-overlay.dts
12108 new file mode 100644
12109 index 000000000000..e24a1df21f99
12110 --- /dev/null
12111 +++ b/arch/arm/boot/dts/overlays/i2c3-overlay.dts
12112 @@ -0,0 +1,36 @@
12113 +/dts-v1/;
12114 +/plugin/;
12115 +
12116 +/{
12117 + compatible = "brcm,bcm2711";
12118 +
12119 + fragment@0 {
12120 + target = <&i2c3>;
12121 + frag0: __overlay__ {
12122 + status = "okay";
12123 + pinctrl-names = "default";
12124 + pinctrl-0 = <&i2c3_pins>;
12125 + clock-frequency = <100000>;
12126 + };
12127 + };
12128 +
12129 + fragment@1 {
12130 + target = <&i2c3_pins>;
12131 + __dormant__ {
12132 + brcm,pins = <2 3>;
12133 + };
12134 + };
12135 +
12136 + fragment@2 {
12137 + target = <&i2c3_pins>;
12138 + __overlay__ {
12139 + brcm,pins = <4 5>;
12140 + };
12141 + };
12142 +
12143 + __overrides__ {
12144 + pins_2_3 = <0>,"=1!2";
12145 + pins_4_5 = <0>,"!1=2";
12146 + baudrate = <&frag0>, "clock-frequency:0";
12147 + };
12148 +};
12149 diff --git a/arch/arm/boot/dts/overlays/i2c4-overlay.dts b/arch/arm/boot/dts/overlays/i2c4-overlay.dts
12150 new file mode 100644
12151 index 000000000000..14c7f4d1da4c
12152 --- /dev/null
12153 +++ b/arch/arm/boot/dts/overlays/i2c4-overlay.dts
12154 @@ -0,0 +1,36 @@
12155 +/dts-v1/;
12156 +/plugin/;
12157 +
12158 +/{
12159 + compatible = "brcm,bcm2711";
12160 +
12161 + fragment@0 {
12162 + target = <&i2c4>;
12163 + frag0: __overlay__ {
12164 + status = "okay";
12165 + pinctrl-names = "default";
12166 + pinctrl-0 = <&i2c4_pins>;
12167 + clock-frequency = <100000>;
12168 + };
12169 + };
12170 +
12171 + fragment@1 {
12172 + target = <&i2c4_pins>;
12173 + __dormant__ {
12174 + brcm,pins = <6 7>;
12175 + };
12176 + };
12177 +
12178 + fragment@2 {
12179 + target = <&i2c4_pins>;
12180 + __overlay__ {
12181 + brcm,pins = <8 9>;
12182 + };
12183 + };
12184 +
12185 + __overrides__ {
12186 + pins_6_7 = <0>,"=1!2";
12187 + pins_8_9 = <0>,"!1=2";
12188 + baudrate = <&frag0>, "clock-frequency:0";
12189 + };
12190 +};
12191 diff --git a/arch/arm/boot/dts/overlays/i2c5-overlay.dts b/arch/arm/boot/dts/overlays/i2c5-overlay.dts
12192 new file mode 100644
12193 index 000000000000..7953621112de
12194 --- /dev/null
12195 +++ b/arch/arm/boot/dts/overlays/i2c5-overlay.dts
12196 @@ -0,0 +1,36 @@
12197 +/dts-v1/;
12198 +/plugin/;
12199 +
12200 +/{
12201 + compatible = "brcm,bcm2711";
12202 +
12203 + fragment@0 {
12204 + target = <&i2c5>;
12205 + frag0: __overlay__ {
12206 + status = "okay";
12207 + pinctrl-names = "default";
12208 + pinctrl-0 = <&i2c5_pins>;
12209 + clock-frequency = <100000>;
12210 + };
12211 + };
12212 +
12213 + fragment@1 {
12214 + target = <&i2c5_pins>;
12215 + __dormant__ {
12216 + brcm,pins = <10 11>;
12217 + };
12218 + };
12219 +
12220 + fragment@2 {
12221 + target = <&i2c5_pins>;
12222 + __overlay__ {
12223 + brcm,pins = <12 13>;
12224 + };
12225 + };
12226 +
12227 + __overrides__ {
12228 + pins_10_11 = <0>,"=1!2";
12229 + pins_12_13 = <0>,"!1=2";
12230 + baudrate = <&frag0>, "clock-frequency:0";
12231 + };
12232 +};
12233 diff --git a/arch/arm/boot/dts/overlays/i2c6-overlay.dts b/arch/arm/boot/dts/overlays/i2c6-overlay.dts
12234 new file mode 100644
12235 index 000000000000..555305a7ee1f
12236 --- /dev/null
12237 +++ b/arch/arm/boot/dts/overlays/i2c6-overlay.dts
12238 @@ -0,0 +1,36 @@
12239 +/dts-v1/;
12240 +/plugin/;
12241 +
12242 +/{
12243 + compatible = "brcm,bcm2711";
12244 +
12245 + fragment@0 {
12246 + target = <&i2c6>;
12247 + frag0: __overlay__ {
12248 + status = "okay";
12249 + pinctrl-names = "default";
12250 + pinctrl-0 = <&i2c6_pins>;
12251 + clock-frequency = <100000>;
12252 + };
12253 + };
12254 +
12255 + fragment@1 {
12256 + target = <&i2c6_pins>;
12257 + __dormant__ {
12258 + brcm,pins = <0 1>;
12259 + };
12260 + };
12261 +
12262 + fragment@2 {
12263 + target = <&i2c6_pins>;
12264 + __overlay__ {
12265 + brcm,pins = <22 23>;
12266 + };
12267 + };
12268 +
12269 + __overrides__ {
12270 + pins_0_1 = <0>,"=1!2";
12271 + pins_22_23 = <0>,"!1=2";
12272 + baudrate = <&frag0>, "clock-frequency:0";
12273 + };
12274 +};
12275 diff --git a/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
12276 new file mode 100644
12277 index 000000000000..cf43094c6ff4
12278 --- /dev/null
12279 +++ b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
12280 @@ -0,0 +1,18 @@
12281 +/*
12282 + * Device tree overlay to move i2s to gpio 28 to 31 on CM
12283 + */
12284 +
12285 +/dts-v1/;
12286 +/plugin/;
12287 +
12288 +/ {
12289 + compatible = "brcm,bcm2835";
12290 +
12291 + fragment@0 {
12292 + target = <&i2s_pins>;
12293 + __overlay__ {
12294 + brcm,pins = <28 29 30 31>;
12295 + brcm,function = <6>; /* alt2 */
12296 + };
12297 + };
12298 +};
12299 diff --git a/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts b/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts
12300 new file mode 100644
12301 index 000000000000..551aba591d26
12302 --- /dev/null
12303 +++ b/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts
12304 @@ -0,0 +1,45 @@
12305 +// Device tree overlay for I2C connected Ilitek multiple touch controller
12306 +/dts-v1/;
12307 +/plugin/;
12308 +
12309 + / {
12310 + compatible = "brcm,bcm2835";
12311 +
12312 + fragment@0 {
12313 + target = <&gpio>;
12314 + __overlay__ {
12315 + ili251x_pins: ili251x_pins {
12316 + brcm,pins = <4>; // interrupt
12317 + brcm,function = <0>; // in
12318 + brcm,pull = <2>; // pull-up //
12319 + };
12320 + };
12321 + };
12322 +
12323 + fragment@1 {
12324 + target = <&i2c1>;
12325 + __overlay__ {
12326 + #address-cells = <1>;
12327 + #size-cells = <0>;
12328 + status = "okay";
12329 +
12330 + ili251x: ili251x@41 {
12331 + compatible = "ilitek,ili251x";
12332 + reg = <0x41>;
12333 + pinctrl-names = "default";
12334 + pinctrl-0 = <&ili251x_pins>;
12335 + interrupt-parent = <&gpio>;
12336 + interrupts = <4 8>; // high-to-low edge triggered
12337 + touchscreen-size-x = <16384>;
12338 + touchscreen-size-y = <9600>;
12339 + };
12340 + };
12341 + };
12342 +
12343 + __overrides__ {
12344 + interrupt = <&ili251x_pins>,"brcm,pins:0",
12345 + <&ili251x>,"interrupts:0";
12346 + sizex = <&ili251x>,"touchscreen-size-x:0";
12347 + sizey = <&ili251x>,"touchscreen-size-y:0";
12348 + };
12349 +};
12350 diff --git a/arch/arm/boot/dts/overlays/imx219-overlay.dts b/arch/arm/boot/dts/overlays/imx219-overlay.dts
12351 new file mode 100644
12352 index 000000000000..2a1500d07b68
12353 --- /dev/null
12354 +++ b/arch/arm/boot/dts/overlays/imx219-overlay.dts
12355 @@ -0,0 +1,129 @@
12356 +// SPDX-License-Identifier: GPL-2.0-only
12357 +// Definitions for IMX219 camera module on VC I2C bus
12358 +/dts-v1/;
12359 +/plugin/;
12360 +
12361 +#include <dt-bindings/gpio/gpio.h>
12362 +
12363 +/{
12364 + compatible = "brcm,bcm2835";
12365 +
12366 + fragment@0 {
12367 + target = <&i2c_vc>;
12368 + __overlay__ {
12369 + #address-cells = <1>;
12370 + #size-cells = <0>;
12371 + status = "okay";
12372 +
12373 + imx219: imx219@10 {
12374 + compatible = "sony,imx219";
12375 + reg = <0x10>;
12376 + status = "okay";
12377 +
12378 + clocks = <&imx219_clk>;
12379 + clock-names = "xclk";
12380 +
12381 + VANA-supply = <&imx219_vana>; /* 2.8v */
12382 + VDIG-supply = <&imx219_vdig>; /* 1.8v */
12383 + VDDL-supply = <&imx219_vddl>; /* 1.2v */
12384 +
12385 + imx219_clk: camera-clk {
12386 + compatible = "fixed-clock";
12387 + #clock-cells = <0>;
12388 + clock-frequency = <24000000>;
12389 + };
12390 +
12391 + port {
12392 + imx219_0: endpoint {
12393 + remote-endpoint = <&csi1_ep>;
12394 + clock-lanes = <0>;
12395 + data-lanes = <1 2>;
12396 + clock-noncontinuous;
12397 + link-frequencies =
12398 + /bits/ 64 <297000000>;
12399 + };
12400 + };
12401 + };
12402 + };
12403 + };
12404 +
12405 + fragment@1 {
12406 + target = <&csi1>;
12407 + __overlay__ {
12408 + status = "okay";
12409 +
12410 + port {
12411 + csi1_ep: endpoint {
12412 + remote-endpoint = <&imx219_0>;
12413 + };
12414 + };
12415 + };
12416 + };
12417 +
12418 + fragment@2 {
12419 + target = <&i2c0_pins>;
12420 + __dormant__ {
12421 + brcm,pins = <28 29>;
12422 + brcm,function = <4>; /* alt0 */
12423 + };
12424 + };
12425 + fragment@3 {
12426 + target = <&i2c0_pins>;
12427 + __overlay__ {
12428 + brcm,pins = <44 45>;
12429 + brcm,function = <5>; /* alt1 */
12430 + };
12431 + };
12432 + fragment@4 {
12433 + target = <&i2c0_pins>;
12434 + __dormant__ {
12435 + brcm,pins = <0 1>;
12436 + brcm,function = <4>; /* alt0 */
12437 + };
12438 + };
12439 + fragment@5 {
12440 + target = <&i2c_vc>;
12441 + __overlay__ {
12442 + status = "okay";
12443 + };
12444 + };
12445 +
12446 + fragment@6 {
12447 + target-path="/";
12448 + __overlay__ {
12449 + imx219_vana: fixedregulator@0 {
12450 + compatible = "regulator-fixed";
12451 + regulator-name = "imx219_vana";
12452 + regulator-min-microvolt = <2800000>;
12453 + regulator-max-microvolt = <2800000>;
12454 + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
12455 + enable-active-high;
12456 + };
12457 + imx219_vdig: fixedregulator@1 {
12458 + compatible = "regulator-fixed";
12459 + regulator-name = "imx219_vdig";
12460 + regulator-min-microvolt = <1800000>;
12461 + regulator-max-microvolt = <1800000>;
12462 + };
12463 + imx219_vddl: fixedregulator@2 {
12464 + compatible = "regulator-fixed";
12465 + regulator-name = "imx219_vddl";
12466 + regulator-min-microvolt = <1200000>;
12467 + regulator-max-microvolt = <1200000>;
12468 + };
12469 + };
12470 + };
12471 +
12472 + fragment@7 {
12473 + target-path="/__overrides__";
12474 + __overlay__ {
12475 + cam0-pwdn-ctrl = <&imx219_vana>,"gpio:0";
12476 + cam0-pwdn = <&imx219_vana>,"gpio:4";
12477 + };
12478 + };
12479 +
12480 + __overrides__ {
12481 + i2c_pins_0_1 = <0>,"-2-3+4";
12482 + i2c_pins_28_29 = <0>,"+2-3-4";
12483 + };
12484 +};
12485 diff --git a/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
12486 new file mode 100644
12487 index 000000000000..ff3ef3942c6c
12488 --- /dev/null
12489 +++ b/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
12490 @@ -0,0 +1,42 @@
12491 +// Definitions for IQaudIO CODEC
12492 +/dts-v1/;
12493 +/plugin/;
12494 +
12495 +/ {
12496 + compatible = "brcm,bcm2708";
12497 +
12498 + fragment@0 {
12499 + target = <&i2s>;
12500 + __overlay__ {
12501 + status = "okay";
12502 + };
12503 + };
12504 +
12505 + fragment@1 {
12506 + target = <&i2c1>;
12507 + __overlay__ {
12508 + #address-cells = <1>;
12509 + #size-cells = <0>;
12510 + status = "okay";
12511 +
12512 + da2713@1a {
12513 + #sound-dai-cells = <0>;
12514 + compatible = "dlg,da7213";
12515 + reg = <0x1a>;
12516 + status = "okay";
12517 + };
12518 + };
12519 + };
12520 +
12521 + fragment@2 {
12522 + target = <&sound>;
12523 + iqaudio_dac: __overlay__ {
12524 + compatible = "iqaudio,iqaudio-codec";
12525 + i2s-controller = <&i2s>;
12526 + status = "okay";
12527 + };
12528 + };
12529 +
12530 + __overrides__ {
12531 + };
12532 +};
12533 diff --git a/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
12534 new file mode 100644
12535 index 000000000000..24073cadd0ef
12536 --- /dev/null
12537 +++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
12538 @@ -0,0 +1,46 @@
12539 +// Definitions for IQaudIO DAC
12540 +/dts-v1/;
12541 +/plugin/;
12542 +
12543 +/ {
12544 + compatible = "brcm,bcm2835";
12545 +
12546 + fragment@0 {
12547 + target = <&i2s>;
12548 + __overlay__ {
12549 + status = "okay";
12550 + };
12551 + };
12552 +
12553 + fragment@1 {
12554 + target = <&i2c1>;
12555 + __overlay__ {
12556 + #address-cells = <1>;
12557 + #size-cells = <0>;
12558 + status = "okay";
12559 +
12560 + pcm5122@4c {
12561 + #sound-dai-cells = <0>;
12562 + compatible = "ti,pcm5122";
12563 + reg = <0x4c>;
12564 + AVDD-supply = <&vdd_3v3_reg>;
12565 + DVDD-supply = <&vdd_3v3_reg>;
12566 + CPVDD-supply = <&vdd_3v3_reg>;
12567 + status = "okay";
12568 + };
12569 + };
12570 + };
12571 +
12572 + fragment@2 {
12573 + target = <&sound>;
12574 + frag2: __overlay__ {
12575 + compatible = "iqaudio,iqaudio-dac";
12576 + i2s-controller = <&i2s>;
12577 + status = "okay";
12578 + };
12579 + };
12580 +
12581 + __overrides__ {
12582 + 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
12583 + };
12584 +};
12585 diff --git a/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
12586 new file mode 100644
12587 index 000000000000..7c70b25e58d7
12588 --- /dev/null
12589 +++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
12590 @@ -0,0 +1,49 @@
12591 +// Definitions for IQaudIO DAC+
12592 +/dts-v1/;
12593 +/plugin/;
12594 +
12595 +/ {
12596 + compatible = "brcm,bcm2835";
12597 +
12598 + fragment@0 {
12599 + target = <&i2s>;
12600 + __overlay__ {
12601 + status = "okay";
12602 + };
12603 + };
12604 +
12605 + fragment@1 {
12606 + target = <&i2c1>;
12607 + __overlay__ {
12608 + #address-cells = <1>;
12609 + #size-cells = <0>;
12610 + status = "okay";
12611 +
12612 + pcm5122@4c {
12613 + #sound-dai-cells = <0>;
12614 + compatible = "ti,pcm5122";
12615 + reg = <0x4c>;
12616 + AVDD-supply = <&vdd_3v3_reg>;
12617 + DVDD-supply = <&vdd_3v3_reg>;
12618 + CPVDD-supply = <&vdd_3v3_reg>;
12619 + status = "okay";
12620 + };
12621 + };
12622 + };
12623 +
12624 + fragment@2 {
12625 + target = <&sound>;
12626 + iqaudio_dac: __overlay__ {
12627 + compatible = "iqaudio,iqaudio-dac";
12628 + i2s-controller = <&i2s>;
12629 + mute-gpios = <&gpio 22 0>;
12630 + status = "okay";
12631 + };
12632 + };
12633 +
12634 + __overrides__ {
12635 + 24db_digital_gain = <&iqaudio_dac>,"iqaudio,24db_digital_gain?";
12636 + auto_mute_amp = <&iqaudio_dac>,"iqaudio-dac,auto-mute-amp?";
12637 + unmute_amp = <&iqaudio_dac>,"iqaudio-dac,unmute-amp?";
12638 + };
12639 +};
12640 diff --git a/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
12641 new file mode 100644
12642 index 000000000000..ee54095c869b
12643 --- /dev/null
12644 +++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
12645 @@ -0,0 +1,47 @@
12646 +// Definitions for IQAudIO Digi WM8804 audio board
12647 +/dts-v1/;
12648 +/plugin/;
12649 +
12650 +/ {
12651 + compatible = "brcm,bcm2835";
12652 +
12653 + fragment@0 {
12654 + target = <&i2s>;
12655 + __overlay__ {
12656 + status = "okay";
12657 + };
12658 + };
12659 +
12660 + fragment@1 {
12661 + target = <&i2c1>;
12662 + __overlay__ {
12663 + #address-cells = <1>;
12664 + #size-cells = <0>;
12665 + status = "okay";
12666 +
12667 + wm8804@3b {
12668 + #sound-dai-cells = <0>;
12669 + compatible = "wlf,wm8804";
12670 + reg = <0x3b>;
12671 + status = "okay";
12672 + DVDD-supply = <&vdd_3v3_reg>;
12673 + PVDD-supply = <&vdd_3v3_reg>;
12674 + };
12675 + };
12676 + };
12677 +
12678 + fragment@2 {
12679 + target = <&sound>;
12680 + wm8804_digi: __overlay__ {
12681 + compatible = "iqaudio,wm8804-digi";
12682 + i2s-controller = <&i2s>;
12683 + status = "okay";
12684 + };
12685 + };
12686 +
12687 + __overrides__ {
12688 + card_name = <&wm8804_digi>,"wm8804-digi,card-name";
12689 + dai_name = <&wm8804_digi>,"wm8804-digi,dai-name";
12690 + dai_stream_name = <&wm8804_digi>,"wm8804-digi,dai-stream-name";
12691 + };
12692 +};
12693 diff --git a/arch/arm/boot/dts/overlays/irs1125-overlay.dts b/arch/arm/boot/dts/overlays/irs1125-overlay.dts
12694 new file mode 100644
12695 index 000000000000..b9006715a539
12696 --- /dev/null
12697 +++ b/arch/arm/boot/dts/overlays/irs1125-overlay.dts
12698 @@ -0,0 +1,97 @@
12699 +// SPDX-License-Identifier: GPL-2.0-only
12700 +// Definitions for IRS1125 camera module on VC I2C bus
12701 +/dts-v1/;
12702 +/plugin/;
12703 +
12704 +/{
12705 + compatible = "brcm,bcm2835";
12706 +
12707 + fragment@0 {
12708 + target = <&i2c_vc>;
12709 + __overlay__ {
12710 + #address-cells = <1>;
12711 + #size-cells = <0>;
12712 + status = "okay";
12713 +
12714 + irs1125: irs1125@3D {
12715 + compatible = "infineon,irs1125";
12716 + reg = <0x3D>;
12717 + status = "okay";
12718 +
12719 + pwdn-gpios = <&gpio 5 0>;
12720 + clocks = <&irs1125_clk>;
12721 +
12722 + irs1125_clk: camera-clk {
12723 + compatible = "fixed-clock";
12724 + #clock-cells = <0>;
12725 + clock-frequency = <26000000>;
12726 + };
12727 +
12728 + port {
12729 + irs1125_0: endpoint {
12730 + remote-endpoint = <&csi1_ep>;
12731 + clock-lanes = <0>;
12732 + data-lanes = <1 2>;
12733 + clock-noncontinuous;
12734 + link-frequencies =
12735 + /bits/ 64 <297000000>;
12736 + };
12737 + };
12738 + };
12739 + };
12740 + };
12741 +
12742 + fragment@1 {
12743 + target = <&csi1>;
12744 + __overlay__ {
12745 + status = "okay";
12746 +
12747 + port {
12748 + csi1_ep: endpoint {
12749 + remote-endpoint = <&irs1125_0>;
12750 + };
12751 + };
12752 + };
12753 + };
12754 +
12755 + fragment@2 {
12756 + target = <&i2c0_pins>;
12757 + __dormant__ {
12758 + brcm,pins = <28 29>;
12759 + brcm,function = <4>; /* alt0 */
12760 + };
12761 + };
12762 + fragment@3 {
12763 + target = <&i2c0_pins>;
12764 + __overlay__ {
12765 + brcm,pins = <44 45>;
12766 + brcm,function = <5>; /* alt1 */
12767 + };
12768 + };
12769 + fragment@4 {
12770 + target = <&i2c0_pins>;
12771 + __dormant__ {
12772 + brcm,pins = <0 1>;
12773 + brcm,function = <4>; /* alt0 */
12774 + };
12775 + };
12776 + fragment@5 {
12777 + target = <&i2c_vc>;
12778 + __overlay__ {
12779 + status = "okay";
12780 + };
12781 + };
12782 +
12783 + fragment@6 {
12784 + target-path="/__overrides__";
12785 + __overlay__ {
12786 + cam0-pwdn-ctrl = <&irs1125>,"pwdn-gpios:0";
12787 + cam0-pwdn = <&irs1125>,"pwdn-gpios:4";
12788 + };
12789 + };
12790 +
12791 + __overrides__ {
12792 + i2c_pins_0_1 = <0>,"-2-3+4";
12793 + i2c_pins_28_29 = <0>,"+2-3-4";
12794 + };
12795 +};
12796 diff --git a/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
12797 new file mode 100644
12798 index 000000000000..585c7dbcdf7f
12799 --- /dev/null
12800 +++ b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
12801 @@ -0,0 +1,309 @@
12802 +// Overlay for JEDEC SPI-NOR Flash Devices (aka m25p80)
12803 +
12804 +// dtparams:
12805 +// flash-spi<n>-<m> - Enables flash device on SPI<n>, CS#<m>.
12806 +// flash-fastr-spi<n>-<m> - Enables flash device with fast read capability on SPI<n>, CS#<m>.
12807 +//
12808 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
12809 +//
12810 +// Example: A single flash device with fast read capability on SPI0, CS#0:
12811 +// dtoverlay=jedec-spi-nor:flash-fastr-spi0-0
12812 +
12813 +/dts-v1/;
12814 +/plugin/;
12815 +
12816 +/ {
12817 + compatible = "brcm,bcm2835";
12818 +
12819 + // disable spi-dev on spi0.0
12820 + fragment@0 {
12821 + target = <&spidev0>;
12822 + __dormant__ {
12823 + status = "disabled";
12824 + };
12825 + };
12826 +
12827 + // disable spi-dev on spi0.1
12828 + fragment@1 {
12829 + target = <&spidev1>;
12830 + __dormant__ {
12831 + status = "disabled";
12832 + };
12833 + };
12834 +
12835 + // disable spi-dev on spi1.0
12836 + fragment@2 {
12837 + target-path = "spi1/spidev@0";
12838 + __dormant__ {
12839 + status = "disabled";
12840 + };
12841 + };
12842 +
12843 + // disable spi-dev on spi1.1
12844 + fragment@3 {
12845 + target-path = "spi1/spidev@1";
12846 + __dormant__ {
12847 + status = "disabled";
12848 + };
12849 + };
12850 +
12851 + // disable spi-dev on spi1.2
12852 + fragment@4 {
12853 + target-path = "spi1/spidev@2";
12854 + __dormant__ {
12855 + status = "disabled";
12856 + };
12857 + };
12858 +
12859 + // disable spi-dev on spi2.0
12860 + fragment@5 {
12861 + target-path = "spi2/spidev@0";
12862 + __dormant__ {
12863 + status = "disabled";
12864 + };
12865 + };
12866 +
12867 + // disable spi-dev on spi2.1
12868 + fragment@6 {
12869 + target-path = "spi2/spidev@1";
12870 + __dormant__ {
12871 + status = "disabled";
12872 + };
12873 + };
12874 +
12875 + // disable spi-dev on spi2.2
12876 + fragment@7 {
12877 + target-path = "spi2/spidev@2";
12878 + __dormant__ {
12879 + status = "disabled";
12880 + };
12881 + };
12882 +
12883 + // enable flash on spi0.0
12884 + fragment@8 {
12885 + target = <&spi0>;
12886 + __dormant__ {
12887 + status = "okay";
12888 + #address-cells = <1>;
12889 + #size-cells = <0>;
12890 + spi_nor_00: spi_nor@0 {
12891 + #address-cells = <1>;
12892 + #size-cells = <1>;
12893 + compatible = "jedec,spi-nor";
12894 + reg = <0>;
12895 + spi-max-frequency = <500000>;
12896 + };
12897 + };
12898 + };
12899 +
12900 + // enable flash on spi0.1
12901 + fragment@9 {
12902 + target = <&spi0>;
12903 + __dormant__ {
12904 + status = "okay";
12905 + #address-cells = <1>;
12906 + #size-cells = <0>;
12907 + spi_nor_01: spi_nor@1 {
12908 + #address-cells = <1>;
12909 + #size-cells = <1>;
12910 + compatible = "jedec,spi-nor";
12911 + reg = <1>;
12912 + spi-max-frequency = <500000>;
12913 + };
12914 + };
12915 + };
12916 +
12917 + // enable flash on spi1.0
12918 + fragment@10 {
12919 + target = <&spi1>;
12920 + __dormant__ {
12921 + status = "okay";
12922 + #address-cells = <1>;
12923 + #size-cells = <0>;
12924 + spi_nor_10: spi_nor@0 {
12925 + #address-cells = <1>;
12926 + #size-cells = <1>;
12927 + compatible = "jedec,spi-nor";
12928 + reg = <0>;
12929 + spi-max-frequency = <500000>;
12930 + };
12931 + };
12932 + };
12933 +
12934 + // enable flash on spi1.1
12935 + fragment@11 {
12936 + target = <&spi1>;
12937 + __dormant__ {
12938 + status = "okay";
12939 + #address-cells = <1>;
12940 + #size-cells = <0>;
12941 + spi_nor_11: spi_nor@1 {
12942 + #address-cells = <1>;
12943 + #size-cells = <1>;
12944 + compatible = "jedec,spi-nor";
12945 + reg = <1>;
12946 + spi-max-frequency = <500000>;
12947 + };
12948 + };
12949 + };
12950 +
12951 + // enable flash on spi1.2
12952 + fragment@12 {
12953 + target = <&spi1>;
12954 + __dormant__ {
12955 + status = "okay";
12956 + #address-cells = <1>;
12957 + #size-cells = <0>;
12958 + spi_nor_12: spi_nor@2 {
12959 + #address-cells = <1>;
12960 + #size-cells = <1>;
12961 + compatible = "jedec,spi-nor";
12962 + reg = <2>;
12963 + spi-max-frequency = <500000>;
12964 + };
12965 + };
12966 + };
12967 +
12968 + // enable flash on spi2.0
12969 + fragment@13 {
12970 + target = <&spi2>;
12971 + __dormant__ {
12972 + status = "okay";
12973 + #address-cells = <1>;
12974 + #size-cells = <0>;
12975 + spi_nor_20: spi_nor@0 {
12976 + #address-cells = <1>;
12977 + #size-cells = <1>;
12978 + compatible = "jedec,spi-nor";
12979 + reg = <0>;
12980 + spi-max-frequency = <500000>;
12981 + };
12982 + };
12983 + };
12984 +
12985 + // enable flash on spi2.1
12986 + fragment@14 {
12987 + target = <&spi2>;
12988 + __dormant__ {
12989 + status = "okay";
12990 + #address-cells = <1>;
12991 + #size-cells = <0>;
12992 + spi_nor_21: spi_nor@1 {
12993 + #address-cells = <1>;
12994 + #size-cells = <1>;
12995 + compatible = "jedec,spi-nor";
12996 + reg = <1>;
12997 + spi-max-frequency = <500000>;
12998 + };
12999 + };
13000 + };
13001 +
13002 + // enable flash on spi2.2
13003 + fragment@15 {
13004 + target = <&spi2>;
13005 + __dormant__ {
13006 + status = "okay";
13007 + #address-cells = <1>;
13008 + #size-cells = <0>;
13009 + spi_nor_22: spi_nor@2 {
13010 + #address-cells = <1>;
13011 + #size-cells = <1>;
13012 + compatible = "jedec,spi-nor";
13013 + reg = <2>;
13014 + spi-max-frequency = <500000>;
13015 + };
13016 + };
13017 + };
13018 +
13019 + // Enable fast read for device on spi0.0.
13020 + // Use default active low interrupt signalling.
13021 + fragment@16 {
13022 + target = <&spi_nor_00>;
13023 + __dormant__ {
13024 + m25p,fast-read;
13025 + };
13026 + };
13027 +
13028 + // Enable fast read for device on spi0.1.
13029 + // Use default active low interrupt signalling.
13030 + fragment@17 {
13031 + target = <&spi_nor_01>;
13032 + __dormant__ {
13033 + m25p,fast-read;
13034 + };
13035 + };
13036 +
13037 + // Enable fast read for device on spi1.0.
13038 + // Use default active low interrupt signalling.
13039 + fragment@18 {
13040 + target = <&spi_nor_10>;
13041 + __dormant__ {
13042 + m25p,fast-read;
13043 + };
13044 + };
13045 +
13046 + // Enable fast read for device on spi1.1.
13047 + // Use default active low interrupt signalling.
13048 + fragment@19 {
13049 + target = <&spi_nor_11>;
13050 + __dormant__ {
13051 + m25p,fast-read;
13052 + };
13053 + };
13054 +
13055 + // Enable fast read for device on spi1.2.
13056 + // Use default active low interrupt signalling.
13057 + fragment@20 {
13058 + target = <&spi_nor_12>;
13059 + __dormant__ {
13060 + m25p,fast-read;
13061 + };
13062 + };
13063 +
13064 + // Enable fast read for device on spi2.0.
13065 + // Use default active low interrupt signalling.
13066 + fragment@21 {
13067 + target = <&spi_nor_20>;
13068 + __dormant__ {
13069 + m25p,fast-read;
13070 + };
13071 + };
13072 +
13073 + // Enable fast read for device on spi2.1.
13074 + // Use default active low interrupt signalling.
13075 + fragment@22 {
13076 + target = <&spi_nor_21>;
13077 + __dormant__ {
13078 + m25p,fast-read;
13079 + };
13080 + };
13081 +
13082 + // Enable fast read for device on spi2.2.
13083 + // Use default active low interrupt signalling.
13084 + fragment@23 {
13085 + target = <&spi_nor_22>;
13086 + __dormant__ {
13087 + m25p,fast-read;
13088 + };
13089 + };
13090 +
13091 + __overrides__ {
13092 + flash-spi0-0 = <0>,"+0+8";
13093 + flash-spi0-1 = <0>,"+1+9";
13094 + flash-spi1-0 = <0>,"+2+10";
13095 + flash-spi1-1 = <0>,"+3+11";
13096 + flash-spi1-2 = <0>,"+4+12";
13097 + flash-spi2-0 = <0>,"+5+13";
13098 + flash-spi2-1 = <0>,"+6+14";
13099 + flash-spi2-2 = <0>,"+7+15";
13100 + flash-fastr-spi0-0 = <0>,"+0+8+16";
13101 + flash-fastr-spi0-1 = <0>,"+1+9+17";
13102 + flash-fastr-spi1-0 = <0>,"+2+10+18";
13103 + flash-fastr-spi1-1 = <0>,"+3+11+19";
13104 + flash-fastr-spi1-2 = <0>,"+4+12+20";
13105 + flash-fastr-spi2-0 = <0>,"+5+13+21";
13106 + flash-fastr-spi2-1 = <0>,"+6+14+22";
13107 + flash-fastr-spi2-2 = <0>,"+7+15+23";
13108 + };
13109 +};
13110 +
13111 diff --git a/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
13112 new file mode 100644
13113 index 000000000000..d00515dca419
13114 --- /dev/null
13115 +++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
13116 @@ -0,0 +1,46 @@
13117 +// Definitions for JustBoom DAC
13118 +/dts-v1/;
13119 +/plugin/;
13120 +
13121 +/ {
13122 + compatible = "brcm,bcm2835";
13123 +
13124 + fragment@0 {
13125 + target = <&i2s>;
13126 + __overlay__ {
13127 + status = "okay";
13128 + };
13129 + };
13130 +
13131 + fragment@1 {
13132 + target = <&i2c1>;
13133 + __overlay__ {
13134 + #address-cells = <1>;
13135 + #size-cells = <0>;
13136 + status = "okay";
13137 +
13138 + pcm5122@4d {
13139 + #sound-dai-cells = <0>;
13140 + compatible = "ti,pcm5122";
13141 + reg = <0x4d>;
13142 + AVDD-supply = <&vdd_3v3_reg>;
13143 + DVDD-supply = <&vdd_3v3_reg>;
13144 + CPVDD-supply = <&vdd_3v3_reg>;
13145 + status = "okay";
13146 + };
13147 + };
13148 + };
13149 +
13150 + fragment@2 {
13151 + target = <&sound>;
13152 + frag2: __overlay__ {
13153 + compatible = "justboom,justboom-dac";
13154 + i2s-controller = <&i2s>;
13155 + status = "okay";
13156 + };
13157 + };
13158 +
13159 + __overrides__ {
13160 + 24db_digital_gain = <&frag2>,"justboom,24db_digital_gain?";
13161 + };
13162 +};
13163 diff --git a/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
13164 new file mode 100644
13165 index 000000000000..e73336029c54
13166 --- /dev/null
13167 +++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
13168 @@ -0,0 +1,41 @@
13169 +// Definitions for JustBoom Digi
13170 +/dts-v1/;
13171 +/plugin/;
13172 +
13173 +/ {
13174 + compatible = "brcm,bcm2835";
13175 +
13176 + fragment@0 {
13177 + target = <&i2s>;
13178 + __overlay__ {
13179 + status = "okay";
13180 + };
13181 + };
13182 +
13183 + fragment@1 {
13184 + target = <&i2c1>;
13185 + __overlay__ {
13186 + #address-cells = <1>;
13187 + #size-cells = <0>;
13188 + status = "okay";
13189 +
13190 + wm8804@3b {
13191 + #sound-dai-cells = <0>;
13192 + compatible = "wlf,wm8804";
13193 + reg = <0x3b>;
13194 + PVDD-supply = <&vdd_3v3_reg>;
13195 + DVDD-supply = <&vdd_3v3_reg>;
13196 + status = "okay";
13197 + };
13198 + };
13199 + };
13200 +
13201 + fragment@2 {
13202 + target = <&sound>;
13203 + __overlay__ {
13204 + compatible = "justboom,justboom-digi";
13205 + i2s-controller = <&i2s>;
13206 + status = "okay";
13207 + };
13208 + };
13209 +};
13210 diff --git a/arch/arm/boot/dts/overlays/ltc294x-overlay.dts b/arch/arm/boot/dts/overlays/ltc294x-overlay.dts
13211 new file mode 100644
13212 index 000000000000..6d971f3649ca
13213 --- /dev/null
13214 +++ b/arch/arm/boot/dts/overlays/ltc294x-overlay.dts
13215 @@ -0,0 +1,86 @@
13216 +/dts-v1/;
13217 +/plugin/;
13218 +
13219 +
13220 +/ {
13221 + compatible = "brcm,bcm2835";
13222 +
13223 + fragment@0 {
13224 + target = <&i2c_arm>;
13225 + __dormant__ {
13226 + #address-cells = <1>;
13227 + #size-cells = <0>;
13228 + status = "okay";
13229 +
13230 + ltc2941: ltc2941@64 {
13231 + compatible = "lltc,ltc2941";
13232 + reg = <0x64>;
13233 + lltc,resistor-sense = <50>;
13234 + lltc,prescaler-exponent = <7>;
13235 + };
13236 + };
13237 + };
13238 +
13239 + fragment@1 {
13240 + target = <&i2c_arm>;
13241 + __dormant__ {
13242 + #address-cells = <1>;
13243 + #size-cells = <0>;
13244 + status = "okay";
13245 +
13246 + ltc2942: ltc2942@64 {
13247 + compatible = "lltc,ltc2942";
13248 + reg = <0x64>;
13249 + lltc,resistor-sense = <50>;
13250 + lltc,prescaler-exponent = <7>;
13251 + };
13252 + };
13253 + };
13254 +
13255 + fragment@2 {
13256 + target = <&i2c_arm>;
13257 + __dormant__ {
13258 + #address-cells = <1>;
13259 + #size-cells = <0>;
13260 + status = "okay";
13261 +
13262 + ltc2943: ltc2943@64 {
13263 + compatible = "lltc,ltc2943";
13264 + reg = <0x64>;
13265 + lltc,resistor-sense = <50>;
13266 + lltc,prescaler-exponent = <7>;
13267 + };
13268 + };
13269 + };
13270 +
13271 + fragment@3 {
13272 + target = <&i2c_arm>;
13273 + __dormant__ {
13274 + #address-cells = <1>;
13275 + #size-cells = <0>;
13276 + status = "okay";
13277 +
13278 + ltc2944: ltc2944@64 {
13279 + compatible = "lltc,ltc2944";
13280 + reg = <0x64>;
13281 + lltc,resistor-sense = <50>;
13282 + lltc,prescaler-exponent = <7>;
13283 + };
13284 + };
13285 + };
13286 +
13287 + __overrides__ {
13288 + ltc2941 = <0>,"+0";
13289 + ltc2942 = <0>,"+1";
13290 + ltc2943 = <0>,"+2";
13291 + ltc2944 = <0>,"+3";
13292 + resistor-sense = <&ltc2941>, "lltc,resistor-sense:0",
13293 + <&ltc2942>, "lltc,resistor-sense:0",
13294 + <&ltc2943>, "lltc,resistor-sense:0",
13295 + <&ltc2944>, "lltc,resistor-sense:0";
13296 + prescaler-exponent = <&ltc2941>, "lltc,prescaler-exponent:0",
13297 + <&ltc2942>, "lltc,prescaler-exponent:0",
13298 + <&ltc2943>, "lltc,prescaler-exponent:0",
13299 + <&ltc2944>, "lltc,prescaler-exponent:0";
13300 + };
13301 +};
13302 diff --git a/arch/arm/boot/dts/overlays/max98357a-overlay.dts b/arch/arm/boot/dts/overlays/max98357a-overlay.dts
13303 new file mode 100644
13304 index 000000000000..9e2afb05b7cb
13305 --- /dev/null
13306 +++ b/arch/arm/boot/dts/overlays/max98357a-overlay.dts
13307 @@ -0,0 +1,84 @@
13308 +// Overlay for Maxim MAX98357A audio DAC
13309 +
13310 +// dtparams:
13311 +// no-sdmode - SD_MODE pin not managed by driver.
13312 +// sdmode-pin - Specify GPIO pin to which SD_MODE is connected (default 4).
13313 +
13314 +/dts-v1/;
13315 +/plugin/;
13316 +
13317 +/ {
13318 + compatible = "brcm,bcm2835";
13319 +
13320 + /* Enable I2S */
13321 + fragment@0 {
13322 + target = <&i2s>;
13323 + __overlay__ {
13324 + status = "okay";
13325 + };
13326 + };
13327 +
13328 + /* DAC whose SD_MODE pin is managed by driver (via GPIO pin) */
13329 + fragment@1 {
13330 + target-path = "/";
13331 + __overlay__ {
13332 + max98357a_dac: max98357a {
13333 + compatible = "maxim,max98357a";
13334 + #sound-dai-cells = <0>;
13335 + sdmode-gpios = <&gpio 4 0>; /* 2nd word overwritten by sdmode-pin parameter */
13336 + status = "okay";
13337 + };
13338 + };
13339 + };
13340 +
13341 + /* DAC whose SD_MODE pin is not managed by driver */
13342 + fragment@2 {
13343 + target-path = "/";
13344 + __dormant__ {
13345 + max98357a_nsd: max98357a {
13346 + compatible = "maxim,max98357a";
13347 + #sound-dai-cells = <0>;
13348 + status = "okay";
13349 + };
13350 + };
13351 + };
13352 +
13353 + /* Soundcard connecting I2S to DAC with SD_MODE */
13354 + fragment@3 {
13355 + target = <&sound>;
13356 + __overlay__ {
13357 + compatible = "simple-audio-card";
13358 + simple-audio-card,format = "i2s";
13359 + simple-audio-card,name = "MAX98357A";
13360 + status = "okay";
13361 + simple-audio-card,cpu {
13362 + sound-dai = <&i2s>;
13363 + };
13364 + simple-audio-card,codec {
13365 + sound-dai = <&max98357a_dac>;
13366 + };
13367 + };
13368 + };
13369 +
13370 + /* Soundcard connecting I2S to DAC without SD_MODE */
13371 + fragment@4 {
13372 + target = <&sound>;
13373 + __dormant__ {
13374 + compatible = "simple-audio-card";
13375 + simple-audio-card,format = "i2s";
13376 + simple-audio-card,name = "MAX98357A";
13377 + status = "okay";
13378 + simple-audio-card,cpu {
13379 + sound-dai = <&i2s>;
13380 + };
13381 + simple-audio-card,codec {
13382 + sound-dai = <&max98357a_nsd>;
13383 + };
13384 + };
13385 + };
13386 +
13387 + __overrides__ {
13388 + no-sdmode = <0>,"-1+2-3+4";
13389 + sdmode-pin = <&max98357a_dac>,"sdmode-gpios:4";
13390 + };
13391 +};
13392 diff --git a/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
13393 new file mode 100644
13394 index 000000000000..840dd9b31db4
13395 --- /dev/null
13396 +++ b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
13397 @@ -0,0 +1,64 @@
13398 +// Definitions for mbed DAC
13399 +/dts-v1/;
13400 +/plugin/;
13401 +
13402 +/ {
13403 + compatible = "brcm,bcm2835";
13404 +
13405 + fragment@0 {
13406 + target = <&i2s>;
13407 + __overlay__ {
13408 + status = "okay";
13409 + };
13410 + };
13411 +
13412 + fragment@1 {
13413 + target = <&i2c1>;
13414 + __overlay__ {
13415 + #address-cells = <1>;
13416 + #size-cells = <0>;
13417 + status = "okay";
13418 +
13419 + tlv320aic23: codec@1a {
13420 + #sound-dai-cells = <0>;
13421 + reg = <0x1a>;
13422 + compatible = "ti,tlv320aic23";
13423 + status = "okay";
13424 + };
13425 + };
13426 + };
13427 +
13428 + fragment@2 {
13429 + target = <&sound>;
13430 + __overlay__ {
13431 + compatible = "simple-audio-card";
13432 + i2s-controller = <&i2s>;
13433 + status = "okay";
13434 +
13435 + simple-audio-card,name = "mbed-DAC";
13436 +
13437 + simple-audio-card,widgets =
13438 + "Microphone", "Mic Jack",
13439 + "Line", "Line In",
13440 + "Headphone", "Headphone Jack";
13441 +
13442 + simple-audio-card,routing =
13443 + "Headphone Jack", "LHPOUT",
13444 + "Headphone Jack", "RHPOUT",
13445 + "LLINEIN", "Line In",
13446 + "RLINEIN", "Line In",
13447 + "MICIN", "Mic Jack";
13448 +
13449 + simple-audio-card,format = "i2s";
13450 +
13451 + simple-audio-card,cpu {
13452 + sound-dai = <&i2s>;
13453 + };
13454 +
13455 + sound_master: simple-audio-card,codec {
13456 + sound-dai = <&tlv320aic23>;
13457 + system-clock-frequency = <12288000>;
13458 + };
13459 + };
13460 + };
13461 +};
13462 diff --git a/arch/arm/boot/dts/overlays/mcp23017-overlay.dts b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
13463 new file mode 100644
13464 index 000000000000..16af971c3bdb
13465 --- /dev/null
13466 +++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
13467 @@ -0,0 +1,71 @@
13468 +// Definitions for MCP23017 Gpio Extender from Microchip Semiconductor
13469 +
13470 +/dts-v1/;
13471 +/plugin/;
13472 +
13473 +/ {
13474 + compatible = "brcm,bcm2835";
13475 +
13476 + fragment@0 {
13477 + target = <&i2c1>;
13478 + __overlay__ {
13479 + status = "okay";
13480 + };
13481 + };
13482 +
13483 + fragment@1 {
13484 + target = <&gpio>;
13485 + __overlay__ {
13486 + mcp23017_pins: mcp23017_pins@20 {
13487 + brcm,pins = <4>;
13488 + brcm,function = <0>;
13489 + };
13490 + };
13491 + };
13492 +
13493 + fragment@2 {
13494 + target = <&i2c1>;
13495 + __overlay__ {
13496 + #address-cells = <1>;
13497 + #size-cells = <0>;
13498 +
13499 + mcp23017: mcp@20 {
13500 + compatible = "microchip,mcp23017";
13501 + reg = <0x20>;
13502 + gpio-controller;
13503 + #gpio-cells = <2>;
13504 +
13505 + status = "okay";
13506 + };
13507 + };
13508 + };
13509 +
13510 + fragment@3 {
13511 + target = <&mcp23017>;
13512 + __dormant__ {
13513 + compatible = "microchip,mcp23008";
13514 + };
13515 + };
13516 +
13517 + fragment@4 {
13518 + target = <&i2c1>;
13519 + __overlay__ {
13520 + mcp23017_irq: mcp@20 {
13521 + #interrupt-cells=<2>;
13522 + interrupt-parent = <&gpio>;
13523 + interrupts = <4 2>;
13524 + interrupt-controller;
13525 + microchip,irq-mirror;
13526 + };
13527 + };
13528 + };
13529 +
13530 + __overrides__ {
13531 + gpiopin = <&mcp23017_pins>,"brcm,pins:0",
13532 + <&mcp23017_irq>,"interrupts:0";
13533 + addr = <&mcp23017>,"reg:0", <&mcp23017_pins>,"reg:0";
13534 + mcp23008 = <0>,"=3";
13535 + noints = <0>,"!1!4";
13536 + };
13537 +};
13538 +
13539 diff --git a/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
13540 new file mode 100644
13541 index 000000000000..484d64b225fb
13542 --- /dev/null
13543 +++ b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
13544 @@ -0,0 +1,732 @@
13545 +// Overlay for MCP23S08/17 GPIO Extenders from Microchip Semiconductor
13546 +
13547 +// dtparams:
13548 +// s08-spi<n>-<m>-present - 4-bit integer, bitmap indicating MCP23S08 devices present on SPI<n>, CS#<m>.
13549 +// s17-spi<n>-<m>-present - 8-bit integer, bitmap indicating MCP23S17 devices present on SPI<n>, CS#<m>.
13550 +// s08-spi<n>-<m>-int-gpio - integer, enables interrupts on a single MCP23S08 device on SPI<n>, CS#<m>, specifies the GPIO pin to which INT output is connected.
13551 +// s17-spi<n>-<m>-int-gpio - integer, enables mirrored interrupts on a single MCP23S17 device on SPI<n>, CS#<m>, specifies the GPIO pin to which either INTA or INTB output is connected.
13552 +//
13553 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
13554 +// If interrupts are enabled for a device on a given CS# on a SPI bus, that device must be the only one present on that SPI bus/CS#.
13555 +//
13556 +// Example 1: A single MCP23S17 device on SPI0, CS#0 with its SPI addr set to 0 and INTA output connected to GPIO25:
13557 +// dtoverlay=mcp23s17:s17-spi0-0-present=1,s17-spi0-0-int-gpio=25
13558 +//
13559 +// Example 2: Two MCP23S08 devices on SPI1, CS#0 with their addrs set to 2 and 3. Three MCP23S17 devices on SPI1, CS#1 with their addrs set to 0, 1 and 7:
13560 +// dtoverlay=spi1-2cs
13561 +// dtoverlay=mcp23s17:s08-spi1-0-present=12,s17-spi1-1-present=131
13562 +
13563 +/dts-v1/;
13564 +/plugin/;
13565 +
13566 +/ {
13567 + compatible = "brcm,bcm2835";
13568 +
13569 + // disable spi-dev on spi0.0
13570 + fragment@0 {
13571 + target = <&spidev0>;
13572 + __dormant__ {
13573 + status = "disabled";
13574 + };
13575 + };
13576 +
13577 + // disable spi-dev on spi0.1
13578 + fragment@1 {
13579 + target = <&spidev1>;
13580 + __dormant__ {
13581 + status = "disabled";
13582 + };
13583 + };
13584 +
13585 + // disable spi-dev on spi1.0
13586 + fragment@2 {
13587 + target-path = "spi1/spidev@0";
13588 + __dormant__ {
13589 + status = "disabled";
13590 + };
13591 + };
13592 +
13593 + // disable spi-dev on spi1.1
13594 + fragment@3 {
13595 + target-path = "spi1/spidev@1";
13596 + __dormant__ {
13597 + status = "disabled";
13598 + };
13599 + };
13600 +
13601 + // disable spi-dev on spi1.2
13602 + fragment@4 {
13603 + target-path = "spi1/spidev@2";
13604 + __dormant__ {
13605 + status = "disabled";
13606 + };
13607 + };
13608 +
13609 + // disable spi-dev on spi2.0
13610 + fragment@5 {
13611 + target-path = "spi2/spidev@0";
13612 + __dormant__ {
13613 + status = "disabled";
13614 + };
13615 + };
13616 +
13617 + // disable spi-dev on spi2.1
13618 + fragment@6 {
13619 + target-path = "spi2/spidev@1";
13620 + __dormant__ {
13621 + status = "disabled";
13622 + };
13623 + };
13624 +
13625 + // disable spi-dev on spi2.2
13626 + fragment@7 {
13627 + target-path = "spi2/spidev@2";
13628 + __dormant__ {
13629 + status = "disabled";
13630 + };
13631 + };
13632 +
13633 + // enable one or more mcp23s08s on spi0.0
13634 + fragment@8 {
13635 + target = <&spi0>;
13636 + __dormant__ {
13637 + status = "okay";
13638 + #address-cells = <1>;
13639 + #size-cells = <0>;
13640 + mcp23s08_00: mcp23s08@0 {
13641 + compatible = "microchip,mcp23s08";
13642 + gpio-controller;
13643 + #gpio-cells = <2>;
13644 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-0-present parameter */
13645 + reg = <0>;
13646 + spi-max-frequency = <500000>;
13647 + status = "okay";
13648 + #interrupt-cells=<2>;
13649 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-0-int-gpio parameter */
13650 + };
13651 + };
13652 + };
13653 +
13654 + // enable one or more mcp23s08s on spi0.1
13655 + fragment@9 {
13656 + target = <&spi0>;
13657 + __dormant__ {
13658 + status = "okay";
13659 + #address-cells = <1>;
13660 + #size-cells = <0>;
13661 + mcp23s08_01: mcp23s08@1 {
13662 + compatible = "microchip,mcp23s08";
13663 + gpio-controller;
13664 + #gpio-cells = <2>;
13665 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-1-present parameter */
13666 + reg = <1>;
13667 + spi-max-frequency = <500000>;
13668 + status = "okay";
13669 + #interrupt-cells=<2>;
13670 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-1-int-gpio parameter */
13671 + };
13672 + };
13673 + };
13674 +
13675 + // enable one or more mcp23s08s on spi1.0
13676 + fragment@10 {
13677 + target = <&spi1>;
13678 + __dormant__ {
13679 + status = "okay";
13680 + #address-cells = <1>;
13681 + #size-cells = <0>;
13682 + mcp23s08_10: mcp23s08@0 {
13683 + compatible = "microchip,mcp23s08";
13684 + gpio-controller;
13685 + #gpio-cells = <2>;
13686 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-0-present parameter */
13687 + reg = <0>;
13688 + spi-max-frequency = <500000>;
13689 + status = "okay";
13690 + #interrupt-cells=<2>;
13691 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-0-int-gpio parameter */
13692 + };
13693 + };
13694 + };
13695 +
13696 + // enable one or more mcp23s08s on spi1.1
13697 + fragment@11 {
13698 + target = <&spi1>;
13699 + __dormant__ {
13700 + status = "okay";
13701 + #address-cells = <1>;
13702 + #size-cells = <0>;
13703 + mcp23s08_11: mcp23s08@1 {
13704 + compatible = "microchip,mcp23s08";
13705 + gpio-controller;
13706 + #gpio-cells = <2>;
13707 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-1-present parameter */
13708 + reg = <1>;
13709 + spi-max-frequency = <500000>;
13710 + status = "okay";
13711 + #interrupt-cells=<2>;
13712 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-1-int-gpio parameter */
13713 + };
13714 + };
13715 + };
13716 +
13717 + // enable one or more mcp23s08s on spi1.2
13718 + fragment@12 {
13719 + target = <&spi1>;
13720 + __dormant__ {
13721 + status = "okay";
13722 + #address-cells = <1>;
13723 + #size-cells = <0>;
13724 + mcp23s08_12: mcp23s08@2 {
13725 + compatible = "microchip,mcp23s08";
13726 + gpio-controller;
13727 + #gpio-cells = <2>;
13728 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-2-present parameter */
13729 + reg = <2>;
13730 + spi-max-frequency = <500000>;
13731 + status = "okay";
13732 + #interrupt-cells=<2>;
13733 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-2-int-gpio parameter */
13734 + };
13735 + };
13736 + };
13737 +
13738 + // enable one or more mcp23s08s on spi2.0
13739 + fragment@13 {
13740 + target = <&spi2>;
13741 + __dormant__ {
13742 + status = "okay";
13743 + #address-cells = <1>;
13744 + #size-cells = <0>;
13745 + mcp23s08_20: mcp23s08@0 {
13746 + compatible = "microchip,mcp23s08";
13747 + gpio-controller;
13748 + #gpio-cells = <2>;
13749 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-0-present parameter */
13750 + reg = <0>;
13751 + spi-max-frequency = <500000>;
13752 + status = "okay";
13753 + #interrupt-cells=<2>;
13754 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-0-int-gpio parameter */
13755 + };
13756 + };
13757 + };
13758 +
13759 + // enable one or more mcp23s08s on spi2.1
13760 + fragment@14 {
13761 + target = <&spi2>;
13762 + __dormant__ {
13763 + status = "okay";
13764 + #address-cells = <1>;
13765 + #size-cells = <0>;
13766 + mcp23s08_21: mcp23s08@1 {
13767 + compatible = "microchip,mcp23s08";
13768 + gpio-controller;
13769 + #gpio-cells = <2>;
13770 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-1-present parameter */
13771 + reg = <1>;
13772 + spi-max-frequency = <500000>;
13773 + status = "okay";
13774 + #interrupt-cells=<2>;
13775 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-1-int-gpio parameter */
13776 + };
13777 + };
13778 + };
13779 +
13780 + // enable one or more mcp23s08s on spi2.2
13781 + fragment@15 {
13782 + target = <&spi2>;
13783 + __dormant__ {
13784 + status = "okay";
13785 + #address-cells = <1>;
13786 + #size-cells = <0>;
13787 + mcp23s08_22: mcp23s08@2 {
13788 + compatible = "microchip,mcp23s08";
13789 + gpio-controller;
13790 + #gpio-cells = <2>;
13791 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-2-present parameter */
13792 + reg = <2>;
13793 + spi-max-frequency = <500000>;
13794 + status = "okay";
13795 + #interrupt-cells=<2>;
13796 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-2-int-gpio parameter */
13797 + };
13798 + };
13799 + };
13800 +
13801 + // enable one or more mcp23s17s on spi0.0
13802 + fragment@16 {
13803 + target = <&spi0>;
13804 + __dormant__ {
13805 + status = "okay";
13806 + #address-cells = <1>;
13807 + #size-cells = <0>;
13808 + mcp23s17_00: mcp23s17@0 {
13809 + compatible = "microchip,mcp23s17";
13810 + gpio-controller;
13811 + #gpio-cells = <2>;
13812 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-0-present parameter */
13813 + reg = <0>;
13814 + spi-max-frequency = <500000>;
13815 + status = "okay";
13816 + #interrupt-cells=<2>;
13817 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-0-int-gpio parameter */
13818 + };
13819 + };
13820 + };
13821 +
13822 + // enable one or more mcp23s17s on spi0.1
13823 + fragment@17 {
13824 + target = <&spi0>;
13825 + __dormant__ {
13826 + status = "okay";
13827 + #address-cells = <1>;
13828 + #size-cells = <0>;
13829 + mcp23s17_01: mcp23s17@1 {
13830 + compatible = "microchip,mcp23s17";
13831 + gpio-controller;
13832 + #gpio-cells = <2>;
13833 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-1-present parameter */
13834 + reg = <1>;
13835 + spi-max-frequency = <500000>;
13836 + status = "okay";
13837 + #interrupt-cells=<2>;
13838 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-1-int-gpio parameter */
13839 + };
13840 + };
13841 + };
13842 +
13843 + // enable one or more mcp23s17s on spi1.0
13844 + fragment@18 {
13845 + target = <&spi1>;
13846 + __dormant__ {
13847 + status = "okay";
13848 + #address-cells = <1>;
13849 + #size-cells = <0>;
13850 + mcp23s17_10: mcp23s17@0 {
13851 + compatible = "microchip,mcp23s17";
13852 + gpio-controller;
13853 + #gpio-cells = <2>;
13854 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-0-present parameter */
13855 + reg = <0>;
13856 + spi-max-frequency = <500000>;
13857 + status = "okay";
13858 + #interrupt-cells=<2>;
13859 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-0-int-gpio parameter */
13860 + };
13861 + };
13862 + };
13863 +
13864 + // enable one or more mcp23s17s on spi1.1
13865 + fragment@19 {
13866 + target = <&spi1>;
13867 + __dormant__ {
13868 + status = "okay";
13869 + #address-cells = <1>;
13870 + #size-cells = <0>;
13871 + mcp23s17_11: mcp23s17@1 {
13872 + compatible = "microchip,mcp23s17";
13873 + gpio-controller;
13874 + #gpio-cells = <2>;
13875 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-1-present parameter */
13876 + reg = <1>;
13877 + spi-max-frequency = <500000>;
13878 + status = "okay";
13879 + #interrupt-cells=<2>;
13880 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-1-int-gpio parameter */
13881 + };
13882 + };
13883 + };
13884 +
13885 + // enable one or more mcp23s17s on spi1.2
13886 + fragment@20 {
13887 + target = <&spi1>;
13888 + __dormant__ {
13889 + status = "okay";
13890 + #address-cells = <1>;
13891 + #size-cells = <0>;
13892 + mcp23s17_12: mcp23s17@2 {
13893 + compatible = "microchip,mcp23s17";
13894 + gpio-controller;
13895 + #gpio-cells = <2>;
13896 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-2-present parameter */
13897 + reg = <2>;
13898 + spi-max-frequency = <500000>;
13899 + status = "okay";
13900 + #interrupt-cells=<2>;
13901 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-2-int-gpio parameter */
13902 + };
13903 + };
13904 + };
13905 +
13906 + // enable one or more mcp23s17s on spi2.0
13907 + fragment@21 {
13908 + target = <&spi2>;
13909 + __dormant__ {
13910 + status = "okay";
13911 + #address-cells = <1>;
13912 + #size-cells = <0>;
13913 + mcp23s17_20: mcp23s17@0 {
13914 + compatible = "microchip,mcp23s17";
13915 + gpio-controller;
13916 + #gpio-cells = <2>;
13917 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-0-present parameter */
13918 + reg = <0>;
13919 + spi-max-frequency = <500000>;
13920 + status = "okay";
13921 + #interrupt-cells=<2>;
13922 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-0-int-gpio parameter */
13923 + };
13924 + };
13925 + };
13926 +
13927 + // enable one or more mcp23s17s on spi2.1
13928 + fragment@22 {
13929 + target = <&spi2>;
13930 + __dormant__ {
13931 + status = "okay";
13932 + #address-cells = <1>;
13933 + #size-cells = <0>;
13934 + mcp23s17_21: mcp23s17@1 {
13935 + compatible = "microchip,mcp23s17";
13936 + gpio-controller;
13937 + #gpio-cells = <2>;
13938 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-1-present parameter */
13939 + reg = <1>;
13940 + spi-max-frequency = <500000>;
13941 + status = "okay";
13942 + #interrupt-cells=<2>;
13943 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-1-int-gpio parameter */
13944 + };
13945 + };
13946 + };
13947 +
13948 + // enable one or more mcp23s17s on spi2.2
13949 + fragment@23 {
13950 + target = <&spi2>;
13951 + __dormant__ {
13952 + status = "okay";
13953 + #address-cells = <1>;
13954 + #size-cells = <0>;
13955 + mcp23s17_22: mcp23s17@2 {
13956 + compatible = "microchip,mcp23s17";
13957 + gpio-controller;
13958 + #gpio-cells = <2>;
13959 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-2-present parameter */
13960 + reg = <2>;
13961 + spi-max-frequency = <500000>;
13962 + status = "okay";
13963 + #interrupt-cells=<2>;
13964 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-2-int-gpio parameter */
13965 + };
13966 + };
13967 + };
13968 +
13969 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.0 as a input with no pull-up/down
13970 + fragment@24 {
13971 + target = <&gpio>;
13972 + __dormant__ {
13973 + spi0_0_int_pins: spi0_0_int_pins {
13974 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-0-int-gpio parameter */
13975 + brcm,function = <0>;
13976 + brcm,pull = <0>;
13977 + };
13978 + };
13979 + };
13980 +
13981 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.1 as a input with no pull-up/down
13982 + fragment@25 {
13983 + target = <&gpio>;
13984 + __dormant__ {
13985 + spi0_1_int_pins: spi0_1_int_pins {
13986 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-1-int-gpio parameter */
13987 + brcm,function = <0>;
13988 + brcm,pull = <0>;
13989 + };
13990 + };
13991 + };
13992 +
13993 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.0 as a input with no pull-up/down
13994 + fragment@26 {
13995 + target = <&gpio>;
13996 + __dormant__ {
13997 + spi1_0_int_pins: spi1_0_int_pins {
13998 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-0-int-gpio parameter */
13999 + brcm,function = <0>;
14000 + brcm,pull = <0>;
14001 + };
14002 + };
14003 + };
14004 +
14005 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.1 as a input with no pull-up/down
14006 + fragment@27 {
14007 + target = <&gpio>;
14008 + __dormant__ {
14009 + spi1_1_int_pins: spi1_1_int_pins {
14010 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-1-int-gpio parameter */
14011 + brcm,function = <0>;
14012 + brcm,pull = <0>;
14013 + };
14014 + };
14015 + };
14016 +
14017 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.2 as a input with no pull-up/down
14018 + fragment@28 {
14019 + target = <&gpio>;
14020 + __dormant__ {
14021 + spi1_2_int_pins: spi1_2_int_pins {
14022 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-2-int-gpio parameter */
14023 + brcm,function = <0>;
14024 + brcm,pull = <0>;
14025 + };
14026 + };
14027 + };
14028 +
14029 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.0 as a input with no pull-up/down
14030 + fragment@29 {
14031 + target = <&gpio>;
14032 + __dormant__ {
14033 + spi2_0_int_pins: spi2_0_int_pins {
14034 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-0-int-gpio parameter */
14035 + brcm,function = <0>;
14036 + brcm,pull = <0>;
14037 + };
14038 + };
14039 + };
14040 +
14041 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.1 as a input with no pull-up/down
14042 + fragment@30 {
14043 + target = <&gpio>;
14044 + __dormant__ {
14045 + spi2_1_int_pins: spi2_1_int_pins {
14046 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-1-int-gpio parameter */
14047 + brcm,function = <0>;
14048 + brcm,pull = <0>;
14049 + };
14050 + };
14051 + };
14052 +
14053 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.2 as a input with no pull-up/down
14054 + fragment@31 {
14055 + target = <&gpio>;
14056 + __dormant__ {
14057 + spi2_2_int_pins: spi2_2_int_pins {
14058 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-2-int-gpio parameter */
14059 + brcm,function = <0>;
14060 + brcm,pull = <0>;
14061 + };
14062 + };
14063 + };
14064 +
14065 + // Enable interrupts for a mcp23s08 on spi0.0.
14066 + // Use default active low interrupt signalling.
14067 + fragment@32 {
14068 + target = <&mcp23s08_00>;
14069 + __dormant__ {
14070 + interrupt-parent = <&gpio>;
14071 + interrupt-controller;
14072 + };
14073 + };
14074 +
14075 + // Enable interrupts for a mcp23s08 on spi0.1.
14076 + // Use default active low interrupt signalling.
14077 + fragment@33 {
14078 + target = <&mcp23s08_01>;
14079 + __dormant__ {
14080 + interrupt-parent = <&gpio>;
14081 + interrupt-controller;
14082 + };
14083 + };
14084 +
14085 + // Enable interrupts for a mcp23s08 on spi1.0.
14086 + // Use default active low interrupt signalling.
14087 + fragment@34 {
14088 + target = <&mcp23s08_10>;
14089 + __dormant__ {
14090 + interrupt-parent = <&gpio>;
14091 + interrupt-controller;
14092 + };
14093 + };
14094 +
14095 + // Enable interrupts for a mcp23s08 on spi1.1.
14096 + // Use default active low interrupt signalling.
14097 + fragment@35 {
14098 + target = <&mcp23s08_11>;
14099 + __dormant__ {
14100 + interrupt-parent = <&gpio>;
14101 + interrupt-controller;
14102 + };
14103 + };
14104 +
14105 + // Enable interrupts for a mcp23s08 on spi1.2.
14106 + // Use default active low interrupt signalling.
14107 + fragment@36 {
14108 + target = <&mcp23s08_12>;
14109 + __dormant__ {
14110 + interrupt-parent = <&gpio>;
14111 + interrupt-controller;
14112 + };
14113 + };
14114 +
14115 + // Enable interrupts for a mcp23s08 on spi2.0.
14116 + // Use default active low interrupt signalling.
14117 + fragment@37 {
14118 + target = <&mcp23s08_20>;
14119 + __dormant__ {
14120 + interrupt-parent = <&gpio>;
14121 + interrupt-controller;
14122 + };
14123 + };
14124 +
14125 + // Enable interrupts for a mcp23s08 on spi2.1.
14126 + // Use default active low interrupt signalling.
14127 + fragment@38 {
14128 + target = <&mcp23s08_21>;
14129 + __dormant__ {
14130 + interrupt-parent = <&gpio>;
14131 + interrupt-controller;
14132 + };
14133 + };
14134 +
14135 + // Enable interrupts for a mcp23s08 on spi2.2.
14136 + // Use default active low interrupt signalling.
14137 + fragment@39 {
14138 + target = <&mcp23s08_22>;
14139 + __dormant__ {
14140 + interrupt-parent = <&gpio>;
14141 + interrupt-controller;
14142 + };
14143 + };
14144 +
14145 + // Enable interrupts for a mcp23s17 on spi0.0.
14146 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
14147 + // Use default active low interrupt signalling.
14148 + fragment@40 {
14149 + target = <&mcp23s17_00>;
14150 + __dormant__ {
14151 + interrupt-parent = <&gpio>;
14152 + interrupt-controller;
14153 + microchip,irq-mirror;
14154 + };
14155 + };
14156 +
14157 + // Enable interrupts for a mcp23s17 on spi0.1.
14158 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
14159 + // Configure INTA/B outputs of mcp23s08/17 as active low.
14160 + fragment@41 {
14161 + target = <&mcp23s17_01>;
14162 + __dormant__ {
14163 + interrupt-parent = <&gpio>;
14164 + interrupt-controller;
14165 + microchip,irq-mirror;
14166 + };
14167 + };
14168 +
14169 + // Enable interrupts for a mcp23s17 on spi1.0.
14170 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
14171 + // Configure INTA/B outputs of mcp23s08/17 as active low.
14172 + fragment@42 {
14173 + target = <&mcp23s17_10>;
14174 + __dormant__ {
14175 + interrupt-parent = <&gpio>;
14176 + interrupt-controller;
14177 + microchip,irq-mirror;
14178 + };
14179 + };
14180 +
14181 + // Enable interrupts for a mcp23s17 on spi1.1.
14182 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
14183 + // Configure INTA/B outputs of mcp23s08/17 as active low.
14184 + fragment@43 {
14185 + target = <&mcp23s17_11>;
14186 + __dormant__ {
14187 + interrupt-parent = <&gpio>;
14188 + interrupt-controller;
14189 + microchip,irq-mirror;
14190 + };
14191 + };
14192 +
14193 + // Enable interrupts for a mcp23s17 on spi1.2.
14194 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
14195 + // Configure INTA/B outputs of mcp23s08/17 as active low.
14196 + fragment@44 {
14197 + target = <&mcp23s17_12>;
14198 + __dormant__ {
14199 + interrupt-parent = <&gpio>;
14200 + interrupt-controller;
14201 + microchip,irq-mirror;
14202 + };
14203 + };
14204 +
14205 + // Enable interrupts for a mcp23s17 on spi2.0.
14206 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
14207 + // Configure INTA/B outputs of mcp23s08/17 as active low.
14208 + fragment@45 {
14209 + target = <&mcp23s17_20>;
14210 + __dormant__ {
14211 + interrupt-parent = <&gpio>;
14212 + interrupt-controller;
14213 + microchip,irq-mirror;
14214 + };
14215 + };
14216 +
14217 + // Enable interrupts for a mcp23s17 on spi2.1.
14218 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
14219 + // Configure INTA/B outputs of mcp23s08/17 as active low.
14220 + fragment@46 {
14221 + target = <&mcp23s17_21>;
14222 + __dormant__ {
14223 + interrupt-parent = <&gpio>;
14224 + interrupt-controller;
14225 + microchip,irq-mirror;
14226 + };
14227 + };
14228 +
14229 + // Enable interrupts for a mcp23s17 on spi2.2.
14230 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
14231 + // Configure INTA/B outputs of mcp23s08/17 as active low.
14232 + fragment@47 {
14233 + target = <&mcp23s17_22>;
14234 + __dormant__ {
14235 + interrupt-parent = <&gpio>;
14236 + interrupt-controller;
14237 + microchip,irq-mirror;
14238 + };
14239 + };
14240 +
14241 + __overrides__ {
14242 + s08-spi0-0-present = <0>,"+0+8", <&mcp23s08_00>,"microchip,spi-present-mask:0";
14243 + s08-spi0-1-present = <0>,"+1+9", <&mcp23s08_01>,"microchip,spi-present-mask:0";
14244 + s08-spi1-0-present = <0>,"+2+10", <&mcp23s08_10>,"microchip,spi-present-mask:0";
14245 + s08-spi1-1-present = <0>,"+3+11", <&mcp23s08_11>,"microchip,spi-present-mask:0";
14246 + s08-spi1-2-present = <0>,"+4+12", <&mcp23s08_12>,"microchip,spi-present-mask:0";
14247 + s08-spi2-0-present = <0>,"+5+13", <&mcp23s08_20>,"microchip,spi-present-mask:0";
14248 + s08-spi2-1-present = <0>,"+6+14", <&mcp23s08_21>,"microchip,spi-present-mask:0";
14249 + s08-spi2-2-present = <0>,"+7+15", <&mcp23s08_22>,"microchip,spi-present-mask:0";
14250 + s17-spi0-0-present = <0>,"+0+16", <&mcp23s17_00>,"microchip,spi-present-mask:0";
14251 + s17-spi0-1-present = <0>,"+1+17", <&mcp23s17_01>,"microchip,spi-present-mask:0";
14252 + s17-spi1-0-present = <0>,"+2+18", <&mcp23s17_10>,"microchip,spi-present-mask:0";
14253 + s17-spi1-1-present = <0>,"+3+19", <&mcp23s17_11>,"microchip,spi-present-mask:0";
14254 + s17-spi1-2-present = <0>,"+4+20", <&mcp23s17_12>,"microchip,spi-present-mask:0";
14255 + s17-spi2-0-present = <0>,"+5+21", <&mcp23s17_20>,"microchip,spi-present-mask:0";
14256 + s17-spi2-1-present = <0>,"+6+22", <&mcp23s17_21>,"microchip,spi-present-mask:0";
14257 + s17-spi2-2-present = <0>,"+7+23", <&mcp23s17_22>,"microchip,spi-present-mask:0";
14258 + s08-spi0-0-int-gpio = <0>,"+24+32", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s08_00>,"interrupts:0";
14259 + s08-spi0-1-int-gpio = <0>,"+25+33", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s08_01>,"interrupts:0";
14260 + s08-spi1-0-int-gpio = <0>,"+26+34", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s08_10>,"interrupts:0";
14261 + s08-spi1-1-int-gpio = <0>,"+27+35", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s08_11>,"interrupts:0";
14262 + s08-spi1-2-int-gpio = <0>,"+28+36", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s08_12>,"interrupts:0";
14263 + s08-spi2-0-int-gpio = <0>,"+29+37", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s08_20>,"interrupts:0";
14264 + s08-spi2-1-int-gpio = <0>,"+30+38", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s08_21>,"interrupts:0";
14265 + s08-spi2-2-int-gpio = <0>,"+31+39", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s08_22>,"interrupts:0";
14266 + s17-spi0-0-int-gpio = <0>,"+24+40", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s17_00>,"interrupts:0";
14267 + s17-spi0-1-int-gpio = <0>,"+25+41", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s17_01>,"interrupts:0";
14268 + s17-spi1-0-int-gpio = <0>,"+26+42", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s17_10>,"interrupts:0";
14269 + s17-spi1-1-int-gpio = <0>,"+27+43", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s17_11>,"interrupts:0";
14270 + s17-spi1-2-int-gpio = <0>,"+28+44", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s17_12>,"interrupts:0";
14271 + s17-spi2-0-int-gpio = <0>,"+29+45", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s17_20>,"interrupts:0";
14272 + s17-spi2-1-int-gpio = <0>,"+30+46", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s17_21>,"interrupts:0";
14273 + s17-spi2-2-int-gpio = <0>,"+31+47", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s17_22>,"interrupts:0";
14274 + };
14275 +};
14276 +
14277 diff --git a/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts b/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
14278 new file mode 100755
14279 index 000000000000..0dae8053a9a9
14280 --- /dev/null
14281 +++ b/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
14282 @@ -0,0 +1,73 @@
14283 +/*
14284 + * Device tree overlay for mcp251x/can0 on spi0.0
14285 + */
14286 +
14287 +/dts-v1/;
14288 +/plugin/;
14289 +
14290 +/ {
14291 + compatible = "brcm,bcm2835";
14292 + /* disable spi-dev for spi0.0 */
14293 + fragment@0 {
14294 + target = <&spi0>;
14295 + __overlay__ {
14296 + status = "okay";
14297 + };
14298 + };
14299 +
14300 + fragment@1 {
14301 + target = <&spidev0>;
14302 + __overlay__ {
14303 + status = "disabled";
14304 + };
14305 + };
14306 +
14307 + /* the interrupt pin of the can-controller */
14308 + fragment@2 {
14309 + target = <&gpio>;
14310 + __overlay__ {
14311 + can0_pins: can0_pins {
14312 + brcm,pins = <25>;
14313 + brcm,function = <0>; /* input */
14314 + };
14315 + };
14316 + };
14317 +
14318 + /* the clock/oscillator of the can-controller */
14319 + fragment@3 {
14320 + target-path = "/clocks";
14321 + __overlay__ {
14322 + /* external oscillator of mcp2515 on SPI0.0 */
14323 + can0_osc: can0_osc {
14324 + compatible = "fixed-clock";
14325 + #clock-cells = <0>;
14326 + clock-frequency = <16000000>;
14327 + };
14328 + };
14329 + };
14330 +
14331 + /* the spi config of the can-controller itself binding everything together */
14332 + fragment@4 {
14333 + target = <&spi0>;
14334 + __overlay__ {
14335 + /* needed to avoid dtc warning */
14336 + #address-cells = <1>;
14337 + #size-cells = <0>;
14338 + can0: mcp2515@0 {
14339 + reg = <0>;
14340 + compatible = "microchip,mcp2515";
14341 + pinctrl-names = "default";
14342 + pinctrl-0 = <&can0_pins>;
14343 + spi-max-frequency = <10000000>;
14344 + interrupt-parent = <&gpio>;
14345 + interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
14346 + clocks = <&can0_osc>;
14347 + };
14348 + };
14349 + };
14350 + __overrides__ {
14351 + oscillator = <&can0_osc>,"clock-frequency:0";
14352 + spimaxfrequency = <&can0>,"spi-max-frequency:0";
14353 + interrupt = <&can0_pins>,"brcm,pins:0",<&can0>,"interrupts:0";
14354 + };
14355 +};
14356 diff --git a/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts b/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
14357 new file mode 100644
14358 index 000000000000..c70dc3d05ebf
14359 --- /dev/null
14360 +++ b/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
14361 @@ -0,0 +1,73 @@
14362 +/*
14363 + * Device tree overlay for mcp251x/can1 on spi0.1 edited by petit_miner
14364 + */
14365 +
14366 +/dts-v1/;
14367 +/plugin/;
14368 +
14369 +/ {
14370 + compatible = "brcm,bcm2835";
14371 + /* disable spi-dev for spi0.1 */
14372 + fragment@0 {
14373 + target = <&spi0>;
14374 + __overlay__ {
14375 + status = "okay";
14376 + };
14377 + };
14378 +
14379 + fragment@1 {
14380 + target = <&spidev1>;
14381 + __overlay__ {
14382 + status = "disabled";
14383 + };
14384 + };
14385 +
14386 + /* the interrupt pin of the can-controller */
14387 + fragment@2 {
14388 + target = <&gpio>;
14389 + __overlay__ {
14390 + can1_pins: can1_pins {
14391 + brcm,pins = <25>;
14392 + brcm,function = <0>; /* input */
14393 + };
14394 + };
14395 + };
14396 +
14397 + /* the clock/oscillator of the can-controller */
14398 + fragment@3 {
14399 + target-path = "/clocks";
14400 + __overlay__ {
14401 + /* external oscillator of mcp2515 on spi0.1 */
14402 + can1_osc: can1_osc {
14403 + compatible = "fixed-clock";
14404 + #clock-cells = <0>;
14405 + clock-frequency = <16000000>;
14406 + };
14407 + };
14408 + };
14409 +
14410 + /* the spi config of the can-controller itself binding everything together */
14411 + fragment@4 {
14412 + target = <&spi0>;
14413 + __overlay__ {
14414 + /* needed to avoid dtc warning */
14415 + #address-cells = <1>;
14416 + #size-cells = <0>;
14417 + can1: mcp2515@1 {
14418 + reg = <1>;
14419 + compatible = "microchip,mcp2515";
14420 + pinctrl-names = "default";
14421 + pinctrl-0 = <&can1_pins>;
14422 + spi-max-frequency = <10000000>;
14423 + interrupt-parent = <&gpio>;
14424 + interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
14425 + clocks = <&can1_osc>;
14426 + };
14427 + };
14428 + };
14429 + __overrides__ {
14430 + oscillator = <&can1_osc>,"clock-frequency:0";
14431 + spimaxfrequency = <&can1>,"spi-max-frequency:0";
14432 + interrupt = <&can1_pins>,"brcm,pins:0",<&can1>,"interrupts:0";
14433 + };
14434 +};
14435 diff --git a/arch/arm/boot/dts/overlays/mcp3008-overlay.dts b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts
14436 new file mode 100755
14437 index 000000000000..0b7d9f75546e
14438 --- /dev/null
14439 +++ b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts
14440 @@ -0,0 +1,205 @@
14441 +/*
14442 + * Device tree overlay for Microchip mcp3008 10-Bit A/D Converters
14443 + */
14444 +
14445 +/dts-v1/;
14446 +/plugin/;
14447 +
14448 +/ {
14449 + compatible = "brcm,bcm2835";
14450 +
14451 + fragment@0 {
14452 + target = <&spidev0>;
14453 + __dormant__ {
14454 + status = "disabled";
14455 + };
14456 + };
14457 +
14458 + fragment@1 {
14459 + target = <&spidev1>;
14460 + __dormant__ {
14461 + status = "disabled";
14462 + };
14463 + };
14464 +
14465 + fragment@2 {
14466 + target-path = "spi1/spidev@0";
14467 + __dormant__ {
14468 + status = "disabled";
14469 + };
14470 + };
14471 +
14472 + fragment@3 {
14473 + target-path = "spi1/spidev@1";
14474 + __dormant__ {
14475 + status = "disabled";
14476 + };
14477 + };
14478 +
14479 + fragment@4 {
14480 + target-path = "spi1/spidev@2";
14481 + __dormant__ {
14482 + status = "disabled";
14483 + };
14484 + };
14485 +
14486 + fragment@5 {
14487 + target-path = "spi2/spidev@0";
14488 + __dormant__ {
14489 + status = "disabled";
14490 + };
14491 + };
14492 +
14493 + fragment@6 {
14494 + target-path = "spi2/spidev@1";
14495 + __dormant__ {
14496 + status = "disabled";
14497 + };
14498 + };
14499 +
14500 + fragment@7 {
14501 + target-path = "spi2/spidev@2";
14502 + __dormant__ {
14503 + status = "disabled";
14504 + };
14505 + };
14506 +
14507 + fragment@8 {
14508 + target = <&spi0>;
14509 + __dormant__ {
14510 + status = "okay";
14511 + #address-cells = <1>;
14512 + #size-cells = <0>;
14513 +
14514 + mcp3008_00: mcp3008@0 {
14515 + compatible = "mcp3008";
14516 + reg = <0>;
14517 + spi-max-frequency = <1600000>;
14518 + };
14519 + };
14520 + };
14521 +
14522 + fragment@9 {
14523 + target = <&spi0>;
14524 + __dormant__ {
14525 + status = "okay";
14526 + #address-cells = <1>;
14527 + #size-cells = <0>;
14528 +
14529 + mcp3008_01: mcp3008@1 {
14530 + compatible = "mcp3008";
14531 + reg = <1>;
14532 + spi-max-frequency = <1600000>;
14533 + };
14534 + };
14535 + };
14536 +
14537 + fragment@10 {
14538 + target = <&spi1>;
14539 + __dormant__ {
14540 + status = "okay";
14541 + #address-cells = <1>;
14542 + #size-cells = <0>;
14543 +
14544 + mcp3008_10: mcp3008@0 {
14545 + compatible = "mcp3008";
14546 + reg = <0>;
14547 + spi-max-frequency = <1600000>;
14548 + };
14549 + };
14550 + };
14551 +
14552 + fragment@11 {
14553 + target = <&spi1>;
14554 + __dormant__ {
14555 + status = "okay";
14556 + #address-cells = <1>;
14557 + #size-cells = <0>;
14558 +
14559 + mcp3008_11: mcp3008@1 {
14560 + compatible = "mcp3008";
14561 + reg = <1>;
14562 + spi-max-frequency = <1600000>;
14563 + };
14564 + };
14565 + };
14566 +
14567 + fragment@12 {
14568 + target = <&spi1>;
14569 + __dormant__ {
14570 + status = "okay";
14571 + #address-cells = <1>;
14572 + #size-cells = <0>;
14573 +
14574 + mcp3008_12: mcp3008@2 {
14575 + compatible = "mcp3008";
14576 + reg = <2>;
14577 + spi-max-frequency = <1600000>;
14578 + };
14579 + };
14580 + };
14581 +
14582 + fragment@13 {
14583 + target = <&spi2>;
14584 + __dormant__ {
14585 + status = "okay";
14586 + #address-cells = <1>;
14587 + #size-cells = <0>;
14588 +
14589 + mcp3008_20: mcp3008@0 {
14590 + compatible = "mcp3008";
14591 + reg = <0>;
14592 + spi-max-frequency = <1600000>;
14593 + };
14594 + };
14595 + };
14596 +
14597 + fragment@14 {
14598 + target = <&spi2>;
14599 + __dormant__ {
14600 + status = "okay";
14601 + #address-cells = <1>;
14602 + #size-cells = <0>;
14603 +
14604 + mcp3008_21: mcp3008@1 {
14605 + compatible = "mcp3008";
14606 + reg = <1>;
14607 + spi-max-frequency = <1600000>;
14608 + };
14609 + };
14610 + };
14611 +
14612 + fragment@15 {
14613 + target = <&spi2>;
14614 + __dormant__ {
14615 + status = "okay";
14616 + #address-cells = <1>;
14617 + #size-cells = <0>;
14618 +
14619 + mcp3008_22: mcp3008@2 {
14620 + compatible = "mcp3008";
14621 + reg = <2>;
14622 + spi-max-frequency = <1600000>;
14623 + };
14624 + };
14625 + };
14626 +
14627 + __overrides__ {
14628 + spi0-0-present = <0>, "+0+8";
14629 + spi0-1-present = <0>, "+1+9";
14630 + spi1-0-present = <0>, "+2+10";
14631 + spi1-1-present = <0>, "+3+11";
14632 + spi1-2-present = <0>, "+4+12";
14633 + spi2-0-present = <0>, "+5+13";
14634 + spi2-1-present = <0>, "+6+14";
14635 + spi2-2-present = <0>, "+7+15";
14636 + spi0-0-speed = <&mcp3008_00>, "spi-max-frequency:0";
14637 + spi0-1-speed = <&mcp3008_01>, "spi-max-frequency:0";
14638 + spi1-0-speed = <&mcp3008_10>, "spi-max-frequency:0";
14639 + spi1-1-speed = <&mcp3008_11>, "spi-max-frequency:0";
14640 + spi1-2-speed = <&mcp3008_12>, "spi-max-frequency:0";
14641 + spi2-0-speed = <&mcp3008_20>, "spi-max-frequency:0";
14642 + spi2-1-speed = <&mcp3008_21>, "spi-max-frequency:0";
14643 + spi2-2-speed = <&mcp3008_22>, "spi-max-frequency:0";
14644 + };
14645 +};
14646 diff --git a/arch/arm/boot/dts/overlays/mcp3202-overlay.dts b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts
14647 new file mode 100755
14648 index 000000000000..8e4e9f60f285
14649 --- /dev/null
14650 +++ b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts
14651 @@ -0,0 +1,205 @@
14652 +/*
14653 + * Device tree overlay for Microchip mcp3202 12-Bit A/D Converters
14654 + */
14655 +
14656 +/dts-v1/;
14657 +/plugin/;
14658 +
14659 +/ {
14660 + compatible = "brcm,bcm2835";
14661 +
14662 + fragment@0 {
14663 + target = <&spidev0>;
14664 + __dormant__ {
14665 + status = "disabled";
14666 + };
14667 + };
14668 +
14669 + fragment@1 {
14670 + target = <&spidev1>;
14671 + __dormant__ {
14672 + status = "disabled";
14673 + };
14674 + };
14675 +
14676 + fragment@2 {
14677 + target-path = "spi1/spidev@0";
14678 + __dormant__ {
14679 + status = "disabled";
14680 + };
14681 + };
14682 +
14683 + fragment@3 {
14684 + target-path = "spi1/spidev@1";
14685 + __dormant__ {
14686 + status = "disabled";
14687 + };
14688 + };
14689 +
14690 + fragment@4 {
14691 + target-path = "spi1/spidev@2";
14692 + __dormant__ {
14693 + status = "disabled";
14694 + };
14695 + };
14696 +
14697 + fragment@5 {
14698 + target-path = "spi2/spidev@0";
14699 + __dormant__ {
14700 + status = "disabled";
14701 + };
14702 + };
14703 +
14704 + fragment@6 {
14705 + target-path = "spi2/spidev@1";
14706 + __dormant__ {
14707 + status = "disabled";
14708 + };
14709 + };
14710 +
14711 + fragment@7 {
14712 + target-path = "spi2/spidev@2";
14713 + __dormant__ {
14714 + status = "disabled";
14715 + };
14716 + };
14717 +
14718 + fragment@8 {
14719 + target = <&spi0>;
14720 + __dormant__ {
14721 + status = "okay";
14722 + #address-cells = <1>;
14723 + #size-cells = <0>;
14724 +
14725 + mcp3202_00: mcp3202@0 {
14726 + compatible = "mcp3202";
14727 + reg = <0>;
14728 + spi-max-frequency = <1600000>;
14729 + };
14730 + };
14731 + };
14732 +
14733 + fragment@9 {
14734 + target = <&spi0>;
14735 + __dormant__ {
14736 + status = "okay";
14737 + #address-cells = <1>;
14738 + #size-cells = <0>;
14739 +
14740 + mcp3202_01: mcp3202@1 {
14741 + compatible = "mcp3202";
14742 + reg = <1>;
14743 + spi-max-frequency = <1600000>;
14744 + };
14745 + };
14746 + };
14747 +
14748 + fragment@10 {
14749 + target = <&spi1>;
14750 + __dormant__ {
14751 + status = "okay";
14752 + #address-cells = <1>;
14753 + #size-cells = <0>;
14754 +
14755 + mcp3202_10: mcp3202@0 {
14756 + compatible = "mcp3202";
14757 + reg = <0>;
14758 + spi-max-frequency = <1600000>;
14759 + };
14760 + };
14761 + };
14762 +
14763 + fragment@11 {
14764 + target = <&spi1>;
14765 + __dormant__ {
14766 + status = "okay";
14767 + #address-cells = <1>;
14768 + #size-cells = <0>;
14769 +
14770 + mcp3202_11: mcp3202@1 {
14771 + compatible = "mcp3202";
14772 + reg = <1>;
14773 + spi-max-frequency = <1600000>;
14774 + };
14775 + };
14776 + };
14777 +
14778 + fragment@12 {
14779 + target = <&spi1>;
14780 + __dormant__ {
14781 + status = "okay";
14782 + #address-cells = <1>;
14783 + #size-cells = <0>;
14784 +
14785 + mcp3202_12: mcp3202@2 {
14786 + compatible = "mcp3202";
14787 + reg = <2>;
14788 + spi-max-frequency = <1600000>;
14789 + };
14790 + };
14791 + };
14792 +
14793 + fragment@13 {
14794 + target = <&spi2>;
14795 + __dormant__ {
14796 + status = "okay";
14797 + #address-cells = <1>;
14798 + #size-cells = <0>;
14799 +
14800 + mcp3202_20: mcp3202@0 {
14801 + compatible = "mcp3202";
14802 + reg = <0>;
14803 + spi-max-frequency = <1600000>;
14804 + };
14805 + };
14806 + };
14807 +
14808 + fragment@14 {
14809 + target = <&spi2>;
14810 + __dormant__ {
14811 + status = "okay";
14812 + #address-cells = <1>;
14813 + #size-cells = <0>;
14814 +
14815 + mcp3202_21: mcp3202@1 {
14816 + compatible = "mcp3202";
14817 + reg = <1>;
14818 + spi-max-frequency = <1600000>;
14819 + };
14820 + };
14821 + };
14822 +
14823 + fragment@15 {
14824 + target = <&spi2>;
14825 + __dormant__ {
14826 + status = "okay";
14827 + #address-cells = <1>;
14828 + #size-cells = <0>;
14829 +
14830 + mcp3202_22: mcp3202@2 {
14831 + compatible = "mcp3202";
14832 + reg = <2>;
14833 + spi-max-frequency = <1600000>;
14834 + };
14835 + };
14836 + };
14837 +
14838 + __overrides__ {
14839 + spi0-0-present = <0>, "+0+8";
14840 + spi0-1-present = <0>, "+1+9";
14841 + spi1-0-present = <0>, "+2+10";
14842 + spi1-1-present = <0>, "+3+11";
14843 + spi1-2-present = <0>, "+4+12";
14844 + spi2-0-present = <0>, "+5+13";
14845 + spi2-1-present = <0>, "+6+14";
14846 + spi2-2-present = <0>, "+7+15";
14847 + spi0-0-speed = <&mcp3202_00>, "spi-max-frequency:0";
14848 + spi0-1-speed = <&mcp3202_01>, "spi-max-frequency:0";
14849 + spi1-0-speed = <&mcp3202_10>, "spi-max-frequency:0";
14850 + spi1-1-speed = <&mcp3202_11>, "spi-max-frequency:0";
14851 + spi1-2-speed = <&mcp3202_12>, "spi-max-frequency:0";
14852 + spi2-0-speed = <&mcp3202_20>, "spi-max-frequency:0";
14853 + spi2-1-speed = <&mcp3202_21>, "spi-max-frequency:0";
14854 + spi2-2-speed = <&mcp3202_22>, "spi-max-frequency:0";
14855 + };
14856 +};
14857 diff --git a/arch/arm/boot/dts/overlays/mcp342x-overlay.dts b/arch/arm/boot/dts/overlays/mcp342x-overlay.dts
14858 new file mode 100644
14859 index 000000000000..7bbb528f804f
14860 --- /dev/null
14861 +++ b/arch/arm/boot/dts/overlays/mcp342x-overlay.dts
14862 @@ -0,0 +1,93 @@
14863 +// Overlay for MCP3421-8 ADCs from Microchip Semiconductor
14864 +
14865 +/dts-v1/;
14866 +/plugin/;
14867 +
14868 +/ {
14869 + compatible = "brcm,bcm2835";
14870 +
14871 + fragment@0 {
14872 + target = <&i2c1>;
14873 + __overlay__ {
14874 + #address-cells = <1>;
14875 + #size-cells = <0>;
14876 +
14877 + status = "okay";
14878 +
14879 + mcp342x: mcp@68 {
14880 + reg = <0x68>;
14881 +
14882 + status = "okay";
14883 + };
14884 + };
14885 + };
14886 +
14887 + fragment@1 {
14888 + target = <&mcp342x>;
14889 + __dormant__ {
14890 + compatible = "microchip,mcp3421";
14891 + };
14892 + };
14893 +
14894 + fragment@2 {
14895 + target = <&mcp342x>;
14896 + __dormant__ {
14897 + compatible = "microchip,mcp3422";
14898 + };
14899 + };
14900 +
14901 + fragment@3 {
14902 + target = <&mcp342x>;
14903 + __dormant__ {
14904 + compatible = "microchip,mcp3423";
14905 + };
14906 + };
14907 +
14908 + fragment@4 {
14909 + target = <&mcp342x>;
14910 + __dormant__ {
14911 + compatible = "microchip,mcp3424";
14912 + };
14913 + };
14914 +
14915 + fragment@5 {
14916 + target = <&mcp342x>;
14917 + __dormant__ {
14918 + compatible = "microchip,mcp3425";
14919 + };
14920 + };
14921 +
14922 + fragment@6 {
14923 + target = <&mcp342x>;
14924 + __dormant__ {
14925 + compatible = "microchip,mcp3426";
14926 + };
14927 + };
14928 +
14929 + fragment@7 {
14930 + target = <&mcp342x>;
14931 + __dormant__ {
14932 + compatible = "microchip,mcp3427";
14933 + };
14934 + };
14935 +
14936 + fragment@8 {
14937 + target = <&mcp342x>;
14938 + __dormant__ {
14939 + compatible = "microchip,mcp3428";
14940 + };
14941 + };
14942 +
14943 + __overrides__ {
14944 + addr = <&mcp342x>,"reg:0";
14945 + mcp3421 = <0>,"=1";
14946 + mcp3422 = <0>,"=2";
14947 + mcp3423 = <0>,"=3";
14948 + mcp3424 = <0>,"=4";
14949 + mcp3425 = <0>,"=5";
14950 + mcp3426 = <0>,"=6";
14951 + mcp3427 = <0>,"=7";
14952 + mcp3428 = <0>,"=8";
14953 + };
14954 +};
14955 +
14956 diff --git a/arch/arm/boot/dts/overlays/media-center-overlay.dts b/arch/arm/boot/dts/overlays/media-center-overlay.dts
14957 new file mode 100644
14958 index 000000000000..0fcdcfa18eb3
14959 --- /dev/null
14960 +++ b/arch/arm/boot/dts/overlays/media-center-overlay.dts
14961 @@ -0,0 +1,134 @@
14962 +/*
14963 + * Device Tree overlay for Media Center HAT by Pi Supply
14964 + *
14965 + */
14966 +
14967 +/dts-v1/;
14968 +/plugin/;
14969 +
14970 +/ {
14971 + compatible = "brcm,bcm2835";
14972 +
14973 + fragment@0 {
14974 + target = <&spi0>;
14975 + __overlay__ {
14976 + status = "okay";
14977 +
14978 + spidev@0{
14979 + status = "disabled";
14980 + };
14981 +
14982 + spidev@1{
14983 + status = "disabled";
14984 + };
14985 + };
14986 + };
14987 +
14988 + fragment@1 {
14989 + target = <&gpio>;
14990 + __overlay__ {
14991 + rpi_display_pins: rpi_display_pins {
14992 + brcm,pins = <12 23 24 25>;
14993 + brcm,function = <1 1 1 0>; /* out out out in */
14994 + brcm,pull = <0 0 0 2>; /* - - - up */
14995 + };
14996 + };
14997 + };
14998 +
14999 + fragment@2 {
15000 + target = <&spi0>;
15001 + __overlay__ {
15002 + /* needed to avoid dtc warning */
15003 + #address-cells = <1>;
15004 + #size-cells = <0>;
15005 +
15006 + rpidisplay: rpi-display@0{
15007 + compatible = "ilitek,ili9341";
15008 + reg = <0>;
15009 + pinctrl-names = "default";
15010 + pinctrl-0 = <&rpi_display_pins>;
15011 +
15012 + spi-max-frequency = <32000000>;
15013 + rotate = <90>;
15014 + bgr;
15015 + fps = <30>;
15016 + buswidth = <8>;
15017 + reset-gpios = <&gpio 23 0>;
15018 + dc-gpios = <&gpio 24 0>;
15019 + led-gpios = <&gpio 12 1>;
15020 + debug = <0>;
15021 + };
15022 +
15023 + rpidisplay_ts: rpi-display-ts@1 {
15024 + compatible = "ti,ads7846";
15025 + reg = <1>;
15026 +
15027 + spi-max-frequency = <2000000>;
15028 + interrupts = <25 2>; /* high-to-low edge triggered */
15029 + interrupt-parent = <&gpio>;
15030 + pendown-gpio = <&gpio 25 0>;
15031 + ti,x-plate-ohms = /bits/ 16 <60>;
15032 + ti,pressure-max = /bits/ 16 <255>;
15033 + };
15034 + };
15035 + };
15036 +
15037 + fragment@3 {
15038 + target-path = "/";
15039 + __overlay__ {
15040 + lirc_rpi: lirc_rpi {
15041 + compatible = "rpi,lirc-rpi";
15042 + pinctrl-names = "default";
15043 + pinctrl-0 = <&lirc_pins>;
15044 + status = "okay";
15045 +
15046 + // Override autodetection of IR receiver circuit
15047 + // (0 = active high, 1 = active low, -1 = no override )
15048 + rpi,sense = <0xffffffff>;
15049 +
15050 + // Software carrier
15051 + // (0 = off, 1 = on)
15052 + rpi,softcarrier = <1>;
15053 +
15054 + // Invert output
15055 + // (0 = off, 1 = on)
15056 + rpi,invert = <0>;
15057 +
15058 + // Enable debugging messages
15059 + // (0 = off, 1 = on)
15060 + rpi,debug = <0>;
15061 + };
15062 + };
15063 + };
15064 +
15065 + fragment@4 {
15066 + target = <&gpio>;
15067 + __overlay__ {
15068 + lirc_pins: lirc_pins {
15069 + brcm,pins = <6 5>;
15070 + brcm,function = <1 0>; // out in
15071 + brcm,pull = <0 1>; // off down
15072 + };
15073 + };
15074 + };
15075 +
15076 + __overrides__ {
15077 + speed = <&rpidisplay>,"spi-max-frequency:0";
15078 + rotate = <&rpidisplay>,"rotate:0";
15079 + fps = <&rpidisplay>,"fps:0";
15080 + debug = <&rpidisplay>,"debug:0",
15081 + <&lirc_rpi>,"rpi,debug:0";
15082 + xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
15083 + swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
15084 + backlight = <&rpidisplay>,"led-gpios:4",
15085 + <&rpi_display_pins>,"brcm,pins:0";
15086 +
15087 + gpio_out_pin = <&lirc_pins>,"brcm,pins:0";
15088 + gpio_in_pin = <&lirc_pins>,"brcm,pins:4";
15089 + gpio_in_pull = <&lirc_pins>,"brcm,pull:4";
15090 +
15091 + sense = <&lirc_rpi>,"rpi,sense:0";
15092 + softcarrier = <&lirc_rpi>,"rpi,softcarrier:0";
15093 + invert = <&lirc_rpi>,"rpi,invert:0";
15094 + };
15095 +};
15096 diff --git a/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
15097 new file mode 100644
15098 index 000000000000..565af7cf79d7
15099 --- /dev/null
15100 +++ b/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
15101 @@ -0,0 +1,36 @@
15102 +/dts-v1/;
15103 +/plugin/;
15104 +
15105 +#include <dt-bindings/clock/bcm2835.h>
15106 +
15107 +/*
15108 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
15109 + * baudrate. The real clock is 48MHz, which we scale so that requesting
15110 + * 38.4kHz results in an actual 31.25kHz.
15111 + *
15112 + * 48000000*38400/31250 = 58982400
15113 + */
15114 +
15115 +/{
15116 + compatible = "brcm,bcm2835";
15117 +
15118 + fragment@0 {
15119 + target-path = "/clocks";
15120 + __overlay__ {
15121 + midi_clk: midi_clk {
15122 + compatible = "fixed-clock";
15123 + #clock-cells = <0>;
15124 + clock-output-names = "uart0_pclk";
15125 + clock-frequency = <58982400>;
15126 + };
15127 + };
15128 + };
15129 +
15130 + fragment@1 {
15131 + target = <&uart0>;
15132 + __overlay__ {
15133 + clocks = <&midi_clk>,
15134 + <&clocks BCM2835_CLOCK_VPU>;
15135 + };
15136 + };
15137 +};
15138 diff --git a/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
15139 new file mode 100644
15140 index 000000000000..e0bc410acbff
15141 --- /dev/null
15142 +++ b/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
15143 @@ -0,0 +1,43 @@
15144 +/dts-v1/;
15145 +/plugin/;
15146 +
15147 +#include <dt-bindings/clock/bcm2835-aux.h>
15148 +
15149 +/*
15150 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
15151 + * baudrate. The real clock is 48MHz, which we scale so that requesting
15152 + * 38.4kHz results in an actual 31.25kHz.
15153 + *
15154 + * 48000000*38400/31250 = 58982400
15155 + */
15156 +
15157 +/{
15158 + compatible = "brcm,bcm2835";
15159 +
15160 + fragment@0 {
15161 + target-path = "/clocks";
15162 + __overlay__ {
15163 + midi_clk: clock@5 {
15164 + compatible = "fixed-factor-clock";
15165 + #clock-cells = <0>;
15166 + clocks = <&aux BCM2835_AUX_CLOCK_UART>;
15167 + clock-mult = <38400>;
15168 + clock-div = <31250>;
15169 + };
15170 + };
15171 + };
15172 +
15173 + fragment@1 {
15174 + target = <&uart1>;
15175 + __overlay__ {
15176 + clocks = <&midi_clk>;
15177 + };
15178 + };
15179 +
15180 + fragment@2 {
15181 + target = <&aux>;
15182 + __overlay__ {
15183 + clock-output-names = "aux_uart", "aux_spi1", "aux_spi2";
15184 + };
15185 + };
15186 +};
15187 diff --git a/arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts b/arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts
15188 new file mode 100644
15189 index 000000000000..30d3d8549da0
15190 --- /dev/null
15191 +++ b/arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts
15192 @@ -0,0 +1,74 @@
15193 +/dts-v1/;
15194 +/plugin/;
15195 +
15196 +/* Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore
15197 + UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum
15198 + usable baudrate.
15199 +
15200 + It is also necessary to edit /lib/systemd/system/hciuart.service and
15201 + replace ttyAMA0 with ttyS0, unless you have a system with udev rules
15202 + that create /dev/serial0 and /dev/serial1, in which case use /dev/serial1
15203 + instead because it will always be correct.
15204 +
15205 + If cmdline.txt uses the alias serial0 to refer to the user-accessable port
15206 + then the firmware will replace with the appropriate port whether or not
15207 + this overlay is used.
15208 +*/
15209 +
15210 +/{
15211 + compatible = "brcm,bcm2835";
15212 +
15213 + fragment@0 {
15214 + target = <&uart0>;
15215 + __overlay__ {
15216 + pinctrl-names = "default";
15217 + pinctrl-0 = <&uart0_pins>;
15218 + status = "okay";
15219 + };
15220 + };
15221 +
15222 + fragment@1 {
15223 + target = <&uart1>;
15224 + __overlay__ {
15225 + pinctrl-names = "default";
15226 + pinctrl-0 = <&uart1_pins &bt_pins &fake_bt_cts>;
15227 + status = "okay";
15228 + };
15229 + };
15230 +
15231 + fragment@2 {
15232 + target = <&uart0_pins>;
15233 + __overlay__ {
15234 + brcm,pins;
15235 + brcm,function;
15236 + brcm,pull;
15237 + };
15238 + };
15239 +
15240 + fragment@3 {
15241 + target = <&uart1_pins>;
15242 + __overlay__ {
15243 + brcm,pins = <32 33>;
15244 + brcm,function = <2>; /* alt5=UART1 */
15245 + brcm,pull = <0 2>;
15246 + };
15247 + };
15248 +
15249 + fragment@4 {
15250 + target = <&gpio>;
15251 + __overlay__ {
15252 + fake_bt_cts: fake_bt_cts {
15253 + brcm,pins = <31>;
15254 + brcm,function = <1>; /* output */
15255 + };
15256 + };
15257 + };
15258 +
15259 + fragment@5 {
15260 + target-path = "/aliases";
15261 + __overlay__ {
15262 + serial0 = "/soc/serial@7e201000";
15263 + serial1 = "/soc/serial@7e215040";
15264 + };
15265 + };
15266 +};
15267 diff --git a/arch/arm/boot/dts/overlays/mmc-overlay.dts b/arch/arm/boot/dts/overlays/mmc-overlay.dts
15268 new file mode 100644
15269 index 000000000000..c1a2f691aa1e
15270 --- /dev/null
15271 +++ b/arch/arm/boot/dts/overlays/mmc-overlay.dts
15272 @@ -0,0 +1,46 @@
15273 +/dts-v1/;
15274 +/plugin/;
15275 +
15276 +/{
15277 + compatible = "brcm,bcm2835";
15278 +
15279 + fragment@0 {
15280 + target = <&mmc>;
15281 + frag0: __overlay__ {
15282 + pinctrl-names = "default";
15283 + pinctrl-0 = <&mmc_pins>;
15284 + bus-width = <4>;
15285 + brcm,overclock-50 = <0>;
15286 + status = "okay";
15287 + };
15288 + };
15289 +
15290 + fragment@1 {
15291 + target = <&gpio>;
15292 + __overlay__ {
15293 + mmc_pins: mmc_pins {
15294 + brcm,pins = <48 49 50 51 52 53>;
15295 + brcm,function = <7>; /* alt3 */
15296 + brcm,pull = <0 2 2 2 2 2>;
15297 + };
15298 + };
15299 + };
15300 +
15301 + fragment@2 {
15302 + target = <&sdhost>;
15303 + __overlay__ {
15304 + status = "disabled";
15305 + };
15306 + };
15307 +
15308 + fragment@3 {
15309 + target = <&mmcnr>;
15310 + __overlay__ {
15311 + status = "disabled";
15312 + };
15313 + };
15314 +
15315 + __overrides__ {
15316 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
15317 + };
15318 +};
15319 diff --git a/arch/arm/boot/dts/overlays/mpu6050-overlay.dts b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts
15320 new file mode 100644
15321 index 000000000000..3109d90562ae
15322 --- /dev/null
15323 +++ b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts
15324 @@ -0,0 +1,28 @@
15325 +// Definitions for MPU6050
15326 +/dts-v1/;
15327 +/plugin/;
15328 +
15329 +/ {
15330 + compatible = "brcm,bcm2835";
15331 +
15332 + fragment@0 {
15333 + target = <&i2c1>;
15334 + __overlay__ {
15335 + #address-cells = <1>;
15336 + #size-cells = <0>;
15337 + status = "okay";
15338 + clock-frequency = <400000>;
15339 +
15340 + mpu6050: mpu6050@68 {
15341 + compatible = "invensense,mpu6050";
15342 + reg = <0x68>;
15343 + interrupt-parent = <&gpio>;
15344 + interrupts = <4 1>;
15345 + };
15346 + };
15347 + };
15348 +
15349 + __overrides__ {
15350 + interrupt = <&mpu6050>,"interrupts:0";
15351 + };
15352 +};
15353 diff --git a/arch/arm/boot/dts/overlays/mz61581-overlay.dts b/arch/arm/boot/dts/overlays/mz61581-overlay.dts
15354 new file mode 100644
15355 index 000000000000..32686968c0d6
15356 --- /dev/null
15357 +++ b/arch/arm/boot/dts/overlays/mz61581-overlay.dts
15358 @@ -0,0 +1,117 @@
15359 +/*
15360 + * Device Tree overlay for MZ61581-PI-EXT 2014.12.28 by Tontec
15361 + *
15362 + */
15363 +
15364 +/dts-v1/;
15365 +/plugin/;
15366 +
15367 +/ {
15368 + compatible = "brcm,bcm2835";
15369 +
15370 + fragment@0 {
15371 + target = <&spi0>;
15372 + __overlay__ {
15373 + status = "okay";
15374 + };
15375 + };
15376 +
15377 + fragment@1 {
15378 + target = <&spidev0>;
15379 + __overlay__ {
15380 + status = "disabled";
15381 + };
15382 + };
15383 +
15384 + fragment@2 {
15385 + target = <&spidev1>;
15386 + __overlay__ {
15387 + status = "disabled";
15388 + };
15389 + };
15390 +
15391 + fragment@3 {
15392 + target = <&gpio>;
15393 + __overlay__ {
15394 + mz61581_pins: mz61581_pins {
15395 + brcm,pins = <4 15 18 25>;
15396 + brcm,function = <0 1 1 1>; /* in out out out */
15397 + };
15398 + };
15399 + };
15400 +
15401 + fragment@4 {
15402 + target = <&spi0>;
15403 + __overlay__ {
15404 + /* needed to avoid dtc warning */
15405 + #address-cells = <1>;
15406 + #size-cells = <0>;
15407 +
15408 + mz61581: mz61581@0{
15409 + compatible = "samsung,s6d02a1";
15410 + reg = <0>;
15411 + pinctrl-names = "default";
15412 + pinctrl-0 = <&mz61581_pins>;
15413 +
15414 + spi-max-frequency = <128000000>;
15415 + spi-cpol;
15416 + spi-cpha;
15417 +
15418 + width = <320>;
15419 + height = <480>;
15420 + rotate = <270>;
15421 + bgr;
15422 + fps = <30>;
15423 + buswidth = <8>;
15424 + txbuflen = <32768>;
15425 +
15426 + reset-gpios = <&gpio 15 0>;
15427 + dc-gpios = <&gpio 25 0>;
15428 + led-gpios = <&gpio 18 0>;
15429 +
15430 + init = <0x10000b0 00
15431 + 0x1000011
15432 + 0x20000ff
15433 + 0x10000b3 0x02 0x00 0x00 0x00
15434 + 0x10000c0 0x13 0x3b 0x00 0x02 0x00 0x01 0x00 0x43
15435 + 0x10000c1 0x08 0x16 0x08 0x08
15436 + 0x10000c4 0x11 0x07 0x03 0x03
15437 + 0x10000c6 0x00
15438 + 0x10000c8 0x03 0x03 0x13 0x5c 0x03 0x07 0x14 0x08 0x00 0x21 0x08 0x14 0x07 0x53 0x0c 0x13 0x03 0x03 0x21 0x00
15439 + 0x1000035 0x00
15440 + 0x1000036 0xa0
15441 + 0x100003a 0x55
15442 + 0x1000044 0x00 0x01
15443 + 0x10000d0 0x07 0x07 0x1d 0x03
15444 + 0x10000d1 0x03 0x30 0x10
15445 + 0x10000d2 0x03 0x14 0x04
15446 + 0x1000029
15447 + 0x100002c>;
15448 +
15449 + /* This is a workaround to make sure the init sequence slows down and doesn't fail */
15450 + debug = <3>;
15451 + };
15452 +
15453 + mz61581_ts: mz61581_ts@1 {
15454 + compatible = "ti,ads7846";
15455 + reg = <1>;
15456 +
15457 + spi-max-frequency = <2000000>;
15458 + interrupts = <4 2>; /* high-to-low edge triggered */
15459 + interrupt-parent = <&gpio>;
15460 + pendown-gpio = <&gpio 4 0>;
15461 +
15462 + ti,x-plate-ohms = /bits/ 16 <60>;
15463 + ti,pressure-max = /bits/ 16 <255>;
15464 + };
15465 + };
15466 + };
15467 + __overrides__ {
15468 + speed = <&mz61581>, "spi-max-frequency:0";
15469 + rotate = <&mz61581>, "rotate:0";
15470 + fps = <&mz61581>, "fps:0";
15471 + txbuflen = <&mz61581>, "txbuflen:0";
15472 + debug = <&mz61581>, "debug:0";
15473 + xohms = <&mz61581_ts>,"ti,x-plate-ohms;0";
15474 + };
15475 +};
15476 diff --git a/arch/arm/boot/dts/overlays/ov5647-overlay.dts b/arch/arm/boot/dts/overlays/ov5647-overlay.dts
15477 new file mode 100644
15478 index 000000000000..5266d4b8758d
15479 --- /dev/null
15480 +++ b/arch/arm/boot/dts/overlays/ov5647-overlay.dts
15481 @@ -0,0 +1,99 @@
15482 +// SPDX-License-Identifier: GPL-2.0-only
15483 +// Definitions for OV5647 camera module on VC I2C bus
15484 +/dts-v1/;
15485 +/plugin/;
15486 +
15487 +/{
15488 + compatible = "brcm,bcm2835";
15489 +
15490 + fragment@0 {
15491 + target = <&i2c_vc>;
15492 + __overlay__ {
15493 + #address-cells = <1>;
15494 + #size-cells = <0>;
15495 + status = "okay";
15496 +
15497 + ov5647: ov5647@36 {
15498 + compatible = "ovti,ov5647";
15499 + reg = <0x36>;
15500 + status = "okay";
15501 +
15502 + pwdn-gpios = <&gpio 41 1>, <&gpio 32 1>;
15503 + clocks = <&ov5647_clk>;
15504 +
15505 + ov5647_clk: camera-clk {
15506 + compatible = "fixed-clock";
15507 + #clock-cells = <0>;
15508 + clock-frequency = <25000000>;
15509 + };
15510 +
15511 + port {
15512 + ov5647_0: endpoint {
15513 + remote-endpoint = <&csi1_ep>;
15514 + clock-lanes = <0>;
15515 + data-lanes = <1 2>;
15516 + clock-noncontinuous;
15517 + link-frequencies =
15518 + /bits/ 64 <297000000>;
15519 + };
15520 + };
15521 + };
15522 + };
15523 + };
15524 +
15525 + fragment@1 {
15526 + target = <&csi1>;
15527 + __overlay__ {
15528 + status = "okay";
15529 +
15530 + port {
15531 + csi1_ep: endpoint {
15532 + remote-endpoint = <&ov5647_0>;
15533 + };
15534 + };
15535 + };
15536 + };
15537 +
15538 + fragment@2 {
15539 + target = <&i2c0_pins>;
15540 + __dormant__ {
15541 + brcm,pins = <28 29>;
15542 + brcm,function = <4>; /* alt0 */
15543 + };
15544 + };
15545 + fragment@3 {
15546 + target = <&i2c0_pins>;
15547 + __overlay__ {
15548 + brcm,pins = <44 45>;
15549 + brcm,function = <5>; /* alt1 */
15550 + };
15551 + };
15552 + fragment@4 {
15553 + target = <&i2c0_pins>;
15554 + __dormant__ {
15555 + brcm,pins = <0 1>;
15556 + brcm,function = <4>; /* alt0 */
15557 + };
15558 + };
15559 + fragment@5 {
15560 + target = <&i2c_vc>;
15561 + __overlay__ {
15562 + status = "okay";
15563 + };
15564 + };
15565 +
15566 + fragment@6 {
15567 + target-path="/__overrides__";
15568 + __overlay__ {
15569 + cam0-pwdn-ctrl = <&ov5647>,"pwdn-gpios:0";
15570 + cam0-pwdn = <&ov5647>,"pwdn-gpios:4";
15571 + cam0-led-ctrl = <&ov5647>,"pwdn-gpios:12";
15572 + cam0-led = <&ov5647>,"pwdn-gpios:16";
15573 + };
15574 + };
15575 +
15576 + __overrides__ {
15577 + i2c_pins_0_1 = <0>,"-2-3+4";
15578 + i2c_pins_28_29 = <0>,"+2-3-4";
15579 + };
15580 +};
15581 diff --git a/arch/arm/boot/dts/overlays/papirus-overlay.dts b/arch/arm/boot/dts/overlays/papirus-overlay.dts
15582 new file mode 100644
15583 index 000000000000..7b6bcfd49c86
15584 --- /dev/null
15585 +++ b/arch/arm/boot/dts/overlays/papirus-overlay.dts
15586 @@ -0,0 +1,89 @@
15587 +/* PaPiRus ePaper Screen by Pi Supply */
15588 +
15589 +/dts-v1/;
15590 +/plugin/;
15591 +
15592 +/ {
15593 + compatible = "brcm,bcm2835";
15594 +
15595 + fragment@0 {
15596 + target = <&i2c_arm>;
15597 + __overlay__ {
15598 + #address-cells = <1>;
15599 + #size-cells = <0>;
15600 + status = "okay";
15601 +
15602 + display_temp: lm75@48 {
15603 + compatible = "lm75b";
15604 + reg = <0x48>;
15605 + status = "okay";
15606 + #thermal-sensor-cells = <0>;
15607 + };
15608 + };
15609 + };
15610 +
15611 + fragment@1 {
15612 + target-path = "/";
15613 + __overlay__ {
15614 + thermal-zones {
15615 + display {
15616 + polling-delay-passive = <0>;
15617 + polling-delay = <0>;
15618 + thermal-sensors = <&display_temp>;
15619 + };
15620 + };
15621 + };
15622 + };
15623 +
15624 + fragment@2 {
15625 + target = <&spi0>;
15626 + __overlay__ {
15627 + status = "okay";
15628 +
15629 + spidev@0{
15630 + status = "disabled";
15631 + };
15632 + };
15633 + };
15634 +
15635 + fragment@3 {
15636 + target = <&gpio>;
15637 + __overlay__ {
15638 + repaper_pins: repaper_pins {
15639 + brcm,pins = <14 15 23 24 25>;
15640 + brcm,function = <1 1 1 1 0>; /* out out out out in */
15641 + };
15642 + };
15643 + };
15644 +
15645 + fragment@4 {
15646 + target = <&spi0>;
15647 + __overlay__ {
15648 + /* needed to avoid dtc warning */
15649 + #address-cells = <1>;
15650 + #size-cells = <0>;
15651 +
15652 + repaper: repaper@0{
15653 + compatible = "not_set";
15654 + reg = <0>;
15655 + pinctrl-names = "default";
15656 + pinctrl-0 = <&repaper_pins>;
15657 +
15658 + spi-max-frequency = <8000000>;
15659 +
15660 + panel-on-gpios = <&gpio 23 0>;
15661 + border-gpios = <&gpio 14 0>;
15662 + discharge-gpios = <&gpio 15 0>;
15663 + reset-gpios = <&gpio 24 0>;
15664 + busy-gpios = <&gpio 25 0>;
15665 +
15666 + repaper-thermal-zone = "display";
15667 + };
15668 + };
15669 + };
15670 +
15671 + __overrides__ {
15672 + panel = <&repaper>, "compatible";
15673 + speed = <&repaper>, "spi-max-frequency:0";
15674 + };
15675 +};
15676 diff --git a/arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts b/arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts
15677 new file mode 100644
15678 index 000000000000..aedfc90e8a31
15679 --- /dev/null
15680 +++ b/arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts
15681 @@ -0,0 +1 @@
15682 +#include "act-led-overlay.dts"
15683 diff --git a/arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts b/arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts
15684 new file mode 100644
15685 index 000000000000..e09a49295236
15686 --- /dev/null
15687 +++ b/arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts
15688 @@ -0,0 +1 @@
15689 +#include "disable-bt-overlay.dts"
15690 diff --git a/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts b/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts
15691 new file mode 100644
15692 index 000000000000..b61b69c14f37
15693 --- /dev/null
15694 +++ b/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts
15695 @@ -0,0 +1 @@
15696 +#include "disable-wifi-overlay.dts"
15697 diff --git a/arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts b/arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts
15698 new file mode 100644
15699 index 000000000000..94c14267716e
15700 --- /dev/null
15701 +++ b/arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts
15702 @@ -0,0 +1 @@
15703 +#include "miniuart-bt-overlay.dts"
15704 diff --git a/arch/arm/boot/dts/overlays/pibell-overlay.dts b/arch/arm/boot/dts/overlays/pibell-overlay.dts
15705 new file mode 100644
15706 index 000000000000..9333a9b09772
15707 --- /dev/null
15708 +++ b/arch/arm/boot/dts/overlays/pibell-overlay.dts
15709 @@ -0,0 +1,81 @@
15710 +/dts-v1/;
15711 +/plugin/;
15712 +
15713 +/ {
15714 + compatible = "brcm,bcm2835";
15715 +
15716 + fragment@0 {
15717 + target-path = "/";
15718 + __overlay__ {
15719 + codec_out: spdif-transmitter {
15720 + #address-cells = <0>;
15721 + #size-cells = <0>;
15722 + #sound-dai-cells = <0>;
15723 + compatible = "linux,spdif-dit";
15724 + status = "okay";
15725 + };
15726 +
15727 + codec_in: card-codec {
15728 + #sound-dai-cells = <0>;
15729 + compatible = "invensense,ics43432";
15730 + status = "okay";
15731 + };
15732 + };
15733 + };
15734 +
15735 + fragment@1 {
15736 + target = <&i2s>;
15737 + __overlay__ {
15738 + #sound-dai-cells = <0>;
15739 + status = "okay";
15740 + };
15741 + };
15742 +
15743 + fragment@2 {
15744 + target = <&sound>;
15745 + snd: __overlay__ {
15746 + compatible = "simple-audio-card";
15747 + simple-audio-card,name = "PiBell";
15748 +
15749 + status="okay";
15750 +
15751 + capture_link: simple-audio-card,dai-link@0 {
15752 + format = "i2s";
15753 +
15754 + r_cpu_dai: cpu {
15755 + sound-dai = <&i2s>;
15756 +
15757 +/* example TDM slot configuration
15758 + dai-tdm-slot-num = <2>;
15759 + dai-tdm-slot-width = <32>;
15760 +*/
15761 + };
15762 +
15763 + r_codec_dai: codec {
15764 + sound-dai = <&codec_in>;
15765 + };
15766 + };
15767 +
15768 + playback_link: simple-audio-card,dai-link@1 {
15769 + format = "i2s";
15770 +
15771 + p_cpu_dai: cpu {
15772 + sound-dai = <&i2s>;
15773 +
15774 +/* example TDM slot configuration
15775 + dai-tdm-slot-num = <2>;
15776 + dai-tdm-slot-width = <32>;
15777 +*/
15778 + };
15779 +
15780 + p_codec_dai: codec {
15781 + sound-dai = <&codec_out>;
15782 + };
15783 + };
15784 + };
15785 + };
15786 +
15787 + __overrides__ {
15788 + alsaname = <&snd>, "simple-audio-card,name";
15789 + };
15790 +};
15791 diff --git a/arch/arm/boot/dts/overlays/piglow-overlay.dts b/arch/arm/boot/dts/overlays/piglow-overlay.dts
15792 new file mode 100644
15793 index 000000000000..075bceef158c
15794 --- /dev/null
15795 +++ b/arch/arm/boot/dts/overlays/piglow-overlay.dts
15796 @@ -0,0 +1,97 @@
15797 +// Definitions for SN3218 LED driver from Si-En Technology on PiGlow
15798 +/dts-v1/;
15799 +/plugin/;
15800 +
15801 +/ {
15802 + compatible = "brcm,bcm2835";
15803 +
15804 + fragment@0 {
15805 + target = <&i2c_arm>;
15806 + __overlay__ {
15807 + #address-cells = <1>;
15808 + #size-cells = <0>;
15809 + status = "okay";
15810 +
15811 + sn3218@54 {
15812 + compatible = "si-en,sn3218";
15813 + reg = <0x54>;
15814 + #address-cells = <1>;
15815 + #size-cells = <0>;
15816 + status = "okay";
15817 +
15818 + led@1 {
15819 + reg = <1>;
15820 + label = "piglow:red:led1";
15821 + };
15822 + led@2 {
15823 + reg = <2>;
15824 + label = "piglow:orange:led2";
15825 + };
15826 + led@3 {
15827 + reg = <3>;
15828 + label = "piglow:yellow:led3";
15829 + };
15830 + led@4 {
15831 + reg = <4>;
15832 + label = "piglow:green:led4";
15833 + };
15834 + led@5 {
15835 + reg = <5>;
15836 + label = "piglow:blue:led5";
15837 + };
15838 + led@6 {
15839 + reg = <6>;
15840 + label = "piglow:green:led6";
15841 + };
15842 + led@7 {
15843 + reg = <7>;
15844 + label = "piglow:red:led7";
15845 + };
15846 + led@8 {
15847 + reg = <8>;
15848 + label = "piglow:orange:led8";
15849 + };
15850 + led@9 {
15851 + reg = <9>;
15852 + label = "piglow:yellow:led9";
15853 + };
15854 + led@10 {
15855 + reg = <10>;
15856 + label = "piglow:white:led10";
15857 + };
15858 + led@11 {
15859 + reg = <11>;
15860 + label = "piglow:white:led11";
15861 + };
15862 + led@12 {
15863 + reg = <12>;
15864 + label = "piglow:blue:led12";
15865 + };
15866 + led@13 {
15867 + reg = <13>;
15868 + label = "piglow:white:led13";
15869 + };
15870 + led@14 {
15871 + reg = <14>;
15872 + label = "piglow:green:led14";
15873 + };
15874 + led@15 {
15875 + reg = <15>;
15876 + label = "piglow:blue:led15";
15877 + };
15878 + led@16 {
15879 + reg = <16>;
15880 + label = "piglow:yellow:led16";
15881 + };
15882 + led@17 {
15883 + reg = <17>;
15884 + label = "piglow:orange:led17";
15885 + };
15886 + led@18 {
15887 + reg = <18>;
15888 + label = "piglow:red:led18";
15889 + };
15890 + };
15891 + };
15892 + };
15893 +};
15894 diff --git a/arch/arm/boot/dts/overlays/piscreen-overlay.dts b/arch/arm/boot/dts/overlays/piscreen-overlay.dts
15895 new file mode 100644
15896 index 000000000000..ae1af76d3923
15897 --- /dev/null
15898 +++ b/arch/arm/boot/dts/overlays/piscreen-overlay.dts
15899 @@ -0,0 +1,102 @@
15900 +/*
15901 + * Device Tree overlay for PiScreen 3.5" display shield by Ozzmaker
15902 + *
15903 + */
15904 +
15905 +/dts-v1/;
15906 +/plugin/;
15907 +
15908 +/ {
15909 + compatible = "brcm,bcm2835";
15910 +
15911 + fragment@0 {
15912 + target = <&spi0>;
15913 + __overlay__ {
15914 + status = "okay";
15915 + };
15916 + };
15917 +
15918 + fragment@1 {
15919 + target = <&spidev0>;
15920 + __overlay__ {
15921 + status = "disabled";
15922 + };
15923 + };
15924 +
15925 + fragment@2 {
15926 + target = <&spidev1>;
15927 + __overlay__ {
15928 + status = "disabled";
15929 + };
15930 + };
15931 +
15932 + fragment@3 {
15933 + target = <&gpio>;
15934 + __overlay__ {
15935 + piscreen_pins: piscreen_pins {
15936 + brcm,pins = <17 25 24 22>;
15937 + brcm,function = <0 1 1 1>; /* in out out out */
15938 + };
15939 + };
15940 + };
15941 +
15942 + fragment@4 {
15943 + target = <&spi0>;
15944 + __overlay__ {
15945 + /* needed to avoid dtc warning */
15946 + #address-cells = <1>;
15947 + #size-cells = <0>;
15948 +
15949 + piscreen: piscreen@0{
15950 + compatible = "ilitek,ili9486";
15951 + reg = <0>;
15952 + pinctrl-names = "default";
15953 + pinctrl-0 = <&piscreen_pins>;
15954 +
15955 + spi-max-frequency = <24000000>;
15956 + rotate = <270>;
15957 + bgr;
15958 + fps = <30>;
15959 + buswidth = <8>;
15960 + regwidth = <16>;
15961 + reset-gpios = <&gpio 25 0>;
15962 + dc-gpios = <&gpio 24 0>;
15963 + led-gpios = <&gpio 22 1>;
15964 + debug = <0>;
15965 +
15966 + init = <0x10000b0 0x00
15967 + 0x1000011
15968 + 0x20000ff
15969 + 0x100003a 0x55
15970 + 0x1000036 0x28
15971 + 0x10000c2 0x44
15972 + 0x10000c5 0x00 0x00 0x00 0x00
15973 + 0x10000e0 0x0f 0x1f 0x1c 0x0c 0x0f 0x08 0x48 0x98 0x37 0x0a 0x13 0x04 0x11 0x0d 0x00
15974 + 0x10000e1 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
15975 + 0x10000e2 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
15976 + 0x1000011
15977 + 0x1000029>;
15978 + };
15979 +
15980 + piscreen_ts: piscreen-ts@1 {
15981 + compatible = "ti,ads7846";
15982 + reg = <1>;
15983 +
15984 + spi-max-frequency = <2000000>;
15985 + interrupts = <17 2>; /* high-to-low edge triggered */
15986 + interrupt-parent = <&gpio>;
15987 + pendown-gpio = <&gpio 17 0>;
15988 + ti,swap-xy;
15989 + ti,x-plate-ohms = /bits/ 16 <100>;
15990 + ti,pressure-max = /bits/ 16 <255>;
15991 + };
15992 + };
15993 + };
15994 + __overrides__ {
15995 + speed = <&piscreen>,"spi-max-frequency:0";
15996 + rotate = <&piscreen>,"rotate:0";
15997 + fps = <&piscreen>,"fps:0";
15998 + debug = <&piscreen>,"debug:0";
15999 + xohms = <&piscreen_ts>,"ti,x-plate-ohms;0";
16000 + };
16001 +};
16002 diff --git a/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts b/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
16003 new file mode 100644
16004 index 000000000000..93b85be3f7c1
16005 --- /dev/null
16006 +++ b/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
16007 @@ -0,0 +1,106 @@
16008 + /*
16009 + * Device Tree overlay for PiScreen2 3.5" TFT with resistive touch by Ozzmaker.com
16010 + *
16011 + */
16012 +
16013 +/dts-v1/;
16014 +/plugin/;
16015 +
16016 +/ {
16017 + compatible = "brcm,bcm2835";
16018 +
16019 + fragment@0 {
16020 + target = <&spi0>;
16021 + __overlay__ {
16022 + status = "okay";
16023 + };
16024 + };
16025 +
16026 + fragment@1 {
16027 + target = <&spidev0>;
16028 + __overlay__ {
16029 + status = "disabled";
16030 + };
16031 + };
16032 +
16033 + fragment@2 {
16034 + target = <&spidev1>;
16035 + __overlay__ {
16036 + status = "disabled";
16037 + };
16038 + };
16039 +
16040 + fragment@3 {
16041 + target = <&gpio>;
16042 + __overlay__ {
16043 + piscreen2_pins: piscreen2_pins {
16044 + brcm,pins = <17 25 24 22>;
16045 + brcm,function = <0 1 1 1>; /* in out out out */
16046 + };
16047 + };
16048 + };
16049 +
16050 + fragment@4 {
16051 + target = <&spi0>;
16052 + __overlay__ {
16053 + /* needed to avoid dtc warning */
16054 + #address-cells = <1>;
16055 + #size-cells = <0>;
16056 +
16057 + piscreen2: piscreen2@0{
16058 + compatible = "ilitek,ili9486";
16059 + reg = <0>;
16060 + pinctrl-names = "default";
16061 + pinctrl-0 = <&piscreen2_pins>;
16062 + bgr;
16063 + spi-max-frequency = <64000000>;
16064 + rotate = <90>;
16065 + fps = <30>;
16066 + buswidth = <8>;
16067 + regwidth = <16>;
16068 + txbuflen = <32768>;
16069 + reset-gpios = <&gpio 25 0>;
16070 + dc-gpios = <&gpio 24 0>;
16071 + led-gpios = <&gpio 22 1>;
16072 + debug = <0>;
16073 +
16074 + init = <0x10000b0 0x00
16075 + 0x1000011
16076 + 0x20000ff
16077 + 0x100003a 0x55
16078 + 0x1000036 0x28
16079 + 0x10000c0 0x11 0x09
16080 + 0x10000c1 0x41
16081 + 0x10000c5 0x00 0x00 0x00 0x00
16082 + 0x10000b6 0x00 0x02
16083 + 0x10000f7 0xa9 0x51 0x2c 0x2
16084 + 0x10000be 0x00 0x04
16085 + 0x10000e9 0x00
16086 + 0x1000011
16087 + 0x1000029>;
16088 +
16089 + };
16090 +
16091 + piscreen2_ts: piscreen2-ts@1 {
16092 + compatible = "ti,ads7846";
16093 + reg = <1>;
16094 +
16095 + spi-max-frequency = <2000000>;
16096 + interrupts = <17 2>; /* high-to-low edge triggered */
16097 + interrupt-parent = <&gpio>;
16098 + pendown-gpio = <&gpio 17 0>;
16099 + ti,swap-xy;
16100 + ti,x-plate-ohms = /bits/ 16 <100>;
16101 + ti,pressure-max = /bits/ 16 <255>;
16102 + };
16103 + };
16104 + };
16105 + __overrides__ {
16106 + speed = <&piscreen2>,"spi-max-frequency:0";
16107 + rotate = <&piscreen2>,"rotate:0";
16108 + fps = <&piscreen2>,"fps:0";
16109 + debug = <&piscreen2>,"debug:0";
16110 + xohms = <&piscreen2_ts>,"ti,x-plate-ohms;0";
16111 + };
16112 +};
16113 +
16114 diff --git a/arch/arm/boot/dts/overlays/pisound-overlay.dts b/arch/arm/boot/dts/overlays/pisound-overlay.dts
16115 new file mode 100644
16116 index 000000000000..49efb2b768fb
16117 --- /dev/null
16118 +++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts
16119 @@ -0,0 +1,120 @@
16120 +/*
16121 + * Pisound Linux kernel module.
16122 + * Copyright (C) 2016-2017 Vilniaus Blokas UAB, https://blokas.io/pisound
16123 + *
16124 + * This program is free software; you can redistribute it and/or
16125 + * modify it under the terms of the GNU General Public License
16126 + * as published by the Free Software Foundation; version 2 of the
16127 + * License.
16128 + *
16129 + * This program is distributed in the hope that it will be useful,
16130 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
16131 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16132 + * GNU General Public License for more details.
16133 + *
16134 + * You should have received a copy of the GNU General Public License
16135 + * along with this program; if not, write to the Free Software
16136 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
16137 + */
16138 +
16139 +/dts-v1/;
16140 +/plugin/;
16141 +
16142 +#include <dt-bindings/gpio/gpio.h>
16143 +
16144 +/ {
16145 + compatible = "brcm,bcm2835";
16146 +
16147 + fragment@0 {
16148 + target = <&spi0>;
16149 + __overlay__ {
16150 + status = "okay";
16151 + };
16152 + };
16153 +
16154 + fragment@1 {
16155 + target = <&spidev0>;
16156 + __overlay__ {
16157 + status = "disabled";
16158 + };
16159 + };
16160 +
16161 + fragment@2 {
16162 + target = <&spidev1>;
16163 + __overlay__ {
16164 + status = "okay";
16165 + };
16166 + };
16167 +
16168 + fragment@3 {
16169 + target = <&spi0>;
16170 + __overlay__ {
16171 + #address-cells = <1>;
16172 + #size-cells = <0>;
16173 +
16174 + pisound_spi: pisound_spi@0{
16175 + compatible = "blokaslabs,pisound-spi";
16176 + reg = <0>;
16177 + pinctrl-names = "default";
16178 + pinctrl-0 = <&spi0_pins>;
16179 + spi-max-frequency = <1000000>;
16180 + };
16181 + };
16182 + };
16183 +
16184 + fragment@4 {
16185 + target-path = "/";
16186 + __overlay__ {
16187 + pcm5102a-codec {
16188 + #sound-dai-cells = <0>;
16189 + compatible = "ti,pcm5102a";
16190 + status = "okay";
16191 + };
16192 + };
16193 + };
16194 +
16195 + fragment@5 {
16196 + target = <&sound>;
16197 + __overlay__ {
16198 + compatible = "blokaslabs,pisound";
16199 + i2s-controller = <&i2s>;
16200 + status = "okay";
16201 +
16202 + pinctrl-0 = <&pisound_button_pins>;
16203 +
16204 + osr-gpios =
16205 + <&gpio 13 GPIO_ACTIVE_HIGH>,
16206 + <&gpio 26 GPIO_ACTIVE_HIGH>,
16207 + <&gpio 16 GPIO_ACTIVE_HIGH>;
16208 +
16209 + reset-gpios =
16210 + <&gpio 12 GPIO_ACTIVE_HIGH>,
16211 + <&gpio 24 GPIO_ACTIVE_HIGH>;
16212 +
16213 + data_available-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
16214 +
16215 + button-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
16216 + };
16217 + };
16218 +
16219 + fragment@6 {
16220 + target = <&gpio>;
16221 + __overlay__ {
16222 + pinctrl-names = "default";
16223 + pinctrl-0 = <&pisound_button_pins>;
16224 +
16225 + pisound_button_pins: pisound_button_pins {
16226 + brcm,pins = <17>;
16227 + brcm,function = <0>; // Input
16228 + brcm,pull = <2>; // Pull-Up
16229 + };
16230 + };
16231 + };
16232 +
16233 + fragment@7 {
16234 + target = <&i2s>;
16235 + __overlay__ {
16236 + status = "okay";
16237 + };
16238 + };
16239 +};
16240 diff --git a/arch/arm/boot/dts/overlays/pitft22-overlay.dts b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
16241 new file mode 100644
16242 index 000000000000..589ad13795b1
16243 --- /dev/null
16244 +++ b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
16245 @@ -0,0 +1,69 @@
16246 +/*
16247 + * Device Tree overlay for pitft by Adafruit
16248 + *
16249 + */
16250 +
16251 +/dts-v1/;
16252 +/plugin/;
16253 +
16254 +/ {
16255 + compatible = "brcm,bcm2835";
16256 +
16257 + fragment@0 {
16258 + target = <&spi0>;
16259 + __overlay__ {
16260 + status = "okay";
16261 +
16262 + spidev@0{
16263 + status = "disabled";
16264 + };
16265 +
16266 + spidev@1{
16267 + status = "disabled";
16268 + };
16269 + };
16270 + };
16271 +
16272 + fragment@1 {
16273 + target = <&gpio>;
16274 + __overlay__ {
16275 + pitft_pins: pitft_pins {
16276 + brcm,pins = <25>;
16277 + brcm,function = <1>; /* out */
16278 + brcm,pull = <0>; /* none */
16279 + };
16280 + };
16281 + };
16282 +
16283 + fragment@2 {
16284 + target = <&spi0>;
16285 + __overlay__ {
16286 + /* needed to avoid dtc warning */
16287 + #address-cells = <1>;
16288 + #size-cells = <0>;
16289 +
16290 + pitft: pitft@0{
16291 + compatible = "ilitek,ili9340";
16292 + reg = <0>;
16293 + pinctrl-names = "default";
16294 + pinctrl-0 = <&pitft_pins>;
16295 +
16296 + spi-max-frequency = <32000000>;
16297 + rotate = <90>;
16298 + fps = <25>;
16299 + bgr;
16300 + buswidth = <8>;
16301 + dc-gpios = <&gpio 25 0>;
16302 + debug = <0>;
16303 + };
16304 +
16305 + };
16306 + };
16307 +
16308 + __overrides__ {
16309 + speed = <&pitft>,"spi-max-frequency:0";
16310 + rotate = <&pitft>,"rotate:0";
16311 + fps = <&pitft>,"fps:0";
16312 + debug = <&pitft>,"debug:0";
16313 + };
16314 +};
16315 diff --git a/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts b/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
16316 new file mode 100644
16317 index 000000000000..33901ee1db7a
16318 --- /dev/null
16319 +++ b/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
16320 @@ -0,0 +1,91 @@
16321 +/*
16322 + * Device Tree overlay for Adafruit PiTFT 2.8" capacitive touch screen
16323 + *
16324 + */
16325 +
16326 +/dts-v1/;
16327 +/plugin/;
16328 +
16329 +/ {
16330 + compatible = "brcm,bcm2835";
16331 +
16332 + fragment@0 {
16333 + target = <&spi0>;
16334 + __overlay__ {
16335 + status = "okay";
16336 + };
16337 + };
16338 +
16339 + fragment@1 {
16340 + target = <&spidev0>;
16341 + __overlay__ {
16342 + status = "disabled";
16343 + };
16344 + };
16345 +
16346 + fragment@2 {
16347 + target = <&gpio>;
16348 + __overlay__ {
16349 + pitft_pins: pitft_pins {
16350 + brcm,pins = <24 25>;
16351 + brcm,function = <0 1>; /* in out */
16352 + brcm,pull = <2 0>; /* pullup none */
16353 + };
16354 + };
16355 + };
16356 +
16357 + fragment@3 {
16358 + target = <&spi0>;
16359 + __overlay__ {
16360 + /* needed to avoid dtc warning */
16361 + #address-cells = <1>;
16362 + #size-cells = <0>;
16363 +
16364 + pitft: pitft@0{
16365 + compatible = "ilitek,ili9340";
16366 + reg = <0>;
16367 + pinctrl-names = "default";
16368 + pinctrl-0 = <&pitft_pins>;
16369 +
16370 + spi-max-frequency = <32000000>;
16371 + rotate = <90>;
16372 + fps = <25>;
16373 + bgr;
16374 + buswidth = <8>;
16375 + dc-gpios = <&gpio 25 0>;
16376 + debug = <0>;
16377 + };
16378 + };
16379 + };
16380 +
16381 + fragment@4 {
16382 + target = <&i2c1>;
16383 + __overlay__ {
16384 + /* needed to avoid dtc warning */
16385 + #address-cells = <1>;
16386 + #size-cells = <0>;
16387 +
16388 + ft6236: ft6236@38 {
16389 + compatible = "focaltech,ft6236";
16390 + reg = <0x38>;
16391 +
16392 + interrupt-parent = <&gpio>;
16393 + interrupts = <24 2>;
16394 + touchscreen-size-x = <240>;
16395 + touchscreen-size-y = <320>;
16396 + };
16397 + };
16398 + };
16399 +
16400 + __overrides__ {
16401 + speed = <&pitft>,"spi-max-frequency:0";
16402 + rotate = <&pitft>,"rotate:0";
16403 + fps = <&pitft>,"fps:0";
16404 + debug = <&pitft>,"debug:0";
16405 + touch-sizex = <&ft6236>,"touchscreen-size-x?";
16406 + touch-sizey = <&ft6236>,"touchscreen-size-y?";
16407 + touch-invx = <&ft6236>,"touchscreen-inverted-x?";
16408 + touch-invy = <&ft6236>,"touchscreen-inverted-y?";
16409 + touch-swapxy = <&ft6236>,"touchscreen-swapped-x-y?";
16410 + };
16411 +};
16412 diff --git a/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
16413 new file mode 100644
16414 index 000000000000..4a4a3f44c29d
16415 --- /dev/null
16416 +++ b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
16417 @@ -0,0 +1,119 @@
16418 +/*
16419 + * Device Tree overlay for Adafruit PiTFT 2.8" resistive touch screen
16420 + *
16421 + */
16422 +
16423 +/dts-v1/;
16424 +/plugin/;
16425 +
16426 +/ {
16427 + compatible = "brcm,bcm2835";
16428 +
16429 + fragment@0 {
16430 + target = <&spi0>;
16431 + __overlay__ {
16432 + status = "okay";
16433 + };
16434 + };
16435 +
16436 + fragment@1 {
16437 + target = <&spidev0>;
16438 + __overlay__ {
16439 + status = "disabled";
16440 + };
16441 + };
16442 +
16443 + fragment@2 {
16444 + target = <&spidev1>;
16445 + __overlay__ {
16446 + status = "disabled";
16447 + };
16448 + };
16449 +
16450 + fragment@3 {
16451 + target = <&gpio>;
16452 + __overlay__ {
16453 + pitft_pins: pitft_pins {
16454 + brcm,pins = <24 25>;
16455 + brcm,function = <0 1>; /* in out */
16456 + brcm,pull = <2 0>; /* pullup none */
16457 + };
16458 + };
16459 + };
16460 +
16461 + fragment@4 {
16462 + target = <&spi0>;
16463 + __overlay__ {
16464 + /* needed to avoid dtc warning */
16465 + #address-cells = <1>;
16466 + #size-cells = <0>;
16467 +
16468 + pitft: pitft@0{
16469 + compatible = "ilitek,ili9340";
16470 + reg = <0>;
16471 + pinctrl-names = "default";
16472 + pinctrl-0 = <&pitft_pins>;
16473 +
16474 + spi-max-frequency = <32000000>;
16475 + rotate = <90>;
16476 + fps = <25>;
16477 + bgr;
16478 + buswidth = <8>;
16479 + dc-gpios = <&gpio 25 0>;
16480 + debug = <0>;
16481 + };
16482 +
16483 + pitft_ts@1 {
16484 + compatible = "st,stmpe610";
16485 + reg = <1>;
16486 +
16487 + spi-max-frequency = <500000>;
16488 + irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
16489 + interrupts = <24 2>; /* high-to-low edge triggered */
16490 + interrupt-parent = <&gpio>;
16491 + interrupt-controller;
16492 +
16493 + stmpe_touchscreen {
16494 + compatible = "st,stmpe-ts";
16495 + st,sample-time = <4>;
16496 + st,mod-12b = <1>;
16497 + st,ref-sel = <0>;
16498 + st,adc-freq = <2>;
16499 + st,ave-ctrl = <3>;
16500 + st,touch-det-delay = <4>;
16501 + st,settling = <2>;
16502 + st,fraction-z = <7>;
16503 + st,i-drive = <0>;
16504 + };
16505 +
16506 + stmpe_gpio: stmpe_gpio {
16507 + #gpio-cells = <2>;
16508 + compatible = "st,stmpe-gpio";
16509 + /*
16510 + * only GPIO2 is wired/available
16511 + * and it is wired to the backlight
16512 + */
16513 + st,norequest-mask = <0x7b>;
16514 + };
16515 + };
16516 + };
16517 + };
16518 +
16519 + fragment@5 {
16520 + target-path = "/soc";
16521 + __overlay__ {
16522 + backlight {
16523 + compatible = "gpio-backlight";
16524 + gpios = <&stmpe_gpio 2 0>;
16525 + default-on;
16526 + };
16527 + };
16528 + };
16529 +
16530 + __overrides__ {
16531 + speed = <&pitft>,"spi-max-frequency:0";
16532 + rotate = <&pitft>,"rotate:0";
16533 + fps = <&pitft>,"fps:0";
16534 + debug = <&pitft>,"debug:0";
16535 + };
16536 +};
16537 diff --git a/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
16538 new file mode 100644
16539 index 000000000000..a69b6c2c7608
16540 --- /dev/null
16541 +++ b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
16542 @@ -0,0 +1,119 @@
16543 +/*
16544 + * Device Tree overlay for Adafruit PiTFT 3.5" resistive touch screen
16545 + *
16546 + */
16547 +
16548 +/dts-v1/;
16549 +/plugin/;
16550 +
16551 +/ {
16552 + compatible = "brcm,bcm2835";
16553 +
16554 + fragment@0 {
16555 + target = <&spi0>;
16556 + __overlay__ {
16557 + status = "okay";
16558 + };
16559 + };
16560 +
16561 + fragment@1 {
16562 + target = <&spidev0>;
16563 + __overlay__ {
16564 + status = "disabled";
16565 + };
16566 + };
16567 +
16568 + fragment@2 {
16569 + target = <&spidev1>;
16570 + __overlay__ {
16571 + status = "disabled";
16572 + };
16573 + };
16574 +
16575 + fragment@3 {
16576 + target = <&gpio>;
16577 + __overlay__ {
16578 + pitft_pins: pitft_pins {
16579 + brcm,pins = <24 25>;
16580 + brcm,function = <0 1>; /* in out */
16581 + brcm,pull = <2 0>; /* pullup none */
16582 + };
16583 + };
16584 + };
16585 +
16586 + fragment@4 {
16587 + target = <&spi0>;
16588 + __overlay__ {
16589 + /* needed to avoid dtc warning */
16590 + #address-cells = <1>;
16591 + #size-cells = <0>;
16592 +
16593 + pitft: pitft@0{
16594 + compatible = "himax,hx8357d";
16595 + reg = <0>;
16596 + pinctrl-names = "default";
16597 + pinctrl-0 = <&pitft_pins>;
16598 +
16599 + spi-max-frequency = <32000000>;
16600 + rotate = <90>;
16601 + fps = <25>;
16602 + bgr;
16603 + buswidth = <8>;
16604 + dc-gpios = <&gpio 25 0>;
16605 + debug = <0>;
16606 + };
16607 +
16608 + pitft_ts@1 {
16609 + compatible = "st,stmpe610";
16610 + reg = <1>;
16611 +
16612 + spi-max-frequency = <500000>;
16613 + irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
16614 + interrupts = <24 2>; /* high-to-low edge triggered */
16615 + interrupt-parent = <&gpio>;
16616 + interrupt-controller;
16617 +
16618 + stmpe_touchscreen {
16619 + compatible = "st,stmpe-ts";
16620 + st,sample-time = <4>;
16621 + st,mod-12b = <1>;
16622 + st,ref-sel = <0>;
16623 + st,adc-freq = <2>;
16624 + st,ave-ctrl = <3>;
16625 + st,touch-det-delay = <4>;
16626 + st,settling = <2>;
16627 + st,fraction-z = <7>;
16628 + st,i-drive = <0>;
16629 + };
16630 +
16631 + stmpe_gpio: stmpe_gpio {
16632 + #gpio-cells = <2>;
16633 + compatible = "st,stmpe-gpio";
16634 + /*
16635 + * only GPIO2 is wired/available
16636 + * and it is wired to the backlight
16637 + */
16638 + st,norequest-mask = <0x7b>;
16639 + };
16640 + };
16641 + };
16642 + };
16643 +
16644 + fragment@5 {
16645 + target-path = "/soc";
16646 + __overlay__ {
16647 + backlight {
16648 + compatible = "gpio-backlight";
16649 + gpios = <&stmpe_gpio 2 0>;
16650 + default-on;
16651 + };
16652 + };
16653 + };
16654 +
16655 + __overrides__ {
16656 + speed = <&pitft>,"spi-max-frequency:0";
16657 + rotate = <&pitft>,"rotate:0";
16658 + fps = <&pitft>,"fps:0";
16659 + debug = <&pitft>,"debug:0";
16660 + };
16661 +};
16662 diff --git a/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
16663 new file mode 100644
16664 index 000000000000..524a1c1d3670
16665 --- /dev/null
16666 +++ b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
16667 @@ -0,0 +1,38 @@
16668 +/dts-v1/;
16669 +/plugin/;
16670 +
16671 +/ {
16672 + compatible = "brcm,bcm2835";
16673 + fragment@0 {
16674 + target-path = "/";
16675 + __overlay__ {
16676 + pps: pps@12 {
16677 + compatible = "pps-gpio";
16678 + pinctrl-names = "default";
16679 + pinctrl-0 = <&pps_pins>;
16680 + gpios = <&gpio 18 0>;
16681 + status = "okay";
16682 + };
16683 + };
16684 + };
16685 +
16686 + fragment@1 {
16687 + target = <&gpio>;
16688 + __overlay__ {
16689 + pps_pins: pps_pins@12 {
16690 + brcm,pins = <18>;
16691 + brcm,function = <0>; // in
16692 + brcm,pull = <0>; // off
16693 + };
16694 + };
16695 + };
16696 +
16697 + __overrides__ {
16698 + gpiopin = <&pps>,"gpios:4",
16699 + <&pps>,"reg:0",
16700 + <&pps_pins>,"brcm,pins:0",
16701 + <&pps_pins>,"reg:0";
16702 + assert_falling_edge = <&pps>,"assert-falling-edge?";
16703 + capture_clear = <&pps>,"capture-clear?";
16704 + };
16705 +};
16706 diff --git a/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
16707 new file mode 100644
16708 index 000000000000..abdeddd0f2c8
16709 --- /dev/null
16710 +++ b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
16711 @@ -0,0 +1,47 @@
16712 +/dts-v1/;
16713 +/plugin/;
16714 +
16715 +/*
16716 +This is the 2-channel overlay - only use it if you need both channels.
16717 +
16718 +Legal pin,function combinations for each channel:
16719 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
16720 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
16721 +
16722 +N.B.:
16723 + 1) Pin 18 is the only one available on all platforms, and
16724 + it is the one used by the I2S audio interface.
16725 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
16726 + 2) The onboard analogue audio output uses both PWM channels.
16727 + 3) So be careful mixing audio and PWM.
16728 +*/
16729 +
16730 +/ {
16731 + fragment@0 {
16732 + target = <&gpio>;
16733 + __overlay__ {
16734 + pwm_pins: pwm_pins {
16735 + brcm,pins = <18 19>;
16736 + brcm,function = <2 2>; /* Alt5 */
16737 + };
16738 + };
16739 + };
16740 +
16741 + fragment@1 {
16742 + target = <&pwm>;
16743 + frag1: __overlay__ {
16744 + pinctrl-names = "default";
16745 + pinctrl-0 = <&pwm_pins>;
16746 + assigned-clock-rates = <100000000>;
16747 + status = "okay";
16748 + };
16749 + };
16750 +
16751 + __overrides__ {
16752 + pin = <&pwm_pins>,"brcm,pins:0";
16753 + pin2 = <&pwm_pins>,"brcm,pins:4";
16754 + func = <&pwm_pins>,"brcm,function:0";
16755 + func2 = <&pwm_pins>,"brcm,function:4";
16756 + clock = <&frag1>,"assigned-clock-rates:0";
16757 + };
16758 +};
16759 diff --git a/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
16760 new file mode 100644
16761 index 000000000000..119caf746b3b
16762 --- /dev/null
16763 +++ b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
16764 @@ -0,0 +1,40 @@
16765 +/dts-v1/;
16766 +/plugin/;
16767 +
16768 +/ {
16769 + compatible = "brcm,bcm2835";
16770 +
16771 + fragment@0 {
16772 + target = <&gpio>;
16773 + __overlay__ {
16774 + pwm0_pins: pwm0_pins {
16775 + brcm,pins = <18>;
16776 + brcm,function = <2>; /* Alt5 */
16777 + };
16778 + };
16779 + };
16780 +
16781 + fragment@1 {
16782 + target = <&pwm>;
16783 + __overlay__ {
16784 + pinctrl-names = "default";
16785 + pinctrl-0 = <&pwm0_pins>;
16786 + status = "okay";
16787 + };
16788 + };
16789 +
16790 + fragment@2 {
16791 + target-path = "/";
16792 + __overlay__ {
16793 + pwm-ir-transmitter {
16794 + compatible = "pwm-ir-tx";
16795 + pwms = <&pwm 0 100>;
16796 + };
16797 + };
16798 + };
16799 +
16800 + __overrides__ {
16801 + gpio_pin = <&pwm0_pins>, "brcm,pins:0";
16802 + func = <&pwm0_pins>,"brcm,function:0";
16803 + };
16804 +};
16805 diff --git a/arch/arm/boot/dts/overlays/pwm-overlay.dts b/arch/arm/boot/dts/overlays/pwm-overlay.dts
16806 new file mode 100644
16807 index 000000000000..27809e8dc746
16808 --- /dev/null
16809 +++ b/arch/arm/boot/dts/overlays/pwm-overlay.dts
16810 @@ -0,0 +1,43 @@
16811 +/dts-v1/;
16812 +/plugin/;
16813 +
16814 +/*
16815 +Legal pin,function combinations for each channel:
16816 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
16817 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
16818 +
16819 +N.B.:
16820 + 1) Pin 18 is the only one available on all platforms, and
16821 + it is the one used by the I2S audio interface.
16822 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
16823 + 2) The onboard analogue audio output uses both PWM channels.
16824 + 3) So be careful mixing audio and PWM.
16825 +*/
16826 +
16827 +/ {
16828 + fragment@0 {
16829 + target = <&gpio>;
16830 + __overlay__ {
16831 + pwm_pins: pwm_pins {
16832 + brcm,pins = <18>;
16833 + brcm,function = <2>; /* Alt5 */
16834 + };
16835 + };
16836 + };
16837 +
16838 + fragment@1 {
16839 + target = <&pwm>;
16840 + frag1: __overlay__ {
16841 + pinctrl-names = "default";
16842 + pinctrl-0 = <&pwm_pins>;
16843 + assigned-clock-rates = <100000000>;
16844 + status = "okay";
16845 + };
16846 + };
16847 +
16848 + __overrides__ {
16849 + pin = <&pwm_pins>,"brcm,pins:0";
16850 + func = <&pwm_pins>,"brcm,function:0";
16851 + clock = <&frag1>,"assigned-clock-rates:0";
16852 + };
16853 +};
16854 diff --git a/arch/arm/boot/dts/overlays/qca7000-overlay.dts b/arch/arm/boot/dts/overlays/qca7000-overlay.dts
16855 new file mode 100644
16856 index 000000000000..9a451202a2eb
16857 --- /dev/null
16858 +++ b/arch/arm/boot/dts/overlays/qca7000-overlay.dts
16859 @@ -0,0 +1,55 @@
16860 +// Overlay for the Qualcomm Atheros QCA7000 on I2SE's PLC Stamp micro EVK
16861 +// Visit: https://www.i2se.com/product/plc-stamp-micro-evk for details
16862 +
16863 +/dts-v1/;
16864 +/plugin/;
16865 +
16866 +/ {
16867 + compatible = "brcm,bcm2835";
16868 +
16869 + fragment@0 {
16870 + target = <&spidev0>;
16871 + __overlay__ {
16872 + status = "disabled";
16873 + };
16874 + };
16875 +
16876 + fragment@1 {
16877 + target = <&spi0>;
16878 + __overlay__ {
16879 + /* needed to avoid dtc warning */
16880 + #address-cells = <1>;
16881 + #size-cells = <0>;
16882 +
16883 + status = "okay";
16884 +
16885 + eth1: qca7000@0 {
16886 + compatible = "qca,qca7000";
16887 + reg = <0>; /* CE0 */
16888 + pinctrl-names = "default";
16889 + pinctrl-0 = <&eth1_pins>;
16890 + interrupt-parent = <&gpio>;
16891 + interrupts = <23 0x1>; /* rising edge */
16892 + spi-max-frequency = <12000000>;
16893 + status = "okay";
16894 + };
16895 + };
16896 + };
16897 +
16898 + fragment@2 {
16899 + target = <&gpio>;
16900 + __overlay__ {
16901 + eth1_pins: eth1_pins {
16902 + brcm,pins = <23>;
16903 + brcm,function = <0>; /* in */
16904 + brcm,pull = <0>; /* none */
16905 + };
16906 + };
16907 + };
16908 +
16909 + __overrides__ {
16910 + int_pin = <&eth1>, "interrupts:0",
16911 + <&eth1_pins>, "brcm,pins:0";
16912 + speed = <&eth1>, "spi-max-frequency:0";
16913 + };
16914 +};
16915 diff --git a/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
16916 new file mode 100644
16917 index 000000000000..ea1d952734e9
16918 --- /dev/null
16919 +++ b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
16920 @@ -0,0 +1,59 @@
16921 +// Device tree overlay for GPIO connected rotary encoder.
16922 +/dts-v1/;
16923 +/plugin/;
16924 +
16925 +/ {
16926 + compatible = "brcm,bcm2835";
16927 +
16928 + fragment@0 {
16929 + target = <&gpio>;
16930 + __overlay__ {
16931 + rotary_pins: rotary_pins@4 {
16932 + brcm,pins = <4 17>; /* gpio 4 17 */
16933 + brcm,function = <0 0>; /* input */
16934 + brcm,pull = <2 2>; /* pull-up */
16935 + };
16936 +
16937 + };
16938 + };
16939 +
16940 + fragment@1 {
16941 + target-path = "/";
16942 + __overlay__ {
16943 + rotary: rotary@4 {
16944 + compatible = "rotary-encoder";
16945 + status = "okay";
16946 + pinctrl-names = "default";
16947 + pinctrl-0 = <&rotary_pins>;
16948 + gpios = <&gpio 4 0>, <&gpio 17 0>;
16949 + linux,axis = <0>; /* REL_X */
16950 + rotary-encoder,encoding = "gray";
16951 + rotary-encoder,steps = <24>; /* 24 default */
16952 + rotary-encoder,steps-per-period = <1>; /* corresponds to full period mode. See README */
16953 + };
16954 + };
16955 +
16956 + };
16957 +
16958 + __overrides__ {
16959 + pin_a = <&rotary>,"gpios:4",
16960 + <&rotary_pins>,"brcm,pins:0",
16961 + /* modify reg values to allow multiple instantiation */
16962 + <&rotary>,"reg:0",
16963 + <&rotary_pins>,"reg:0";
16964 + pin_b = <&rotary>,"gpios:16",
16965 + <&rotary_pins>,"brcm,pins:4";
16966 + relative_axis = <&rotary>,"rotary-encoder,relative-axis?";
16967 + linux_axis = <&rotary>,"linux,axis:0";
16968 + rollover = <&rotary>,"rotary-encoder,rollover?";
16969 + steps-per-period = <&rotary>,"rotary-encoder,steps-per-period:0";
16970 + steps = <&rotary>,"rotary-encoder,steps:0";
16971 + wakeup = <&rotary>,"wakeup-source?";
16972 + encoding = <&rotary>,"rotary-encoder,encoding";
16973 + /* legacy parameters*/
16974 + rotary0_pin_a = <&rotary>,"gpios:4",
16975 + <&rotary_pins>,"brcm,pins:0";
16976 + rotary0_pin_b = <&rotary>,"gpios:16",
16977 + <&rotary_pins>,"brcm,pins:4";
16978 + };
16979 +};
16980 diff --git a/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts b/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
16981 new file mode 100644
16982 index 000000000000..cac5e44c6ec5
16983 --- /dev/null
16984 +++ b/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
16985 @@ -0,0 +1,21 @@
16986 +/*
16987 + * Devicetree overlay for mailbox-driven Raspberry Pi DSI Display
16988 + * backlight controller
16989 + */
16990 +/dts-v1/;
16991 +/plugin/;
16992 +
16993 +/ {
16994 + compatible = "brcm,bcm2835";
16995 +
16996 + fragment@0 {
16997 + target-path = "/";
16998 + __overlay__ {
16999 + rpi_backlight: rpi_backlight {
17000 + compatible = "raspberrypi,rpi-backlight";
17001 + firmware = <&firmware>;
17002 + status = "okay";
17003 + };
17004 + };
17005 + };
17006 +};
17007 diff --git a/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
17008 new file mode 100644
17009 index 000000000000..e2c25a0535e6
17010 --- /dev/null
17011 +++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
17012 @@ -0,0 +1,152 @@
17013 +// Definitions for the Cirrus Logic Audio Card
17014 +/dts-v1/;
17015 +/plugin/;
17016 +#include <dt-bindings/pinctrl/bcm2835.h>
17017 +#include <dt-bindings/gpio/gpio.h>
17018 +#include <dt-bindings/mfd/arizona.h>
17019 +
17020 +/ {
17021 + compatible = "brcm,bcm2835";
17022 +
17023 + fragment@0 {
17024 + target = <&i2s>;
17025 + __overlay__ {
17026 + status = "okay";
17027 + };
17028 + };
17029 +
17030 + fragment@1 {
17031 + target = <&gpio>;
17032 + __overlay__ {
17033 + wlf_pins: wlf_pins {
17034 + brcm,pins = <17 22 27 8>;
17035 + brcm,function = <
17036 + BCM2835_FSEL_GPIO_OUT
17037 + BCM2835_FSEL_GPIO_OUT
17038 + BCM2835_FSEL_GPIO_IN
17039 + BCM2835_FSEL_GPIO_OUT
17040 + >;
17041 + };
17042 + };
17043 + };
17044 +
17045 + fragment@2 {
17046 + target-path = "/";
17047 + __overlay__ {
17048 + rpi_cirrus_reg_1v8: rpi_cirrus_reg_1v8 {
17049 + compatible = "regulator-fixed";
17050 + regulator-name = "RPi-Cirrus 1v8";
17051 + regulator-min-microvolt = <1800000>;
17052 + regulator-max-microvolt = <1800000>;
17053 + regulator-always-on;
17054 + };
17055 + };
17056 + };
17057 +
17058 + fragment@3 {
17059 + target = <&spidev0>;
17060 + __overlay__ {
17061 + status = "disabled";
17062 + };
17063 + };
17064 +
17065 + fragment@4 {
17066 + target = <&spidev1>;
17067 + __overlay__ {
17068 + status = "disabled";
17069 + };
17070 + };
17071 +
17072 + fragment@5 {
17073 + target = <&spi0>;
17074 + __overlay__ {
17075 + #address-cells = <1>;
17076 + #size-cells = <0>;
17077 + status = "okay";
17078 +
17079 + wm5102@1{
17080 + compatible = "wlf,wm5102";
17081 + reg = <1>;
17082 +
17083 + spi-max-frequency = <500000>;
17084 +
17085 + interrupt-parent = <&gpio>;
17086 + interrupts = <27 8>;
17087 + interrupt-controller;
17088 + #interrupt-cells = <2>;
17089 +
17090 + gpio-controller;
17091 + #gpio-cells = <2>;
17092 +
17093 + LDOVDD-supply = <&rpi_cirrus_reg_1v8>;
17094 + AVDD-supply = <&rpi_cirrus_reg_1v8>;
17095 + DBVDD1-supply = <&rpi_cirrus_reg_1v8>;
17096 + DBVDD2-supply = <&vdd_3v3_reg>;
17097 + DBVDD3-supply = <&vdd_3v3_reg>;
17098 + CPVDD-supply = <&rpi_cirrus_reg_1v8>;
17099 + SPKVDDL-supply = <&vdd_5v0_reg>;
17100 + SPKVDDR-supply = <&vdd_5v0_reg>;
17101 + DCVDD-supply = <&arizona_ldo1>;
17102 +
17103 + wlf,reset = <&gpio 17 GPIO_ACTIVE_HIGH>;
17104 + wlf,ldoena = <&gpio 22 GPIO_ACTIVE_HIGH>;
17105 + wlf,gpio-defaults = <
17106 + ARIZONA_GP_DEFAULT
17107 + ARIZONA_GP_DEFAULT
17108 + ARIZONA_GP_DEFAULT
17109 + ARIZONA_GP_DEFAULT
17110 + ARIZONA_GP_DEFAULT
17111 + >;
17112 + wlf,micd-configs = <0 1 0>;
17113 + wlf,dmic-ref = <
17114 + ARIZONA_DMIC_MICVDD
17115 + ARIZONA_DMIC_MICBIAS2
17116 + ARIZONA_DMIC_MICVDD
17117 + ARIZONA_DMIC_MICVDD
17118 + >;
17119 + wlf,inmode = <
17120 + ARIZONA_INMODE_DIFF
17121 + ARIZONA_INMODE_DMIC
17122 + ARIZONA_INMODE_SE
17123 + ARIZONA_INMODE_DIFF
17124 + >;
17125 + status = "okay";
17126 +
17127 + arizona_ldo1: ldo1 {
17128 + regulator-name = "LDO1";
17129 + // default constraints as in
17130 + // arizona-ldo1.c
17131 + regulator-min-microvolt = <1200000>;
17132 + regulator-max-microvolt = <1800000>;
17133 + };
17134 + };
17135 + };
17136 + };
17137 +
17138 + fragment@6 {
17139 + target = <&i2c1>;
17140 + __overlay__ {
17141 + status = "okay";
17142 + #address-cells = <1>;
17143 + #size-cells = <0>;
17144 +
17145 + wm8804@3b {
17146 + compatible = "wlf,wm8804";
17147 + reg = <0x3b>;
17148 + status = "okay";
17149 + PVDD-supply = <&vdd_3v3_reg>;
17150 + DVDD-supply = <&vdd_3v3_reg>;
17151 + wlf,reset-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>;
17152 + };
17153 + };
17154 + };
17155 +
17156 + fragment@7 {
17157 + target = <&sound>;
17158 + __overlay__ {
17159 + compatible = "wlf,rpi-cirrus";
17160 + i2s-controller = <&i2s>;
17161 + status = "okay";
17162 + };
17163 + };
17164 +};
17165 diff --git a/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
17166 new file mode 100644
17167 index 000000000000..07a915342702
17168 --- /dev/null
17169 +++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
17170 @@ -0,0 +1,34 @@
17171 +// Definitions for RPi DAC
17172 +/dts-v1/;
17173 +/plugin/;
17174 +
17175 +/ {
17176 + compatible = "brcm,bcm2835";
17177 +
17178 + fragment@0 {
17179 + target = <&i2s>;
17180 + __overlay__ {
17181 + status = "okay";
17182 + };
17183 + };
17184 +
17185 + fragment@1 {
17186 + target-path = "/";
17187 + __overlay__ {
17188 + pcm1794a-codec {
17189 + #sound-dai-cells = <0>;
17190 + compatible = "ti,pcm1794a";
17191 + status = "okay";
17192 + };
17193 + };
17194 + };
17195 +
17196 + fragment@2 {
17197 + target = <&sound>;
17198 + __overlay__ {
17199 + compatible = "rpi,rpi-dac";
17200 + i2s-controller = <&i2s>;
17201 + status = "okay";
17202 + };
17203 + };
17204 +};
17205 diff --git a/arch/arm/boot/dts/overlays/rpi-display-overlay.dts b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts
17206 new file mode 100644
17207 index 000000000000..a5eed07d6a4b
17208 --- /dev/null
17209 +++ b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts
17210 @@ -0,0 +1,91 @@
17211 +/*
17212 + * Device Tree overlay for rpi-display by Watterott
17213 + *
17214 + */
17215 +
17216 +/dts-v1/;
17217 +/plugin/;
17218 +
17219 +/ {
17220 + compatible = "brcm,bcm2835";
17221 +
17222 + fragment@0 {
17223 + target = <&spi0>;
17224 + __overlay__ {
17225 + status = "okay";
17226 + };
17227 + };
17228 +
17229 + fragment@1 {
17230 + target = <&spidev0>;
17231 + __overlay__ {
17232 + status = "disabled";
17233 + };
17234 + };
17235 +
17236 + fragment@2 {
17237 + target = <&spidev1>;
17238 + __overlay__ {
17239 + status = "disabled";
17240 + };
17241 + };
17242 +
17243 + fragment@3 {
17244 + target = <&gpio>;
17245 + __overlay__ {
17246 + rpi_display_pins: rpi_display_pins {
17247 + brcm,pins = <18 23 24 25>;
17248 + brcm,function = <1 1 1 0>; /* out out out in */
17249 + brcm,pull = <0 0 0 2>; /* - - - up */
17250 + };
17251 + };
17252 + };
17253 +
17254 + fragment@4 {
17255 + target = <&spi0>;
17256 + __overlay__ {
17257 + /* needed to avoid dtc warning */
17258 + #address-cells = <1>;
17259 + #size-cells = <0>;
17260 +
17261 + rpidisplay: rpi-display@0{
17262 + compatible = "ilitek,ili9341";
17263 + reg = <0>;
17264 + pinctrl-names = "default";
17265 + pinctrl-0 = <&rpi_display_pins>;
17266 +
17267 + spi-max-frequency = <32000000>;
17268 + rotate = <270>;
17269 + bgr;
17270 + fps = <30>;
17271 + buswidth = <8>;
17272 + reset-gpios = <&gpio 23 0>;
17273 + dc-gpios = <&gpio 24 0>;
17274 + led-gpios = <&gpio 18 1>;
17275 + debug = <0>;
17276 + };
17277 +
17278 + rpidisplay_ts: rpi-display-ts@1 {
17279 + compatible = "ti,ads7846";
17280 + reg = <1>;
17281 +
17282 + spi-max-frequency = <2000000>;
17283 + interrupts = <25 2>; /* high-to-low edge triggered */
17284 + interrupt-parent = <&gpio>;
17285 + pendown-gpio = <&gpio 25 0>;
17286 + ti,x-plate-ohms = /bits/ 16 <60>;
17287 + ti,pressure-max = /bits/ 16 <255>;
17288 + };
17289 + };
17290 + };
17291 + __overrides__ {
17292 + speed = <&rpidisplay>,"spi-max-frequency:0";
17293 + rotate = <&rpidisplay>,"rotate:0";
17294 + fps = <&rpidisplay>,"fps:0";
17295 + debug = <&rpidisplay>,"debug:0";
17296 + xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
17297 + swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
17298 + backlight = <&rpidisplay>,"led-gpios:4",
17299 + <&rpi_display_pins>,"brcm,pins:0";
17300 + };
17301 +};
17302 diff --git a/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
17303 new file mode 100644
17304 index 000000000000..4dcb490f04b6
17305 --- /dev/null
17306 +++ b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
17307 @@ -0,0 +1,25 @@
17308 +/dts-v1/;
17309 +/plugin/;
17310 +
17311 +/ {
17312 + compatible = "brcm,bcm2835";
17313 +
17314 + fragment@0 {
17315 + target-path = "/soc/firmware";
17316 + __overlay__ {
17317 + ts: touchscreen {
17318 + compatible = "raspberrypi,firmware-ts";
17319 + touchscreen-size-x = <800>;
17320 + touchscreen-size-y = <480>;
17321 + };
17322 + };
17323 + };
17324 +
17325 + __overrides__ {
17326 + touchscreen-size-x = <&ts>,"touchscreen-size-x:0";
17327 + touchscreen-size-y = <&ts>,"touchscreen-size-y:0";
17328 + touchscreen-inverted-x = <&ts>,"touchscreen-inverted-x:?";
17329 + touchscreen-inverted-y = <&ts>,"touchscreen-inverted-y:?";
17330 + touchscreen-swapped-x-y = <&ts>,"touchscreen-swapped-x-y:?";
17331 + };
17332 +};
17333 diff --git a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
17334 new file mode 100644
17335 index 000000000000..21f8fe6f1229
17336 --- /dev/null
17337 +++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
17338 @@ -0,0 +1,70 @@
17339 +/*
17340 + * Overlay for the Raspberry Pi POE HAT.
17341 + */
17342 +/dts-v1/;
17343 +/plugin/;
17344 +
17345 +/ {
17346 + compatible = "brcm,bcm2835";
17347 +
17348 + fragment@0 {
17349 + target-path = "/";
17350 + __overlay__ {
17351 + fan0: rpi-poe-fan@0 {
17352 + compatible = "raspberrypi,rpi-poe-fan";
17353 + firmware = <&firmware>;
17354 + cooling-min-state = <0>;
17355 + cooling-max-state = <2>;
17356 + #cooling-cells = <2>;
17357 + cooling-levels = <0 150 255>;
17358 + status = "okay";
17359 + };
17360 + };
17361 + };
17362 +
17363 + fragment@1 {
17364 + target = <&cpu_thermal>;
17365 + __overlay__ {
17366 + trips {
17367 + trip0: trip0 {
17368 + temperature = <50000>;
17369 + hysteresis = <5000>;
17370 + type = "active";
17371 + };
17372 + trip1: trip1 {
17373 +
17374 + temperature = <55000>;
17375 + hysteresis = <5000>;
17376 + type = "active";
17377 + };
17378 + };
17379 + cooling-maps {
17380 + map0 {
17381 + trip = <&trip0>;
17382 + cooling-device = <&fan0 0 1>;
17383 + };
17384 + map1 {
17385 + trip = <&trip1>;
17386 + cooling-device = <&fan0 1 2>;
17387 + };
17388 + };
17389 + };
17390 + };
17391 +
17392 + fragment@2 {
17393 + target-path = "/__overrides__";
17394 + __overlay__ {
17395 + poe_fan_temp0 = <&trip0>,"temperature:0";
17396 + poe_fan_temp0_hyst = <&trip0>,"hysteresis:0";
17397 + poe_fan_temp1 = <&trip1>,"temperature:0";
17398 + poe_fan_temp1_hyst = <&trip1>,"hysteresis:0";
17399 + };
17400 + };
17401 +
17402 + __overrides__ {
17403 + poe_fan_temp0 = <&trip0>,"temperature:0";
17404 + poe_fan_temp0_hyst = <&trip0>,"hysteresis:0";
17405 + poe_fan_temp1 = <&trip1>,"temperature:0";
17406 + poe_fan_temp1_hyst = <&trip1>,"hysteresis:0";
17407 + };
17408 +};
17409 diff --git a/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
17410 new file mode 100644
17411 index 000000000000..9cda044a0f62
17412 --- /dev/null
17413 +++ b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
17414 @@ -0,0 +1,39 @@
17415 +// Definitions for Rpi-Proto
17416 +/dts-v1/;
17417 +/plugin/;
17418 +
17419 +/ {
17420 + compatible = "brcm,bcm2835";
17421 +
17422 + fragment@0 {
17423 + target = <&i2s>;
17424 + __overlay__ {
17425 + status = "okay";
17426 + };
17427 + };
17428 +
17429 + fragment@1 {
17430 + target = <&i2c1>;
17431 + __overlay__ {
17432 + #address-cells = <1>;
17433 + #size-cells = <0>;
17434 + status = "okay";
17435 +
17436 + wm8731@1a {
17437 + #sound-dai-cells = <0>;
17438 + compatible = "wlf,wm8731";
17439 + reg = <0x1a>;
17440 + status = "okay";
17441 + };
17442 + };
17443 + };
17444 +
17445 + fragment@2 {
17446 + target = <&sound>;
17447 + __overlay__ {
17448 + compatible = "rpi,rpi-proto";
17449 + i2s-controller = <&i2s>;
17450 + status = "okay";
17451 + };
17452 + };
17453 +};
17454 diff --git a/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
17455 new file mode 100644
17456 index 000000000000..89d8d2ea6b2e
17457 --- /dev/null
17458 +++ b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
17459 @@ -0,0 +1,47 @@
17460 +// rpi-sense HAT
17461 +/dts-v1/;
17462 +/plugin/;
17463 +
17464 +/ {
17465 + compatible = "brcm,bcm2835";
17466 +
17467 + fragment@0 {
17468 + target = <&i2c1>;
17469 + __overlay__ {
17470 + #address-cells = <1>;
17471 + #size-cells = <0>;
17472 + status = "okay";
17473 +
17474 + rpi-sense@46 {
17475 + compatible = "rpi,rpi-sense";
17476 + reg = <0x46>;
17477 + keys-int-gpios = <&gpio 23 1>;
17478 + status = "okay";
17479 + };
17480 +
17481 + lsm9ds1-magn@1c {
17482 + compatible = "st,lsm9ds1-magn";
17483 + reg = <0x1c>;
17484 + status = "okay";
17485 + };
17486 +
17487 + lsm9ds1-accel6a {
17488 + compatible = "st,lsm9ds1-accel";
17489 + reg = <0x6a>;
17490 + status = "okay";
17491 + };
17492 +
17493 + lps25h-press@5c {
17494 + compatible = "st,lps25h-press";
17495 + reg = <0x5c>;
17496 + status = "okay";
17497 + };
17498 +
17499 + hts221-humid@5f {
17500 + compatible = "st,hts221-humid", "st,hts221";
17501 + reg = <0x5f>;
17502 + status = "okay";
17503 + };
17504 + };
17505 + };
17506 +};
17507 diff --git a/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
17508 new file mode 100644
17509 index 000000000000..3c97a545d820
17510 --- /dev/null
17511 +++ b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
17512 @@ -0,0 +1,34 @@
17513 +// rpi-tv HAT
17514 +
17515 +/dts-v1/;
17516 +/plugin/;
17517 +
17518 +/ {
17519 + compatible = "brcm,bcm2835";
17520 +
17521 + fragment@0 {
17522 + target = <&spidev0>;
17523 + __overlay__ {
17524 + status = "disabled";
17525 + };
17526 + };
17527 +
17528 + fragment@1 {
17529 + target = <&spi0>;
17530 + __overlay__ {
17531 + /* needed to avoid dtc warning */
17532 + #address-cells = <1>;
17533 + #size-cells = <0>;
17534 +
17535 + status = "okay";
17536 +
17537 + cxd2880@0 {
17538 + compatible = "sony,cxd2880";
17539 + reg = <0>; /* CE0 */
17540 + spi-max-frequency = <50000000>;
17541 + status = "okay";
17542 + };
17543 + };
17544 + };
17545 +
17546 +};
17547 diff --git a/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
17548 new file mode 100644
17549 index 000000000000..87e9a326eff1
17550 --- /dev/null
17551 +++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
17552 @@ -0,0 +1,49 @@
17553 +// Definitions for RRA DigiDAC1 Audio card
17554 +/dts-v1/;
17555 +/plugin/;
17556 +
17557 +/ {
17558 + compatible = "brcm,bcm2835";
17559 +
17560 + fragment@0 {
17561 + target = <&i2s>;
17562 + __overlay__ {
17563 + status = "okay";
17564 + };
17565 + };
17566 +
17567 + fragment@1 {
17568 + target = <&i2c1>;
17569 + __overlay__ {
17570 + #address-cells = <1>;
17571 + #size-cells = <0>;
17572 + status = "okay";
17573 +
17574 + wm8804@3b {
17575 + #sound-dai-cells = <0>;
17576 + compatible = "wlf,wm8804";
17577 + reg = <0x3b>;
17578 + status = "okay";
17579 + PVDD-supply = <&vdd_3v3_reg>;
17580 + DVDD-supply = <&vdd_3v3_reg>;
17581 + };
17582 +
17583 + wm8742: wm8741@1a {
17584 + compatible = "wlf,wm8741";
17585 + reg = <0x1a>;
17586 + status = "okay";
17587 + AVDD-supply = <&vdd_5v0_reg>;
17588 + DVDD-supply = <&vdd_3v3_reg>;
17589 + };
17590 + };
17591 + };
17592 +
17593 + fragment@2 {
17594 + target = <&sound>;
17595 + __overlay__ {
17596 + compatible = "rra,digidac1-soundcard";
17597 + i2s-controller = <&i2s>;
17598 + status = "okay";
17599 + };
17600 + };
17601 +};
17602 diff --git a/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
17603 new file mode 100644
17604 index 000000000000..5fbff2e6c02d
17605 --- /dev/null
17606 +++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
17607 @@ -0,0 +1,38 @@
17608 +/dts-v1/;
17609 +/plugin/;
17610 +
17611 +/ {
17612 + compatible = "brcm,bcm2835";
17613 +
17614 + fragment@0 {
17615 + target = <&i2c_arm>;
17616 + __overlay__ {
17617 + #address-cells = <1>;
17618 + #size-cells = <0>;
17619 + status = "okay";
17620 +
17621 + sc16is750: sc16is750@48 {
17622 + compatible = "nxp,sc16is750";
17623 + reg = <0x48>; /* address */
17624 + clocks = <&sc16is750_clk>;
17625 + interrupt-parent = <&gpio>;
17626 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
17627 + #gpio-cells = <2>;
17628 +
17629 + sc16is750_clk: sc16is750_clk {
17630 + compatible = "fixed-clock";
17631 + #clock-cells = <0>;
17632 + clock-frequency = <14745600>;
17633 + };
17634 + };
17635 + };
17636 + };
17637 +
17638 +
17639 + __overrides__ {
17640 + int_pin = <&sc16is750>,"interrupts:0";
17641 + addr = <&sc16is750>,"reg:0",<&sc16is750_clk>,"name";
17642 + xtal = <&sc16is750>,"clock-frequency:0";
17643 + };
17644 +
17645 +};
17646 diff --git a/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
17647 new file mode 100644
17648 index 000000000000..57ae35c38442
17649 --- /dev/null
17650 +++ b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
17651 @@ -0,0 +1,40 @@
17652 +/dts-v1/;
17653 +/plugin/;
17654 +
17655 +/ {
17656 + compatible = "brcm,bcm2835";
17657 +
17658 + fragment@0 {
17659 + target = <&i2c1>;
17660 +
17661 + frag1: __overlay__ {
17662 + #address-cells = <1>;
17663 + #size-cells = <0>;
17664 + status = "okay";
17665 +
17666 + sc16is752: sc16is752@48 {
17667 + compatible = "nxp,sc16is752";
17668 + reg = <0x48>; // i2c address
17669 + clocks = <&sc16is752_clk>;
17670 + interrupt-parent = <&gpio>;
17671 + interrupts = <24 0x2>; /* IRQ_TYPE_EDGE_FALLING */
17672 + gpio-controller;
17673 + #gpio-cells = <0>;
17674 + i2c-max-frequency = <400000>;
17675 + status = "okay";
17676 +
17677 + sc16is752_clk: sc16is752_clk {
17678 + compatible = "fixed-clock";
17679 + #clock-cells = <0>;
17680 + clock-frequency = <14745600>;
17681 + };
17682 + };
17683 + };
17684 + };
17685 +
17686 + __overrides__ {
17687 + int_pin = <&sc16is752>,"interrupts:0";
17688 + addr = <&sc16is752>,"reg:0",<&sc16is752_clk>,"name";
17689 + xtal = <&sc16is752_clk>,"clock-frequency:0";
17690 + };
17691 +};
17692 diff --git a/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
17693 new file mode 100644
17694 index 000000000000..4e33b14afc78
17695 --- /dev/null
17696 +++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
17697 @@ -0,0 +1,61 @@
17698 +/dts-v1/;
17699 +/plugin/;
17700 +
17701 +/ {
17702 + compatible = "brcm,bcm2835";
17703 +
17704 + fragment@0 {
17705 + target = <&gpio>;
17706 + __overlay__ {
17707 + spi1_pins: spi1_pins {
17708 + brcm,pins = <19 20 21>;
17709 + brcm,function = <3>; /* alt4 */
17710 + };
17711 +
17712 + spi1_cs_pins: spi1_cs_pins {
17713 + brcm,pins = <18>;
17714 + brcm,function = <1>; /* output */
17715 + };
17716 + };
17717 + };
17718 +
17719 + fragment@1 {
17720 + target = <&spi1>;
17721 + frag1: __overlay__ {
17722 + #address-cells = <1>;
17723 + #size-cells = <0>;
17724 + pinctrl-names = "default";
17725 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
17726 + cs-gpios = <&gpio 18 1>;
17727 + status = "okay";
17728 +
17729 + sc16is752: sc16is752@0 {
17730 + compatible = "nxp,sc16is752";
17731 + reg = <0>; /* CE0 */
17732 + clocks = <&sc16is752_clk>;
17733 + interrupt-parent = <&gpio>;
17734 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
17735 + #gpio-controller;
17736 + #gpio-cells = <2>;
17737 + spi-max-frequency = <4000000>;
17738 +
17739 + sc16is752_clk: sc16is752_clk {
17740 + compatible = "fixed-clock";
17741 + #clock-cells = <0>;
17742 + clock-frequency = <14745600>;
17743 + };
17744 + };
17745 + };
17746 + };
17747 +
17748 + fragment@2 {
17749 + target = <&aux>;
17750 + __overlay__ {
17751 + status = "okay";
17752 + };
17753 + };
17754 +
17755 + __overrides__ {
17756 + int_pin = <&sc16is752>,"interrupts:0";
17757 + };
17758 +};
17759 diff --git a/arch/arm/boot/dts/overlays/sdhost-overlay.dts b/arch/arm/boot/dts/overlays/sdhost-overlay.dts
17760 new file mode 100644
17761 index 000000000000..0b72b4eeac88
17762 --- /dev/null
17763 +++ b/arch/arm/boot/dts/overlays/sdhost-overlay.dts
17764 @@ -0,0 +1,38 @@
17765 +/dts-v1/;
17766 +/plugin/;
17767 +
17768 +/* Provide backwards compatible aliases for the old sdhost dtparams. */
17769 +
17770 +/{
17771 + compatible = "brcm,bcm2835";
17772 +
17773 + fragment@0 {
17774 + target = <&sdhost>;
17775 + frag0: __overlay__ {
17776 + brcm,overclock-50 = <0>;
17777 + brcm,pio-limit = <1>;
17778 + status = "okay";
17779 + };
17780 + };
17781 +
17782 + fragment@1 {
17783 + target = <&mmc>;
17784 + __overlay__ {
17785 + status = "disabled";
17786 + };
17787 + };
17788 +
17789 + fragment@2 {
17790 + target = <&mmcnr>;
17791 + __overlay__ {
17792 + status = "disabled";
17793 + };
17794 + };
17795 +
17796 + __overrides__ {
17797 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
17798 + force_pio = <&frag0>,"brcm,force-pio?";
17799 + pio_limit = <&frag0>,"brcm,pio-limit:0";
17800 + debug = <&frag0>,"brcm,debug?";
17801 + };
17802 +};
17803 diff --git a/arch/arm/boot/dts/overlays/sdio-overlay.dts b/arch/arm/boot/dts/overlays/sdio-overlay.dts
17804 new file mode 100644
17805 index 000000000000..873e49056379
17806 --- /dev/null
17807 +++ b/arch/arm/boot/dts/overlays/sdio-overlay.dts
17808 @@ -0,0 +1,77 @@
17809 +/dts-v1/;
17810 +/plugin/;
17811 +
17812 +/* Enable SDIO from MMC interface via various GPIO groups */
17813 +
17814 +/{
17815 + compatible = "brcm,bcm2835";
17816 +
17817 + fragment@0 {
17818 + target = <&mmcnr>;
17819 + __overlay__ {
17820 + status = "disabled";
17821 + };
17822 + };
17823 +
17824 + fragment@1 {
17825 + target = <&mmc>;
17826 + sdio_ovl: __overlay__ {
17827 + pinctrl-0 = <&sdio_ovl_pins>;
17828 + pinctrl-names = "default";
17829 + non-removable;
17830 + bus-width = <4>;
17831 + status = "okay";
17832 + };
17833 + };
17834 +
17835 + fragment@2 {
17836 + target = <&gpio>;
17837 + __overlay__ {
17838 + sdio_ovl_pins: sdio_ovl_pins {
17839 + brcm,pins = <22 23 24 25 26 27>;
17840 + brcm,function = <7>; /* ALT3 = SD1 */
17841 + brcm,pull = <0 2 2 2 2 2>;
17842 + };
17843 + };
17844 + };
17845 +
17846 + fragment@3 {
17847 + target = <&sdio_ovl_pins>;
17848 + __dormant__ {
17849 + brcm,pins = <22 23 24 25>;
17850 + brcm,pull = <0 2 2 2>;
17851 + };
17852 + };
17853 +
17854 + fragment@4 {
17855 + target = <&sdio_ovl_pins>;
17856 + __dormant__ {
17857 + brcm,pins = <34 35 36 37>;
17858 + brcm,pull = <0 2 2 2>;
17859 + };
17860 + };
17861 +
17862 + fragment@5 {
17863 + target = <&sdio_ovl_pins>;
17864 + __dormant__ {
17865 + brcm,pins = <34 35 36 37 38 39>;
17866 + brcm,pull = <0 2 2 2 2 2>;
17867 + };
17868 + };
17869 +
17870 + fragment@6 {
17871 + target-path = "/aliases";
17872 + __overlay__ {
17873 + mmc1 = "/soc/mmc@7e300000";
17874 + };
17875 + };
17876 +
17877 + __overrides__ {
17878 + poll_once = <&sdio_ovl>,"non-removable?";
17879 + bus_width = <&sdio_ovl>,"bus-width:0";
17880 + sdio_overclock = <&sdio_ovl>,"brcm,overclock-50:0";
17881 + gpios_22_25 = <0>,"=3";
17882 + gpios_34_37 = <0>,"=4";
17883 + gpios_34_39 = <0>,"=5";
17884 + };
17885 +};
17886 diff --git a/arch/arm/boot/dts/overlays/sdtweak-overlay.dts b/arch/arm/boot/dts/overlays/sdtweak-overlay.dts
17887 new file mode 100644
17888 index 000000000000..38157d2f9bf3
17889 --- /dev/null
17890 +++ b/arch/arm/boot/dts/overlays/sdtweak-overlay.dts
17891 @@ -0,0 +1,25 @@
17892 +/dts-v1/;
17893 +/plugin/;
17894 +
17895 +/* Provide backwards compatible aliases for the old sdhost dtparams. */
17896 +
17897 +/{
17898 + compatible = "brcm,bcm2835";
17899 +
17900 + fragment@0 {
17901 + target = <&sdhost>;
17902 + frag0: __overlay__ {
17903 + brcm,overclock-50 = <0>;
17904 + brcm,pio-limit = <1>;
17905 + };
17906 + };
17907 +
17908 + __overrides__ {
17909 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
17910 + force_pio = <&frag0>,"brcm,force-pio?";
17911 + pio_limit = <&frag0>,"brcm,pio-limit:0";
17912 + debug = <&frag0>,"brcm,debug?";
17913 + enable = <&frag0>,"status";
17914 + poll_once = <&frag0>,"non-removable?";
17915 + };
17916 +};
17917 diff --git a/arch/arm/boot/dts/overlays/smi-dev-overlay.dts b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts
17918 new file mode 100644
17919 index 000000000000..b610d8283608
17920 --- /dev/null
17921 +++ b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts
17922 @@ -0,0 +1,18 @@
17923 +// Description: Overlay to enable character device interface for SMI.
17924 +// Author: Luke Wren <luke@raspberrypi.org>
17925 +
17926 +/dts-v1/;
17927 +/plugin/;
17928 +
17929 +/{
17930 + fragment@0 {
17931 + target = <&soc>;
17932 + __overlay__ {
17933 + smi_dev {
17934 + compatible = "brcm,bcm2835-smi-dev";
17935 + smi_handle = <&smi>;
17936 + status = "okay";
17937 + };
17938 + };
17939 + };
17940 +};
17941 diff --git a/arch/arm/boot/dts/overlays/smi-nand-overlay.dts b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts
17942 new file mode 100644
17943 index 000000000000..ae1e50329d66
17944 --- /dev/null
17945 +++ b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts
17946 @@ -0,0 +1,66 @@
17947 +// Description: Overlay to enable NAND flash through
17948 +// the secondary memory interface
17949 +// Author: Luke Wren
17950 +
17951 +/dts-v1/;
17952 +/plugin/;
17953 +
17954 +/{
17955 + compatible = "brcm,bcm2835";
17956 +
17957 + fragment@0 {
17958 + target = <&smi>;
17959 + __overlay__ {
17960 + pinctrl-names = "default";
17961 + pinctrl-0 = <&smi_pins>;
17962 + status = "okay";
17963 + };
17964 + };
17965 +
17966 + fragment@1 {
17967 + target = <&soc>;
17968 + __overlay__ {
17969 + nand: flash@0 {
17970 + compatible = "brcm,bcm2835-smi-nand";
17971 + smi_handle = <&smi>;
17972 + #address-cells = <1>;
17973 + #size-cells = <1>;
17974 + status = "okay";
17975 +
17976 + partition@0 {
17977 + label = "stage2";
17978 + // 128k
17979 + reg = <0 0x20000>;
17980 + read-only;
17981 + };
17982 + partition@1 {
17983 + label = "firmware";
17984 + // 16M
17985 + reg = <0x20000 0x1000000>;
17986 + read-only;
17987 + };
17988 + partition@2 {
17989 + label = "root";
17990 + // 2G (will need to use 64 bit for >=4G)
17991 + reg = <0x1020000 0x80000000>;
17992 + };
17993 + };
17994 + };
17995 + };
17996 +
17997 + fragment@2 {
17998 + target = <&gpio>;
17999 + __overlay__ {
18000 + smi_pins: smi_pins {
18001 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
18002 + 12 13 14 15>;
18003 + /* Alt 1: SMI */
18004 + brcm,function = <5 5 5 5 5 5 5 5 5 5 5
18005 + 5 5 5 5 5>;
18006 + /* /CS, /WE and /OE are pulled high, as they are
18007 + generally active low signals */
18008 + brcm,pull = <2 2 2 2 2 2 2 2 0 0 0 0 0 0 0 0>;
18009 + };
18010 + };
18011 + };
18012 +};
18013 diff --git a/arch/arm/boot/dts/overlays/smi-overlay.dts b/arch/arm/boot/dts/overlays/smi-overlay.dts
18014 new file mode 100644
18015 index 000000000000..70104c11627c
18016 --- /dev/null
18017 +++ b/arch/arm/boot/dts/overlays/smi-overlay.dts
18018 @@ -0,0 +1,37 @@
18019 +// Description: Overlay to enable the secondary memory interface peripheral
18020 +// Author: Luke Wren
18021 +
18022 +/dts-v1/;
18023 +/plugin/;
18024 +
18025 +/{
18026 + compatible = "brcm,bcm2835";
18027 +
18028 + fragment@0 {
18029 + target = <&smi>;
18030 + __overlay__ {
18031 + pinctrl-names = "default";
18032 + pinctrl-0 = <&smi_pins>;
18033 + status = "okay";
18034 + };
18035 + };
18036 +
18037 + fragment@1 {
18038 + target = <&gpio>;
18039 + __overlay__ {
18040 + smi_pins: smi_pins {
18041 + /* Don't configure the top two address bits, as
18042 + these are already used as ID_SD and ID_SC */
18043 + brcm,pins = <2 3 4 5 6 7 8 9 10 11 12 13 14 15
18044 + 16 17 18 19 20 21 22 23 24 25>;
18045 + /* Alt 0: SMI */
18046 + brcm,function = <5 5 5 5 5 5 5 5 5 5 5 5 5 5 5
18047 + 5 5 5 5 5 5 5 5 5>;
18048 + /* /CS, /WE and /OE are pulled high, as they are
18049 + generally active low signals */
18050 + brcm,pull = <2 2 2 2 2 2 0 0 0 0 0 0 0 0 0 0 0
18051 + 0 0 0 0 0 0 0>;
18052 + };
18053 + };
18054 + };
18055 +};
18056 diff --git a/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
18057 new file mode 100644
18058 index 000000000000..a132b8637c31
18059 --- /dev/null
18060 +++ b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
18061 @@ -0,0 +1,31 @@
18062 +/*
18063 + * Device tree overlay to move spi0 to gpio 35 to 39 on CM
18064 + */
18065 +
18066 +/dts-v1/;
18067 +/plugin/;
18068 +
18069 +/ {
18070 + compatible = "brcm,bcm2835";
18071 +
18072 + fragment@0 {
18073 + target = <&spi0>;
18074 + __overlay__ {
18075 + cs-gpios = <&gpio 36 1>, <&gpio 35 1>;
18076 + };
18077 + };
18078 +
18079 + fragment@1 {
18080 + target = <&spi0_cs_pins>;
18081 + __overlay__ {
18082 + brcm,pins = <36 35>;
18083 + };
18084 + };
18085 +
18086 + fragment@2 {
18087 + target = <&spi0_pins>;
18088 + __overlay__ {
18089 + brcm,pins = <37 38 39>;
18090 + };
18091 + };
18092 +};
18093 diff --git a/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts b/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
18094 new file mode 100644
18095 index 000000000000..9ebcaf1b5ea0
18096 --- /dev/null
18097 +++ b/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
18098 @@ -0,0 +1,36 @@
18099 +/*
18100 + * Boot EEPROM overlay
18101 + */
18102 +
18103 +/dts-v1/;
18104 +/plugin/;
18105 +
18106 +/ {
18107 + compatible = "brcm,bcm2835";
18108 +
18109 + fragment@0 {
18110 + target = <&spi0>;
18111 + __overlay__ {
18112 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
18113 + status = "okay";
18114 + };
18115 + };
18116 +
18117 + fragment@1 {
18118 + target = <&spi0_cs_pins>;
18119 + __overlay__ {
18120 + brcm,pins = <45 44 43>;
18121 + brcm,function = <1>; /* output */
18122 + status = "okay";
18123 + };
18124 + };
18125 +
18126 + fragment@2 {
18127 + target = <&spi0_pins>;
18128 + __overlay__ {
18129 + brcm,pins = <40 41 42>;
18130 + brcm,function = <3>; /* alt4 */
18131 + status = "okay";
18132 + };
18133 + };
18134 +};
18135 diff --git a/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
18136 new file mode 100644
18137 index 000000000000..9664afc9845c
18138 --- /dev/null
18139 +++ b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
18140 @@ -0,0 +1,33 @@
18141 +/dts-v1/;
18142 +/plugin/;
18143 +
18144 +/ {
18145 + compatible = "brcm,bcm2835";
18146 +
18147 + fragment@0 {
18148 + target = <&spidev0>;
18149 + __dormant__ {
18150 + status = "disabled";
18151 + };
18152 + };
18153 +
18154 + fragment@1 {
18155 + target = <&spi0>;
18156 + __dormant__ {
18157 + #address-cells = <1>;
18158 + #size-cells = <0>;
18159 + status = "okay";
18160 +
18161 + rtc-pcf2123@0 {
18162 + compatible = "nxp,rtc-pcf2123";
18163 + spi-max-frequency = <5000000>;
18164 + spi-cs-high = <1>;
18165 + reg = <0>;
18166 + };
18167 + };
18168 + };
18169 +
18170 + __overrides__ {
18171 + pcf2123 = <0>, "=0=1";
18172 + };
18173 +};
18174 diff --git a/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
18175 new file mode 100644
18176 index 000000000000..ff41439a483a
18177 --- /dev/null
18178 +++ b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
18179 @@ -0,0 +1,29 @@
18180 +/dts-v1/;
18181 +/plugin/;
18182 +
18183 +
18184 +/ {
18185 + compatible = "brcm,bcm2835";
18186 +
18187 + fragment@0 {
18188 + target = <&spi0_cs_pins>;
18189 + frag0: __overlay__ {
18190 + brcm,pins = <8 7>;
18191 + };
18192 + };
18193 +
18194 + fragment@1 {
18195 + target = <&spi0>;
18196 + frag1: __overlay__ {
18197 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
18198 + status = "okay";
18199 + };
18200 + };
18201 +
18202 + __overrides__ {
18203 + cs0_pin = <&frag0>,"brcm,pins:0",
18204 + <&frag1>,"cs-gpios:4";
18205 + cs1_pin = <&frag0>,"brcm,pins:4",
18206 + <&frag1>,"cs-gpios:16";
18207 + };
18208 +};
18209 diff --git a/arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts b/arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
18210 new file mode 100644
18211 index 000000000000..168a0dc80ad1
18212 --- /dev/null
18213 +++ b/arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
18214 @@ -0,0 +1,26 @@
18215 +/*
18216 + * Device tree overlay to re-enable hardware CS for SPI0
18217 + */
18218 +
18219 +/dts-v1/;
18220 +/plugin/;
18221 +
18222 +/ {
18223 + compatible = "brcm,bcm2835";
18224 +
18225 + fragment@0 {
18226 + target = <&spi0>;
18227 + __overlay__ {
18228 + cs-gpios = <0>, <0>;
18229 + status = "okay";
18230 + };
18231 + };
18232 +
18233 + fragment@1 {
18234 + target = <&spi0_cs_pins>;
18235 + __overlay__ {
18236 + brcm,pins = <8 7>;
18237 + brcm,function = <4>; /* alt0 */
18238 + };
18239 + };
18240 +};
18241 diff --git a/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
18242 new file mode 100644
18243 index 000000000000..ea2794bc5fd5
18244 --- /dev/null
18245 +++ b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
18246 @@ -0,0 +1,57 @@
18247 +/dts-v1/;
18248 +/plugin/;
18249 +
18250 +
18251 +/ {
18252 + compatible = "brcm,bcm2835";
18253 +
18254 + fragment@0 {
18255 + target = <&gpio>;
18256 + __overlay__ {
18257 + spi1_pins: spi1_pins {
18258 + brcm,pins = <19 20 21>;
18259 + brcm,function = <3>; /* alt4 */
18260 + };
18261 +
18262 + spi1_cs_pins: spi1_cs_pins {
18263 + brcm,pins = <18>;
18264 + brcm,function = <1>; /* output */
18265 + };
18266 + };
18267 + };
18268 +
18269 + fragment@1 {
18270 + target = <&spi1>;
18271 + frag1: __overlay__ {
18272 + /* needed to avoid dtc warning */
18273 + #address-cells = <1>;
18274 + #size-cells = <0>;
18275 + pinctrl-names = "default";
18276 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
18277 + cs-gpios = <&gpio 18 1>;
18278 + status = "okay";
18279 +
18280 + spidev1_0: spidev@0 {
18281 + compatible = "spidev";
18282 + reg = <0>; /* CE0 */
18283 + #address-cells = <1>;
18284 + #size-cells = <0>;
18285 + spi-max-frequency = <125000000>;
18286 + status = "okay";
18287 + };
18288 + };
18289 + };
18290 +
18291 + fragment@2 {
18292 + target = <&aux>;
18293 + __overlay__ {
18294 + status = "okay";
18295 + };
18296 + };
18297 +
18298 + __overrides__ {
18299 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
18300 + <&frag1>,"cs-gpios:4";
18301 + cs0_spidev = <&spidev1_0>,"status";
18302 + };
18303 +};
18304 diff --git a/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
18305 new file mode 100644
18306 index 000000000000..dab34ee79ae2
18307 --- /dev/null
18308 +++ b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
18309 @@ -0,0 +1,69 @@
18310 +/dts-v1/;
18311 +/plugin/;
18312 +
18313 +
18314 +/ {
18315 + compatible = "brcm,bcm2835";
18316 +
18317 + fragment@0 {
18318 + target = <&gpio>;
18319 + __overlay__ {
18320 + spi1_pins: spi1_pins {
18321 + brcm,pins = <19 20 21>;
18322 + brcm,function = <3>; /* alt4 */
18323 + };
18324 +
18325 + spi1_cs_pins: spi1_cs_pins {
18326 + brcm,pins = <18 17>;
18327 + brcm,function = <1>; /* output */
18328 + };
18329 + };
18330 + };
18331 +
18332 + fragment@1 {
18333 + target = <&spi1>;
18334 + frag1: __overlay__ {
18335 + /* needed to avoid dtc warning */
18336 + #address-cells = <1>;
18337 + #size-cells = <0>;
18338 + pinctrl-names = "default";
18339 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
18340 + cs-gpios = <&gpio 18 1>, <&gpio 17 1>;
18341 + status = "okay";
18342 +
18343 + spidev1_0: spidev@0 {
18344 + compatible = "spidev";
18345 + reg = <0>; /* CE0 */
18346 + #address-cells = <1>;
18347 + #size-cells = <0>;
18348 + spi-max-frequency = <125000000>;
18349 + status = "okay";
18350 + };
18351 +
18352 + spidev1_1: spidev@1 {
18353 + compatible = "spidev";
18354 + reg = <1>; /* CE1 */
18355 + #address-cells = <1>;
18356 + #size-cells = <0>;
18357 + spi-max-frequency = <125000000>;
18358 + status = "okay";
18359 + };
18360 + };
18361 + };
18362 +
18363 + fragment@2 {
18364 + target = <&aux>;
18365 + __overlay__ {
18366 + status = "okay";
18367 + };
18368 + };
18369 +
18370 + __overrides__ {
18371 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
18372 + <&frag1>,"cs-gpios:4";
18373 + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
18374 + <&frag1>,"cs-gpios:16";
18375 + cs0_spidev = <&spidev1_0>,"status";
18376 + cs1_spidev = <&spidev1_1>,"status";
18377 + };
18378 +};
18379 diff --git a/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
18380 new file mode 100644
18381 index 000000000000..bc7e7d04324b
18382 --- /dev/null
18383 +++ b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
18384 @@ -0,0 +1,81 @@
18385 +/dts-v1/;
18386 +/plugin/;
18387 +
18388 +
18389 +/ {
18390 + compatible = "brcm,bcm2835";
18391 +
18392 + fragment@0 {
18393 + target = <&gpio>;
18394 + __overlay__ {
18395 + spi1_pins: spi1_pins {
18396 + brcm,pins = <19 20 21>;
18397 + brcm,function = <3>; /* alt4 */
18398 + };
18399 +
18400 + spi1_cs_pins: spi1_cs_pins {
18401 + brcm,pins = <18 17 16>;
18402 + brcm,function = <1>; /* output */
18403 + };
18404 + };
18405 + };
18406 +
18407 + fragment@1 {
18408 + target = <&spi1>;
18409 + frag1: __overlay__ {
18410 + /* needed to avoid dtc warning */
18411 + #address-cells = <1>;
18412 + #size-cells = <0>;
18413 + pinctrl-names = "default";
18414 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
18415 + cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>;
18416 + status = "okay";
18417 +
18418 + spidev1_0: spidev@0 {
18419 + compatible = "spidev";
18420 + reg = <0>; /* CE0 */
18421 + #address-cells = <1>;
18422 + #size-cells = <0>;
18423 + spi-max-frequency = <125000000>;
18424 + status = "okay";
18425 + };
18426 +
18427 + spidev1_1: spidev@1 {
18428 + compatible = "spidev";
18429 + reg = <1>; /* CE1 */
18430 + #address-cells = <1>;
18431 + #size-cells = <0>;
18432 + spi-max-frequency = <125000000>;
18433 + status = "okay";
18434 + };
18435 +
18436 + spidev1_2: spidev@2 {
18437 + compatible = "spidev";
18438 + reg = <2>; /* CE2 */
18439 + #address-cells = <1>;
18440 + #size-cells = <0>;
18441 + spi-max-frequency = <125000000>;
18442 + status = "okay";
18443 + };
18444 + };
18445 + };
18446 +
18447 + fragment@2 {
18448 + target = <&aux>;
18449 + __overlay__ {
18450 + status = "okay";
18451 + };
18452 + };
18453 +
18454 + __overrides__ {
18455 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
18456 + <&frag1>,"cs-gpios:4";
18457 + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
18458 + <&frag1>,"cs-gpios:16";
18459 + cs2_pin = <&spi1_cs_pins>,"brcm,pins:8",
18460 + <&frag1>,"cs-gpios:28";
18461 + cs0_spidev = <&spidev1_0>,"status";
18462 + cs1_spidev = <&spidev1_1>,"status";
18463 + cs2_spidev = <&spidev1_2>,"status";
18464 + };
18465 +};
18466 diff --git a/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
18467 new file mode 100644
18468 index 000000000000..2a29750462af
18469 --- /dev/null
18470 +++ b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
18471 @@ -0,0 +1,57 @@
18472 +/dts-v1/;
18473 +/plugin/;
18474 +
18475 +
18476 +/ {
18477 + compatible = "brcm,bcm2835";
18478 +
18479 + fragment@0 {
18480 + target = <&gpio>;
18481 + __overlay__ {
18482 + spi2_pins: spi2_pins {
18483 + brcm,pins = <40 41 42>;
18484 + brcm,function = <3>; /* alt4 */
18485 + };
18486 +
18487 + spi2_cs_pins: spi2_cs_pins {
18488 + brcm,pins = <43>;
18489 + brcm,function = <1>; /* output */
18490 + };
18491 + };
18492 + };
18493 +
18494 + fragment@1 {
18495 + target = <&spi2>;
18496 + frag1: __overlay__ {
18497 + /* needed to avoid dtc warning */
18498 + #address-cells = <1>;
18499 + #size-cells = <0>;
18500 + pinctrl-names = "default";
18501 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
18502 + cs-gpios = <&gpio 43 1>;
18503 + status = "okay";
18504 +
18505 + spidev2_0: spidev@0 {
18506 + compatible = "spidev";
18507 + reg = <0>; /* CE0 */
18508 + #address-cells = <1>;
18509 + #size-cells = <0>;
18510 + spi-max-frequency = <125000000>;
18511 + status = "okay";
18512 + };
18513 + };
18514 + };
18515 +
18516 + fragment@2 {
18517 + target = <&aux>;
18518 + __overlay__ {
18519 + status = "okay";
18520 + };
18521 + };
18522 +
18523 + __overrides__ {
18524 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
18525 + <&frag1>,"cs-gpios:4";
18526 + cs0_spidev = <&spidev2_0>,"status";
18527 + };
18528 +};
18529 diff --git a/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
18530 new file mode 100644
18531 index 000000000000..642678fc9ddd
18532 --- /dev/null
18533 +++ b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
18534 @@ -0,0 +1,69 @@
18535 +/dts-v1/;
18536 +/plugin/;
18537 +
18538 +
18539 +/ {
18540 + compatible = "brcm,bcm2835";
18541 +
18542 + fragment@0 {
18543 + target = <&gpio>;
18544 + __overlay__ {
18545 + spi2_pins: spi2_pins {
18546 + brcm,pins = <40 41 42>;
18547 + brcm,function = <3>; /* alt4 */
18548 + };
18549 +
18550 + spi2_cs_pins: spi2_cs_pins {
18551 + brcm,pins = <43 44>;
18552 + brcm,function = <1>; /* output */
18553 + };
18554 + };
18555 + };
18556 +
18557 + fragment@1 {
18558 + target = <&spi2>;
18559 + frag1: __overlay__ {
18560 + /* needed to avoid dtc warning */
18561 + #address-cells = <1>;
18562 + #size-cells = <0>;
18563 + pinctrl-names = "default";
18564 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
18565 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>;
18566 + status = "okay";
18567 +
18568 + spidev2_0: spidev@0 {
18569 + compatible = "spidev";
18570 + reg = <0>; /* CE0 */
18571 + #address-cells = <1>;
18572 + #size-cells = <0>;
18573 + spi-max-frequency = <125000000>;
18574 + status = "okay";
18575 + };
18576 +
18577 + spidev2_1: spidev@1 {
18578 + compatible = "spidev";
18579 + reg = <1>; /* CE1 */
18580 + #address-cells = <1>;
18581 + #size-cells = <0>;
18582 + spi-max-frequency = <125000000>;
18583 + status = "okay";
18584 + };
18585 + };
18586 + };
18587 +
18588 + fragment@2 {
18589 + target = <&aux>;
18590 + __overlay__ {
18591 + status = "okay";
18592 + };
18593 + };
18594 +
18595 + __overrides__ {
18596 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
18597 + <&frag1>,"cs-gpios:4";
18598 + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
18599 + <&frag1>,"cs-gpios:16";
18600 + cs0_spidev = <&spidev2_0>,"status";
18601 + cs1_spidev = <&spidev2_1>,"status";
18602 + };
18603 +};
18604 diff --git a/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
18605 new file mode 100644
18606 index 000000000000..28d40c6c3c37
18607 --- /dev/null
18608 +++ b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
18609 @@ -0,0 +1,81 @@
18610 +/dts-v1/;
18611 +/plugin/;
18612 +
18613 +
18614 +/ {
18615 + compatible = "brcm,bcm2835";
18616 +
18617 + fragment@0 {
18618 + target = <&gpio>;
18619 + __overlay__ {
18620 + spi2_pins: spi2_pins {
18621 + brcm,pins = <40 41 42>;
18622 + brcm,function = <3>; /* alt4 */
18623 + };
18624 +
18625 + spi2_cs_pins: spi2_cs_pins {
18626 + brcm,pins = <43 44 45>;
18627 + brcm,function = <1>; /* output */
18628 + };
18629 + };
18630 + };
18631 +
18632 + fragment@1 {
18633 + target = <&spi2>;
18634 + frag1: __overlay__ {
18635 + /* needed to avoid dtc warning */
18636 + #address-cells = <1>;
18637 + #size-cells = <0>;
18638 + pinctrl-names = "default";
18639 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
18640 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
18641 + status = "okay";
18642 +
18643 + spidev2_0: spidev@0 {
18644 + compatible = "spidev";
18645 + reg = <0>; /* CE0 */
18646 + #address-cells = <1>;
18647 + #size-cells = <0>;
18648 + spi-max-frequency = <125000000>;
18649 + status = "okay";
18650 + };
18651 +
18652 + spidev2_1: spidev@1 {
18653 + compatible = "spidev";
18654 + reg = <1>; /* CE1 */
18655 + #address-cells = <1>;
18656 + #size-cells = <0>;
18657 + spi-max-frequency = <125000000>;
18658 + status = "okay";
18659 + };
18660 +
18661 + spidev2_2: spidev@2 {
18662 + compatible = "spidev";
18663 + reg = <2>; /* CE2 */
18664 + #address-cells = <1>;
18665 + #size-cells = <0>;
18666 + spi-max-frequency = <125000000>;
18667 + status = "okay";
18668 + };
18669 + };
18670 + };
18671 +
18672 + fragment@2 {
18673 + target = <&aux>;
18674 + __overlay__ {
18675 + status = "okay";
18676 + };
18677 + };
18678 +
18679 + __overrides__ {
18680 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
18681 + <&frag1>,"cs-gpios:4";
18682 + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
18683 + <&frag1>,"cs-gpios:16";
18684 + cs2_pin = <&spi2_cs_pins>,"brcm,pins:8",
18685 + <&frag1>,"cs-gpios:28";
18686 + cs0_spidev = <&spidev2_0>,"status";
18687 + cs1_spidev = <&spidev2_1>,"status";
18688 + cs2_spidev = <&spidev2_2>,"status";
18689 + };
18690 +};
18691 diff --git a/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
18692 new file mode 100644
18693 index 000000000000..335af8637051
18694 --- /dev/null
18695 +++ b/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
18696 @@ -0,0 +1,44 @@
18697 +/dts-v1/;
18698 +/plugin/;
18699 +
18700 +
18701 +/ {
18702 + compatible = "brcm,bcm2711";
18703 +
18704 + fragment@0 {
18705 + target = <&spi3_cs_pins>;
18706 + frag0: __overlay__ {
18707 + brcm,pins = <0>;
18708 + brcm,function = <1>; /* output */
18709 + };
18710 + };
18711 +
18712 + fragment@1 {
18713 + target = <&spi3>;
18714 + frag1: __overlay__ {
18715 + /* needed to avoid dtc warning */
18716 + #address-cells = <1>;
18717 + #size-cells = <0>;
18718 +
18719 + pinctrl-names = "default";
18720 + pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
18721 + cs-gpios = <&gpio 0 1>;
18722 + status = "okay";
18723 +
18724 + spidev3_0: spidev@0 {
18725 + compatible = "spidev";
18726 + reg = <0>; /* CE0 */
18727 + #address-cells = <1>;
18728 + #size-cells = <0>;
18729 + spi-max-frequency = <125000000>;
18730 + status = "okay";
18731 + };
18732 + };
18733 + };
18734 +
18735 + __overrides__ {
18736 + cs0_pin = <&frag0>,"brcm,pins:0",
18737 + <&frag1>,"cs-gpios:4";
18738 + cs0_spidev = <&spidev3_0>,"status";
18739 + };
18740 +};
18741 diff --git a/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
18742 new file mode 100644
18743 index 000000000000..ce65da27f767
18744 --- /dev/null
18745 +++ b/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
18746 @@ -0,0 +1,56 @@
18747 +/dts-v1/;
18748 +/plugin/;
18749 +
18750 +
18751 +/ {
18752 + compatible = "brcm,bcm2711";
18753 +
18754 + fragment@0 {
18755 + target = <&spi3_cs_pins>;
18756 + frag0: __overlay__ {
18757 + brcm,pins = <0 24>;
18758 + brcm,function = <1>; /* output */
18759 + };
18760 + };
18761 +
18762 + fragment@1 {
18763 + target = <&spi3>;
18764 + frag1: __overlay__ {
18765 + /* needed to avoid dtc warning */
18766 + #address-cells = <1>;
18767 + #size-cells = <0>;
18768 +
18769 + pinctrl-names = "default";
18770 + pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
18771 + cs-gpios = <&gpio 0 1>, <&gpio 24 1>;
18772 + status = "okay";
18773 +
18774 + spidev3_0: spidev@0 {
18775 + compatible = "spidev";
18776 + reg = <0>; /* CE0 */
18777 + #address-cells = <1>;
18778 + #size-cells = <0>;
18779 + spi-max-frequency = <125000000>;
18780 + status = "okay";
18781 + };
18782 +
18783 + spidev3_1: spidev@1 {
18784 + compatible = "spidev";
18785 + reg = <1>; /* CE1 */
18786 + #address-cells = <1>;
18787 + #size-cells = <0>;
18788 + spi-max-frequency = <125000000>;
18789 + status = "okay";
18790 + };
18791 + };
18792 + };
18793 +
18794 + __overrides__ {
18795 + cs0_pin = <&frag0>,"brcm,pins:0",
18796 + <&frag1>,"cs-gpios:4";
18797 + cs1_pin = <&frag0>,"brcm,pins:4",
18798 + <&frag1>,"cs-gpios:16";
18799 + cs0_spidev = <&spidev3_0>,"status";
18800 + cs1_spidev = <&spidev3_1>,"status";
18801 + };
18802 +};
18803 diff --git a/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
18804 new file mode 100644
18805 index 000000000000..85d70b40352b
18806 --- /dev/null
18807 +++ b/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
18808 @@ -0,0 +1,44 @@
18809 +/dts-v1/;
18810 +/plugin/;
18811 +
18812 +
18813 +/ {
18814 + compatible = "brcm,bcm2711";
18815 +
18816 + fragment@0 {
18817 + target = <&spi4_cs_pins>;
18818 + frag0: __overlay__ {
18819 + brcm,pins = <4>;
18820 + brcm,function = <1>; /* output */
18821 + };
18822 + };
18823 +
18824 + fragment@1 {
18825 + target = <&spi4>;
18826 + frag1: __overlay__ {
18827 + /* needed to avoid dtc warning */
18828 + #address-cells = <1>;
18829 + #size-cells = <0>;
18830 +
18831 + pinctrl-names = "default";
18832 + pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
18833 + cs-gpios = <&gpio 4 1>;
18834 + status = "okay";
18835 +
18836 + spidev4_0: spidev@0 {
18837 + compatible = "spidev";
18838 + reg = <0>; /* CE0 */
18839 + #address-cells = <1>;
18840 + #size-cells = <0>;
18841 + spi-max-frequency = <125000000>;
18842 + status = "okay";
18843 + };
18844 + };
18845 + };
18846 +
18847 + __overrides__ {
18848 + cs0_pin = <&frag0>,"brcm,pins:0",
18849 + <&frag1>,"cs-gpios:4";
18850 + cs0_spidev = <&spidev4_0>,"status";
18851 + };
18852 +};
18853 diff --git a/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
18854 new file mode 100644
18855 index 000000000000..8bc2215a6a7e
18856 --- /dev/null
18857 +++ b/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
18858 @@ -0,0 +1,56 @@
18859 +/dts-v1/;
18860 +/plugin/;
18861 +
18862 +
18863 +/ {
18864 + compatible = "brcm,bcm2711";
18865 +
18866 + fragment@0 {
18867 + target = <&spi4_cs_pins>;
18868 + frag0: __overlay__ {
18869 + brcm,pins = <4 25>;
18870 + brcm,function = <1>; /* output */
18871 + };
18872 + };
18873 +
18874 + fragment@1 {
18875 + target = <&spi4>;
18876 + frag1: __overlay__ {
18877 + /* needed to avoid dtc warning */
18878 + #address-cells = <1>;
18879 + #size-cells = <0>;
18880 +
18881 + pinctrl-names = "default";
18882 + pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
18883 + cs-gpios = <&gpio 4 1>, <&gpio 25 1>;
18884 + status = "okay";
18885 +
18886 + spidev4_0: spidev@0 {
18887 + compatible = "spidev";
18888 + reg = <0>; /* CE0 */
18889 + #address-cells = <1>;
18890 + #size-cells = <0>;
18891 + spi-max-frequency = <125000000>;
18892 + status = "okay";
18893 + };
18894 +
18895 + spidev4_1: spidev@1 {
18896 + compatible = "spidev";
18897 + reg = <1>; /* CE1 */
18898 + #address-cells = <1>;
18899 + #size-cells = <0>;
18900 + spi-max-frequency = <125000000>;
18901 + status = "okay";
18902 + };
18903 + };
18904 + };
18905 +
18906 + __overrides__ {
18907 + cs0_pin = <&frag0>,"brcm,pins:0",
18908 + <&frag1>,"cs-gpios:4";
18909 + cs1_pin = <&frag0>,"brcm,pins:4",
18910 + <&frag1>,"cs-gpios:16";
18911 + cs0_spidev = <&spidev4_0>,"status";
18912 + cs1_spidev = <&spidev4_1>,"status";
18913 + };
18914 +};
18915 diff --git a/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
18916 new file mode 100644
18917 index 000000000000..c0f8cb8510ee
18918 --- /dev/null
18919 +++ b/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
18920 @@ -0,0 +1,44 @@
18921 +/dts-v1/;
18922 +/plugin/;
18923 +
18924 +
18925 +/ {
18926 + compatible = "brcm,bcm2711";
18927 +
18928 + fragment@0 {
18929 + target = <&spi5_cs_pins>;
18930 + frag0: __overlay__ {
18931 + brcm,pins = <12>;
18932 + brcm,function = <1>; /* output */
18933 + };
18934 + };
18935 +
18936 + fragment@1 {
18937 + target = <&spi5>;
18938 + frag1: __overlay__ {
18939 + /* needed to avoid dtc warning */
18940 + #address-cells = <1>;
18941 + #size-cells = <0>;
18942 +
18943 + pinctrl-names = "default";
18944 + pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
18945 + cs-gpios = <&gpio 12 1>;
18946 + status = "okay";
18947 +
18948 + spidev5_0: spidev@0 {
18949 + compatible = "spidev";
18950 + reg = <0>; /* CE0 */
18951 + #address-cells = <1>;
18952 + #size-cells = <0>;
18953 + spi-max-frequency = <125000000>;
18954 + status = "okay";
18955 + };
18956 + };
18957 + };
18958 +
18959 + __overrides__ {
18960 + cs0_pin = <&frag0>,"brcm,pins:0",
18961 + <&frag1>,"cs-gpios:4";
18962 + cs0_spidev = <&spidev5_0>,"status";
18963 + };
18964 +};
18965 diff --git a/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
18966 new file mode 100644
18967 index 000000000000..7758b9c00b4e
18968 --- /dev/null
18969 +++ b/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
18970 @@ -0,0 +1,56 @@
18971 +/dts-v1/;
18972 +/plugin/;
18973 +
18974 +
18975 +/ {
18976 + compatible = "brcm,bcm2711";
18977 +
18978 + fragment@0 {
18979 + target = <&spi5_cs_pins>;
18980 + frag0: __overlay__ {
18981 + brcm,pins = <12 26>;
18982 + brcm,function = <1>; /* output */
18983 + };
18984 + };
18985 +
18986 + fragment@1 {
18987 + target = <&spi5>;
18988 + frag1: __overlay__ {
18989 + /* needed to avoid dtc warning */
18990 + #address-cells = <1>;
18991 + #size-cells = <0>;
18992 +
18993 + pinctrl-names = "default";
18994 + pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
18995 + cs-gpios = <&gpio 12 1>, <&gpio 26 1>;
18996 + status = "okay";
18997 +
18998 + spidev5_0: spidev@0 {
18999 + compatible = "spidev";
19000 + reg = <0>; /* CE0 */
19001 + #address-cells = <1>;
19002 + #size-cells = <0>;
19003 + spi-max-frequency = <125000000>;
19004 + status = "okay";
19005 + };
19006 +
19007 + spidev5_1: spidev@1 {
19008 + compatible = "spidev";
19009 + reg = <1>; /* CE1 */
19010 + #address-cells = <1>;
19011 + #size-cells = <0>;
19012 + spi-max-frequency = <125000000>;
19013 + status = "okay";
19014 + };
19015 + };
19016 + };
19017 +
19018 + __overrides__ {
19019 + cs0_pin = <&frag0>,"brcm,pins:0",
19020 + <&frag1>,"cs-gpios:4";
19021 + cs1_pin = <&frag0>,"brcm,pins:4",
19022 + <&frag1>,"cs-gpios:16";
19023 + cs0_spidev = <&spidev5_0>,"status";
19024 + cs1_spidev = <&spidev5_1>,"status";
19025 + };
19026 +};
19027 diff --git a/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
19028 new file mode 100644
19029 index 000000000000..8c8a953eca01
19030 --- /dev/null
19031 +++ b/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
19032 @@ -0,0 +1,44 @@
19033 +/dts-v1/;
19034 +/plugin/;
19035 +
19036 +
19037 +/ {
19038 + compatible = "brcm,bcm2711";
19039 +
19040 + fragment@0 {
19041 + target = <&spi6_cs_pins>;
19042 + frag0: __overlay__ {
19043 + brcm,pins = <18>;
19044 + brcm,function = <1>; /* output */
19045 + };
19046 + };
19047 +
19048 + fragment@1 {
19049 + target = <&spi6>;
19050 + frag1: __overlay__ {
19051 + /* needed to avoid dtc warning */
19052 + #address-cells = <1>;
19053 + #size-cells = <0>;
19054 +
19055 + pinctrl-names = "default";
19056 + pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
19057 + cs-gpios = <&gpio 18 1>;
19058 + status = "okay";
19059 +
19060 + spidev6_0: spidev@0 {
19061 + compatible = "spidev";
19062 + reg = <0>; /* CE0 */
19063 + #address-cells = <1>;
19064 + #size-cells = <0>;
19065 + spi-max-frequency = <125000000>;
19066 + status = "okay";
19067 + };
19068 + };
19069 + };
19070 +
19071 + __overrides__ {
19072 + cs0_pin = <&frag0>,"brcm,pins:0",
19073 + <&frag1>,"cs-gpios:4";
19074 + cs0_spidev = <&spidev6_0>,"status";
19075 + };
19076 +};
19077 diff --git a/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
19078 new file mode 100644
19079 index 000000000000..2ff897f21aed
19080 --- /dev/null
19081 +++ b/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
19082 @@ -0,0 +1,56 @@
19083 +/dts-v1/;
19084 +/plugin/;
19085 +
19086 +
19087 +/ {
19088 + compatible = "brcm,bcm2711";
19089 +
19090 + fragment@0 {
19091 + target = <&spi6_cs_pins>;
19092 + frag0: __overlay__ {
19093 + brcm,pins = <18 27>;
19094 + brcm,function = <1>; /* output */
19095 + };
19096 + };
19097 +
19098 + fragment@1 {
19099 + target = <&spi6>;
19100 + frag1: __overlay__ {
19101 + /* needed to avoid dtc warning */
19102 + #address-cells = <1>;
19103 + #size-cells = <0>;
19104 +
19105 + pinctrl-names = "default";
19106 + pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
19107 + cs-gpios = <&gpio 18 1>, <&gpio 27 1>;
19108 + status = "okay";
19109 +
19110 + spidev6_0: spidev@0 {
19111 + compatible = "spidev";
19112 + reg = <0>; /* CE0 */
19113 + #address-cells = <1>;
19114 + #size-cells = <0>;
19115 + spi-max-frequency = <125000000>;
19116 + status = "okay";
19117 + };
19118 +
19119 + spidev6_1: spidev@1 {
19120 + compatible = "spidev";
19121 + reg = <1>; /* CE1 */
19122 + #address-cells = <1>;
19123 + #size-cells = <0>;
19124 + spi-max-frequency = <125000000>;
19125 + status = "okay";
19126 + };
19127 + };
19128 + };
19129 +
19130 + __overrides__ {
19131 + cs0_pin = <&frag0>,"brcm,pins:0",
19132 + <&frag1>,"cs-gpios:4";
19133 + cs1_pin = <&frag0>,"brcm,pins:4",
19134 + <&frag1>,"cs-gpios:16";
19135 + cs0_spidev = <&spidev6_0>,"status";
19136 + cs1_spidev = <&spidev6_1>,"status";
19137 + };
19138 +};
19139 diff --git a/arch/arm/boot/dts/overlays/ssd1306-overlay.dts b/arch/arm/boot/dts/overlays/ssd1306-overlay.dts
19140 new file mode 100644
19141 index 000000000000..84cf10e489d3
19142 --- /dev/null
19143 +++ b/arch/arm/boot/dts/overlays/ssd1306-overlay.dts
19144 @@ -0,0 +1,36 @@
19145 +// Overlay for SSD1306 128x64 and 128x32 OLED displays
19146 +/dts-v1/;
19147 +/plugin/;
19148 +
19149 +/ {
19150 + compatible = "brcm,bcm2835";
19151 +
19152 + fragment@0 {
19153 + target = <&i2c1>;
19154 + __overlay__ {
19155 + status = "okay";
19156 +
19157 + #address-cells = <1>;
19158 + #size-cells = <0>;
19159 +
19160 + ssd1306: oled@3c{
19161 + compatible = "solomon,ssd1306fb-i2c";
19162 + reg = <0x3c>;
19163 + solomon,width = <128>;
19164 + solomon,height = <64>;
19165 + solomon,page-offset = <0>;
19166 + };
19167 + };
19168 + };
19169 +
19170 + __overrides__ {
19171 + address = <&ssd1306>,"reg:0";
19172 + width = <&ssd1306>,"solomon,width:0";
19173 + height = <&ssd1306>,"solomon,height:0";
19174 + offset = <&ssd1306>,"solomon,page-offset:0";
19175 + normal = <&ssd1306>,"solomon,segment-no-remap?";
19176 + sequential = <&ssd1306>,"solomon,com-seq?";
19177 + remapped = <&ssd1306>,"solomon,com-lrremap?";
19178 + inverted = <&ssd1306>,"solomon,com-invdir?";
19179 + };
19180 +};
19181 diff --git a/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
19182 new file mode 100755
19183 index 000000000000..bad61535981e
19184 --- /dev/null
19185 +++ b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
19186 @@ -0,0 +1,73 @@
19187 +// Definitions for SuperAudioBoard
19188 +/dts-v1/;
19189 +/plugin/;
19190 +
19191 +/ {
19192 + compatible = "brcm,bcm2835";
19193 +
19194 + fragment@0 {
19195 + target = <&sound>;
19196 + __overlay__ {
19197 + compatible = "simple-audio-card";
19198 + i2s-controller = <&i2s>;
19199 + status = "okay";
19200 +
19201 + simple-audio-card,name = "SuperAudioBoard";
19202 +
19203 + simple-audio-card,widgets =
19204 + "Line", "Line In",
19205 + "Line", "Line Out";
19206 +
19207 + simple-audio-card,routing =
19208 + "Line Out","AOUTA+",
19209 + "Line Out","AOUTA-",
19210 + "Line Out","AOUTB+",
19211 + "Line Out","AOUTB-",
19212 + "AINA","Line In",
19213 + "AINB","Line In";
19214 +
19215 + simple-audio-card,format = "i2s";
19216 +
19217 + simple-audio-card,bitclock-master = <&sound_master>;
19218 + simple-audio-card,frame-master = <&sound_master>;
19219 +
19220 + simple-audio-card,cpu {
19221 + sound-dai = <&i2s>;
19222 + dai-tdm-slot-num = <2>;
19223 + dai-tdm-slot-width = <32>;
19224 + };
19225 +
19226 + sound_master: simple-audio-card,codec {
19227 + sound-dai = <&cs4271>;
19228 + system-clock-frequency = <24576000>;
19229 + };
19230 + };
19231 + };
19232 +
19233 + fragment@1 {
19234 + target = <&i2s>;
19235 + __overlay__ {
19236 + status = "okay";
19237 + };
19238 + };
19239 +
19240 + fragment@2 {
19241 + target = <&i2c1>;
19242 + __overlay__ {
19243 + #address-cells = <1>;
19244 + #size-cells = <0>;
19245 + status = "okay";
19246 +
19247 + cs4271: cs4271@10 {
19248 + #sound-dai-cells = <0>;
19249 + compatible = "cirrus,cs4271";
19250 + reg = <0x10>;
19251 + status = "okay";
19252 + reset-gpio = <&gpio 26 0>; /* Pin 26, active high */
19253 + };
19254 + };
19255 + };
19256 + __overrides__ {
19257 + gpiopin = <&cs4271>,"reset-gpio:4";
19258 + };
19259 +};
19260 diff --git a/arch/arm/boot/dts/overlays/sx150x-overlay.dts b/arch/arm/boot/dts/overlays/sx150x-overlay.dts
19261 new file mode 100644
19262 index 000000000000..1d1069345da2
19263 --- /dev/null
19264 +++ b/arch/arm/boot/dts/overlays/sx150x-overlay.dts
19265 @@ -0,0 +1,1706 @@
19266 +// Definitions for SX150x I2C GPIO Expanders from Semtech
19267 +
19268 +// dtparams:
19269 +// sx150<x>-<n>-<m> - Enables SX150X device on I2C#<n> with slave address <m>. <x> may be 1-9.
19270 +// <n> may be 0 or 1. Permissible values of <m> (which is denoted in hex)
19271 +// depend on the device variant.
19272 +// For SX1501, SX1502, SX1504 and SX1505, <m> may be 20 or 21.
19273 +// For SX1503 and SX1506, <m> may be 20.
19274 +// For SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
19275 +// For SX1508, <m> may be 20, 21, 22 or 23.
19276 +// sx150<x>-<n>-<m>-int-gpio - Integer, enables interrupts on SX150X device on I2C#<n> with slave address <m>,
19277 +// specifies the GPIO pin to which NINT output of SX150X is connected.
19278 +//
19279 +//
19280 +// Example 1: A single SX1505 device on I2C#1 with its slave address set to 0x20 and NINT output connected to GPIO25:
19281 +// dtoverlay=sx150x:sx1505-1-20,sx1505-1-20-int-gpio=25
19282 +//
19283 +// Example 2: Two SX1507 devices on I2C#0 with their slave addresses set to 0x3E and 0x70 (interrupts not used):
19284 +// dtoverlay=sx150x:sx1507-0-3E,sx1507-0-70
19285 +
19286 +/dts-v1/;
19287 +/plugin/;
19288 +
19289 +/ {
19290 + compatible = "brcm,bcm2835";
19291 +
19292 + // Enable I2C#0 interface
19293 + fragment@0 {
19294 + target = <&i2c0>;
19295 + __dormant__ {
19296 + status = "okay";
19297 + };
19298 + };
19299 +
19300 + // Enable I2C#1 interface
19301 + fragment@1 {
19302 + target = <&i2c1>;
19303 + __dormant__ {
19304 + status = "okay";
19305 + };
19306 + };
19307 +
19308 + // Enable a SX1501 on I2C#0 at slave addr 0x20
19309 + fragment@2 {
19310 + target = <&i2c0>;
19311 + __dormant__ {
19312 + #address-cells = <1>;
19313 + #size-cells = <0>;
19314 +
19315 + sx1501_0_20: sx150x@20 {
19316 + compatible = "semtech,sx1501q";
19317 + reg = <0x20>;
19318 + gpio-controller;
19319 + #gpio-cells = <2>;
19320 + #interrupt-cells = <2>;
19321 + interrupts = <25 2>; /* 1st word overwritten by sx1501-0-20-int-gpio parameter
19322 + 2nd word is 2 for falling-edge triggered */
19323 + status = "okay";
19324 + };
19325 + };
19326 + };
19327 +
19328 + // Enable a SX1501 on I2C#1 at slave addr 0x20
19329 + fragment@3 {
19330 + target = <&i2c1>;
19331 + __dormant__ {
19332 + #address-cells = <1>;
19333 + #size-cells = <0>;
19334 +
19335 + sx1501_1_20: sx150x@20 {
19336 + compatible = "semtech,sx1501q";
19337 + reg = <0x20>;
19338 + gpio-controller;
19339 + #gpio-cells = <2>;
19340 + #interrupt-cells = <2>;
19341 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-20-int-gpio parameter
19342 + 2nd word is 2 for falling-edge triggered */
19343 + status = "okay";
19344 + };
19345 + };
19346 + };
19347 +
19348 + // Enable a SX1501 on I2C#0 at slave addr 0x21
19349 + fragment@4 {
19350 + target = <&i2c0>;
19351 + __dormant__ {
19352 + #address-cells = <1>;
19353 + #size-cells = <0>;
19354 +
19355 + sx1501_0_21: sx150x@21 {
19356 + compatible = "semtech,sx1501q";
19357 + reg = <0x21>;
19358 + gpio-controller;
19359 + #gpio-cells = <2>;
19360 + #interrupt-cells = <2>;
19361 + interrupts = <25 2>; /* 1st word overwritten by sx1501-0-21-int-gpio parameter
19362 + 2nd word is 2 for falling-edge triggered */
19363 + status = "okay";
19364 + };
19365 + };
19366 + };
19367 +
19368 + // Enable a SX1501 on I2C#1 at slave addr 0x21
19369 + fragment@5 {
19370 + target = <&i2c1>;
19371 + __dormant__ {
19372 + #address-cells = <1>;
19373 + #size-cells = <0>;
19374 +
19375 + sx1501_1_21: sx150x@21 {
19376 + compatible = "semtech,sx1501q";
19377 + reg = <0x21>;
19378 + gpio-controller;
19379 + #gpio-cells = <2>;
19380 + #interrupt-cells = <2>;
19381 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
19382 + 2nd word is 2 for falling-edge triggered */
19383 + status = "okay";
19384 + };
19385 + };
19386 + };
19387 +
19388 + // Enable a SX1502 on I2C#0 at slave addr 0x20
19389 + fragment@6 {
19390 + target = <&i2c0>;
19391 + __dormant__ {
19392 + #address-cells = <1>;
19393 + #size-cells = <0>;
19394 +
19395 + sx1502_0_20: sx150x@20 {
19396 + compatible = "semtech,sx1502q";
19397 + reg = <0x20>;
19398 + gpio-controller;
19399 + #gpio-cells = <2>;
19400 + #interrupt-cells = <2>;
19401 + interrupts = <25 2>; /* 1st word overwritten by sx1502-0-20-int-gpio parameter
19402 + 2nd word is 2 for falling-edge triggered */
19403 + status = "okay";
19404 + };
19405 + };
19406 + };
19407 +
19408 + // Enable a SX1502 on I2C#1 at slave addr 0x20
19409 + fragment@7 {
19410 + target = <&i2c1>;
19411 + __dormant__ {
19412 + #address-cells = <1>;
19413 + #size-cells = <0>;
19414 +
19415 + sx1502_1_20: sx150x@20 {
19416 + compatible = "semtech,sx1502q";
19417 + reg = <0x20>;
19418 + gpio-controller;
19419 + #gpio-cells = <2>;
19420 + #interrupt-cells = <2>;
19421 + interrupts = <25 2>; /* 1st word overwritten by sx1502-1-20-int-gpio parameter
19422 + 2nd word is 2 for falling-edge triggered */
19423 + status = "okay";
19424 + };
19425 + };
19426 + };
19427 +
19428 + // Enable a SX1502 on I2C#0 at slave addr 0x21
19429 + fragment@8 {
19430 + target = <&i2c0>;
19431 + __dormant__ {
19432 + #address-cells = <1>;
19433 + #size-cells = <0>;
19434 +
19435 + sx1502_0_21: sx150x@21 {
19436 + compatible = "semtech,sx1502q";
19437 + reg = <0x21>;
19438 + gpio-controller;
19439 + #gpio-cells = <2>;
19440 + #interrupt-cells = <2>;
19441 + interrupts = <25 2>; /* 1st word overwritten by sx1502-0-21-int-gpio parameter
19442 + 2nd word is 2 for falling-edge triggered */
19443 + status = "okay";
19444 + };
19445 + };
19446 + };
19447 +
19448 + // Enable a SX1502 on I2C#1 at slave addr 0x21
19449 + fragment@9 {
19450 + target = <&i2c1>;
19451 + __dormant__ {
19452 + #address-cells = <1>;
19453 + #size-cells = <0>;
19454 +
19455 + sx1502_1_21: sx150x@21 {
19456 + compatible = "semtech,sx1502q";
19457 + reg = <0x21>;
19458 + gpio-controller;
19459 + #gpio-cells = <2>;
19460 + #interrupt-cells = <2>;
19461 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
19462 + 2nd word is 2 for falling-edge triggered */
19463 + status = "okay";
19464 + };
19465 + };
19466 + };
19467 +
19468 + // Enable a SX1503 on I2C#0 at slave addr 0x20
19469 + fragment@10 {
19470 + target = <&i2c0>;
19471 + __dormant__ {
19472 + #address-cells = <1>;
19473 + #size-cells = <0>;
19474 +
19475 + sx1503_0_20: sx150x@20 {
19476 + compatible = "semtech,sx1503q";
19477 + reg = <0x20>;
19478 + gpio-controller;
19479 + #gpio-cells = <2>;
19480 + #interrupt-cells = <2>;
19481 + interrupts = <25 2>; /* 1st word overwritten by sx1503-0-20-int-gpio parameter
19482 + 2nd word is 2 for falling-edge triggered */
19483 + status = "okay";
19484 + };
19485 + };
19486 + };
19487 +
19488 + // Enable a SX1503 on I2C#1 at slave addr 0x20
19489 + fragment@11 {
19490 + target = <&i2c1>;
19491 + __dormant__ {
19492 + #address-cells = <1>;
19493 + #size-cells = <0>;
19494 +
19495 + sx1503_1_20: sx150x@20 {
19496 + compatible = "semtech,sx1503q";
19497 + reg = <0x20>;
19498 + gpio-controller;
19499 + #gpio-cells = <2>;
19500 + #interrupt-cells = <2>;
19501 + interrupts = <25 2>; /* 1st word overwritten by sx1503-1-20-int-gpio parameter
19502 + 2nd word is 2 for falling-edge triggered */
19503 + status = "okay";
19504 + };
19505 + };
19506 + };
19507 +
19508 + // Enable a SX1504 on I2C#0 at slave addr 0x20
19509 + fragment@12 {
19510 + target = <&i2c0>;
19511 + __dormant__ {
19512 + #address-cells = <1>;
19513 + #size-cells = <0>;
19514 +
19515 + sx1504_0_20: sx150x@20 {
19516 + compatible = "semtech,sx1504q";
19517 + reg = <0x20>;
19518 + gpio-controller;
19519 + #gpio-cells = <2>;
19520 + #interrupt-cells = <2>;
19521 + interrupts = <25 2>; /* 1st word overwritten by sx1504-0-20-int-gpio parameter
19522 + 2nd word is 2 for falling-edge triggered */
19523 + status = "okay";
19524 + };
19525 + };
19526 + };
19527 +
19528 + // Enable a SX1504 on I2C#1 at slave addr 0x20
19529 + fragment@13 {
19530 + target = <&i2c1>;
19531 + __dormant__ {
19532 + #address-cells = <1>;
19533 + #size-cells = <0>;
19534 +
19535 + sx1504_1_20: sx150x@20 {
19536 + compatible = "semtech,sx1504q";
19537 + reg = <0x20>;
19538 + gpio-controller;
19539 + #gpio-cells = <2>;
19540 + #interrupt-cells = <2>;
19541 + interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
19542 + 2nd word is 2 for falling-edge triggered */
19543 + status = "okay";
19544 + };
19545 + };
19546 + };
19547 +
19548 + // Enable a SX1504 on I2C#0 at slave addr 0x21
19549 + fragment@14 {
19550 + target = <&i2c0>;
19551 + __dormant__ {
19552 + #address-cells = <1>;
19553 + #size-cells = <0>;
19554 +
19555 + sx1504_0_21: sx150x@21 {
19556 + compatible = "semtech,sx1504q";
19557 + reg = <0x21>;
19558 + gpio-controller;
19559 + #gpio-cells = <2>;
19560 + #interrupt-cells = <2>;
19561 + interrupts = <25 2>; /* 1st word overwritten by sx1504-0-21-int-gpio parameter
19562 + 2nd word is 2 for falling-edge triggered */
19563 + status = "okay";
19564 + };
19565 + };
19566 + };
19567 +
19568 + // Enable a SX1504 on I2C#1 at slave addr 0x21
19569 + fragment@15 {
19570 + target = <&i2c1>;
19571 + __dormant__ {
19572 + #address-cells = <1>;
19573 + #size-cells = <0>;
19574 +
19575 + sx1504_1_21: sx150x@21 {
19576 + compatible = "semtech,sx1504q";
19577 + reg = <0x21>;
19578 + gpio-controller;
19579 + #gpio-cells = <2>;
19580 + #interrupt-cells = <2>;
19581 + interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
19582 + 2nd word is 2 for falling-edge triggered */
19583 + status = "okay";
19584 + };
19585 + };
19586 + };
19587 +
19588 + // Enable a SX1505 on I2C#0 at slave addr 0x20
19589 + fragment@16 {
19590 + target = <&i2c0>;
19591 + __dormant__ {
19592 + #address-cells = <1>;
19593 + #size-cells = <0>;
19594 +
19595 + sx1505_0_20: sx150x@20 {
19596 + compatible = "semtech,sx1505q";
19597 + reg = <0x20>;
19598 + gpio-controller;
19599 + #gpio-cells = <2>;
19600 + #interrupt-cells = <2>;
19601 + interrupts = <25 2>; /* 1st word overwritten by sx1505-0-20-int-gpio parameter
19602 + 2nd word is 2 for falling-edge triggered */
19603 + status = "okay";
19604 + };
19605 + };
19606 + };
19607 +
19608 + // Enable a SX1505 on I2C#1 at slave addr 0x20
19609 + fragment@17 {
19610 + target = <&i2c1>;
19611 + __dormant__ {
19612 + #address-cells = <1>;
19613 + #size-cells = <0>;
19614 +
19615 + sx1505_1_20: sx150x@20 {
19616 + compatible = "semtech,sx1505q";
19617 + reg = <0x20>;
19618 + gpio-controller;
19619 + #gpio-cells = <2>;
19620 + #interrupt-cells = <2>;
19621 + interrupts = <25 2>; /* 1st word overwritten by sx1505-1-20-int-gpio parameter
19622 + 2nd word is 2 for falling-edge triggered */
19623 + status = "okay";
19624 + };
19625 + };
19626 + };
19627 +
19628 + // Enable a SX1505 on I2C#0 at slave addr 0x21
19629 + fragment@18 {
19630 + target = <&i2c0>;
19631 + __dormant__ {
19632 + #address-cells = <1>;
19633 + #size-cells = <0>;
19634 +
19635 + sx1505_0_21: sx150x@21 {
19636 + compatible = "semtech,sx1505q";
19637 + reg = <0x21>;
19638 + gpio-controller;
19639 + #gpio-cells = <2>;
19640 + #interrupt-cells = <2>;
19641 + interrupts = <25 2>; /* 1st word overwritten by sx1505-0-21-int-gpio parameter
19642 + 2nd word is 2 for falling-edge triggered */
19643 + status = "okay";
19644 + };
19645 + };
19646 + };
19647 +
19648 + // Enable a SX1505 on I2C#1 at slave addr 0x21
19649 + fragment@19 {
19650 + target = <&i2c1>;
19651 + __dormant__ {
19652 + #address-cells = <1>;
19653 + #size-cells = <0>;
19654 +
19655 + sx1505_1_21: sx150x@21 {
19656 + compatible = "semtech,sx1505q";
19657 + reg = <0x21>;
19658 + gpio-controller;
19659 + #gpio-cells = <2>;
19660 + #interrupt-cells = <2>;
19661 + interrupts = <25 2>; /* 1st word overwritten by sx1505-1-21-int-gpio parameter
19662 + 2nd word is 2 for falling-edge triggered */
19663 + status = "okay";
19664 + };
19665 + };
19666 + };
19667 +
19668 + // Enable a SX1506 on I2C#0 at slave addr 0x20
19669 + fragment@20 {
19670 + target = <&i2c0>;
19671 + __dormant__ {
19672 + #address-cells = <1>;
19673 + #size-cells = <0>;
19674 +
19675 + sx1506_0_20: sx150x@20 {
19676 + compatible = "semtech,sx1506q";
19677 + reg = <0x20>;
19678 + gpio-controller;
19679 + #gpio-cells = <2>;
19680 + #interrupt-cells = <2>;
19681 + interrupts = <25 2>; /* 1st word overwritten by sx1506-0-20-int-gpio parameter
19682 + 2nd word is 2 for falling-edge triggered */
19683 + status = "okay";
19684 + };
19685 + };
19686 + };
19687 +
19688 + // Enable a SX1506 on I2C#1 at slave addr 0x20
19689 + fragment@21 {
19690 + target = <&i2c1>;
19691 + __dormant__ {
19692 + #address-cells = <1>;
19693 + #size-cells = <0>;
19694 +
19695 + sx1506_1_20: sx150x@20 {
19696 + compatible = "semtech,sx1506q";
19697 + reg = <0x20>;
19698 + gpio-controller;
19699 + #gpio-cells = <2>;
19700 + #interrupt-cells = <2>;
19701 + interrupts = <25 2>; /* 1st word overwritten by sx1506-1-20-int-gpio parameter
19702 + 2nd word is 2 for falling-edge triggered */
19703 + status = "okay";
19704 + };
19705 + };
19706 + };
19707 +
19708 + // Enable a SX1507 on I2C#0 at slave addr 0x3E
19709 + fragment@22 {
19710 + target = <&i2c0>;
19711 + __dormant__ {
19712 + #address-cells = <1>;
19713 + #size-cells = <0>;
19714 +
19715 + sx1507_0_3E: sx150x@3E {
19716 + compatible = "semtech,sx1507q";
19717 + reg = <0x3E>;
19718 + gpio-controller;
19719 + #gpio-cells = <2>;
19720 + #interrupt-cells = <2>;
19721 + interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3E-int-gpio parameter
19722 + 2nd word is 2 for falling-edge triggered */
19723 + status = "okay";
19724 + };
19725 + };
19726 + };
19727 +
19728 + // Enable a SX1507 on I2C#1 at slave addr 0x3E
19729 + fragment@23 {
19730 + target = <&i2c1>;
19731 + __dormant__ {
19732 + #address-cells = <1>;
19733 + #size-cells = <0>;
19734 +
19735 + sx1507_1_3E: sx150x@3E {
19736 + compatible = "semtech,sx1507q";
19737 + reg = <0x3E>;
19738 + gpio-controller;
19739 + #gpio-cells = <2>;
19740 + #interrupt-cells = <2>;
19741 + interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3E-int-gpio parameter
19742 + 2nd word is 2 for falling-edge triggered */
19743 + status = "okay";
19744 + };
19745 + };
19746 + };
19747 +
19748 + // Enable a SX1507 on I2C#0 at slave addr 0x3F
19749 + fragment@24 {
19750 + target = <&i2c0>;
19751 + __dormant__ {
19752 + #address-cells = <1>;
19753 + #size-cells = <0>;
19754 +
19755 + sx1507_0_3F: sx150x@3F {
19756 + compatible = "semtech,sx1507q";
19757 + reg = <0x3F>;
19758 + gpio-controller;
19759 + #gpio-cells = <2>;
19760 + #interrupt-cells = <2>;
19761 + interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3F-int-gpio parameter
19762 + 2nd word is 2 for falling-edge triggered */
19763 + status = "okay";
19764 + };
19765 + };
19766 + };
19767 +
19768 + // Enable a SX1507 on I2C#1 at slave addr 0x3F
19769 + fragment@25 {
19770 + target = <&i2c1>;
19771 + __dormant__ {
19772 + #address-cells = <1>;
19773 + #size-cells = <0>;
19774 +
19775 + sx1507_1_3F: sx150x@3F {
19776 + compatible = "semtech,sx1507q";
19777 + reg = <0x3F>;
19778 + gpio-controller;
19779 + #gpio-cells = <2>;
19780 + #interrupt-cells = <2>;
19781 + interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3F-int-gpio parameter
19782 + 2nd word is 2 for falling-edge triggered */
19783 + status = "okay";
19784 + };
19785 + };
19786 + };
19787 +
19788 + // Enable a SX1507 on I2C#0 at slave addr 0x70
19789 + fragment@26 {
19790 + target = <&i2c0>;
19791 + __dormant__ {
19792 + #address-cells = <1>;
19793 + #size-cells = <0>;
19794 +
19795 + sx1507_0_70: sx150x@70 {
19796 + compatible = "semtech,sx1507q";
19797 + reg = <0x70>;
19798 + gpio-controller;
19799 + #gpio-cells = <2>;
19800 + #interrupt-cells = <2>;
19801 + interrupts = <25 2>; /* 1st word overwritten by sx1507-0-70-int-gpio parameter
19802 + 2nd word is 2 for falling-edge triggered */
19803 + status = "okay";
19804 + };
19805 + };
19806 + };
19807 +
19808 + // Enable a SX1507 on I2C#1 at slave addr 0x70
19809 + fragment@27 {
19810 + target = <&i2c1>;
19811 + __dormant__ {
19812 + #address-cells = <1>;
19813 + #size-cells = <0>;
19814 +
19815 + sx1507_1_70: sx150x@70 {
19816 + compatible = "semtech,sx1507q";
19817 + reg = <0x70>;
19818 + gpio-controller;
19819 + #gpio-cells = <2>;
19820 + #interrupt-cells = <2>;
19821 + interrupts = <25 2>; /* 1st word overwritten by sx1507-1-70-int-gpio parameter
19822 + 2nd word is 2 for falling-edge triggered */
19823 + status = "okay";
19824 + };
19825 + };
19826 + };
19827 +
19828 + // Enable a SX1507 on I2C#0 at slave addr 0x71
19829 + fragment@28 {
19830 + target = <&i2c0>;
19831 + __dormant__ {
19832 + #address-cells = <1>;
19833 + #size-cells = <0>;
19834 +
19835 + sx1507_0_71: sx150x@71 {
19836 + compatible = "semtech,sx1507q";
19837 + reg = <0x71>;
19838 + gpio-controller;
19839 + #gpio-cells = <2>;
19840 + #interrupt-cells = <2>;
19841 + interrupts = <25 2>; /* 1st word overwritten by sx1507-0-71-int-gpio parameter
19842 + 2nd word is 2 for falling-edge triggered */
19843 + status = "okay";
19844 + };
19845 + };
19846 + };
19847 +
19848 + // Enable a SX1507 on I2C#1 at slave addr 0x71
19849 + fragment@29 {
19850 + target = <&i2c1>;
19851 + __dormant__ {
19852 + #address-cells = <1>;
19853 + #size-cells = <0>;
19854 +
19855 + sx1507_1_71: sx150x@71 {
19856 + compatible = "semtech,sx1507q";
19857 + reg = <0x71>;
19858 + gpio-controller;
19859 + #gpio-cells = <2>;
19860 + #interrupt-cells = <2>;
19861 + interrupts = <25 2>; /* 1st word overwritten by sx1507-1-71-int-gpio parameter
19862 + 2nd word is 2 for falling-edge triggered */
19863 + status = "okay";
19864 + };
19865 + };
19866 + };
19867 +
19868 + // Enable a SX1508 on I2C#0 at slave addr 0x20
19869 + fragment@30 {
19870 + target = <&i2c0>;
19871 + __dormant__ {
19872 + #address-cells = <1>;
19873 + #size-cells = <0>;
19874 +
19875 + sx1508_0_20: sx150x@20 {
19876 + compatible = "semtech,sx1508q";
19877 + reg = <0x20>;
19878 + gpio-controller;
19879 + #gpio-cells = <2>;
19880 + #interrupt-cells = <2>;
19881 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-20-int-gpio parameter
19882 + 2nd word is 2 for falling-edge triggered */
19883 + status = "okay";
19884 + };
19885 + };
19886 + };
19887 +
19888 + // Enable a SX1508 on I2C#1 at slave addr 0x20
19889 + fragment@31 {
19890 + target = <&i2c1>;
19891 + __dormant__ {
19892 + #address-cells = <1>;
19893 + #size-cells = <0>;
19894 +
19895 + sx1508_1_20: sx150x@20 {
19896 + compatible = "semtech,sx1508q";
19897 + reg = <0x20>;
19898 + gpio-controller;
19899 + #gpio-cells = <2>;
19900 + #interrupt-cells = <2>;
19901 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-20-int-gpio parameter
19902 + 2nd word is 2 for falling-edge triggered */
19903 + status = "okay";
19904 + };
19905 + };
19906 + };
19907 +
19908 + // Enable a SX1508 on I2C#0 at slave addr 0x21
19909 + fragment@32 {
19910 + target = <&i2c0>;
19911 + __dormant__ {
19912 + #address-cells = <1>;
19913 + #size-cells = <0>;
19914 +
19915 + sx1508_0_21: sx150x@21 {
19916 + compatible = "semtech,sx1508q";
19917 + reg = <0x21>;
19918 + gpio-controller;
19919 + #gpio-cells = <2>;
19920 + #interrupt-cells = <2>;
19921 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-21-int-gpio parameter
19922 + 2nd word is 2 for falling-edge triggered */
19923 + status = "okay";
19924 + };
19925 + };
19926 + };
19927 +
19928 + // Enable a SX1508 on I2C#1 at slave addr 0x21
19929 + fragment@33 {
19930 + target = <&i2c1>;
19931 + __dormant__ {
19932 + #address-cells = <1>;
19933 + #size-cells = <0>;
19934 +
19935 + sx1508_1_21: sx150x@21 {
19936 + compatible = "semtech,sx1508q";
19937 + reg = <0x21>;
19938 + gpio-controller;
19939 + #gpio-cells = <2>;
19940 + #interrupt-cells = <2>;
19941 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-21-int-gpio parameter
19942 + 2nd word is 2 for falling-edge triggered */
19943 + status = "okay";
19944 + };
19945 + };
19946 + };
19947 +
19948 + // Enable a SX1508 on I2C#0 at slave addr 0x22
19949 + fragment@34 {
19950 + target = <&i2c0>;
19951 + __dormant__ {
19952 + #address-cells = <1>;
19953 + #size-cells = <0>;
19954 +
19955 + sx1508_0_22: sx150x@22 {
19956 + compatible = "semtech,sx1508q";
19957 + reg = <0x22>;
19958 + gpio-controller;
19959 + #gpio-cells = <2>;
19960 + #interrupt-cells = <2>;
19961 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-22-int-gpio parameter
19962 + 2nd word is 2 for falling-edge triggered */
19963 + status = "okay";
19964 + };
19965 + };
19966 + };
19967 +
19968 + // Enable a SX1508 on I2C#1 at slave addr 0x22
19969 + fragment@35 {
19970 + target = <&i2c1>;
19971 + __dormant__ {
19972 + #address-cells = <1>;
19973 + #size-cells = <0>;
19974 +
19975 + sx1508_1_22: sx150x@22 {
19976 + compatible = "semtech,sx1508q";
19977 + reg = <0x22>;
19978 + gpio-controller;
19979 + #gpio-cells = <2>;
19980 + #interrupt-cells = <2>;
19981 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-22-int-gpio parameter
19982 + 2nd word is 2 for falling-edge triggered */
19983 + status = "okay";
19984 + };
19985 + };
19986 + };
19987 +
19988 + // Enable a SX1508 on I2C#0 at slave addr 0x23
19989 + fragment@36 {
19990 + target = <&i2c0>;
19991 + __dormant__ {
19992 + #address-cells = <1>;
19993 + #size-cells = <0>;
19994 +
19995 + sx1508_0_23: sx150x@23 {
19996 + compatible = "semtech,sx1508q";
19997 + reg = <0x23>;
19998 + gpio-controller;
19999 + #gpio-cells = <2>;
20000 + #interrupt-cells = <2>;
20001 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-23-int-gpio parameter
20002 + 2nd word is 2 for falling-edge triggered */
20003 + status = "okay";
20004 + };
20005 + };
20006 + };
20007 +
20008 + // Enable a SX1508 on I2C#1 at slave addr 0x23
20009 + fragment@37 {
20010 + target = <&i2c1>;
20011 + __dormant__ {
20012 + #address-cells = <1>;
20013 + #size-cells = <0>;
20014 +
20015 + sx1508_1_23: sx150x@23 {
20016 + compatible = "semtech,sx1508q";
20017 + reg = <0x23>;
20018 + gpio-controller;
20019 + #gpio-cells = <2>;
20020 + #interrupt-cells = <2>;
20021 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-23-int-gpio parameter
20022 + 2nd word is 2 for falling-edge triggered */
20023 + status = "okay";
20024 + };
20025 + };
20026 + };
20027 +
20028 + // Enable a SX1509 on I2C#0 at slave addr 0x3E
20029 + fragment@38 {
20030 + target = <&i2c0>;
20031 + __dormant__ {
20032 + #address-cells = <1>;
20033 + #size-cells = <0>;
20034 +
20035 + sx1509_0_3E: sx150x@3E {
20036 + compatible = "semtech,sx1509q";
20037 + reg = <0x3E>;
20038 + gpio-controller;
20039 + #gpio-cells = <2>;
20040 + #interrupt-cells = <2>;
20041 + interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3E-int-gpio parameter
20042 + 2nd word is 2 for falling-edge triggered */
20043 + status = "okay";
20044 + };
20045 + };
20046 + };
20047 +
20048 + // Enable a SX1509 on I2C#1 at slave addr 0x3E
20049 + fragment@39 {
20050 + target = <&i2c1>;
20051 + __dormant__ {
20052 + #address-cells = <1>;
20053 + #size-cells = <0>;
20054 +
20055 + sx1509_1_3E: sx150x@3E {
20056 + compatible = "semtech,sx1509q";
20057 + reg = <0x3E>;
20058 + gpio-controller;
20059 + #gpio-cells = <2>;
20060 + #interrupt-cells = <2>;
20061 + interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3E-int-gpio parameter
20062 + 2nd word is 2 for falling-edge triggered */
20063 + status = "okay";
20064 + };
20065 + };
20066 + };
20067 +
20068 + // Enable a SX1509 on I2C#0 at slave addr 0x3F
20069 + fragment@40 {
20070 + target = <&i2c0>;
20071 + __dormant__ {
20072 + #address-cells = <1>;
20073 + #size-cells = <0>;
20074 +
20075 + sx1509_0_3F: sx150x@3F {
20076 + compatible = "semtech,sx1509q";
20077 + reg = <0x3F>;
20078 + gpio-controller;
20079 + #gpio-cells = <2>;
20080 + #interrupt-cells = <2>;
20081 + interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3F-int-gpio parameter
20082 + 2nd word is 2 for falling-edge triggered */
20083 + status = "okay";
20084 + };
20085 + };
20086 + };
20087 +
20088 + // Enable a SX1509 on I2C#1 at slave addr 0x3F
20089 + fragment@41 {
20090 + target = <&i2c1>;
20091 + __dormant__ {
20092 + #address-cells = <1>;
20093 + #size-cells = <0>;
20094 +
20095 + sx1509_1_3F: sx150x@3F {
20096 + compatible = "semtech,sx1509q";
20097 + reg = <0x3F>;
20098 + gpio-controller;
20099 + #gpio-cells = <2>;
20100 + #interrupt-cells = <2>;
20101 + interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3F-int-gpio parameter
20102 + 2nd word is 2 for falling-edge triggered */
20103 + status = "okay";
20104 + };
20105 + };
20106 + };
20107 +
20108 + // Enable a SX1509 on I2C#0 at slave addr 0x70
20109 + fragment@42 {
20110 + target = <&i2c0>;
20111 + __dormant__ {
20112 + #address-cells = <1>;
20113 + #size-cells = <0>;
20114 +
20115 + sx1509_0_70: sx150x@70 {
20116 + compatible = "semtech,sx1509q";
20117 + reg = <0x70>;
20118 + gpio-controller;
20119 + #gpio-cells = <2>;
20120 + #interrupt-cells = <2>;
20121 + interrupts = <25 2>; /* 1st word overwritten by sx1509-0-70-int-gpio parameter
20122 + 2nd word is 2 for falling-edge triggered */
20123 + status = "okay";
20124 + };
20125 + };
20126 + };
20127 +
20128 + // Enable a SX1509 on I2C#1 at slave addr 0x70
20129 + fragment@43 {
20130 + target = <&i2c1>;
20131 + __dormant__ {
20132 + #address-cells = <1>;
20133 + #size-cells = <0>;
20134 +
20135 + sx1509_1_70: sx150x@70 {
20136 + compatible = "semtech,sx1509q";
20137 + reg = <0x70>;
20138 + gpio-controller;
20139 + #gpio-cells = <2>;
20140 + #interrupt-cells = <2>;
20141 + interrupts = <25 2>; /* 1st word overwritten by sx1509-1-70-int-gpio parameter
20142 + 2nd word is 2 for falling-edge triggered */
20143 + status = "okay";
20144 + };
20145 + };
20146 + };
20147 +
20148 + // Enable a SX1509 on I2C#0 at slave addr 0x71
20149 + fragment@44 {
20150 + target = <&i2c0>;
20151 + __dormant__ {
20152 + #address-cells = <1>;
20153 + #size-cells = <0>;
20154 +
20155 + sx1509_0_71: sx150x@71 {
20156 + compatible = "semtech,sx1509q";
20157 + reg = <0x71>;
20158 + gpio-controller;
20159 + #gpio-cells = <2>;
20160 + #interrupt-cells = <2>;
20161 + interrupts = <25 2>; /* 1st word overwritten by sx1509-0-71-int-gpio parameter
20162 + 2nd word is 2 for falling-edge triggered */
20163 + status = "okay";
20164 + };
20165 + };
20166 + };
20167 +
20168 + // Enable a SX1509 on I2C#1 at slave addr 0x71
20169 + fragment@45 {
20170 + target = <&i2c1>;
20171 + __dormant__ {
20172 + #address-cells = <1>;
20173 + #size-cells = <0>;
20174 +
20175 + sx1509_1_71: sx150x@71 {
20176 + compatible = "semtech,sx1509q";
20177 + reg = <0x71>;
20178 + gpio-controller;
20179 + #gpio-cells = <2>;
20180 + #interrupt-cells = <2>;
20181 + interrupts = <25 2>; /* 1st word overwritten by sx1509-1-71-int-gpio parameter
20182 + 2nd word is 2 for falling-edge triggered */
20183 + status = "okay";
20184 + };
20185 + };
20186 + };
20187 +
20188 + // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x20
20189 + fragment@46 {
20190 + target = <&sx1501_0_20>;
20191 + __dormant__ {
20192 + interrupt-parent = <&gpio>;
20193 + interrupt-controller;
20194 + pinctrl-names = "default";
20195 + pinctrl-0 = <&sx150x_0_20_pins>;
20196 + };
20197 + };
20198 +
20199 + // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x20
20200 + fragment@47 {
20201 + target = <&sx1501_1_20>;
20202 + __dormant__ {
20203 + interrupt-parent = <&gpio>;
20204 + interrupt-controller;
20205 + pinctrl-names = "default";
20206 + pinctrl-0 = <&sx150x_1_20_pins>;
20207 + };
20208 + };
20209 +
20210 + // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x21
20211 + fragment@48 {
20212 + target = <&sx1501_0_21>;
20213 + __dormant__ {
20214 + interrupt-parent = <&gpio>;
20215 + interrupt-controller;
20216 + pinctrl-names = "default";
20217 + pinctrl-0 = <&sx150x_0_21_pins>;
20218 + };
20219 + };
20220 +
20221 + // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x21
20222 + fragment@49 {
20223 + target = <&sx1501_1_21>;
20224 + __dormant__ {
20225 + interrupt-parent = <&gpio>;
20226 + interrupt-controller;
20227 + pinctrl-names = "default";
20228 + pinctrl-0 = <&sx150x_1_21_pins>;
20229 + };
20230 + };
20231 +
20232 + // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x20
20233 + fragment@50 {
20234 + target = <&sx1502_0_20>;
20235 + __dormant__ {
20236 + interrupt-parent = <&gpio>;
20237 + interrupt-controller;
20238 + pinctrl-names = "default";
20239 + pinctrl-0 = <&sx150x_0_20_pins>;
20240 + };
20241 + };
20242 +
20243 + // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x20
20244 + fragment@51 {
20245 + target = <&sx1502_1_20>;
20246 + __dormant__ {
20247 + interrupt-parent = <&gpio>;
20248 + interrupt-controller;
20249 + pinctrl-names = "default";
20250 + pinctrl-0 = <&sx150x_1_20_pins>;
20251 + };
20252 + };
20253 +
20254 + // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x21
20255 + fragment@52 {
20256 + target = <&sx1502_0_21>;
20257 + __dormant__ {
20258 + interrupt-parent = <&gpio>;
20259 + interrupt-controller;
20260 + pinctrl-names = "default";
20261 + pinctrl-0 = <&sx150x_0_21_pins>;
20262 + };
20263 + };
20264 +
20265 + // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x21
20266 + fragment@53 {
20267 + target = <&sx1502_1_21>;
20268 + __dormant__ {
20269 + interrupt-parent = <&gpio>;
20270 + interrupt-controller;
20271 + pinctrl-names = "default";
20272 + pinctrl-0 = <&sx150x_1_21_pins>;
20273 + };
20274 + };
20275 +
20276 + // Enable interrupts for a SX1503 on I2C#0 at slave addr 0x20
20277 + fragment@54 {
20278 + target = <&sx1503_0_20>;
20279 + __dormant__ {
20280 + interrupt-parent = <&gpio>;
20281 + interrupt-controller;
20282 + pinctrl-names = "default";
20283 + pinctrl-0 = <&sx150x_0_20_pins>;
20284 + };
20285 + };
20286 +
20287 + // Enable interrupts for a SX1503 on I2C#1 at slave addr 0x20
20288 + fragment@55 {
20289 + target = <&sx1503_1_20>;
20290 + __dormant__ {
20291 + interrupt-parent = <&gpio>;
20292 + interrupt-controller;
20293 + pinctrl-names = "default";
20294 + pinctrl-0 = <&sx150x_1_20_pins>;
20295 + };
20296 + };
20297 +
20298 + // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x20
20299 + fragment@56 {
20300 + target = <&sx1504_0_20>;
20301 + __dormant__ {
20302 + interrupt-parent = <&gpio>;
20303 + interrupt-controller;
20304 + pinctrl-names = "default";
20305 + pinctrl-0 = <&sx150x_0_20_pins>;
20306 + };
20307 + };
20308 +
20309 + // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x20
20310 + fragment@57 {
20311 + target = <&sx1504_1_20>;
20312 + __dormant__ {
20313 + interrupt-parent = <&gpio>;
20314 + interrupt-controller;
20315 + pinctrl-names = "default";
20316 + pinctrl-0 = <&sx150x_1_20_pins>;
20317 + };
20318 + };
20319 +
20320 + // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x21
20321 + fragment@58 {
20322 + target = <&sx1504_0_21>;
20323 + __dormant__ {
20324 + interrupt-parent = <&gpio>;
20325 + interrupt-controller;
20326 + pinctrl-names = "default";
20327 + pinctrl-0 = <&sx150x_0_21_pins>;
20328 + };
20329 + };
20330 +
20331 + // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x21
20332 + fragment@59 {
20333 + target = <&sx1504_1_21>;
20334 + __dormant__ {
20335 + interrupt-parent = <&gpio>;
20336 + interrupt-controller;
20337 + pinctrl-names = "default";
20338 + pinctrl-0 = <&sx150x_1_21_pins>;
20339 + };
20340 + };
20341 +
20342 + // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x20
20343 + fragment@60 {
20344 + target = <&sx1505_0_20>;
20345 + __dormant__ {
20346 + interrupt-parent = <&gpio>;
20347 + interrupt-controller;
20348 + pinctrl-names = "default";
20349 + pinctrl-0 = <&sx150x_0_20_pins>;
20350 + };
20351 + };
20352 +
20353 + // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x20
20354 + fragment@61 {
20355 + target = <&sx1505_1_20>;
20356 + __dormant__ {
20357 + interrupt-parent = <&gpio>;
20358 + interrupt-controller;
20359 + pinctrl-names = "default";
20360 + pinctrl-0 = <&sx150x_1_20_pins>;
20361 + };
20362 + };
20363 +
20364 + // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x21
20365 + fragment@62 {
20366 + target = <&sx1505_0_21>;
20367 + __dormant__ {
20368 + interrupt-parent = <&gpio>;
20369 + interrupt-controller;
20370 + pinctrl-names = "default";
20371 + pinctrl-0 = <&sx150x_0_21_pins>;
20372 + };
20373 + };
20374 +
20375 + // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x21
20376 + fragment@63 {
20377 + target = <&sx1505_1_21>;
20378 + __dormant__ {
20379 + interrupt-parent = <&gpio>;
20380 + interrupt-controller;
20381 + pinctrl-names = "default";
20382 + pinctrl-0 = <&sx150x_1_21_pins>;
20383 + };
20384 + };
20385 +
20386 + // Enable interrupts for a SX1506 on I2C#0 at slave addr 0x20
20387 + fragment@64 {
20388 + target = <&sx1506_0_20>;
20389 + __dormant__ {
20390 + interrupt-parent = <&gpio>;
20391 + interrupt-controller;
20392 + pinctrl-names = "default";
20393 + pinctrl-0 = <&sx150x_0_20_pins>;
20394 + };
20395 + };
20396 +
20397 + // Enable interrupts for a SX1506 on I2C#1 at slave addr 0x20
20398 + fragment@65 {
20399 + target = <&sx1506_1_20>;
20400 + __dormant__ {
20401 + interrupt-parent = <&gpio>;
20402 + interrupt-controller;
20403 + pinctrl-names = "default";
20404 + pinctrl-0 = <&sx150x_1_20_pins>;
20405 + };
20406 + };
20407 +
20408 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3E
20409 + fragment@66 {
20410 + target = <&sx1507_0_3E>;
20411 + __dormant__ {
20412 + interrupt-parent = <&gpio>;
20413 + interrupt-controller;
20414 + pinctrl-names = "default";
20415 + pinctrl-0 = <&sx150x_0_3E_pins>;
20416 + };
20417 + };
20418 +
20419 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3E
20420 + fragment@67 {
20421 + target = <&sx1507_1_3E>;
20422 + __dormant__ {
20423 + interrupt-parent = <&gpio>;
20424 + interrupt-controller;
20425 + pinctrl-names = "default";
20426 + pinctrl-0 = <&sx150x_1_3E_pins>;
20427 + };
20428 + };
20429 +
20430 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3F
20431 + fragment@68 {
20432 + target = <&sx1507_0_3F>;
20433 + __dormant__ {
20434 + interrupt-parent = <&gpio>;
20435 + interrupt-controller;
20436 + pinctrl-names = "default";
20437 + pinctrl-0 = <&sx150x_0_3F_pins>;
20438 + };
20439 + };
20440 +
20441 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3F
20442 + fragment@69 {
20443 + target = <&sx1507_1_3F>;
20444 + __dormant__ {
20445 + interrupt-parent = <&gpio>;
20446 + interrupt-controller;
20447 + pinctrl-names = "default";
20448 + pinctrl-0 = <&sx150x_1_3F_pins>;
20449 + };
20450 + };
20451 +
20452 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x70
20453 + fragment@70 {
20454 + target = <&sx1507_0_70>;
20455 + __dormant__ {
20456 + interrupt-parent = <&gpio>;
20457 + interrupt-controller;
20458 + pinctrl-names = "default";
20459 + pinctrl-0 = <&sx150x_1_70_pins>;
20460 + };
20461 + };
20462 +
20463 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x70
20464 + fragment@71 {
20465 + target = <&sx1507_1_70>;
20466 + __dormant__ {
20467 + interrupt-parent = <&gpio>;
20468 + interrupt-controller;
20469 + pinctrl-names = "default";
20470 + pinctrl-0 = <&sx150x_1_70_pins>;
20471 + };
20472 + };
20473 +
20474 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x71
20475 + fragment@72 {
20476 + target = <&sx1507_0_71>;
20477 + __dormant__ {
20478 + interrupt-parent = <&gpio>;
20479 + interrupt-controller;
20480 + pinctrl-names = "default";
20481 + pinctrl-0 = <&sx150x_0_71_pins>;
20482 + };
20483 + };
20484 +
20485 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x71
20486 + fragment@73 {
20487 + target = <&sx1507_1_71>;
20488 + __dormant__ {
20489 + interrupt-parent = <&gpio>;
20490 + interrupt-controller;
20491 + pinctrl-names = "default";
20492 + pinctrl-0 = <&sx150x_1_71_pins>;
20493 + };
20494 + };
20495 +
20496 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x20
20497 + fragment@74 {
20498 + target = <&sx1508_0_20>;
20499 + __dormant__ {
20500 + interrupt-parent = <&gpio>;
20501 + interrupt-controller;
20502 + pinctrl-names = "default";
20503 + pinctrl-0 = <&sx150x_0_20_pins>;
20504 + };
20505 + };
20506 +
20507 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x20
20508 + fragment@75 {
20509 + target = <&sx1508_1_20>;
20510 + __dormant__ {
20511 + interrupt-parent = <&gpio>;
20512 + interrupt-controller;
20513 + pinctrl-names = "default";
20514 + pinctrl-0 = <&sx150x_1_20_pins>;
20515 + };
20516 + };
20517 +
20518 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x21
20519 + fragment@76 {
20520 + target = <&sx1508_0_21>;
20521 + __dormant__ {
20522 + interrupt-parent = <&gpio>;
20523 + interrupt-controller;
20524 + pinctrl-names = "default";
20525 + pinctrl-0 = <&sx150x_0_21_pins>;
20526 + };
20527 + };
20528 +
20529 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x21
20530 + fragment@77 {
20531 + target = <&sx1508_1_21>;
20532 + __dormant__ {
20533 + interrupt-parent = <&gpio>;
20534 + interrupt-controller;
20535 + pinctrl-names = "default";
20536 + pinctrl-0 = <&sx150x_1_21_pins>;
20537 + };
20538 + };
20539 +
20540 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x22
20541 + fragment@78 {
20542 + target = <&sx1508_0_22>;
20543 + __dormant__ {
20544 + interrupt-parent = <&gpio>;
20545 + interrupt-controller;
20546 + pinctrl-names = "default";
20547 + pinctrl-0 = <&sx150x_0_22_pins>;
20548 + };
20549 + };
20550 +
20551 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x22
20552 + fragment@79 {
20553 + target = <&sx1508_1_22>;
20554 + __dormant__ {
20555 + interrupt-parent = <&gpio>;
20556 + interrupt-controller;
20557 + pinctrl-names = "default";
20558 + pinctrl-0 = <&sx150x_1_22_pins>;
20559 + };
20560 + };
20561 +
20562 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x23
20563 + fragment@80 {
20564 + target = <&sx1508_0_23>;
20565 + __dormant__ {
20566 + interrupt-parent = <&gpio>;
20567 + interrupt-controller;
20568 + pinctrl-names = "default";
20569 + pinctrl-0 = <&sx150x_0_23_pins>;
20570 + };
20571 + };
20572 +
20573 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x23
20574 + fragment@81 {
20575 + target = <&sx1508_1_23>;
20576 + __dormant__ {
20577 + interrupt-parent = <&gpio>;
20578 + interrupt-controller;
20579 + pinctrl-names = "default";
20580 + pinctrl-0 = <&sx150x_1_23_pins>;
20581 + };
20582 + };
20583 +
20584 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3E
20585 + fragment@82 {
20586 + target = <&sx1509_0_3E>;
20587 + __dormant__ {
20588 + interrupt-parent = <&gpio>;
20589 + interrupt-controller;
20590 + pinctrl-names = "default";
20591 + pinctrl-0 = <&sx150x_0_3E_pins>;
20592 + };
20593 + };
20594 +
20595 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3E
20596 + fragment@83 {
20597 + target = <&sx1509_1_3E>;
20598 + __dormant__ {
20599 + interrupt-parent = <&gpio>;
20600 + interrupt-controller;
20601 + pinctrl-names = "default";
20602 + pinctrl-0 = <&sx150x_1_3E_pins>;
20603 + };
20604 + };
20605 +
20606 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3F
20607 + fragment@84 {
20608 + target = <&sx1509_0_3F>;
20609 + __dormant__ {
20610 + interrupt-parent = <&gpio>;
20611 + interrupt-controller;
20612 + pinctrl-names = "default";
20613 + pinctrl-0 = <&sx150x_0_3F_pins>;
20614 + };
20615 + };
20616 +
20617 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3F
20618 + fragment@85 {
20619 + target = <&sx1509_1_3F>;
20620 + __dormant__ {
20621 + interrupt-parent = <&gpio>;
20622 + interrupt-controller;
20623 + pinctrl-names = "default";
20624 + pinctrl-0 = <&sx150x_1_3F_pins>;
20625 + };
20626 + };
20627 +
20628 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x70
20629 + fragment@86 {
20630 + target = <&sx1509_0_70>;
20631 + __dormant__ {
20632 + interrupt-parent = <&gpio>;
20633 + interrupt-controller;
20634 + pinctrl-names = "default";
20635 + pinctrl-0 = <&sx150x_0_70_pins>;
20636 + };
20637 + };
20638 +
20639 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x70
20640 + fragment@87 {
20641 + target = <&sx1509_1_70>;
20642 + __dormant__ {
20643 + interrupt-parent = <&gpio>;
20644 + interrupt-controller;
20645 + pinctrl-names = "default";
20646 + pinctrl-0 = <&sx150x_1_70_pins>;
20647 + };
20648 + };
20649 +
20650 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x71
20651 + fragment@88 {
20652 + target = <&sx1509_0_71>;
20653 + __dormant__ {
20654 + interrupt-parent = <&gpio>;
20655 + interrupt-controller;
20656 + pinctrl-names = "default";
20657 + pinctrl-0 = <&sx150x_0_71_pins>;
20658 + };
20659 + };
20660 +
20661 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x71
20662 + fragment@89 {
20663 + target = <&sx1509_1_71>;
20664 + __dormant__ {
20665 + interrupt-parent = <&gpio>;
20666 + interrupt-controller;
20667 + pinctrl-names = "default";
20668 + pinctrl-0 = <&sx150x_1_71_pins>;
20669 + };
20670 + };
20671 +
20672 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x20
20673 + // Configure as a input with no pull-up/down
20674 + fragment@90 {
20675 + target = <&gpio>;
20676 + __dormant__ {
20677 + sx150x_0_20_pins: sx150x_0_20_pins {
20678 + brcm,pins = <0>; /* overwritten by sx150x-0-20-int-gpio parameter */
20679 + brcm,function = <0>;
20680 + brcm,pull = <0>;
20681 + };
20682 + };
20683 + };
20684 +
20685 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x20
20686 + // Configure as a input with no pull-up/down
20687 + fragment@91 {
20688 + target = <&gpio>;
20689 + __dormant__ {
20690 + sx150x_1_20_pins: sx150x_1_20_pins {
20691 + brcm,pins = <0>; /* overwritten by sx150x-1-20-int-gpio parameter */
20692 + brcm,function = <0>;
20693 + brcm,pull = <0>;
20694 + };
20695 + };
20696 + };
20697 +
20698 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x21
20699 + // Configure as a input with no pull-up/down
20700 + fragment@92 {
20701 + target = <&gpio>;
20702 + __dormant__ {
20703 + sx150x_0_21_pins: sx150x_0_21_pins {
20704 + brcm,pins = <0>; /* overwritten by sx150x-0-21-int-gpio parameter */
20705 + brcm,function = <0>;
20706 + brcm,pull = <0>;
20707 + };
20708 + };
20709 + };
20710 +
20711 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x21
20712 + // Configure as a input with no pull-up/down
20713 + fragment@93 {
20714 + target = <&gpio>;
20715 + __dormant__ {
20716 + sx150x_1_21_pins: sx150x_1_21_pins {
20717 + brcm,pins = <0>; /* overwritten by sx150x-1-21-int-gpio parameter */
20718 + brcm,function = <0>;
20719 + brcm,pull = <0>;
20720 + };
20721 + };
20722 + };
20723 +
20724 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x22
20725 + // Configure as a input with no pull-up/down
20726 + fragment@94 {
20727 + target = <&gpio>;
20728 + __dormant__ {
20729 + sx150x_0_22_pins: sx150x_0_22_pins {
20730 + brcm,pins = <0>; /* overwritten by sx150x-0-22-int-gpio parameter */
20731 + brcm,function = <0>;
20732 + brcm,pull = <0>;
20733 + };
20734 + };
20735 + };
20736 +
20737 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x22
20738 + // Configure as a input with no pull-up/down
20739 + fragment@95 {
20740 + target = <&gpio>;
20741 + __dormant__ {
20742 + sx150x_1_22_pins: sx150x_1_22_pins {
20743 + brcm,pins = <0>; /* overwritten by sx150x-1-22-int-gpio parameter */
20744 + brcm,function = <0>;
20745 + brcm,pull = <0>;
20746 + };
20747 + };
20748 + };
20749 +
20750 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x23
20751 + // Configure as a input with no pull-up/down
20752 + fragment@96 {
20753 + target = <&gpio>;
20754 + __dormant__ {
20755 + sx150x_0_23_pins: sx150x_0_23_pins {
20756 + brcm,pins = <0>; /* overwritten by sx150x-0-23-int-gpio parameter */
20757 + brcm,function = <0>;
20758 + brcm,pull = <0>;
20759 + };
20760 + };
20761 + };
20762 +
20763 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x23
20764 + // Configure as a input with no pull-up/down
20765 + fragment@97 {
20766 + target = <&gpio>;
20767 + __dormant__ {
20768 + sx150x_1_23_pins: sx150x_1_23_pins {
20769 + brcm,pins = <0>; /* overwritten by sx150x-1-23-int-gpio parameter */
20770 + brcm,function = <0>;
20771 + brcm,pull = <0>;
20772 + };
20773 + };
20774 + };
20775 +
20776 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3E
20777 + // Configure as a input with no pull-up/down
20778 + fragment@98 {
20779 + target = <&gpio>;
20780 + __dormant__ {
20781 + sx150x_0_3E_pins: sx150x_0_3E_pins {
20782 + brcm,pins = <0>; /* overwritten by sx150x-0-3E-int-gpio parameter */
20783 + brcm,function = <0>;
20784 + brcm,pull = <0>;
20785 + };
20786 + };
20787 + };
20788 +
20789 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3E
20790 + // Configure as a input with no pull-up/down
20791 + fragment@99 {
20792 + target = <&gpio>;
20793 + __dormant__ {
20794 + sx150x_1_3E_pins: sx150x_1_3E_pins {
20795 + brcm,pins = <0>; /* overwritten by sx150x-1-3E-int-gpio parameter */
20796 + brcm,function = <0>;
20797 + brcm,pull = <0>;
20798 + };
20799 + };
20800 + };
20801 +
20802 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3F
20803 + // Configure as a input with no pull-up/down
20804 + fragment@100 {
20805 + target = <&gpio>;
20806 + __dormant__ {
20807 + sx150x_0_3F_pins: sx150x_0_3F_pins {
20808 + brcm,pins = <0>; /* overwritten by sx150x-0-3F-int-gpio parameter */
20809 + brcm,function = <0>;
20810 + brcm,pull = <0>;
20811 + };
20812 + };
20813 + };
20814 +
20815 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3F
20816 + // Configure as a input with no pull-up/down
20817 + fragment@101 {
20818 + target = <&gpio>;
20819 + __dormant__ {
20820 + sx150x_1_3F_pins: sx150x_1_3F_pins {
20821 + brcm,pins = <0>; /* overwritten by sx150x-1-3F-int-gpio parameter */
20822 + brcm,function = <0>;
20823 + brcm,pull = <0>;
20824 + };
20825 + };
20826 + };
20827 +
20828 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x70
20829 + // Configure as a input with no pull-up/down
20830 + fragment@102 {
20831 + target = <&gpio>;
20832 + __dormant__ {
20833 + sx150x_0_70_pins: sx150x_0_70_pins {
20834 + brcm,pins = <0>; /* overwritten by sx150x-0-70-int-gpio parameter */
20835 + brcm,function = <0>;
20836 + brcm,pull = <0>;
20837 + };
20838 + };
20839 + };
20840 +
20841 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x70
20842 + // Configure as a input with no pull-up/down
20843 + fragment@103 {
20844 + target = <&gpio>;
20845 + __dormant__ {
20846 + sx150x_1_70_pins: sx150x_1_70_pins {
20847 + brcm,pins = <0>; /* overwritten by sx150x-1-70-int-gpio parameter */
20848 + brcm,function = <0>;
20849 + brcm,pull = <0>;
20850 + };
20851 + };
20852 + };
20853 +
20854 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x71
20855 + // Configure as a input with no pull-up/down
20856 + fragment@104 {
20857 + target = <&gpio>;
20858 + __dormant__ {
20859 + sx150x_0_71_pins: sx150x_0_71_pins {
20860 + brcm,pins = <0>; /* overwritten by sx150x-0-71-int-gpio parameter */
20861 + brcm,function = <0>;
20862 + brcm,pull = <0>;
20863 + };
20864 + };
20865 + };
20866 +
20867 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x71
20868 + // Configure as a input with no pull-up/down
20869 + fragment@105 {
20870 + target = <&gpio>;
20871 + __dormant__ {
20872 + sx150x_1_71_pins: sx150x_1_71_pins {
20873 + brcm,pins = <0>; /* overwritten by sx150x-1-71-int-gpio parameter */
20874 + brcm,function = <0>;
20875 + brcm,pull = <0>;
20876 + };
20877 + };
20878 + };
20879 +
20880 + __overrides__ {
20881 + sx1501-0-20 = <0>,"+0+2";
20882 + sx1501-1-20 = <0>,"+1+3";
20883 + sx1501-0-21 = <0>,"+0+4";
20884 + sx1501-1-21 = <0>,"+1+5";
20885 + sx1502-0-20 = <0>,"+0+6";
20886 + sx1502-1-20 = <0>,"+1+7";
20887 + sx1502-0-21 = <0>,"+0+8";
20888 + sx1502-1-21 = <0>,"+1+9";
20889 + sx1503-0-20 = <0>,"+0+10";
20890 + sx1503-1-20 = <0>,"+1+11";
20891 + sx1504-0-20 = <0>,"+0+12";
20892 + sx1504-1-20 = <0>,"+1+13";
20893 + sx1504-0-21 = <0>,"+0+14";
20894 + sx1504-1-21 = <0>,"+1+15";
20895 + sx1505-0-20 = <0>,"+0+16";
20896 + sx1505-1-20 = <0>,"+1+17";
20897 + sx1505-0-21 = <0>,"+0+18";
20898 + sx1505-1-21 = <0>,"+1+19";
20899 + sx1506-0-20 = <0>,"+0+20";
20900 + sx1506-1-20 = <0>,"+1+21";
20901 + sx1507-0-3E = <0>,"+0+22";
20902 + sx1507-1-3E = <0>,"+1+23";
20903 + sx1507-0-3F = <0>,"+0+24";
20904 + sx1507-1-3F = <0>,"+1+25";
20905 + sx1507-0-70 = <0>,"+0+26";
20906 + sx1507-1-70 = <0>,"+1+27";
20907 + sx1507-0-71 = <0>,"+0+28";
20908 + sx1507-1-71 = <0>,"+1+29";
20909 + sx1508-0-20 = <0>,"+0+30";
20910 + sx1508-1-20 = <0>,"+1+31";
20911 + sx1508-0-21 = <0>,"+0+32";
20912 + sx1508-1-21 = <0>,"+1+33";
20913 + sx1508-0-22 = <0>,"+0+34";
20914 + sx1508-1-22 = <0>,"+1+35";
20915 + sx1508-0-23 = <0>,"+0+36";
20916 + sx1508-1-23 = <0>,"+1+37";
20917 + sx1509-0-3E = <0>,"+0+38";
20918 + sx1509-1-3E = <0>,"+1+39";
20919 + sx1509-0-3F = <0>,"+0+40";
20920 + sx1509-1-3F = <0>,"+1+41";
20921 + sx1509-0-70 = <0>,"+0+42";
20922 + sx1509-1-70 = <0>,"+1+43";
20923 + sx1509-0-71 = <0>,"+0+44";
20924 + sx1509-1-71 = <0>,"+1+45";
20925 + sx1501-0-20-int-gpio = <0>,"+46+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1501_0_20>,"interrupts:0";
20926 + sx1501-1-20-int-gpio = <0>,"+47+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1501_1_20>,"interrupts:0";
20927 + sx1501-0-21-int-gpio = <0>,"+48+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1501_0_21>,"interrupts:0";
20928 + sx1501-1-21-int-gpio = <0>,"+49+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1501_1_21>,"interrupts:0";
20929 + sx1502-0-20-int-gpio = <0>,"+50+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1502_0_20>,"interrupts:0";
20930 + sx1502-1-20-int-gpio = <0>,"+51+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1502_1_20>,"interrupts:0";
20931 + sx1502-0-21-int-gpio = <0>,"+52+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1502_0_21>,"interrupts:0";
20932 + sx1502-1-21-int-gpio = <0>,"+53+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1502_1_21>,"interrupts:0";
20933 + sx1503-0-20-int-gpio = <0>,"+54+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1503_0_20>,"interrupts:0";
20934 + sx1503-1-20-int-gpio = <0>,"+55+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1503_1_20>,"interrupts:0";
20935 + sx1504-0-20-int-gpio = <0>,"+56+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1504_0_20>,"interrupts:0";
20936 + sx1504-1-20-int-gpio = <0>,"+57+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1504_1_20>,"interrupts:0";
20937 + sx1504-0-21-int-gpio = <0>,"+58+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1504_0_21>,"interrupts:0";
20938 + sx1504-1-21-int-gpio = <0>,"+59+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1504_1_21>,"interrupts:0";
20939 + sx1505-0-20-int-gpio = <0>,"+60+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1505_0_20>,"interrupts:0";
20940 + sx1505-1-20-int-gpio = <0>,"+61+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1505_1_20>,"interrupts:0";
20941 + sx1505-0-21-int-gpio = <0>,"+62+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1505_0_21>,"interrupts:0";
20942 + sx1505-1-21-int-gpio = <0>,"+63+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1505_1_21>,"interrupts:0";
20943 + sx1506-0-20-int-gpio = <0>,"+64+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1506_0_20>,"interrupts:0";
20944 + sx1506-1-20-int-gpio = <0>,"+65+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1506_1_20>,"interrupts:0";
20945 + sx1507-0-3E-int-gpio = <0>,"+66+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1507_0_3E>,"interrupts:0";
20946 + sx1507-1-3E-int-gpio = <0>,"+67+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1507_1_3E>,"interrupts:0";
20947 + sx1507-0-3F-int-gpio = <0>,"+68+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1507_0_3F>,"interrupts:0";
20948 + sx1507-1-3F-int-gpio = <0>,"+69+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1507_1_3F>,"interrupts:0";
20949 + sx1507-0-70-int-gpio = <0>,"+60+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1507_0_70>,"interrupts:0";
20950 + sx1507-1-70-int-gpio = <0>,"+71+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1507_1_70>,"interrupts:0";
20951 + sx1507-0-71-int-gpio = <0>,"+72+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1507_0_71>,"interrupts:0";
20952 + sx1507-1-71-int-gpio = <0>,"+73+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1507_1_71>,"interrupts:0";
20953 + sx1508-0-20-int-gpio = <0>,"+74+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1508_0_20>,"interrupts:0";
20954 + sx1508-1-20-int-gpio = <0>,"+75+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1508_1_20>,"interrupts:0";
20955 + sx1508-0-21-int-gpio = <0>,"+76+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1508_0_21>,"interrupts:0";
20956 + sx1508-1-21-int-gpio = <0>,"+77+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1508_1_21>,"interrupts:0";
20957 + sx1508-0-22-int-gpio = <0>,"+78+94", <&sx150x_0_22_pins>,"brcm,pins:0", <&sx1508_0_22>,"interrupts:0";
20958 + sx1508-1-22-int-gpio = <0>,"+79+95", <&sx150x_1_22_pins>,"brcm,pins:0", <&sx1508_1_22>,"interrupts:0";
20959 + sx1508-0-23-int-gpio = <0>,"+80+96", <&sx150x_0_23_pins>,"brcm,pins:0", <&sx1508_0_23>,"interrupts:0";
20960 + sx1508-1-23-int-gpio = <0>,"+81+97", <&sx150x_1_23_pins>,"brcm,pins:0", <&sx1508_1_23>,"interrupts:0";
20961 + sx1509-0-3E-int-gpio = <0>,"+82+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1509_0_3E>,"interrupts:0";
20962 + sx1509-1-3E-int-gpio = <0>,"+83+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1509_1_3E>,"interrupts:0";
20963 + sx1509-0-3F-int-gpio = <0>,"+84+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1509_0_3F>,"interrupts:0";
20964 + sx1509-1-3F-int-gpio = <0>,"+85+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1509_1_3F>,"interrupts:0";
20965 + sx1509-0-70-int-gpio = <0>,"+86+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1509_0_70>,"interrupts:0";
20966 + sx1509-1-70-int-gpio = <0>,"+87+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1509_1_70>,"interrupts:0";
20967 + sx1509-0-71-int-gpio = <0>,"+88+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1509_0_71>,"interrupts:0";
20968 + sx1509-1-71-int-gpio = <0>,"+89+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1509_1_71>,"interrupts:0";
20969 + };
20970 +};
20971 +
20972 diff --git a/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts b/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
20973 new file mode 100644
20974 index 000000000000..047695bb0c71
20975 --- /dev/null
20976 +++ b/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
20977 @@ -0,0 +1,52 @@
20978 +// SPDX-License-Identifier: GPL-2.0-only
20979 +// Definitions to add I2S audio from the Toshiba TC358743 HDMI to CSI2 bridge.
20980 +// Requires tc358743 overlay to have been loaded to actually function.
20981 +/dts-v1/;
20982 +/plugin/;
20983 +
20984 +/ {
20985 + compatible = "brcm,bcm2835";
20986 +
20987 + fragment@0 {
20988 + target = <&i2s>;
20989 + __overlay__ {
20990 + status = "okay";
20991 + };
20992 + };
20993 +
20994 + fragment@1 {
20995 + target-path = "/";
20996 + __overlay__ {
20997 + tc358743_codec: tc358743-codec {
20998 + #sound-dai-cells = <0>;
20999 + compatible = "linux,spdif-dir";
21000 + status = "okay";
21001 + };
21002 + };
21003 + };
21004 +
21005 + fragment@2 {
21006 + target = <&sound>;
21007 + sound_overlay: __overlay__ {
21008 + compatible = "simple-audio-card";
21009 + simple-audio-card,format = "i2s";
21010 + simple-audio-card,name = "tc358743";
21011 + simple-audio-card,bitclock-master = <&dailink0_slave>;
21012 + simple-audio-card,frame-master = <&dailink0_slave>;
21013 + status = "okay";
21014 +
21015 + simple-audio-card,cpu {
21016 + sound-dai = <&i2s>;
21017 + dai-tdm-slot-num = <2>;
21018 + dai-tdm-slot-width = <32>;
21019 + };
21020 + dailink0_slave: simple-audio-card,codec {
21021 + sound-dai = <&tc358743_codec>;
21022 + };
21023 + };
21024 + };
21025 +
21026 + __overrides__ {
21027 + card-name = <&sound_overlay>,"simple-audio-card,name";
21028 + };
21029 +};
21030 diff --git a/arch/arm/boot/dts/overlays/tc358743-overlay.dts b/arch/arm/boot/dts/overlays/tc358743-overlay.dts
21031 new file mode 100644
21032 index 000000000000..2a1a3a80de49
21033 --- /dev/null
21034 +++ b/arch/arm/boot/dts/overlays/tc358743-overlay.dts
21035 @@ -0,0 +1,116 @@
21036 +// SPDX-License-Identifier: GPL-2.0-only
21037 +// Definitions for Toshiba TC358743 HDMI to CSI2 bridge on VC I2C bus
21038 +/dts-v1/;
21039 +/plugin/;
21040 +
21041 +/{
21042 + compatible = "brcm,bcm2835";
21043 +
21044 + fragment@0 {
21045 + target = <&i2c_vc>;
21046 + __overlay__ {
21047 + #address-cells = <1>;
21048 + #size-cells = <0>;
21049 + status = "okay";
21050 +
21051 + tc358743@0f {
21052 + compatible = "toshiba,tc358743";
21053 + reg = <0x0f>;
21054 + status = "okay";
21055 +
21056 + clocks = <&tc358743_clk>;
21057 + clock-names = "refclk";
21058 +
21059 + tc358743_clk: bridge-clk {
21060 + compatible = "fixed-clock";
21061 + #clock-cells = <0>;
21062 + clock-frequency = <27000000>;
21063 + };
21064 +
21065 + port {
21066 + tc358743: endpoint {
21067 + remote-endpoint = <&csi1_ep>;
21068 + clock-lanes = <0>;
21069 + clock-noncontinuous;
21070 + link-frequencies =
21071 + /bits/ 64 <486000000>;
21072 + };
21073 + };
21074 + };
21075 + };
21076 + };
21077 +
21078 + fragment@1 {
21079 + target = <&csi1>;
21080 + __overlay__ {
21081 + status = "okay";
21082 +
21083 + port {
21084 + csi1_ep: endpoint {
21085 + remote-endpoint = <&tc358743>;
21086 + };
21087 + };
21088 + };
21089 + };
21090 +
21091 + fragment@2 {
21092 + target = <&i2c_vc>;
21093 + __overlay__ {
21094 + tc358743@0f {
21095 + port {
21096 + endpoint {
21097 + data-lanes = <1 2>;
21098 + };
21099 + };
21100 + };
21101 + };
21102 + };
21103 +
21104 + fragment@3 {
21105 + target = <&i2c_vc>;
21106 + __dormant__ {
21107 + tc358743@0f {
21108 + port {
21109 + endpoint {
21110 + data-lanes = <1 2 3 4>;
21111 + };
21112 + };
21113 + };
21114 + };
21115 + };
21116 +
21117 + fragment@4 {
21118 + target = <&i2c0_pins>;
21119 + __dormant__ {
21120 + brcm,pins = <28 29>;
21121 + brcm,function = <4>; /* alt0 */
21122 + };
21123 + };
21124 + fragment@5 {
21125 + target = <&i2c0_pins>;
21126 + __overlay__ {
21127 + brcm,pins = <44 45>;
21128 + brcm,function = <5>; /* alt1 */
21129 + };
21130 + };
21131 + fragment@6 {
21132 + target = <&i2c0_pins>;
21133 + __dormant__ {
21134 + brcm,pins = <0 1>;
21135 + brcm,function = <4>; /* alt0 */
21136 + };
21137 + };
21138 + fragment@7 {
21139 + target = <&i2c_vc>;
21140 + __overlay__ {
21141 + status = "okay";
21142 + };
21143 + };
21144 +
21145 + __overrides__ {
21146 + i2c_pins_0_1 = <0>,"-4-5+6";
21147 + i2c_pins_28_29 = <0>,"+4-5-6";
21148 + 4lane = <0>, "-2+3";
21149 + link-frequency = <&tc358743>,"link-frequencies#0";
21150 + };
21151 +};
21152 diff --git a/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
21153 new file mode 100644
21154 index 000000000000..254ac2e0a214
21155 --- /dev/null
21156 +++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
21157 @@ -0,0 +1,222 @@
21158 +/*
21159 + * tinylcd35-overlay.dts
21160 + *
21161 + * -------------------------------------------------
21162 + * www.tinlylcd.com
21163 + * -------------------------------------------------
21164 + * Device---Driver-----BUS GPIO's
21165 + * display tinylcd35 spi0.0 25 24 18
21166 + * touch ads7846 spi0.1 5
21167 + * rtc ds1307 i2c1-0068
21168 + * rtc pcf8563 i2c1-0051
21169 + * keypad gpio-keys --------- 17 22 27 23 28
21170 + *
21171 + *
21172 + * TinyLCD.com 3.5 inch TFT
21173 + *
21174 + * Version 001
21175 + * 5/3/2015 -- Noralf Trønnes Initial Device tree framework
21176 + * 10/3/2015 -- tinylcd@gmail.com added ds1307 support.
21177 + *
21178 + */
21179 +
21180 +/dts-v1/;
21181 +/plugin/;
21182 +
21183 +/ {
21184 + compatible = "brcm,bcm2835";
21185 +
21186 + fragment@0 {
21187 + target = <&spi0>;
21188 + __overlay__ {
21189 + status = "okay";
21190 + };
21191 + };
21192 +
21193 + fragment@1 {
21194 + target = <&spidev0>;
21195 + __overlay__ {
21196 + status = "disabled";
21197 + };
21198 + };
21199 +
21200 + fragment@2 {
21201 + target = <&spidev1>;
21202 + __overlay__ {
21203 + status = "disabled";
21204 + };
21205 + };
21206 +
21207 + fragment@3 {
21208 + target = <&gpio>;
21209 + __overlay__ {
21210 + tinylcd35_pins: tinylcd35_pins {
21211 + brcm,pins = <25 24 18>;
21212 + brcm,function = <1>; /* out */
21213 + };
21214 + tinylcd35_ts_pins: tinylcd35_ts_pins {
21215 + brcm,pins = <5>;
21216 + brcm,function = <0>; /* in */
21217 + };
21218 + keypad_pins: keypad_pins {
21219 + brcm,pins = <4 17 22 23 27>;
21220 + brcm,function = <0>; /* in */
21221 + brcm,pull = <1>; /* down */
21222 + };
21223 + };
21224 + };
21225 +
21226 + fragment@4 {
21227 + target = <&spi0>;
21228 + __overlay__ {
21229 + /* needed to avoid dtc warning */
21230 + #address-cells = <1>;
21231 + #size-cells = <0>;
21232 +
21233 + tinylcd35: tinylcd35@0{
21234 + compatible = "neosec,tinylcd";
21235 + reg = <0>;
21236 + pinctrl-names = "default";
21237 + pinctrl-0 = <&tinylcd35_pins>,
21238 + <&tinylcd35_ts_pins>;
21239 +
21240 + spi-max-frequency = <48000000>;
21241 + rotate = <270>;
21242 + fps = <20>;
21243 + bgr;
21244 + buswidth = <8>;
21245 + reset-gpios = <&gpio 25 0>;
21246 + dc-gpios = <&gpio 24 0>;
21247 + led-gpios = <&gpio 18 1>;
21248 + debug = <0>;
21249 +
21250 + init = <0x10000B0 0x80
21251 + 0x10000C0 0x0A 0x0A
21252 + 0x10000C1 0x01 0x01
21253 + 0x10000C2 0x33
21254 + 0x10000C5 0x00 0x42 0x80
21255 + 0x10000B1 0xD0 0x11
21256 + 0x10000B4 0x02
21257 + 0x10000B6 0x00 0x22 0x3B
21258 + 0x10000B7 0x07
21259 + 0x1000036 0x58
21260 + 0x10000F0 0x36 0xA5 0xD3
21261 + 0x10000E5 0x80
21262 + 0x10000E5 0x01
21263 + 0x10000B3 0x00
21264 + 0x10000E5 0x00
21265 + 0x10000F0 0x36 0xA5 0x53
21266 + 0x10000E0 0x00 0x35 0x33 0x00 0x00 0x00 0x00 0x35 0x33 0x00 0x00 0x00
21267 + 0x100003A 0x55
21268 + 0x1000011
21269 + 0x2000001
21270 + 0x1000029>;
21271 + };
21272 +
21273 + tinylcd35_ts: tinylcd35_ts@1 {
21274 + compatible = "ti,ads7846";
21275 + reg = <1>;
21276 + status = "disabled";
21277 +
21278 + spi-max-frequency = <2000000>;
21279 + interrupts = <5 2>; /* high-to-low edge triggered */
21280 + interrupt-parent = <&gpio>;
21281 + pendown-gpio = <&gpio 5 0>;
21282 + ti,x-plate-ohms = /bits/ 16 <100>;
21283 + ti,pressure-max = /bits/ 16 <255>;
21284 + };
21285 + };
21286 + };
21287 +
21288 + /* RTC */
21289 +
21290 + fragment@5 {
21291 + target = <&i2c1>;
21292 + __dormant__ {
21293 + #address-cells = <1>;
21294 + #size-cells = <0>;
21295 +
21296 + status = "okay";
21297 +
21298 + pcf8563: pcf8563@51 {
21299 + compatible = "nxp,pcf8563";
21300 + reg = <0x51>;
21301 + status = "okay";
21302 + };
21303 + };
21304 + };
21305 +
21306 + fragment@6 {
21307 + target = <&i2c1>;
21308 + __dormant__ {
21309 + #address-cells = <1>;
21310 + #size-cells = <0>;
21311 +
21312 + status = "okay";
21313 +
21314 + ds1307: ds1307@68 {
21315 + compatible = "dallas,ds1307";
21316 + reg = <0x68>;
21317 + status = "okay";
21318 + };
21319 + };
21320 + };
21321 +
21322 + /*
21323 + * Values for input event code is found under the
21324 + * 'Keys and buttons' heading in include/uapi/linux/input.h
21325 + */
21326 + fragment@7 {
21327 + target-path = "/soc";
21328 + __overlay__ {
21329 + keypad: keypad {
21330 + compatible = "gpio-keys";
21331 + pinctrl-names = "default";
21332 + pinctrl-0 = <&keypad_pins>;
21333 + status = "disabled";
21334 + autorepeat;
21335 +
21336 + button@17 {
21337 + label = "GPIO KEY_UP";
21338 + linux,code = <103>;
21339 + gpios = <&gpio 17 0>;
21340 + };
21341 + button@22 {
21342 + label = "GPIO KEY_DOWN";
21343 + linux,code = <108>;
21344 + gpios = <&gpio 22 0>;
21345 + };
21346 + button@27 {
21347 + label = "GPIO KEY_LEFT";
21348 + linux,code = <105>;
21349 + gpios = <&gpio 27 0>;
21350 + };
21351 + button@23 {
21352 + label = "GPIO KEY_RIGHT";
21353 + linux,code = <106>;
21354 + gpios = <&gpio 23 0>;
21355 + };
21356 + button@4 {
21357 + label = "GPIO KEY_ENTER";
21358 + linux,code = <28>;
21359 + gpios = <&gpio 4 0>;
21360 + };
21361 + };
21362 + };
21363 + };
21364 +
21365 + __overrides__ {
21366 + speed = <&tinylcd35>,"spi-max-frequency:0";
21367 + rotate = <&tinylcd35>,"rotate:0";
21368 + fps = <&tinylcd35>,"fps:0";
21369 + debug = <&tinylcd35>,"debug:0";
21370 + touch = <&tinylcd35_ts>,"status";
21371 + touchgpio = <&tinylcd35_ts_pins>,"brcm,pins:0",
21372 + <&tinylcd35_ts>,"interrupts:0",
21373 + <&tinylcd35_ts>,"pendown-gpio:4";
21374 + xohms = <&tinylcd35_ts>,"ti,x-plate-ohms;0";
21375 + rtc-pcf = <0>,"=5";
21376 + rtc-ds = <0>,"=6";
21377 + keypad = <&keypad>,"status";
21378 + };
21379 +};
21380 diff --git a/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts b/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts
21381 new file mode 100644
21382 index 000000000000..e69188503ca3
21383 --- /dev/null
21384 +++ b/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts
21385 @@ -0,0 +1,44 @@
21386 +/*
21387 + * Device Tree overlay for the Infineon SLB9670 Trusted Platform Module add-on
21388 + * boards, which can be used as a secure key storage and hwrng.
21389 + * available as "Iridium SLB9670" by Infineon and "LetsTrust TPM" by pi3g.
21390 + */
21391 +
21392 +/dts-v1/;
21393 +/plugin/;
21394 +
21395 +/ {
21396 + compatible = "brcm,bcm2835";
21397 +
21398 + fragment@0 {
21399 + target = <&spi0>;
21400 + __overlay__ {
21401 + status = "okay";
21402 + };
21403 + };
21404 +
21405 + fragment@1 {
21406 + target = <&spidev1>;
21407 + __overlay__ {
21408 + status = "disabled";
21409 + };
21410 + };
21411 +
21412 + fragment@2 {
21413 + target = <&spi0>;
21414 + __overlay__ {
21415 + /* needed to avoid dtc warning */
21416 + #address-cells = <1>;
21417 + #size-cells = <0>;
21418 + slb9670: slb9670@1 {
21419 + compatible = "infineon,slb9670";
21420 + reg = <1>; /* CE1 */
21421 + #address-cells = <1>;
21422 + #size-cells = <0>;
21423 + spi-max-frequency = <32000000>;
21424 + status = "okay";
21425 + };
21426 +
21427 + };
21428 + };
21429 +};
21430 diff --git a/arch/arm/boot/dts/overlays/uart0-overlay.dts b/arch/arm/boot/dts/overlays/uart0-overlay.dts
21431 new file mode 100755
21432 index 000000000000..57ba7745d023
21433 --- /dev/null
21434 +++ b/arch/arm/boot/dts/overlays/uart0-overlay.dts
21435 @@ -0,0 +1,33 @@
21436 +/dts-v1/;
21437 +/plugin/;
21438 +
21439 +/{
21440 + compatible = "brcm,bcm2835";
21441 +
21442 + fragment@0 {
21443 + target = <&uart0>;
21444 + __overlay__ {
21445 + pinctrl-names = "default";
21446 + pinctrl-0 = <&uart0_pins>;
21447 + status = "okay";
21448 + };
21449 + };
21450 +
21451 + fragment@1 {
21452 + target = <&gpio>;
21453 + __overlay__ {
21454 + uart0_pins: uart0_pins {
21455 + brcm,pins = <14 15 14 15>;
21456 + brcm,function = <0 0 4 4>; /* alt0 */
21457 + brcm,pull = <0 0 0 2>;
21458 + };
21459 + };
21460 + };
21461 +
21462 + __overrides__ {
21463 + txd0_pin = <&uart0_pins>,"brcm,pins:8";
21464 + rxd0_pin = <&uart0_pins>,"brcm,pins:12";
21465 + pin_func = <&uart0_pins>,"brcm,function:8",
21466 + <&uart0_pins>,"brcm,function:12";
21467 + };
21468 +};
21469 diff --git a/arch/arm/boot/dts/overlays/uart1-overlay.dts b/arch/arm/boot/dts/overlays/uart1-overlay.dts
21470 new file mode 100644
21471 index 000000000000..986d725a2652
21472 --- /dev/null
21473 +++ b/arch/arm/boot/dts/overlays/uart1-overlay.dts
21474 @@ -0,0 +1,38 @@
21475 +/dts-v1/;
21476 +/plugin/;
21477 +
21478 +/{
21479 + compatible = "brcm,bcm2835";
21480 +
21481 + fragment@0 {
21482 + target = <&uart1>;
21483 + __overlay__ {
21484 + pinctrl-names = "default";
21485 + pinctrl-0 = <&uart1_pins>;
21486 + status = "okay";
21487 + };
21488 + };
21489 +
21490 + fragment@1 {
21491 + target = <&gpio>;
21492 + __overlay__ {
21493 + uart1_pins: uart1_pins {
21494 + brcm,pins = <14 15>;
21495 + brcm,function = <2>; /* alt5 */
21496 + brcm,pull = <0 2>;
21497 + };
21498 + };
21499 + };
21500 +
21501 + fragment@2 {
21502 + target-path = "/chosen";
21503 + __overlay__ {
21504 + bootargs = "8250.nr_uarts=1";
21505 + };
21506 + };
21507 +
21508 + __overrides__ {
21509 + txd1_pin = <&uart1_pins>,"brcm,pins:0";
21510 + rxd1_pin = <&uart1_pins>,"brcm,pins:4";
21511 + };
21512 +};
21513 diff --git a/arch/arm/boot/dts/overlays/uart2-overlay.dts b/arch/arm/boot/dts/overlays/uart2-overlay.dts
21514 new file mode 100644
21515 index 000000000000..9face240aca1
21516 --- /dev/null
21517 +++ b/arch/arm/boot/dts/overlays/uart2-overlay.dts
21518 @@ -0,0 +1,27 @@
21519 +/dts-v1/;
21520 +/plugin/;
21521 +
21522 +/{
21523 + compatible = "brcm,bcm2711";
21524 +
21525 + fragment@0 {
21526 + target = <&uart2>;
21527 + __overlay__ {
21528 + pinctrl-names = "default";
21529 + pinctrl-0 = <&uart2_pins>;
21530 + status = "okay";
21531 + };
21532 + };
21533 +
21534 + fragment@1 {
21535 + target = <&uart2_pins>;
21536 + __dormant__ {
21537 + brcm,pins = <0 1 2 3>;
21538 + brcm,pull = <0 2 2 0>;
21539 + };
21540 + };
21541 +
21542 + __overrides__ {
21543 + ctsrts = <0>,"=1";
21544 + };
21545 +};
21546 diff --git a/arch/arm/boot/dts/overlays/uart3-overlay.dts b/arch/arm/boot/dts/overlays/uart3-overlay.dts
21547 new file mode 100644
21548 index 000000000000..ae9f9fe5ea1d
21549 --- /dev/null
21550 +++ b/arch/arm/boot/dts/overlays/uart3-overlay.dts
21551 @@ -0,0 +1,27 @@
21552 +/dts-v1/;
21553 +/plugin/;
21554 +
21555 +/{
21556 + compatible = "brcm,bcm2711";
21557 +
21558 + fragment@0 {
21559 + target = <&uart3>;
21560 + __overlay__ {
21561 + pinctrl-names = "default";
21562 + pinctrl-0 = <&uart3_pins>;
21563 + status = "okay";
21564 + };
21565 + };
21566 +
21567 + fragment@1 {
21568 + target = <&uart3_pins>;
21569 + __dormant__ {
21570 + brcm,pins = <4 5 6 7>;
21571 + brcm,pull = <0 2 2 0>;
21572 + };
21573 + };
21574 +
21575 + __overrides__ {
21576 + ctsrts = <0>,"=1";
21577 + };
21578 +};
21579 diff --git a/arch/arm/boot/dts/overlays/uart4-overlay.dts b/arch/arm/boot/dts/overlays/uart4-overlay.dts
21580 new file mode 100644
21581 index 000000000000..ac004ffbadbf
21582 --- /dev/null
21583 +++ b/arch/arm/boot/dts/overlays/uart4-overlay.dts
21584 @@ -0,0 +1,27 @@
21585 +/dts-v1/;
21586 +/plugin/;
21587 +
21588 +/{
21589 + compatible = "brcm,bcm2711";
21590 +
21591 + fragment@0 {
21592 + target = <&uart4>;
21593 + __overlay__ {
21594 + pinctrl-names = "default";
21595 + pinctrl-0 = <&uart4_pins>;
21596 + status = "okay";
21597 + };
21598 + };
21599 +
21600 + fragment@1 {
21601 + target = <&uart4_pins>;
21602 + __dormant__ {
21603 + brcm,pins = <8 9 10 11>;
21604 + brcm,pull = <0 2 2 0>;
21605 + };
21606 + };
21607 +
21608 + __overrides__ {
21609 + ctsrts = <0>,"=1";
21610 + };
21611 +};
21612 diff --git a/arch/arm/boot/dts/overlays/uart5-overlay.dts b/arch/arm/boot/dts/overlays/uart5-overlay.dts
21613 new file mode 100644
21614 index 000000000000..04eaf376effe
21615 --- /dev/null
21616 +++ b/arch/arm/boot/dts/overlays/uart5-overlay.dts
21617 @@ -0,0 +1,27 @@
21618 +/dts-v1/;
21619 +/plugin/;
21620 +
21621 +/{
21622 + compatible = "brcm,bcm2711";
21623 +
21624 + fragment@0 {
21625 + target = <&uart5>;
21626 + __overlay__ {
21627 + pinctrl-names = "default";
21628 + pinctrl-0 = <&uart5_pins>;
21629 + status = "okay";
21630 + };
21631 + };
21632 +
21633 + fragment@1 {
21634 + target = <&uart5_pins>;
21635 + __dormant__ {
21636 + brcm,pins = <12 13 14 15>;
21637 + brcm,pull = <0 2 2 0>;
21638 + };
21639 + };
21640 +
21641 + __overrides__ {
21642 + ctsrts = <0>,"=1";
21643 + };
21644 +};
21645 diff --git a/arch/arm/boot/dts/overlays/udrc-overlay.dts b/arch/arm/boot/dts/overlays/udrc-overlay.dts
21646 new file mode 100644
21647 index 000000000000..ae7c37996894
21648 --- /dev/null
21649 +++ b/arch/arm/boot/dts/overlays/udrc-overlay.dts
21650 @@ -0,0 +1,128 @@
21651 +#include <dt-bindings/clock/bcm2835.h>
21652 +/*
21653 + * Device tree overlay for the Universal Digital Radio Controller
21654 + */
21655 +
21656 +/dts-v1/;
21657 +/plugin/;
21658 +
21659 +/ {
21660 + compatible = "brcm,bcm2835";
21661 + fragment@0 {
21662 + target = <&i2s>;
21663 + __overlay__ {
21664 + clocks = <&clocks BCM2835_CLOCK_PCM>;
21665 + clock-names = "pcm";
21666 + status = "okay";
21667 + };
21668 + };
21669 +
21670 + fragment@1 {
21671 + target-path = "/";
21672 + __overlay__ {
21673 + regulators {
21674 + compatible = "simple-bus";
21675 + #address-cells = <1>;
21676 + #size-cells = <0>;
21677 +
21678 + udrc0_ldoin: udrc0_ldoin {
21679 + compatible = "regulator-fixed";
21680 + regulator-name = "ldoin";
21681 + regulator-min-microvolt = <3300000>;
21682 + regulator-max-microvolt = <3300000>;
21683 + regulator-always-on;
21684 + };
21685 + };
21686 + };
21687 + };
21688 +
21689 + fragment@2 {
21690 + target = <&i2c1>;
21691 + __overlay__ {
21692 + #address-cells = <1>;
21693 + #size-cells = <0>;
21694 + status = "okay";
21695 + clocks = <&clocks BCM2835_CLOCK_VPU>;
21696 + clock-frequency = <400000>;
21697 +
21698 + tlv320aic32x4: tlv320aic32x4@18 {
21699 + compatible = "ti,tlv320aic32x4";
21700 + #sound-dai-cells = <0>;
21701 + reg = <0x18>;
21702 + status = "okay";
21703 +
21704 + clocks = <&clocks BCM2835_CLOCK_GP0>;
21705 + clock-names = "mclk";
21706 + assigned-clocks = <&clocks BCM2835_CLOCK_GP0>;
21707 + assigned-clock-rates = <25000000>;
21708 +
21709 + pinctrl-names = "default";
21710 + pinctrl-0 = <&gpclk0_pin &aic3204_reset>;
21711 +
21712 + reset-gpios = <&gpio 13 0>;
21713 +
21714 + iov-supply = <&udrc0_ldoin>;
21715 + ldoin-supply = <&udrc0_ldoin>;
21716 + };
21717 + };
21718 + };
21719 +
21720 + fragment@3 {
21721 + target = <&sound>;
21722 + snd: __overlay__ {
21723 + compatible = "simple-audio-card";
21724 + i2s-controller = <&i2s>;
21725 + status = "okay";
21726 +
21727 + simple-audio-card,name = "udrc";
21728 + simple-audio-card,format = "i2s";
21729 +
21730 + simple-audio-card,bitclock-master = <&dailink0_master>;
21731 + simple-audio-card,frame-master = <&dailink0_master>;
21732 +
21733 + simple-audio-card,widgets =
21734 + "Line", "Line In",
21735 + "Line", "Line Out";
21736 +
21737 + simple-audio-card,routing =
21738 + "IN1_R", "Line In",
21739 + "IN1_L", "Line In",
21740 + "CM_L", "Line In",
21741 + "CM_R", "Line In",
21742 + "Line Out", "LOR",
21743 + "Line Out", "LOL";
21744 +
21745 + dailink0_master: simple-audio-card,cpu {
21746 + sound-dai = <&i2s>;
21747 + };
21748 +
21749 + simple-audio-card,codec {
21750 + sound-dai = <&tlv320aic32x4>;
21751 + };
21752 + };
21753 + };
21754 +
21755 + fragment@4 {
21756 + target = <&gpio>;
21757 + __overlay__ {
21758 + gpclk0_pin: gpclk0_pin {
21759 + brcm,pins = <4>;
21760 + brcm,function = <4>;
21761 + };
21762 +
21763 + aic3204_reset: aic3204_reset {
21764 + brcm,pins = <13>;
21765 + brcm,function = <1>;
21766 + brcm,pull = <1>;
21767 + };
21768 +
21769 + aic3204_gpio: aic3204_gpio {
21770 + brcm,pins = <26>;
21771 + };
21772 + };
21773 + };
21774 +
21775 + __overrides__ {
21776 + alsaname = <&snd>, "simple-audio-card,name";
21777 + };
21778 +};
21779 diff --git a/arch/arm/boot/dts/overlays/upstream-overlay.dts b/arch/arm/boot/dts/overlays/upstream-overlay.dts
21780 new file mode 100644
21781 index 000000000000..6112640837fc
21782 --- /dev/null
21783 +++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts
21784 @@ -0,0 +1,131 @@
21785 +// redo: ovmerge -c vc4-kms-v3d-overlay.dts,cma-96 dwc2-overlay.dts,dr_mode=otg
21786 +
21787 +/dts-v1/;
21788 +/plugin/;
21789 +
21790 +#include <dt-bindings/clock/bcm2835.h>
21791 +
21792 +/ {
21793 + compatible = "brcm,bcm2835";
21794 + fragment@0 {
21795 + target-path = "/chosen";
21796 + __dormant__ {
21797 + bootargs = "cma=256M";
21798 + };
21799 + };
21800 + fragment@1 {
21801 + target-path = "/chosen";
21802 + __dormant__ {
21803 + bootargs = "cma=192M";
21804 + };
21805 + };
21806 + fragment@2 {
21807 + target-path = "/chosen";
21808 + __dormant__ {
21809 + bootargs = "cma=128M";
21810 + };
21811 + };
21812 + fragment@3 {
21813 + target-path = "/chosen";
21814 + __overlay__ {
21815 + bootargs = "cma=96M";
21816 + };
21817 + };
21818 + fragment@4 {
21819 + target-path = "/chosen";
21820 + __dormant__ {
21821 + bootargs = "cma=64M";
21822 + };
21823 + };
21824 + fragment@5 {
21825 + target = <&i2c2>;
21826 + __overlay__ {
21827 + status = "okay";
21828 + };
21829 + };
21830 + fragment@6 {
21831 + target = <&fb>;
21832 + __overlay__ {
21833 + status = "disabled";
21834 + };
21835 + };
21836 + fragment@7 {
21837 + target = <&pixelvalve0>;
21838 + __overlay__ {
21839 + status = "okay";
21840 + };
21841 + };
21842 + fragment@8 {
21843 + target = <&pixelvalve1>;
21844 + __overlay__ {
21845 + status = "okay";
21846 + };
21847 + };
21848 + fragment@9 {
21849 + target = <&pixelvalve2>;
21850 + __overlay__ {
21851 + status = "okay";
21852 + };
21853 + };
21854 + fragment@10 {
21855 + target = <&hvs>;
21856 + __overlay__ {
21857 + status = "okay";
21858 + };
21859 + };
21860 + fragment@11 {
21861 + target = <&hdmi>;
21862 + __overlay__ {
21863 + status = "okay";
21864 + };
21865 + };
21866 + fragment@12 {
21867 + target = <&v3d>;
21868 + __overlay__ {
21869 + status = "okay";
21870 + };
21871 + };
21872 + fragment@13 {
21873 + target = <&vc4>;
21874 + __overlay__ {
21875 + status = "okay";
21876 + };
21877 + };
21878 + fragment@14 {
21879 + target = <&clocks>;
21880 + __overlay__ {
21881 + claim-clocks = <BCM2835_PLLD_DSI0 BCM2835_PLLD_DSI1 BCM2835_PLLH_AUX BCM2835_PLLH_PIX>;
21882 + };
21883 + };
21884 + fragment@15 {
21885 + target = <&vec>;
21886 + __overlay__ {
21887 + status = "okay";
21888 + };
21889 + };
21890 + fragment@16 {
21891 + target = <&txp>;
21892 + __overlay__ {
21893 + status = "okay";
21894 + };
21895 + };
21896 + fragment@17 {
21897 + target = <&hdmi>;
21898 + __dormant__ {
21899 + dmas;
21900 + };
21901 + };
21902 + fragment@18 {
21903 + target = <&usb>;
21904 + #address-cells = <1>;
21905 + #size-cells = <1>;
21906 + __overlay__ {
21907 + compatible = "brcm,bcm2835-usb";
21908 + dr_mode = "otg";
21909 + g-np-tx-fifo-size = <32>;
21910 + g-rx-fifo-size = <256>;
21911 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
21912 + status = "okay";
21913 + };
21914 + };
21915 +};
21916 diff --git a/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
21917 new file mode 100644
21918 index 000000000000..d9af97c8414f
21919 --- /dev/null
21920 +++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
21921 @@ -0,0 +1,81 @@
21922 +/*
21923 + * vc4-fkms-v3d-overlay.dts
21924 + */
21925 +
21926 +/dts-v1/;
21927 +/plugin/;
21928 +
21929 +/ {
21930 + compatible = "brcm,bcm2835";
21931 +
21932 + fragment@0 {
21933 + target-path = "/chosen";
21934 + __overlay__ {
21935 + bootargs = "cma=256M";
21936 + };
21937 + };
21938 +
21939 + fragment@1 {
21940 + target-path = "/chosen";
21941 + __dormant__ {
21942 + bootargs = "cma=192M";
21943 + };
21944 + };
21945 +
21946 + fragment@2 {
21947 + target-path = "/chosen";
21948 + __dormant__ {
21949 + bootargs = "cma=128M";
21950 + };
21951 + };
21952 +
21953 + fragment@3 {
21954 + target-path = "/chosen";
21955 + __dormant__ {
21956 + bootargs = "cma=96M";
21957 + };
21958 + };
21959 +
21960 + fragment@4 {
21961 + target-path = "/chosen";
21962 + __dormant__ {
21963 + bootargs = "cma=64M";
21964 + };
21965 + };
21966 +
21967 + fragment@5 {
21968 + target = <&fb>;
21969 + __overlay__ {
21970 + status = "disabled";
21971 + };
21972 + };
21973 +
21974 + fragment@6 {
21975 + target = <&firmwarekms>;
21976 + __overlay__ {
21977 + status = "okay";
21978 + };
21979 + };
21980 +
21981 + fragment@7 {
21982 + target = <&v3d>;
21983 + __overlay__ {
21984 + status = "okay";
21985 + };
21986 + };
21987 +
21988 + fragment@8 {
21989 + target = <&vc4>;
21990 + __overlay__ {
21991 + status = "okay";
21992 + };
21993 + };
21994 +
21995 + __overrides__ {
21996 + cma-256 = <0>,"+0-1-2-3-4";
21997 + cma-192 = <0>,"-0+1-2-3-4";
21998 + cma-128 = <0>,"-0-1+2-3-4";
21999 + cma-96 = <0>,"-0-1-2+3-4";
22000 + cma-64 = <0>,"-0-1-2-3+4";
22001 + };
22002 +};
22003 diff --git a/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts
22004 new file mode 100644
22005 index 000000000000..b03394844abd
22006 --- /dev/null
22007 +++ b/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts
22008 @@ -0,0 +1,43 @@
22009 +/*
22010 + * vc4-kms-v3d-overlay.dts
22011 + */
22012 +
22013 +/dts-v1/;
22014 +/plugin/;
22015 +
22016 +#include <dt-bindings/pinctrl/bcm2835.h>
22017 +
22018 +/ {
22019 + compatible = "brcm,bcm2835";
22020 +
22021 + fragment@0 {
22022 + target-path = "/";
22023 + __overlay__ {
22024 + panel: panel {
22025 + compatible = "ontat,yx700wv03", "simple-panel";
22026 +
22027 + port {
22028 + panel_in: endpoint {
22029 + remote-endpoint = <&dpi_out>;
22030 + };
22031 + };
22032 + };
22033 + };
22034 + };
22035 +
22036 + fragment@1 {
22037 + target = <&dpi>;
22038 + __overlay__ {
22039 + status = "okay";
22040 +
22041 + pinctrl-names = "default";
22042 + pinctrl-0 = <&dpi_18bit_gpio0>;
22043 +
22044 + port {
22045 + dpi_out: endpoint@0 {
22046 + remote-endpoint = <&panel_in>;
22047 + };
22048 + };
22049 + };
22050 + };
22051 +};
22052 diff --git a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
22053 new file mode 100644
22054 index 000000000000..c5f687e8bcb9
22055 --- /dev/null
22056 +++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
22057 @@ -0,0 +1,152 @@
22058 +/*
22059 + * vc4-kms-v3d-overlay.dts
22060 + */
22061 +
22062 +/dts-v1/;
22063 +/plugin/;
22064 +
22065 +#include <dt-bindings/clock/bcm2835.h>
22066 +
22067 +/ {
22068 + compatible = "brcm,bcm2835";
22069 +
22070 + fragment@0 {
22071 + target-path = "/chosen";
22072 + __overlay__ {
22073 + bootargs = "cma=256M";
22074 + };
22075 + };
22076 +
22077 + fragment@1 {
22078 + target-path = "/chosen";
22079 + __dormant__ {
22080 + bootargs = "cma=192M";
22081 + };
22082 + };
22083 +
22084 + fragment@2 {
22085 + target-path = "/chosen";
22086 + __dormant__ {
22087 + bootargs = "cma=128M";
22088 + };
22089 + };
22090 +
22091 + fragment@3 {
22092 + target-path = "/chosen";
22093 + __dormant__ {
22094 + bootargs = "cma=96M";
22095 + };
22096 + };
22097 +
22098 + fragment@4 {
22099 + target-path = "/chosen";
22100 + __dormant__ {
22101 + bootargs = "cma=64M";
22102 + };
22103 + };
22104 +
22105 + fragment@5 {
22106 + target = <&i2c2>;
22107 + __overlay__ {
22108 + status = "okay";
22109 + };
22110 + };
22111 +
22112 + fragment@6 {
22113 + target = <&fb>;
22114 + __overlay__ {
22115 + status = "disabled";
22116 + };
22117 + };
22118 +
22119 + fragment@7 {
22120 + target = <&pixelvalve0>;
22121 + __overlay__ {
22122 + status = "okay";
22123 + };
22124 + };
22125 +
22126 + fragment@8 {
22127 + target = <&pixelvalve1>;
22128 + __overlay__ {
22129 + status = "okay";
22130 + };
22131 + };
22132 +
22133 + fragment@9 {
22134 + target = <&pixelvalve2>;
22135 + __overlay__ {
22136 + status = "okay";
22137 + };
22138 + };
22139 +
22140 + fragment@10 {
22141 + target = <&hvs>;
22142 + __overlay__ {
22143 + status = "okay";
22144 + };
22145 + };
22146 +
22147 + fragment@11 {
22148 + target = <&hdmi>;
22149 + __overlay__ {
22150 + status = "okay";
22151 + };
22152 + };
22153 +
22154 + fragment@12 {
22155 + target = <&v3d>;
22156 + __overlay__ {
22157 + status = "okay";
22158 + };
22159 + };
22160 +
22161 + fragment@13 {
22162 + target = <&vc4>;
22163 + __overlay__ {
22164 + status = "okay";
22165 + };
22166 + };
22167 +
22168 + fragment@14 {
22169 + target = <&clocks>;
22170 + __overlay__ {
22171 + claim-clocks = <
22172 + BCM2835_PLLD_DSI0
22173 + BCM2835_PLLD_DSI1
22174 + BCM2835_PLLH_AUX
22175 + BCM2835_PLLH_PIX
22176 + >;
22177 + };
22178 + };
22179 +
22180 + fragment@15 {
22181 + target = <&vec>;
22182 + __overlay__ {
22183 + status = "okay";
22184 + };
22185 + };
22186 +
22187 + fragment@16 {
22188 + target = <&txp>;
22189 + __overlay__ {
22190 + status = "okay";
22191 + };
22192 + };
22193 +
22194 + fragment@17 {
22195 + target = <&hdmi>;
22196 + __dormant__ {
22197 + dmas;
22198 + };
22199 + };
22200 +
22201 + __overrides__ {
22202 + cma-256 = <0>,"+0-1-2-3-4";
22203 + cma-192 = <0>,"-0+1-2-3-4";
22204 + cma-128 = <0>,"-0-1+2-3-4";
22205 + cma-96 = <0>,"-0-1-2+3-4";
22206 + cma-64 = <0>,"-0-1-2-3+4";
22207 + audio = <0>,"!17";
22208 + };
22209 +};
22210 diff --git a/arch/arm/boot/dts/overlays/vga666-overlay.dts b/arch/arm/boot/dts/overlays/vga666-overlay.dts
22211 new file mode 100644
22212 index 000000000000..a4968d180a5d
22213 --- /dev/null
22214 +++ b/arch/arm/boot/dts/overlays/vga666-overlay.dts
22215 @@ -0,0 +1,30 @@
22216 +/dts-v1/;
22217 +/plugin/;
22218 +
22219 +/{
22220 + compatible = "brcm,bcm2835";
22221 +
22222 + // There is no VGA driver module, but we need a platform device
22223 + // node (that doesn't already use pinctrl) to hang the pinctrl
22224 + // reference on - leds will do
22225 +
22226 + fragment@0 {
22227 + target = <&leds>;
22228 + __overlay__ {
22229 + pinctrl-names = "default";
22230 + pinctrl-0 = <&vga666_pins>;
22231 + };
22232 + };
22233 +
22234 + fragment@1 {
22235 + target = <&gpio>;
22236 + __overlay__ {
22237 + vga666_pins: vga666_pins {
22238 + brcm,pins = <2 3 4 5 6 7 8 9 10 11 12
22239 + 13 14 15 16 17 18 19 20 21>;
22240 + brcm,function = <6>; /* alt2 */
22241 + brcm,pull = <0>; /* no pull */
22242 + };
22243 + };
22244 + };
22245 +};
22246 diff --git a/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
22247 new file mode 100644
22248 index 000000000000..f44e325bc1f2
22249 --- /dev/null
22250 +++ b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
22251 @@ -0,0 +1,40 @@
22252 +// Definitions for w1-gpio module (without external pullup)
22253 +/dts-v1/;
22254 +/plugin/;
22255 +
22256 +/ {
22257 + compatible = "brcm,bcm2835";
22258 +
22259 + fragment@0 {
22260 + target-path = "/";
22261 + __overlay__ {
22262 +
22263 + w1: onewire@0 {
22264 + compatible = "w1-gpio";
22265 + pinctrl-names = "default";
22266 + pinctrl-0 = <&w1_pins>;
22267 + gpios = <&gpio 4 0>;
22268 + status = "okay";
22269 + };
22270 + };
22271 + };
22272 +
22273 + fragment@1 {
22274 + target = <&gpio>;
22275 + __overlay__ {
22276 + w1_pins: w1_pins@0 {
22277 + brcm,pins = <4>;
22278 + brcm,function = <0>; // in (initially)
22279 + brcm,pull = <0>; // off
22280 + };
22281 + };
22282 + };
22283 +
22284 + __overrides__ {
22285 + gpiopin = <&w1>,"gpios:4",
22286 + <&w1>,"reg:0",
22287 + <&w1_pins>,"brcm,pins:0",
22288 + <&w1_pins>,"reg:0";
22289 + pullup; // Silently ignore unneeded parameter
22290 + };
22291 +};
22292 diff --git a/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
22293 new file mode 100644
22294 index 000000000000..953c6a1aeab9
22295 --- /dev/null
22296 +++ b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
22297 @@ -0,0 +1,42 @@
22298 +// Definitions for w1-gpio module (with external pullup)
22299 +/dts-v1/;
22300 +/plugin/;
22301 +
22302 +/ {
22303 + compatible = "brcm,bcm2835";
22304 +
22305 + fragment@0 {
22306 + target-path = "/";
22307 + __overlay__ {
22308 +
22309 + w1: onewire@0 {
22310 + compatible = "w1-gpio";
22311 + pinctrl-names = "default";
22312 + pinctrl-0 = <&w1_pins>;
22313 + gpios = <&gpio 4 0>, <&gpio 5 1>;
22314 + status = "okay";
22315 + };
22316 + };
22317 + };
22318 +
22319 + fragment@1 {
22320 + target = <&gpio>;
22321 + __overlay__ {
22322 + w1_pins: w1_pins@0 {
22323 + brcm,pins = <4 5>;
22324 + brcm,function = <0 1>; // in out
22325 + brcm,pull = <0 0>; // off off
22326 + };
22327 + };
22328 + };
22329 +
22330 + __overrides__ {
22331 + gpiopin = <&w1>,"gpios:4",
22332 + <&w1>,"reg:0",
22333 + <&w1_pins>,"brcm,pins:0",
22334 + <&w1_pins>,"reg:0";
22335 + extpullup = <&w1>,"gpios:16",
22336 + <&w1_pins>,"brcm,pins:4";
22337 + pullup; // Silently ignore unneeded parameter
22338 + };
22339 +};
22340 diff --git a/arch/arm/boot/dts/overlays/w5500-overlay.dts b/arch/arm/boot/dts/overlays/w5500-overlay.dts
22341 new file mode 100644
22342 index 000000000000..4d3e66296753
22343 --- /dev/null
22344 +++ b/arch/arm/boot/dts/overlays/w5500-overlay.dts
22345 @@ -0,0 +1,63 @@
22346 +// Overlay for the Wiznet w5500 Ethernet Controller
22347 +/dts-v1/;
22348 +/plugin/;
22349 +
22350 +/ {
22351 + compatible = "brcm,bcm2835";
22352 +
22353 + fragment@0 {
22354 + target = <&spidev0>;
22355 + __overlay__ {
22356 + status = "disabled";
22357 + };
22358 + };
22359 +
22360 + fragment@1 {
22361 + target = <&spidev1>;
22362 + __dormant__ {
22363 + status = "disabled";
22364 + };
22365 + };
22366 +
22367 + fragment@2 {
22368 + target = <&spi0>;
22369 + __overlay__ {
22370 + /* needed to avoid dtc warning */
22371 + #address-cells = <1>;
22372 + #size-cells = <0>;
22373 +
22374 + status = "okay";
22375 +
22376 + eth1: w5500@0{
22377 + compatible = "wiznet,w5500";
22378 + reg = <0>; /* CE0 */
22379 + pinctrl-names = "default";
22380 + pinctrl-0 = <&eth1_pins>;
22381 + interrupt-parent = <&gpio>;
22382 + interrupts = <25 0x8>;
22383 + spi-max-frequency = <30000000>;
22384 +// local-mac-address = [aa bb cc dd ee ff];
22385 + status = "okay";
22386 + };
22387 + };
22388 + };
22389 +
22390 + fragment@3 {
22391 + target = <&gpio>;
22392 + __overlay__ {
22393 + eth1_pins: eth1_pins {
22394 + brcm,pins = <25>;
22395 + brcm,function = <0>; /* in */
22396 + brcm,pull = <0>; /* none */
22397 + };
22398 + };
22399 + };
22400 +
22401 + __overrides__ {
22402 + int_pin = <&eth1>, "interrupts:0",
22403 + <&eth1_pins>, "brcm,pins:0";
22404 + speed = <&eth1>, "spi-max-frequency:0";
22405 + cs = <&eth1>, "reg:0",
22406 + <0>, "!0=1";
22407 + };
22408 +};
22409 diff --git a/arch/arm/boot/dts/overlays/wittypi-overlay.dts b/arch/arm/boot/dts/overlays/wittypi-overlay.dts
22410 new file mode 100644
22411 index 000000000000..71ce806186de
22412 --- /dev/null
22413 +++ b/arch/arm/boot/dts/overlays/wittypi-overlay.dts
22414 @@ -0,0 +1,44 @@
22415 +/*
22416 + * Device Tree overlay for Witty Pi extension board by UUGear
22417 + *
22418 + */
22419 +
22420 +/dts-v1/;
22421 +/plugin/;
22422 +
22423 +/ {
22424 +
22425 + compatible = "brcm,bcm2835";
22426 +
22427 + fragment@0 {
22428 + target = <&leds>;
22429 + __overlay__ {
22430 + compatible = "gpio-leds";
22431 + wittypi_led: wittypi_led {
22432 + label = "wittypi_led";
22433 + linux,default-trigger = "default-on";
22434 + gpios = <&gpio 17 0>;
22435 + };
22436 + };
22437 + };
22438 +
22439 + fragment@1 {
22440 + target = <&i2c1>;
22441 + __overlay__ {
22442 + #address-cells = <1>;
22443 + #size-cells = <0>;
22444 +
22445 + rtc: ds1337@68 {
22446 + compatible = "dallas,ds1337";
22447 + reg = <0x68>;
22448 + wakeup-source;
22449 + };
22450 + };
22451 + };
22452 +
22453 + __overrides__ {
22454 + led_gpio = <&wittypi_led>,"gpios:4";
22455 + led_trigger = <&wittypi_led>,"linux,default-trigger";
22456 + };
22457 +
22458 +};
22459 diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
22460 index f19b762c008d..fb5542a7a124 100644
22461 --- a/arch/arm64/boot/dts/Makefile
22462 +++ b/arch/arm64/boot/dts/Makefile
22463 @@ -28,3 +28,5 @@ subdir-y += synaptics
22464 subdir-y += ti
22465 subdir-y += xilinx
22466 subdir-y += zte
22467 +
22468 +subdir-y += overlays
22469 diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
22470 index d1d31ccad758..1004a9fb8bf4 100644
22471 --- a/arch/arm64/boot/dts/broadcom/Makefile
22472 +++ b/arch/arm64/boot/dts/broadcom/Makefile
22473 @@ -3,6 +3,17 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-a-plus.dtb \
22474 bcm2837-rpi-3-b.dtb \
22475 bcm2837-rpi-3-b-plus.dtb \
22476 bcm2837-rpi-cm3-io3.dtb
22477 +dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-3-b.dtb
22478 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb
22479 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b.dtb
22480 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b-plus.dtb
22481 +dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-cm3.dtb
22482 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-cm3.dtb
22483
22484 subdir-y += northstar2
22485 subdir-y += stingray
22486 +
22487 +# Enable fixups to support overlays on BCM2835 platforms
22488 +ifeq ($(CONFIG_ARCH_BCM2835),y)
22489 + DTC_FLAGS ?= -@
22490 +endif
22491 diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
22492 new file mode 100644
22493 index 000000000000..d9242ff77079
22494 --- /dev/null
22495 +++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
22496 @@ -0,0 +1,3 @@
22497 +#define RPI364
22498 +
22499 +#include "../../../../arm/boot/dts/bcm2710-rpi-3-b-plus.dts"
22500 diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts
22501 new file mode 100644
22502 index 000000000000..deb33441da95
22503 --- /dev/null
22504 +++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts
22505 @@ -0,0 +1,3 @@
22506 +#define RPI364
22507 +
22508 +#include "../../../../arm/boot/dts/bcm2710-rpi-3-b.dts"
22509 diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts
22510 new file mode 100644
22511 index 000000000000..1c2560017c02
22512 --- /dev/null
22513 +++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts
22514 @@ -0,0 +1,3 @@
22515 +#define RPI364
22516 +
22517 +#include "../../../../arm/boot/dts/bcm2710-rpi-cm3.dts"
22518 diff --git a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts
22519 new file mode 100644
22520 index 000000000000..1fd86f81f542
22521 --- /dev/null
22522 +++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts
22523 @@ -0,0 +1,3 @@
22524 +#define RPI364
22525 +
22526 +#include "../../../../arm/boot/dts/bcm2711-rpi-4-b.dts"
22527 diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi
22528 new file mode 120000
22529 index 000000000000..e5c400284467
22530 --- /dev/null
22531 +++ b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi
22532 @@ -0,0 +1 @@
22533 +../../../../arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
22534 \ No newline at end of file
22535 diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
22536 new file mode 120000
22537 index 000000000000..fc4c05bbe7fd
22538 --- /dev/null
22539 +++ b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
22540 @@ -0,0 +1 @@
22541 +../../../../arm/boot/dts/bcm283x-rpi-lan7515.dtsi
22542 \ No newline at end of file
22543 diff --git a/arch/arm64/boot/dts/overlays b/arch/arm64/boot/dts/overlays
22544 new file mode 120000
22545 index 000000000000..ded08646b6f6
22546 --- /dev/null
22547 +++ b/arch/arm64/boot/dts/overlays
22548 @@ -0,0 +1 @@
22549 +../../../arm/boot/dts/overlays
22550 \ No newline at end of file
22551 diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst
22552 index 7301ab5e2e06..da2af04a6d7d 100644
22553 --- a/scripts/Makefile.dtbinst
22554 +++ b/scripts/Makefile.dtbinst
22555 @@ -20,6 +20,7 @@ include scripts/Kbuild.include
22556 include $(src)/Makefile
22557
22558 dtbinst-files := $(sort $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS), $(dtb-)))
22559 +dtboinst-files := $(sort $(dtbo-y) $(if $(CONFIG_OF_ALL_DTBS), $(dtb-)))
22560 dtbinst-dirs := $(subdir-y) $(subdir-m)
22561
22562 # Helper targets for Installing DTBs into the boot directory
22563 @@ -31,10 +32,13 @@ install-dir = $(patsubst $(dtbinst_root)%,$(INSTALL_DTBS_PATH)%,$(obj))
22564 $(dtbinst-files): %.dtb: $(obj)/%.dtb
22565 $(call cmd,dtb_install,$(install-dir))
22566
22567 +$(dtboinst-files): %.dtbo: $(obj)/%.dtbo
22568 + $(call cmd,dtb_install,$(install-dir))
22569 +
22570 $(dtbinst-dirs):
22571 $(Q)$(MAKE) $(dtbinst)=$(obj)/$@
22572
22573 -PHONY += $(dtbinst-files) $(dtbinst-dirs)
22574 -__dtbs_install: $(dtbinst-files) $(dtbinst-dirs)
22575 +PHONY += $(dtbinst-files) $(dtboinst-files) $(dtbinst-dirs)
22576 +__dtbs_install: $(dtbinst-files) $(dtboinst-files) $(dtbinst-dirs)
22577
22578 .PHONY: $(PHONY)
22579 diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
22580 index 179d55af5852..2cfce19f9f73 100644
22581 --- a/scripts/Makefile.lib
22582 +++ b/scripts/Makefile.lib
22583 @@ -254,6 +254,7 @@ DTC ?= $(objtree)/scripts/dtc/dtc
22584 ifeq ($(findstring 1,$(KBUILD_EXTRA_WARN)),)
22585 DTC_FLAGS += -Wno-unit_address_vs_reg \
22586 -Wno-unit_address_format \
22587 + -Wno-gpios_property \
22588 -Wno-avoid_unnecessary_addr_size \
22589 -Wno-alias_paths \
22590 -Wno-graph_child_address \
22591 @@ -313,6 +314,18 @@ endef
22592 $(obj)/%.dt.yaml: $(src)/%.dts $(DTC) $(DT_TMP_SCHEMA) FORCE
22593 $(call if_changed_rule,dtc_dt_yaml)
22594
22595 +quiet_cmd_dtco = DTCO $@
22596 +cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
22597 + $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
22598 + $(DTC) -@ -H epapr -O dtb -o $@ -b 0 \
22599 + -i $(dir $<) $(DTC_FLAGS) \
22600 + -Wno-interrupts_property \
22601 + -d $(depfile).dtc.tmp $(dtc-tmp) ; \
22602 + cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
22603 +
22604 +$(obj)/%.dtbo: $(src)/%-overlay.dts FORCE
22605 + $(call if_changed_dep,dtco)
22606 +
22607 dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
22608
22609 # Bzip2
22610 --
22611 2.20.1
22612
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