46a424db80392ae3734db3a9426040c675372d63
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.15 / 950-0842-clk-tests-Add-tests-for-mux-with-multiple-parents.patch
1 From c5511ae59ece75d80acdaf37ebd08aca51f80188 Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime@cerno.tech>
3 Date: Thu, 7 Apr 2022 14:58:34 +0200
4 Subject: [PATCH] clk: tests: Add tests for mux with multiple parents
5
6 We'll need to test a few corner cases that occur when we have a mux
7 clock whose default parent is missing.
8
9 For now, let's create the context structure and the trivial ops, along
10 with a test suite that just tests trivial things for now, without
11 considering the orphan case.
12
13 Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> # imx8mp
14 Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> # exynos4210, meson g12b
15 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
16 ---
17 drivers/clk/clk_test.c | 119 +++++++++++++++++++++++++++++++++++++++++
18 1 file changed, 119 insertions(+)
19
20 --- a/drivers/clk/clk_test.c
21 +++ b/drivers/clk/clk_test.c
22 @@ -108,6 +108,39 @@ static const struct clk_ops clk_dummy_si
23 .get_parent = clk_dummy_single_get_parent,
24 };
25
26 +struct clk_multiple_parent_ctx {
27 + struct clk_dummy_context parents_ctx[2];
28 + struct clk_hw hw;
29 + u8 current_parent;
30 +};
31 +
32 +static int clk_multiple_parents_mux_set_parent(struct clk_hw *hw, u8 index)
33 +{
34 + struct clk_multiple_parent_ctx *ctx =
35 + container_of(hw, struct clk_multiple_parent_ctx, hw);
36 +
37 + if (index >= clk_hw_get_num_parents(hw))
38 + return -EINVAL;
39 +
40 + ctx->current_parent = index;
41 +
42 + return 0;
43 +}
44 +
45 +static u8 clk_multiple_parents_mux_get_parent(struct clk_hw *hw)
46 +{
47 + struct clk_multiple_parent_ctx *ctx =
48 + container_of(hw, struct clk_multiple_parent_ctx, hw);
49 +
50 + return ctx->current_parent;
51 +}
52 +
53 +static const struct clk_ops clk_multiple_parents_mux_ops = {
54 + .get_parent = clk_multiple_parents_mux_get_parent,
55 + .set_parent = clk_multiple_parents_mux_set_parent,
56 + .determine_rate = __clk_mux_determine_rate_closest,
57 +};
58 +
59 static int clk_test_init_with_ops(struct kunit *test, const struct clk_ops *ops)
60 {
61 struct clk_dummy_context *ctx;
62 @@ -347,6 +380,91 @@ static struct kunit_suite clk_uncached_t
63 .test_cases = clk_uncached_test_cases,
64 };
65
66 +static int
67 +clk_multiple_parents_mux_test_init(struct kunit *test)
68 +{
69 + struct clk_multiple_parent_ctx *ctx;
70 + const char *parents[2] = { "parent-0", "parent-1"};
71 + int ret;
72 +
73 + ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
74 + if (!ctx)
75 + return -ENOMEM;
76 + test->priv = ctx;
77 +
78 + ctx->parents_ctx[0].hw.init = CLK_HW_INIT_NO_PARENT("parent-0",
79 + &clk_dummy_rate_ops,
80 + 0);
81 + ctx->parents_ctx[0].rate = DUMMY_CLOCK_RATE_1;
82 + ret = clk_hw_register(NULL, &ctx->parents_ctx[0].hw);
83 + if (ret)
84 + return ret;
85 +
86 + ctx->parents_ctx[1].hw.init = CLK_HW_INIT_NO_PARENT("parent-1",
87 + &clk_dummy_rate_ops,
88 + 0);
89 + ctx->parents_ctx[1].rate = DUMMY_CLOCK_RATE_2;
90 + ret = clk_hw_register(NULL, &ctx->parents_ctx[1].hw);
91 + if (ret)
92 + return ret;
93 +
94 + ctx->current_parent = 0;
95 + ctx->hw.init = CLK_HW_INIT_PARENTS("test-mux", parents,
96 + &clk_multiple_parents_mux_ops,
97 + CLK_SET_RATE_PARENT);
98 + ret = clk_hw_register(NULL, &ctx->hw);
99 + if (ret)
100 + return ret;
101 +
102 + return 0;
103 +}
104 +
105 +static void
106 +clk_multiple_parents_mux_test_exit(struct kunit *test)
107 +{
108 + struct clk_multiple_parent_ctx *ctx = test->priv;
109 +
110 + clk_hw_unregister(&ctx->hw);
111 + clk_hw_unregister(&ctx->parents_ctx[0].hw);
112 + clk_hw_unregister(&ctx->parents_ctx[1].hw);
113 +}
114 +
115 +/*
116 + * Test that for a clock with multiple parents, clk_get_parent()
117 + * actually returns the current one.
118 + */
119 +static void
120 +clk_test_multiple_parents_mux_get_parent(struct kunit *test)
121 +{
122 + struct clk_multiple_parent_ctx *ctx = test->priv;
123 + struct clk_hw *hw = &ctx->hw;
124 + struct clk *clk = hw->clk;
125 + struct clk *parent;
126 +
127 + parent = clk_get_parent(clk);
128 + KUNIT_EXPECT_TRUE(test, clk_is_match(parent, ctx->parents_ctx[0].hw.clk));
129 +}
130 +
131 +static struct kunit_case clk_multiple_parents_mux_test_cases[] = {
132 + KUNIT_CASE(clk_test_multiple_parents_mux_get_parent),
133 + {}
134 +};
135 +
136 +/*
137 + * Test suite for a basic mux clock with two parents, with
138 + * CLK_SET_RATE_PARENT on the child.
139 + *
140 + * These tests are supposed to exercise the consumer API and check that
141 + * the state of the child and parents are sane and consistent.
142 + */
143 +static struct kunit_suite
144 +clk_multiple_parents_mux_test_suite = {
145 + .name = "clk-multiple-parents-mux-test",
146 + .init = clk_multiple_parents_mux_test_init,
147 + .exit = clk_multiple_parents_mux_test_exit,
148 + .test_cases = clk_multiple_parents_mux_test_cases,
149 +};
150 +
151 struct clk_single_parent_ctx {
152 struct clk_dummy_context parent_ctx;
153 struct clk_hw hw;
154 @@ -1291,6 +1409,7 @@ static struct kunit_suite clk_range_mini
155
156 kunit_test_suites(
157 &clk_test_suite,
158 + &clk_multiple_parents_mux_test_suite,
159 &clk_orphan_transparent_single_parent_test_suite,
160 &clk_range_test_suite,
161 &clk_range_maximize_test_suite,