target/linux/bcm27xx/patches-5.15/950-0817-media-i2c-imx258-Add-support-for-24MHz-clock.patch

   1 From 08f30518ef7619a6d24b39c367bffb30ebf7196d Mon Sep 17 00:00:00 2001
   2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
   3 Date: Wed, 16 Jun 2021 13:08:00 +0100
   4 Subject: [PATCH] media: i2c: imx258: Add support for 24MHz clock
   5
   6 There's no reason why the clock must be 19.2MHz and nothing
   7 else (indeed this isn't even a frequency listed in the datasheet),
   8 so add support for 24MHz as well.
   9 The PLL settings result in slightly different link frequencies,
  10 so parameterise those.
  11
  12 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
  13 ---
  14  drivers/media/i2c/imx258.c | 141 +++++++++++++++++++++++++++++--------
  15  1 file changed, 111 insertions(+), 30 deletions(-)
  16
  17 --- a/drivers/media/i2c/imx258.c
  18 +++ b/drivers/media/i2c/imx258.c
  19 @@ -77,9 +77,6 @@
  20  #define REG_CONFIG_MIRROR_VFLIP                0x02
  21  #define REG_CONFIG_FLIP_TEST_PATTERN   0x02
  22
  23 -/* Input clock frequency in Hz */
  24 -#define IMX258_INPUT_CLOCK_FREQ                19200000
  25 -
  26  struct imx258_reg {
  27         u16 address;
  28         u8 val;
  29 @@ -92,6 +89,7 @@ struct imx258_reg_list {
  30
  31  /* Link frequency config */
  32  struct imx258_link_freq_config {
  33 +       u64 link_frequency;
  34         u32 pixels_per_line;
  35
  36         /* PLL registers for this link frequency */
  37 @@ -116,7 +114,9 @@ struct imx258_mode {
  38  };
  39
  40  /* 4208x3120 needs 1267Mbps/lane, 4 lanes */
  41 -static const struct imx258_reg mipi_data_rate_1267mbps[] = {
  42 +static const struct imx258_reg mipi_1267mbps_19_2mhz[] = {
  43 +       { 0x0136, 0x13 },
  44 +       { 0x0137, 0x33 },
  45         { 0x0301, 0x05 },
  46         { 0x0303, 0x02 },
  47         { 0x0305, 0x03 },
  48 @@ -134,7 +134,29 @@ static const struct imx258_reg mipi_data
  49         { 0x0823, 0xCC },
  50  };
  51
  52 -static const struct imx258_reg mipi_data_rate_640mbps[] = {
  53 +static const struct imx258_reg mipi_1272mbps_24mhz[] = {
  54 +       { 0x0136, 0x18 },
  55 +       { 0x0137, 0x00 },
  56 +       { 0x0301, 0x05 },
  57 +       { 0x0303, 0x02 },
  58 +       { 0x0305, 0x04 },
  59 +       { 0x0306, 0x00 },
  60 +       { 0x0307, 0xD4 },
  61 +       { 0x0309, 0x0A },
  62 +       { 0x030B, 0x01 },
  63 +       { 0x030D, 0x02 },
  64 +       { 0x030E, 0x00 },
  65 +       { 0x030F, 0xD8 },
  66 +       { 0x0310, 0x00 },
  67 +       { 0x0820, 0x13 },
  68 +       { 0x0821, 0x4C },
  69 +       { 0x0822, 0xCC },
  70 +       { 0x0823, 0xCC },
  71 +};
  72 +
  73 +static const struct imx258_reg mipi_640mbps_19_2mhz[] = {
  74 +       { 0x0136, 0x13 },
  75 +       { 0x0137, 0x33 },
  76         { 0x0301, 0x05 },
  77         { 0x0303, 0x02 },
  78         { 0x0305, 0x03 },
  79 @@ -152,9 +174,27 @@ static const struct imx258_reg mipi_data
  80         { 0x0823, 0x00 },
  81  };
  82
  83 +static const struct imx258_reg mipi_642mbps_24mhz[] = {
  84 +       { 0x0136, 0x18 },
  85 +       { 0x0137, 0x00 },
  86 +       { 0x0301, 0x05 },
  87 +       { 0x0303, 0x02 },
  88 +       { 0x0305, 0x04 },
  89 +       { 0x0306, 0x00 },
  90 +       { 0x0307, 0x6B },
  91 +       { 0x0309, 0x0A },
  92 +       { 0x030B, 0x01 },
  93 +       { 0x030D, 0x02 },
  94 +       { 0x030E, 0x00 },
  95 +       { 0x030F, 0xD8 },
  96 +       { 0x0310, 0x00 },
  97 +       { 0x0820, 0x0A },
  98 +       { 0x0821, 0x00 },
  99 +       { 0x0822, 0x00 },
 100 +       { 0x0823, 0x00 },
 101 +};
 102 +
 103  static const struct imx258_reg mode_4208x3120_regs[] = {
 104 -       { 0x0136, 0x13 },
 105 -       { 0x0137, 0x33 },
 106         { 0x3051, 0x00 },
 107         { 0x3052, 0x00 },
 108         { 0x4E21, 0x14 },
 109 @@ -268,8 +308,6 @@ static const struct imx258_reg mode_4208
 110  };
 111
 112  static const struct imx258_reg mode_2104_1560_regs[] = {
 113 -       { 0x0136, 0x13 },
 114 -       { 0x0137, 0x33 },
 115         { 0x3051, 0x00 },
 116         { 0x3052, 0x00 },
 117         { 0x4E21, 0x14 },
 118 @@ -383,8 +421,6 @@ static const struct imx258_reg mode_2104
 119  };
 120
 121  static const struct imx258_reg mode_1048_780_regs[] = {
 122 -       { 0x0136, 0x13 },
 123 -       { 0x0137, 0x33 },
 124         { 0x3051, 0x00 },
 125         { 0x3052, 0x00 },
 126         { 0x4E21, 0x14 },
 127 @@ -531,10 +567,6 @@ static const char * const imx258_supply_
 128
 129  #define IMX258_NUM_SUPPLIES ARRAY_SIZE(imx258_supply_name)
 130
 131 -/* Configurations for supported link frequencies */
 132 -#define IMX258_LINK_FREQ_634MHZ        633600000ULL
 133 -#define IMX258_LINK_FREQ_320MHZ        320000000ULL
 134 -
 135  enum {
 136         IMX258_LINK_FREQ_1267MBPS,
 137         IMX258_LINK_FREQ_640MBPS,
 138 @@ -553,25 +585,55 @@ static u64 link_freq_to_pixel_rate(u64 f
 139  }
 140
 141  /* Menu items for LINK_FREQ V4L2 control */
 142 -static const s64 link_freq_menu_items[] = {
 143 +/* Configurations for supported link frequencies */
 144 +#define IMX258_LINK_FREQ_634MHZ        633600000ULL
 145 +#define IMX258_LINK_FREQ_320MHZ        320000000ULL
 146 +
 147 +static const s64 link_freq_menu_items_19_2[] = {
 148         IMX258_LINK_FREQ_634MHZ,
 149         IMX258_LINK_FREQ_320MHZ,
 150  };
 151
 152 +/* Configurations for supported link frequencies */
 153 +#define IMX258_LINK_FREQ_636MHZ        636000000ULL
 154 +#define IMX258_LINK_FREQ_321MHZ        321000000ULL
 155 +
 156 +static const s64 link_freq_menu_items_24[] = {
 157 +       IMX258_LINK_FREQ_636MHZ,
 158 +       IMX258_LINK_FREQ_321MHZ,
 159 +};
 160 +
 161  /* Link frequency configs */
 162 -static const struct imx258_link_freq_config link_freq_configs[] = {
 163 +static const struct imx258_link_freq_config link_freq_configs_19_2[] = {
 164 +       [IMX258_LINK_FREQ_1267MBPS] = {
 165 +               .pixels_per_line = IMX258_PPL_DEFAULT,
 166 +               .reg_list = {
 167 +                       .num_of_regs = ARRAY_SIZE(mipi_1267mbps_19_2mhz),
 168 +                       .regs = mipi_1267mbps_19_2mhz,
 169 +               }
 170 +       },
 171 +       [IMX258_LINK_FREQ_640MBPS] = {
 172 +               .pixels_per_line = IMX258_PPL_DEFAULT,
 173 +               .reg_list = {
 174 +                       .num_of_regs = ARRAY_SIZE(mipi_640mbps_19_2mhz),
 175 +                       .regs = mipi_640mbps_19_2mhz,
 176 +               }
 177 +       },
 178 +};
 179 +
 180 +static const struct imx258_link_freq_config link_freq_configs_24[] = {
 181         [IMX258_LINK_FREQ_1267MBPS] = {
 182                 .pixels_per_line = IMX258_PPL_DEFAULT,
 183                 .reg_list = {
 184 -                       .num_of_regs = ARRAY_SIZE(mipi_data_rate_1267mbps),
 185 -                       .regs = mipi_data_rate_1267mbps,
 186 +                       .num_of_regs = ARRAY_SIZE(mipi_1272mbps_24mhz),
 187 +                       .regs = mipi_1272mbps_24mhz,
 188                 }
 189         },
 190         [IMX258_LINK_FREQ_640MBPS] = {
 191                 .pixels_per_line = IMX258_PPL_DEFAULT,
 192                 .reg_list = {
 193 -                       .num_of_regs = ARRAY_SIZE(mipi_data_rate_640mbps),
 194 -                       .regs = mipi_data_rate_640mbps,
 195 +                       .num_of_regs = ARRAY_SIZE(mipi_642mbps_24mhz),
 196 +                       .regs = mipi_642mbps_24mhz,
 197                 }
 198         },
 199  };
 200 @@ -630,6 +692,9 @@ struct imx258 {
 201         /* Current mode */
 202         const struct imx258_mode *cur_mode;
 203
 204 +       const struct imx258_link_freq_config *link_freq_configs;
 205 +       const s64 *link_freq_menu_items;
 206 +
 207         /*
 208          * Mutex for serialized access:
 209          * Protect sensor module set pad format and start/stop streaming safely.
 210 @@ -958,7 +1023,7 @@ static int imx258_set_pad_format(struct
 211                 imx258->cur_mode = mode;
 212                 __v4l2_ctrl_s_ctrl(imx258->link_freq, mode->link_freq_index);
 213
 214 -               link_freq = link_freq_menu_items[mode->link_freq_index];
 215 +               link_freq = imx258->link_freq_menu_items[mode->link_freq_index];
 216                 pixel_rate = link_freq_to_pixel_rate(link_freq);
 217                 __v4l2_ctrl_s_ctrl_int64(imx258->pixel_rate, pixel_rate);
 218                 /* Update limits and set FPS to default */
 219 @@ -972,7 +1037,7 @@ static int imx258_set_pad_format(struct
 220                         vblank_def);
 221                 __v4l2_ctrl_s_ctrl(imx258->vblank, vblank_def);
 222                 h_blank =
 223 -                       link_freq_configs[mode->link_freq_index].pixels_per_line
 224 +                       imx258->link_freq_configs[mode->link_freq_index].pixels_per_line
 225                          - imx258->cur_mode->width;
 226                 __v4l2_ctrl_modify_range(imx258->hblank, h_blank,
 227                                          h_blank, 1, h_blank);
 228 @@ -992,7 +1057,7 @@ static int imx258_start_streaming(struct
 229
 230         /* Setup PLL */
 231         link_freq_index = imx258->cur_mode->link_freq_index;
 232 -       reg_list = &link_freq_configs[link_freq_index].reg_list;
 233 +       reg_list = &imx258->link_freq_configs[link_freq_index].reg_list;
 234         ret = imx258_write_regs(imx258, reg_list->regs, reg_list->num_of_regs);
 235         if (ret) {
 236                 dev_err(&client->dev, "%s failed to set plls\n", __func__);
 237 @@ -1210,15 +1275,17 @@ static int imx258_init_controls(struct i
 238         imx258->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr,
 239                                 &imx258_ctrl_ops,
 240                                 V4L2_CID_LINK_FREQ,
 241 -                               ARRAY_SIZE(link_freq_menu_items) - 1,
 242 +                               ARRAY_SIZE(link_freq_menu_items_19_2) - 1,
 243                                 0,
 244 -                               link_freq_menu_items);
 245 +                               imx258->link_freq_menu_items);
 246
 247         if (imx258->link_freq)
 248                 imx258->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
 249
 250 -       pixel_rate_max = link_freq_to_pixel_rate(link_freq_menu_items[0]);
 251 -       pixel_rate_min = link_freq_to_pixel_rate(link_freq_menu_items[1]);
 252 +       pixel_rate_max =
 253 +               link_freq_to_pixel_rate(imx258->link_freq_menu_items[0]);
 254 +       pixel_rate_min =
 255 +               link_freq_to_pixel_rate(imx258->link_freq_menu_items[1]);
 256         /* By default, PIXEL_RATE is read only */
 257         imx258->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops,
 258                                 V4L2_CID_PIXEL_RATE,
 259 @@ -1346,11 +1413,25 @@ static int imx258_probe(struct i2c_clien
 260                         "no clock provided, using clock-frequency property\n");
 261
 262                 device_property_read_u32(&client->dev, "clock-frequency", &val);
 263 +       } else if (IS_ERR(imx258->clk)) {
 264 +               return dev_err_probe(&client->dev, PTR_ERR(imx258->clk),
 265 +                                    "error getting clock\n");
 266         } else {
 267                 val = clk_get_rate(imx258->clk);
 268         }
 269 -       if (val != IMX258_INPUT_CLOCK_FREQ) {
 270 -               dev_err(&client->dev, "input clock frequency not supported\n");
 271 +
 272 +       switch (val) {
 273 +       case 19200000:
 274 +               imx258->link_freq_configs = link_freq_configs_19_2;
 275 +               imx258->link_freq_menu_items = link_freq_menu_items_19_2;
 276 +               break;
 277 +       case 24000000:
 278 +               imx258->link_freq_configs = link_freq_configs_24;
 279 +               imx258->link_freq_menu_items = link_freq_menu_items_24;
 280 +               break;
 281 +       default:
 282 +               dev_err(&client->dev, "input clock frequency of %u not supported\n",
 283 +                       val);
 284                 return -EINVAL;
 285         }
 286