target/linux/bcm27xx/patches-5.15/950-0618-drm-vc4-hvs-Store-channel-in-variable.patch

   1 From ac0e3e24176b77fa19a7a2e041879f6c5e652122 Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime@cerno.tech>
   3 Date: Mon, 29 Nov 2021 12:18:39 +0100
   4 Subject: [PATCH] drm/vc4: hvs: Store channel in variable
   5
   6 The assigned_channel field of our vc4_crtc_state structure is accessed
   7 multiple times in vc4_hvs_atomic_flush, so let's move it to a variable
   8 that can be used in all those places.
   9
  10 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
  11 ---
  12  drivers/gpu/drm/vc4/vc4_hvs.c | 9 +++++----
  13  1 file changed, 5 insertions(+), 4 deletions(-)
  14
  15 --- a/drivers/gpu/drm/vc4/vc4_hvs.c
  16 +++ b/drivers/gpu/drm/vc4/vc4_hvs.c
  17 @@ -697,6 +697,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
  18         struct drm_device *dev = crtc->dev;
  19         struct vc4_dev *vc4 = to_vc4_dev(dev);
  20         struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
  21 +       unsigned int channel = vc4_state->assigned_channel;
  22         struct drm_plane *plane;
  23         struct vc4_plane_state *vc4_plane_state;
  24         bool debug_dump_regs = false;
  25 @@ -737,8 +738,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
  26                 /* This sets a black background color fill, as is the case
  27                  * with other DRM drivers.
  28                  */
  29 -               HVS_WRITE(SCALER_DISPBKGNDX(vc4_state->assigned_channel),
  30 -                         HVS_READ(SCALER_DISPBKGNDX(vc4_state->assigned_channel)) |
  31 +               HVS_WRITE(SCALER_DISPBKGNDX(channel),
  32 +                         HVS_READ(SCALER_DISPBKGNDX(channel)) |
  33                           SCALER_DISPBKGND_FILL);
  34
  35         /* Only update DISPLIST if the CRTC was already running and is not
  36 @@ -752,7 +753,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
  37                 vc4_hvs_update_dlist(crtc);
  38
  39         if (crtc->state->color_mgmt_changed) {
  40 -               u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(vc4_state->assigned_channel));
  41 +               u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(channel));
  42
  43                 if (crtc->state->gamma_lut) {
  44                         if (!vc4->hvs->hvs5) {
  45 @@ -775,7 +776,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
  46                         if (!vc4->hvs->hvs5)
  47                                 dispbkgndx &= ~SCALER_DISPBKGND_GAMMA;
  48                 }
  49 -               HVS_WRITE(SCALER_DISPBKGNDX(vc4_state->assigned_channel), dispbkgndx);
  50 +               HVS_WRITE(SCALER_DISPBKGNDX(channel), dispbkgndx);
  51         }
  52
  53         if (debug_dump_regs) {