target/linux/bcm27xx/patches-5.15/950-0515-overlays-Add-generic-mcp2515-overlay.patch

   1 From 637535797f538a24a0ce2225185b24b14aa20d51 Mon Sep 17 00:00:00 2001
   2 From: GabyPCgeeK <GabyPCgeeK@users.noreply.github.com>
   3 Date: Mon, 27 Sep 2021 04:43:21 -0400
   4 Subject: [PATCH] overlays: Add generic mcp2515 overlay
   5
   6 Can configure mcp2515 on spi0/1/2 without the need for multiple overlays.
   7 ---
   8  arch/arm/boot/dts/overlays/Makefile           |   1 +
   9  arch/arm/boot/dts/overlays/README             |  15 ++
  10  .../arm/boot/dts/overlays/mcp2515-overlay.dts | 156 ++++++++++++++++++
  11  3 files changed, 172 insertions(+)
  12  create mode 100644 arch/arm/boot/dts/overlays/mcp2515-overlay.dts
  13
  14 --- a/arch/arm/boot/dts/overlays/Makefile
  15 +++ b/arch/arm/boot/dts/overlays/Makefile
  16 @@ -113,6 +113,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
  17         mbed-dac.dtbo \
  18         mcp23017.dtbo \
  19         mcp23s17.dtbo \
  20 +       mcp2515.dtbo \
  21         mcp2515-can0.dtbo \
  22         mcp2515-can1.dtbo \
  23         mcp251xfd.dtbo \
  24 --- a/arch/arm/boot/dts/overlays/README
  25 +++ b/arch/arm/boot/dts/overlays/README
  26 @@ -1977,6 +1977,21 @@ Params: s08-spi<n>-<m>-present  4-bit in
  27                                  or INTB output of MCP23S17 is connected.
  28
  29
  30 +Name:   mcp2515
  31 +Info:   Configures the MCP2515 CAN controller on spi0/1/2
  32 +        For devices on spi1 or spi2, the interfaces should be enabled
  33 +        with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
  34 +Load:   dtoverlay=mcp2515,<param>=<val>
  35 +Params: spi<n>-<m>              Configure device at spi<n>, cs<m>
  36 +                                (boolean, required)
  37 +
  38 +        oscillator              Clock frequency for the CAN controller (Hz)
  39 +
  40 +        speed                   Maximum SPI frequence (Hz)
  41 +
  42 +        interrupt               GPIO for interrupt signal
  43 +
  44 +
  45  Name:   mcp2515-can0
  46  Info:   Configures the MCP2515 CAN controller on spi0.0
  47  Load:   dtoverlay=mcp2515-can0,<param>=<val>
  48 --- /dev/null
  49 +++ b/arch/arm/boot/dts/overlays/mcp2515-overlay.dts
  50 @@ -0,0 +1,156 @@
  51 +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
  52 +
  53 +/dts-v1/;
  54 +/plugin/;
  55 +
  56 +#include <dt-bindings/gpio/gpio.h>
  57 +#include <dt-bindings/interrupt-controller/irq.h>
  58 +#include <dt-bindings/pinctrl/bcm2835.h>
  59 +
  60 +/ {
  61 +       compatible = "brcm,bcm2835";
  62 +
  63 +       fragment@0 {
  64 +               target = <&spidev0>;
  65 +               __dormant__ {
  66 +                       status = "disabled";
  67 +               };
  68 +       };
  69 +
  70 +       fragment@1 {
  71 +               target = <&spidev1>;
  72 +               __dormant__ {
  73 +                       status = "disabled";
  74 +               };
  75 +       };
  76 +
  77 +       fragment@2 {
  78 +               target-path = "spi1/spidev@0";
  79 +               __dormant__ {
  80 +                       status = "disabled";
  81 +               };
  82 +       };
  83 +
  84 +       fragment@3 {
  85 +               target-path = "spi1/spidev@1";
  86 +               __dormant__ {
  87 +                       status = "disabled";
  88 +               };
  89 +       };
  90 +
  91 +       fragment@4 {
  92 +               target-path = "spi1/spidev@2";
  93 +               __dormant__ {
  94 +                       status = "disabled";
  95 +               };
  96 +       };
  97 +
  98 +       fragment@5 {
  99 +               target-path = "spi2/spidev@0";
 100 +               __dormant__ {
 101 +                       status = "disabled";
 102 +               };
 103 +       };
 104 +
 105 +       fragment@6 {
 106 +               target-path = "spi2/spidev@1";
 107 +               __dormant__ {
 108 +                       status = "disabled";
 109 +               };
 110 +       };
 111 +
 112 +       fragment@7 {
 113 +               target-path = "spi2/spidev@2";
 114 +               __dormant__ {
 115 +                       status = "disabled";
 116 +               };
 117 +       };
 118 +
 119 +       fragment@8 {
 120 +               target = <&gpio>;
 121 +               __overlay__ {
 122 +                       mcp2515_pins: mcp2515_pins {
 123 +                               brcm,pins = <25>;
 124 +                               brcm,function = <BCM2835_FSEL_GPIO_IN>;
 125 +                       };
 126 +               };
 127 +       };
 128 +
 129 +       fragment@9 {
 130 +               target-path = "/clocks";
 131 +               __overlay__ {
 132 +                       clk_mcp2515_osc: mcp2515-osc {
 133 +                               #clock-cells = <0>;
 134 +                               compatible = "fixed-clock";
 135 +                               clock-frequency = <16000000>;
 136 +                       };
 137 +               };
 138 +       };
 139 +
 140 +       mcp2515_frag: fragment@10 {
 141 +               target = <&spi0>;
 142 +               __overlay__ {
 143 +                       status = "okay";
 144 +                       #address-cells = <1>;
 145 +                       #size-cells = <0>;
 146 +
 147 +                       mcp2515: mcp2515@0 {
 148 +                               compatible = "microchip,mcp2515";
 149 +                               reg = <0>;
 150 +                               pinctrl-names = "default";
 151 +                               pinctrl-0 = <&mcp2515_pins>;
 152 +                               spi-max-frequency = <10000000>;
 153 +                               interrupt-parent = <&gpio>;
 154 +                               interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
 155 +                               clocks = <&clk_mcp2515_osc>;
 156 +                       };
 157 +               };
 158 +       };
 159 +
 160 +       __overrides__ {
 161 +               spi0-0 = <0>, "+0",
 162 +                       <&mcp2515_frag>, "target:0=", <&spi0>,
 163 +                       <&mcp2515>, "reg:0=0",
 164 +                       <&mcp2515_pins>, "name=mcp2515_spi0_0_pins",
 165 +                       <&clk_mcp2515_osc>, "name=mcp2515-spi0-0-osc";
 166 +               spi0-1 = <0>, "+1",
 167 +                       <&mcp2515_frag>, "target:0=", <&spi0>,
 168 +                       <&mcp2515>, "reg:0=1",
 169 +                       <&mcp2515_pins>, "name=mcp2515_spi0_1_pins",
 170 +                       <&clk_mcp2515_osc>, "name=mcp2515-spi0-1-osc";
 171 +               spi1-0 = <0>, "+2",
 172 +                       <&mcp2515_frag>, "target:0=", <&spi1>,
 173 +                       <&mcp2515>, "reg:0=0",
 174 +                       <&mcp2515_pins>, "name=mcp2515_spi1_0_pins",
 175 +                       <&clk_mcp2515_osc>, "name=mcp2515-spi1-0-osc";
 176 +               spi1-1 = <0>, "+3",
 177 +                       <&mcp2515_frag>, "target:0=", <&spi1>,
 178 +                       <&mcp2515>, "reg:0=1",
 179 +                       <&mcp2515_pins>, "name=mcp2515_spi1_1_pins",
 180 +                       <&clk_mcp2515_osc>, "name=mcp2515-spi1-1-osc";
 181 +               spi1-2 = <0>, "+4",
 182 +                       <&mcp2515_frag>, "target:0=", <&spi1>,
 183 +                       <&mcp2515>, "reg:0=2",
 184 +                       <&mcp2515_pins>, "name=mcp2515_spi1_2_pins",
 185 +                       <&clk_mcp2515_osc>, "name=mcp2515-spi1-2-osc";
 186 +               spi2-0 = <0>, "+5",
 187 +                       <&mcp2515_frag>, "target:0=", <&spi2>,
 188 +                       <&mcp2515>, "reg:0=0",
 189 +                       <&mcp2515_pins>, "name=mcp2515_spi2_0_pins",
 190 +                       <&clk_mcp2515_osc>, "name=mcp2515-spi2-0-osc";
 191 +               spi2-1 = <0>, "+6",
 192 +                       <&mcp2515_frag>, "target:0=", <&spi2>,
 193 +                       <&mcp2515>, "reg:0=1",
 194 +                       <&mcp2515_pins>, "name=mcp2515_spi2_1_pins",
 195 +                       <&clk_mcp2515_osc>, "name=mcp2515-spi2-1-osc";
 196 +               spi2-2 = <0>, "+7",
 197 +                       <&mcp2515_frag>, "target:0=", <&spi2>,
 198 +                       <&mcp2515>, "reg:0=2",
 199 +                       <&mcp2515_pins>, "name=mcp2515_spi2_2_pins",
 200 +                       <&clk_mcp2515_osc>, "name=mcp2515-spi2-2-osc";
 201 +               oscillator = <&clk_mcp2515_osc>, "clock-frequency:0";
 202 +               speed = <&mcp2515>, "spi-max-frequency:0";
 203 +               interrupt = <&mcp2515_pins>, "brcm,pins:0",
 204 +                       <&mcp2515>, "interrupts:0";
 205 +       };
 206 +};