1 From 06c340cc854b1c8c275968c2830fbe8a5c3b0e4e Mon Sep 17 00:00:00 2001
2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
3 Date: Fri, 18 Jun 2021 21:52:28 +0100
4 Subject: [PATCH] drm/vc4: Correct DSI divider calculations
6 The divider calculations tried to find the divider
7 just faster than the clock requested. However if
8 it required a divider of 7 then the for loop
9 aborted without handling the "error" case, and could
10 end up with a clock lower than requested.
12 Correct the loop so that we always have a clock greater
15 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
17 drivers/gpu/drm/vc4/vc4_dsi.c | 6 ++----
18 1 file changed, 2 insertions(+), 4 deletions(-)
20 --- a/drivers/gpu/drm/vc4/vc4_dsi.c
21 +++ b/drivers/gpu/drm/vc4/vc4_dsi.c
22 @@ -850,11 +850,9 @@ static bool vc4_dsi_encoder_mode_fixup(s
23 /* Find what divider gets us a faster clock than the requested
26 - for (divider = 1; divider < 8; divider++) {
27 - if (parent_rate / divider < pll_clock) {
29 + for (divider = 1; divider < 7; divider++) {
30 + if (parent_rate / (divider + 1) < pll_clock)
35 /* Now that we've picked a PLL divider, calculate back to its