bcm27xx: switch to kernel v6.1
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.15 / 950-0448-drm-vc4-Fix-definition-of-PAL-M-mode.patch
1 From 967b49174527035216ee4d54c82c4528fed0be55 Mon Sep 17 00:00:00 2001
2 From: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
3 Date: Thu, 15 Jul 2021 01:07:53 +0200
4 Subject: [PATCH] drm/vc4: Fix definition of PAL-M mode
5
6 PAL-M is a Brazilian analog TV standard that uses a PAL-style chroma
7 subcarrier at 3.575611[888111] MHz on top of 525-line (480i60) timings.
8 This commit makes the driver actually use the proper VEC preset for this
9 mode instead of just changing PAL subcarrier frequency.
10
11 DRM mode constant names have also been changed, as they no longer
12 correspond to the "NTSC" or "PAL" terms.
13
14 Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
15 ---
16 drivers/gpu/drm/vc4/vc4_vec.c | 18 +++++++++---------
17 1 file changed, 9 insertions(+), 9 deletions(-)
18
19 --- a/drivers/gpu/drm/vc4/vc4_vec.c
20 +++ b/drivers/gpu/drm/vc4/vc4_vec.c
21 @@ -68,6 +68,7 @@
22 #define VEC_CONFIG0_STD_MASK GENMASK(1, 0)
23 #define VEC_CONFIG0_NTSC_STD 0
24 #define VEC_CONFIG0_PAL_BDGHI_STD 1
25 +#define VEC_CONFIG0_PAL_M_STD 2
26 #define VEC_CONFIG0_PAL_N_STD 3
27
28 #define VEC_SCHPH 0x108
29 @@ -241,14 +242,14 @@ static const struct debugfs_reg32 vec_re
30 VC4_REG32(VEC_DAC_MISC),
31 };
32
33 -static const struct drm_display_mode ntsc_mode = {
34 +static const struct drm_display_mode drm_mode_480i = {
35 DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 13500,
36 720, 720 + 14, 720 + 14 + 64, 720 + 14 + 64 + 60, 0,
37 480, 480 + 7, 480 + 7 + 6, 525, 0,
38 DRM_MODE_FLAG_INTERLACE)
39 };
40
41 -static const struct drm_display_mode pal_mode = {
42 +static const struct drm_display_mode drm_mode_576i = {
43 DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 13500,
44 720, 720 + 20, 720 + 20 + 64, 720 + 20 + 64 + 60, 0,
45 576, 576 + 4, 576 + 4 + 6, 625, 0,
46 @@ -257,25 +258,24 @@ static const struct drm_display_mode pal
47
48 static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = {
49 [VC4_VEC_TV_MODE_NTSC] = {
50 - .mode = &ntsc_mode,
51 + .mode = &drm_mode_480i,
52 .config0 = VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN,
53 .config1 = VEC_CONFIG1_C_CVBS_CVBS,
54 },
55 [VC4_VEC_TV_MODE_NTSC_J] = {
56 - .mode = &ntsc_mode,
57 + .mode = &drm_mode_480i,
58 .config0 = VEC_CONFIG0_NTSC_STD,
59 .config1 = VEC_CONFIG1_C_CVBS_CVBS,
60 },
61 [VC4_VEC_TV_MODE_PAL] = {
62 - .mode = &pal_mode,
63 + .mode = &drm_mode_576i,
64 .config0 = VEC_CONFIG0_PAL_BDGHI_STD,
65 .config1 = VEC_CONFIG1_C_CVBS_CVBS,
66 },
67 [VC4_VEC_TV_MODE_PAL_M] = {
68 - .mode = &pal_mode,
69 - .config0 = VEC_CONFIG0_PAL_BDGHI_STD,
70 - .config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ,
71 - .custom_freq = 0x223b61d1,
72 + .mode = &drm_mode_480i,
73 + .config0 = VEC_CONFIG0_PAL_M_STD,
74 + .config1 = VEC_CONFIG1_C_CVBS_CVBS,
75 },
76 };
77