bcm27xx: add support for linux v5.15
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.15 / 950-0366-media-ov9281-Add-1280x720-and-640x480-modes.patch
1 From 22a869d373bc642562e55107028d19926a593984 Mon Sep 17 00:00:00 2001
2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
3 Date: Sun, 22 Nov 2020 11:01:08 +0000
4 Subject: [PATCH] media: ov9281: Add 1280x720 and 640x480 modes
5
6 Breaks out common register set and adds the different registers
7 for 1280x720 (cropped) and 640x480 (skipped) modes
8
9 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
10 ---
11 drivers/media/i2c/ov9281.c | 146 ++++++++++++++++++++++++++++++++-----
12 1 file changed, 126 insertions(+), 20 deletions(-)
13
14 --- a/drivers/media/i2c/ov9281.c
15 +++ b/drivers/media/i2c/ov9281.c
16 @@ -139,7 +139,7 @@ struct ov9281 {
17 * max_framerate 120fps for 10 bit, 144fps for 8 bit.
18 * mipi_datarate per lane 800Mbps
19 */
20 -static const struct regval ov9281_1280x800_regs[] = {
21 +static const struct regval ov9281_common_regs[] = {
22 {0x0103, 0x01},
23 {0x0302, 0x32},
24 {0x030e, 0x02},
25 @@ -177,13 +177,35 @@ static const struct regval ov9281_1280x8
26 {0x372d, 0x22},
27 {0x3731, 0x80},
28 {0x3732, 0x30},
29 - {0x3778, 0x00},
30 {0x377d, 0x22},
31 {0x3788, 0x02},
32 {0x3789, 0xa4},
33 {0x378a, 0x00},
34 {0x378b, 0x4a},
35 {0x3799, 0x20},
36 + {0x3881, 0x42},
37 + {0x38b1, 0x00},
38 + {0x3920, 0xff},
39 + {0x4010, 0x40},
40 + {0x4043, 0x40},
41 + {0x4307, 0x30},
42 + {0x4317, 0x00},
43 + {0x4501, 0x00},
44 + {0x450a, 0x08},
45 + {0x4601, 0x04},
46 + {0x470f, 0x00},
47 + {0x4f07, 0x00},
48 + {0x4800, 0x00},
49 + {0x5000, 0x9f},
50 + {0x5001, 0x00},
51 + {0x5e00, 0x00},
52 + {0x5d00, 0x07},
53 + {0x5d01, 0x00},
54 + {REG_NULL, 0x00},
55 +};
56 +
57 +static const struct regval ov9281_1280x800_regs[] = {
58 + {0x3778, 0x10},
59 {0x3800, 0x00},
60 {0x3801, 0x00},
61 {0x3802, 0x00},
62 @@ -208,31 +230,83 @@ static const struct regval ov9281_1280x8
63 {0x3815, 0x11},
64 {0x3820, 0x40},
65 {0x3821, 0x00},
66 - {0x3881, 0x42},
67 - {0x38b1, 0x00},
68 - {0x3920, 0xff},
69 {0x4003, 0x40},
70 {0x4008, 0x04},
71 {0x4009, 0x0b},
72 {0x400c, 0x00},
73 {0x400d, 0x07},
74 - {0x4010, 0x40},
75 - {0x4043, 0x40},
76 - {0x4307, 0x30},
77 - {0x4317, 0x00},
78 - {0x4501, 0x00},
79 {0x4507, 0x00},
80 {0x4509, 0x00},
81 - {0x450a, 0x08},
82 - {0x4601, 0x04},
83 - {0x470f, 0x00},
84 - {0x4f07, 0x00},
85 - {0x4800, 0x00},
86 - {0x5000, 0x9f},
87 - {0x5001, 0x00},
88 - {0x5e00, 0x00},
89 - {0x5d00, 0x07},
90 - {0x5d01, 0x00},
91 + {REG_NULL, 0x00},
92 +};
93 +
94 +static const struct regval ov9281_1280x720_regs[] = {
95 + {0x3778, 0x10},
96 + {0x3800, 0x00},
97 + {0x3801, 0x00},
98 + {0x3802, 0x00},
99 + {0x3803, 0x28},
100 + {0x3804, 0x05},
101 + {0x3805, 0x0f},
102 + {0x3806, 0x03},
103 + {0x3807, 0x07},
104 + {0x3808, 0x05},
105 + {0x3809, 0x00},
106 + {0x380a, 0x02},
107 + {0x380b, 0xd0},
108 + {0x380c, 0x02},
109 + {0x380d, 0xd8},
110 + {0x380e, 0x03},
111 + {0x380f, 0x8e},
112 + {0x3810, 0x00},
113 + {0x3811, 0x08},
114 + {0x3812, 0x00},
115 + {0x3813, 0x08},
116 + {0x3814, 0x11},
117 + {0x3815, 0x11},
118 + {0x3820, 0x40},
119 + {0x3821, 0x00},
120 + {0x4003, 0x40},
121 + {0x4008, 0x04},
122 + {0x4009, 0x0b},
123 + {0x400c, 0x00},
124 + {0x400d, 0x07},
125 + {0x4507, 0x00},
126 + {0x4509, 0x00},
127 + {REG_NULL, 0x00},
128 +};
129 +
130 +static const struct regval ov9281_640x400_regs[] = {
131 + {0x3800, 0x00},
132 + {0x3801, 0x00},
133 + {0x3802, 0x00},
134 + {0x3803, 0x00},
135 + {0x3804, 0x05},
136 + {0x3805, 0x0f},
137 + {0x3806, 0x03},
138 + {0x3807, 0x2f},
139 + {0x3808, 0x02},
140 + {0x3809, 0x80},
141 + {0x380a, 0x01},
142 + {0x380b, 0x90},
143 + {0x380c, 0x02},
144 + {0x380d, 0xd8},
145 + {0x380e, 0x02},
146 + {0x380f, 0x08},
147 + {0x3810, 0x00},
148 + {0x3811, 0x04},
149 + {0x3812, 0x00},
150 + {0x3813, 0x04},
151 + {0x3814, 0x31},
152 + {0x3815, 0x22},
153 + {0x3820, 0x60},
154 + {0x3821, 0x01},
155 + {0x4008, 0x02},
156 + {0x4009, 0x05},
157 + {0x400c, 0x00},
158 + {0x400d, 0x03},
159 + {0x4507, 0x03},
160 + {0x4509, 0x80},
161 {REG_NULL, 0x00},
162 };
163
164 @@ -263,6 +337,34 @@ static const struct ov9281_mode supporte
165 },
166 .reg_list = ov9281_1280x800_regs,
167 },
168 + {
169 + .width = 1280,
170 + .height = 720,
171 + .exp_def = 0x0320,
172 + .hts_def = 0x05b0,
173 + .vts_def = 761,
174 + .crop = {
175 + .left = 0,
176 + .top = 40,
177 + .width = 1280,
178 + .height = 720
179 + },
180 + .reg_list = ov9281_1280x720_regs,
181 + },
182 + {
183 + .width = 640,
184 + .height = 400,
185 + .exp_def = 0x0320,
186 + .hts_def = 0x05b0,
187 + .vts_def = 421,
188 + .crop = {
189 + .left = 0,
190 + .top = 0,
191 + .width = 1280,
192 + .height = 800
193 + },
194 + .reg_list = ov9281_640x400_regs,
195 + },
196 };
197
198 static const s64 link_freq_menu_items[] = {
199 @@ -567,6 +669,10 @@ static int __ov9281_start_stream(struct
200 {
201 int ret;
202
203 + ret = ov9281_write_array(ov9281->client, ov9281_common_regs);
204 + if (ret)
205 + return ret;
206 +
207 ret = ov9281_write_array(ov9281->client, ov9281->cur_mode->reg_list);
208 if (ret)
209 return ret;