target/linux/bcm27xx/patches-5.15/950-0142-hwrng-iproc-rng200-Add-BCM2838-support.patch

   1 From bf3dee93bea871d5b8c714b877b9db7b27ab73b2 Mon Sep 17 00:00:00 2001
   2 From: Stefan Wahren <wahrenst@gmx.net>
   3 Date: Sat, 4 May 2019 17:06:15 +0200
   4 Subject: [PATCH] hwrng: iproc-rng200: Add BCM2838 support
   5
   6 The HWRNG on the BCM2838 is compatible to iproc-rng200, so add the
   7 support to this driver instead of bcm2835-rng.
   8
   9 Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
  10
  11 hwrng: iproc-rng200: Correct SoC name
  12
  13 The Pi 4 SoC is called BCM2711, not BCM2838.
  14
  15 Fixes: "hwrng: iproc-rng200: Add BCM2838 support"
  16
  17 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  18 ---
  19  drivers/char/hw_random/Kconfig        |  2 +-
  20  drivers/char/hw_random/iproc-rng200.c | 78 +++++++++++++++++++++++++--
  21  2 files changed, 76 insertions(+), 4 deletions(-)
  22
  23 --- a/drivers/char/hw_random/Kconfig
  24 +++ b/drivers/char/hw_random/Kconfig
  25 @@ -104,7 +104,7 @@ config HW_RANDOM_IPROC_RNG200
  26         default HW_RANDOM
  27         help
  28           This driver provides kernel-side support for the RNG200
  29 -         hardware found on the Broadcom iProc and STB SoCs.
  30 +         hardware found on the Broadcom iProc, BCM2711 and STB SoCs.
  31
  32           To compile this driver as a module, choose M here: the
  33           module will be called iproc-rng200
  34 --- a/drivers/char/hw_random/iproc-rng200.c
  35 +++ b/drivers/char/hw_random/iproc-rng200.c
  36 @@ -28,6 +28,7 @@
  37  #define RNG_CTRL_OFFSET                                        0x00
  38  #define RNG_CTRL_RNG_RBGEN_MASK                                0x00001FFF
  39  #define RNG_CTRL_RNG_RBGEN_ENABLE                      0x00000001
  40 +#define RNG_CTRL_RNG_DIV_CTRL_SHIFT                    13
  41
  42  #define RNG_SOFT_RESET_OFFSET                          0x04
  43  #define RNG_SOFT_RESET                                 0x00000001
  44 @@ -35,16 +36,23 @@
  45  #define RBG_SOFT_RESET_OFFSET                          0x08
  46  #define RBG_SOFT_RESET                                 0x00000001
  47
  48 +#define RNG_TOTAL_BIT_COUNT_OFFSET                     0x0C
  49 +
  50 +#define RNG_TOTAL_BIT_COUNT_THRESHOLD_OFFSET           0x10
  51 +
  52  #define RNG_INT_STATUS_OFFSET                          0x18
  53  #define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK    0x80000000
  54  #define RNG_INT_STATUS_STARTUP_TRANSITIONS_MET_IRQ_MASK        0x00020000
  55  #define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK              0x00000020
  56  #define RNG_INT_STATUS_TOTAL_BITS_COUNT_IRQ_MASK       0x00000001
  57
  58 +#define RNG_INT_ENABLE_OFFSET                          0x1C
  59 +
  60  #define RNG_FIFO_DATA_OFFSET                           0x20
  61
  62  #define RNG_FIFO_COUNT_OFFSET                          0x24
  63  #define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK             0x000000FF
  64 +#define RNG_FIFO_COUNT_RNG_FIFO_THRESHOLD_SHIFT                8
  65
  66  struct iproc_rng200_dev {
  67         struct hwrng rng;
  68 @@ -165,6 +173,64 @@ static int iproc_rng200_init(struct hwrn
  69         return 0;
  70  }
  71
  72 +static int bcm2711_rng200_read(struct hwrng *rng, void *buf, size_t max,
  73 +                              bool wait)
  74 +{
  75 +       struct iproc_rng200_dev *priv = to_rng_priv(rng);
  76 +       u32 max_words = max / sizeof(u32);
  77 +       u32 num_words, count, val;
  78 +
  79 +       /* ensure warm up period has elapsed */
  80 +       while (1) {
  81 +               val = ioread32(priv->base + RNG_TOTAL_BIT_COUNT_OFFSET);
  82 +               if (val > 16)
  83 +                       break;
  84 +               cpu_relax();
  85 +       }
  86 +
  87 +       /* ensure fifo is not empty */
  88 +       while (1) {
  89 +               num_words = ioread32(priv->base + RNG_FIFO_COUNT_OFFSET) &
  90 +                           RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK;
  91 +               if (num_words)
  92 +                       break;
  93 +               if (!wait)
  94 +                       return 0;
  95 +               cpu_relax();
  96 +       }
  97 +
  98 +       if (num_words > max_words)
  99 +               num_words = max_words;
 100 +
 101 +       for (count = 0; count < num_words; count++) {
 102 +               ((u32 *)buf)[count] = ioread32(priv->base +
 103 +                                              RNG_FIFO_DATA_OFFSET);
 104 +       }
 105 +
 106 +       return num_words * sizeof(u32);
 107 +}
 108 +
 109 +static int bcm2711_rng200_init(struct hwrng *rng)
 110 +{
 111 +       struct iproc_rng200_dev *priv = to_rng_priv(rng);
 112 +       uint32_t val;
 113 +
 114 +       if (ioread32(priv->base + RNG_CTRL_OFFSET) & RNG_CTRL_RNG_RBGEN_MASK)
 115 +               return 0;
 116 +
 117 +       /* initial numbers generated are "less random" so will be discarded */
 118 +       val = 0x40000;
 119 +       iowrite32(val, priv->base + RNG_TOTAL_BIT_COUNT_THRESHOLD_OFFSET);
 120 +       /* min fifo count to generate full interrupt */
 121 +       val = 2 << RNG_FIFO_COUNT_RNG_FIFO_THRESHOLD_SHIFT;
 122 +       iowrite32(val, priv->base + RNG_FIFO_COUNT_OFFSET);
 123 +       /* enable the rng - 1Mhz sample rate */
 124 +       val = (0x3 << RNG_CTRL_RNG_DIV_CTRL_SHIFT) | RNG_CTRL_RNG_RBGEN_MASK;
 125 +       iowrite32(val, priv->base + RNG_CTRL_OFFSET);
 126 +
 127 +       return 0;
 128 +}
 129 +
 130  static void iproc_rng200_cleanup(struct hwrng *rng)
 131  {
 132         struct iproc_rng200_dev *priv = to_rng_priv(rng);
 133 @@ -189,11 +255,17 @@ static int iproc_rng200_probe(struct pla
 134                 return PTR_ERR(priv->base);
 135         }
 136
 137 -       priv->rng.name = "iproc-rng200";
 138 -       priv->rng.read = iproc_rng200_read;
 139 -       priv->rng.init = iproc_rng200_init;
 140 +       priv->rng.name = pdev->name;
 141         priv->rng.cleanup = iproc_rng200_cleanup;
 142
 143 +       if (of_device_is_compatible(dev->of_node, "brcm,bcm2711-rng200")) {
 144 +               priv->rng.init = bcm2711_rng200_init;
 145 +               priv->rng.read = bcm2711_rng200_read;
 146 +       } else {
 147 +               priv->rng.init = iproc_rng200_init;
 148 +               priv->rng.read = iproc_rng200_read;
 149 +       }
 150 +
 151         /* Register driver */
 152         ret = devm_hwrng_register(dev, &priv->rng);
 153         if (ret) {