bcm27xx: add kernel 5.10 support
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.10 / 950-0385-mcp251xfd-add-overlay.patch
1 From 6a028ad5aed9e68280c9ccf6d4ca5370fcfdb4a2 Mon Sep 17 00:00:00 2001
2 From: Marc Kleine-Budde <mkl@pengutronix.de>
3 Date: Fri, 15 Nov 2019 00:54:07 +0100
4 Subject: [PATCH] mcp251xfd: add overlay
5
6 Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
7 ---
8 arch/arm/boot/dts/overlays/Makefile | 1 +
9 arch/arm/boot/dts/overlays/README | 22 ++
10 .../boot/dts/overlays/mcp251xfd-overlay.dts | 226 ++++++++++++++++++
11 3 files changed, 249 insertions(+)
12 create mode 100644 arch/arm/boot/dts/overlays/mcp251xfd-overlay.dts
13
14 --- a/arch/arm/boot/dts/overlays/Makefile
15 +++ b/arch/arm/boot/dts/overlays/Makefile
16 @@ -108,6 +108,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
17 mcp23s17.dtbo \
18 mcp2515-can0.dtbo \
19 mcp2515-can1.dtbo \
20 + mcp251xfd.dtbo \
21 mcp3008.dtbo \
22 mcp3202.dtbo \
23 mcp342x.dtbo \
24 --- a/arch/arm/boot/dts/overlays/README
25 +++ b/arch/arm/boot/dts/overlays/README
26 @@ -1779,6 +1779,28 @@ Params: oscillator Clock fr
27 interrupt GPIO for interrupt signal
28
29
30 +Name: mcp251xfd
31 +Info: Configures the MCP251XFD CAN controller family
32 + For devices on spi1 or spi2, the interfaces should be enabled
33 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
34 +Load: dtoverlay=mcp251xfd,<param>=<val>
35 +Params: spi<n>-<m> Configure device at spi<n>, cs<m>
36 + (boolean, required)
37 +
38 + oscillator Clock frequency for the CAN controller (Hz)
39 +
40 + speed Maximum SPI frequence (Hz)
41 +
42 + interrupt GPIO for interrupt signal
43 +
44 + rx_interrupt GPIO for RX interrupt signal (nINT1) (optional)
45 +
46 + xceiver_enable GPIO for CAN transceiver enable (optional)
47 +
48 + xceiver_active_high specifiy if CAN transceiver enable pin is
49 + active high (optional, default: active low)
50 +
51 +
52 Name: mcp3008
53 Info: Configures MCP3008 A/D converters
54 For devices on spi1 or spi2, the interfaces should be enabled
55 --- /dev/null
56 +++ b/arch/arm/boot/dts/overlays/mcp251xfd-overlay.dts
57 @@ -0,0 +1,226 @@
58 +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
59 +
60 +/dts-v1/;
61 +/plugin/;
62 +
63 +#include <dt-bindings/gpio/gpio.h>
64 +#include <dt-bindings/interrupt-controller/irq.h>
65 +#include <dt-bindings/pinctrl/bcm2835.h>
66 +
67 +/ {
68 + compatible = "brcm,bcm2835";
69 +
70 + fragment@0 {
71 + target = <&spidev0>;
72 + __dormant__ {
73 + status = "disabled";
74 + };
75 + };
76 +
77 + fragment@1 {
78 + target = <&spidev1>;
79 + __dormant__ {
80 + status = "disabled";
81 + };
82 + };
83 +
84 + fragment@2 {
85 + target-path = "spi1/spidev@0";
86 + __dormant__ {
87 + status = "disabled";
88 + };
89 + };
90 +
91 + fragment@3 {
92 + target-path = "spi1/spidev@1";
93 + __dormant__ {
94 + status = "disabled";
95 + };
96 + };
97 +
98 + fragment@4 {
99 + target-path = "spi1/spidev@2";
100 + __dormant__ {
101 + status = "disabled";
102 + };
103 + };
104 +
105 + fragment@5 {
106 + target-path = "spi2/spidev@0";
107 + __dormant__ {
108 + status = "disabled";
109 + };
110 + };
111 +
112 + fragment@6 {
113 + target-path = "spi2/spidev@1";
114 + __dormant__ {
115 + status = "disabled";
116 + };
117 + };
118 +
119 + fragment@7 {
120 + target-path = "spi2/spidev@2";
121 + __dormant__ {
122 + status = "disabled";
123 + };
124 + };
125 +
126 + fragment@8 {
127 + target = <&gpio>;
128 + __overlay__ {
129 + mcp251xfd_pins: mcp251xfd_pins {
130 + brcm,pins = <25>;
131 + brcm,function = <BCM2835_FSEL_GPIO_IN>;
132 + };
133 + };
134 + };
135 +
136 + fragment@9 {
137 + target-path = "/clocks";
138 + __overlay__ {
139 + clk_mcp251xfd_osc: mcp251xfd-osc {
140 + #clock-cells = <0>;
141 + compatible = "fixed-clock";
142 + clock-frequency = <40000000>;
143 + };
144 + };
145 + };
146 +
147 + mcp251xfd_frag: fragment@10 {
148 + target = <&spi0>;
149 + __overlay__ {
150 + status = "okay";
151 + #address-cells = <1>;
152 + #size-cells = <0>;
153 +
154 + mcp251xfd: mcp251xfd@0 {
155 + compatible = "microchip,mcp251xfd";
156 + reg = <0>;
157 + pinctrl-names = "default";
158 + pinctrl-0 = <&mcp251xfd_pins>;
159 + spi-max-frequency = <20000000>;
160 + interrupt-parent = <&gpio>;
161 + interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
162 + clocks = <&clk_mcp251xfd_osc>;
163 + };
164 + };
165 + };
166 +
167 + fragment@11 {
168 + target = <&mcp251xfd>;
169 + mcp251xfd_rx_int_gpios: __dormant__ {
170 + microchip,rx-int-gpios = <&gpio 255 GPIO_ACTIVE_LOW>;
171 + };
172 + };
173 +
174 + fragment@12 {
175 + target = <&gpio>;
176 + __dormant__ {
177 + mcp251xfd_xceiver_pins: mcp251xfd_xceiver_pins {
178 + brcm,pins = <255>;
179 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
180 + };
181 + };
182 + };
183 +
184 + fragment@13 {
185 + target-path = "/";
186 + __dormant__ {
187 + reg_mcp251xfd_xceiver: reg_mcp251xfd_xceiver {
188 + compatible = "regulator-fixed";
189 + regulator-name = "mcp251xfd_xceiver";
190 + regulator-min-microvolt = <3300000>;
191 + regulator-max-microvolt = <3300000>;
192 + gpio = <&gpio 4 GPIO_ACTIVE_HIGH>;
193 + pinctrl-names = "default";
194 + pinctrl-0 = <&mcp251xfd_xceiver_pins>;
195 + };
196 + };
197 + };
198 +
199 + fragment@14 {
200 + target = <&mcp251xfd>;
201 + __dormant__ {
202 + xceiver-supply = <&reg_mcp251xfd_xceiver>;
203 + };
204 + };
205 +
206 + __overrides__ {
207 + spi0-0 = <0>, "+0",
208 + <&mcp251xfd_frag>, "target:0=", <&spi0>,
209 + <&mcp251xfd>, "reg:0=0",
210 + <&mcp251xfd_pins>, "name=mcp251xfd_spi0_0_pins",
211 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi0-0-osc",
212 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi0_0_xceiver_pins",
213 + <&reg_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi0-0-xceiver",
214 + <&reg_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi0-0-xceiver";
215 + spi0-1 = <0>, "+1",
216 + <&mcp251xfd_frag>, "target:0=", <&spi0>,
217 + <&mcp251xfd>, "reg:0=1",
218 + <&mcp251xfd_pins>, "name=mcp251xfd_spi0_1_pins",
219 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi0-1-osc",
220 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi0_1_xceiver_pins",
221 + <&reg_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi0-1-xceiver",
222 + <&reg_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi0-1-xceiver";
223 + spi1-0 = <0>, "+2",
224 + <&mcp251xfd_frag>, "target:0=", <&spi1>,
225 + <&mcp251xfd>, "reg:0=0",
226 + <&mcp251xfd_pins>, "name=mcp251xfd_spi1_0_pins",
227 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi1-0-osc",
228 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi1_0_xceiver_pins",
229 + <&reg_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi1-0-xceiver",
230 + <&reg_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi1-0-xceiver";
231 + spi1-1 = <0>, "+3",
232 + <&mcp251xfd_frag>, "target:0=", <&spi1>,
233 + <&mcp251xfd>, "reg:0=1",
234 + <&mcp251xfd_pins>, "name=mcp251xfd_spi1_1_pins",
235 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi1-1-osc",
236 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi1_1_xceiver_pins",
237 + <&reg_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi1-1-xceiver",
238 + <&reg_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi1-1-xceiver";
239 + spi1-2 = <0>, "+4",
240 + <&mcp251xfd_frag>, "target:0=", <&spi1>,
241 + <&mcp251xfd>, "reg:0=2",
242 + <&mcp251xfd_pins>, "name=mcp251xfd_spi1_2_pins",
243 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi1-2-osc",
244 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi1_2_xceiver_pins",
245 + <&reg_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi1-2-xceiver",
246 + <&reg_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi1-2-xceiver";
247 + spi2-0 = <0>, "+5",
248 + <&mcp251xfd_frag>, "target:0=", <&spi2>,
249 + <&mcp251xfd>, "reg:0=0",
250 + <&mcp251xfd_pins>, "name=mcp251xfd_spi2_0_pins",
251 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi2-0-osc",
252 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi2_0_xceiver_pins",
253 + <&reg_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi2-0-xceiver",
254 + <&reg_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi2-0-xceiver";
255 + spi2-1 = <0>, "+6",
256 + <&mcp251xfd_frag>, "target:0=", <&spi2>,
257 + <&mcp251xfd>, "reg:0=1",
258 + <&mcp251xfd_pins>, "name=mcp251xfd_spi2_1_pins",
259 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi2-1-osc",
260 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi2_1_xceiver_pins",
261 + <&reg_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi2-1-xceiver",
262 + <&reg_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi2-1-xceiver";
263 + spi2-2 = <0>, "+7",
264 + <&mcp251xfd_frag>, "target:0=", <&spi2>,
265 + <&mcp251xfd>, "reg:0=2",
266 + <&mcp251xfd_pins>, "name=mcp251xfd_spi2_2_pins",
267 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi2-2-osc",
268 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi2_2_xceiver_pins",
269 + <&reg_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi2-2-xceiver",
270 + <&reg_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi2-2-xceiver";
271 + oscillator = <&clk_mcp251xfd_osc>, "clock-frequency:0";
272 + speed = <&mcp251xfd>, "spi-max-frequency:0";
273 + interrupt = <&mcp251xfd_pins>, "brcm,pins:0",
274 + <&mcp251xfd>, "interrupts:0";
275 + rx_interrupt = <0>, "+11",
276 + <&mcp251xfd_pins>, "brcm,pins:4",
277 + <&mcp251xfd_rx_int_gpios>, "microchip,rx-int-gpios:4";
278 + xceiver_enable = <0>, "+12+13+14",
279 + <&mcp251xfd_xceiver_pins>, "brcm,pins:0",
280 + <&reg_mcp251xfd_xceiver>, "gpio:4";
281 + xceiver_active_high = <&reg_mcp251xfd_xceiver>, "enable-active-high?";
282 + };
283 +};