target/linux/bcm27xx/patches-5.10/950-0374-ARM-dts-Add-bcm2711-rpi-400.dts.patch

   1 From 57e4984d7b342860d635155c13bf747d2c225e26 Mon Sep 17 00:00:00 2001
   2 From: Phil Elwell <phil@raspberrypi.com>
   3 Date: Tue, 14 Jul 2020 14:21:33 +0100
   4 Subject: [PATCH] ARM: dts: Add bcm2711-rpi-400.dts
   5
   6 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
   7 ---
   8  arch/arm/boot/dts/Makefile                    |   1 +
   9  arch/arm/boot/dts/bcm2711-rpi-400.dts         | 615 ++++++++++++++++++
  10  arch/arm64/boot/dts/broadcom/Makefile         |   1 +
  11  .../boot/dts/broadcom/bcm2711-rpi-400.dts     |   1 +
  12  4 files changed, 618 insertions(+)
  13  create mode 100644 arch/arm/boot/dts/bcm2711-rpi-400.dts
  14  create mode 100644 arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts
  15
  16 --- a/arch/arm/boot/dts/Makefile
  17 +++ b/arch/arm/boot/dts/Makefile
  18 @@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
  19         bcm2710-rpi-3-b.dtb \
  20         bcm2710-rpi-3-b-plus.dtb \
  21         bcm2711-rpi-4-b.dtb \
  22 +       bcm2711-rpi-400.dtb \
  23         bcm2710-rpi-cm3.dtb \
  24         bcm2711-rpi-cm4.dtb
  25
  26 --- /dev/null
  27 +++ b/arch/arm/boot/dts/bcm2711-rpi-400.dts
  28 @@ -0,0 +1,615 @@
  29 +// SPDX-License-Identifier: GPL-2.0
  30 +/dts-v1/;
  31 +#include "bcm2711.dtsi"
  32 +#include "bcm2835-rpi.dtsi"
  33 +
  34 +#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
  35 +
  36 +/ {
  37 +       compatible = "raspberrypi,400", "brcm,bcm2711";
  38 +       model = "Raspberry Pi 400";
  39 +
  40 +       chosen {
  41 +               /* 8250 auxiliary UART instead of pl011 */
  42 +               stdout-path = "serial1:115200n8";
  43 +       };
  44 +
  45 +       /* Will be filled by the bootloader */
  46 +       memory@0 {
  47 +               device_type = "memory";
  48 +               reg = <0 0 0>;
  49 +       };
  50 +
  51 +       aliases {
  52 +               emmc2bus = &emmc2bus;
  53 +               ethernet0 = &genet;
  54 +               pcie0 = &pcie0;
  55 +       };
  56 +
  57 +       leds {
  58 +               act {
  59 +                       gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
  60 +               };
  61 +
  62 +               pwr {
  63 +                       label = "PWR";
  64 +                       gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
  65 +                       default-state = "keep";
  66 +                       linux,default-trigger = "default-on";
  67 +               };
  68 +       };
  69 +
  70 +       wifi_pwrseq: wifi-pwrseq {
  71 +               compatible = "mmc-pwrseq-simple";
  72 +               reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
  73 +       };
  74 +
  75 +       sd_io_1v8_reg: sd_io_1v8_reg {
  76 +               compatible = "regulator-gpio";
  77 +               regulator-name = "vdd-sd-io";
  78 +               regulator-min-microvolt = <1800000>;
  79 +               regulator-max-microvolt = <3300000>;
  80 +               regulator-boot-on;
  81 +               regulator-always-on;
  82 +               regulator-settling-time-us = <5000>;
  83 +               gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
  84 +               states = <1800000 0x1
  85 +                         3300000 0x0>;
  86 +               status = "okay";
  87 +       };
  88 +
  89 +       sd_vcc_reg: sd_vcc_reg {
  90 +               compatible = "regulator-fixed";
  91 +               regulator-name = "vcc-sd";
  92 +               regulator-min-microvolt = <3300000>;
  93 +               regulator-max-microvolt = <3300000>;
  94 +               regulator-boot-on;
  95 +               enable-active-high;
  96 +               gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
  97 +       };
  98 +};
  99 +
 100 +&ddc0 {
 101 +       status = "okay";
 102 +};
 103 +
 104 +&ddc1 {
 105 +       status = "okay";
 106 +};
 107 +
 108 +&firmware {
 109 +       firmware_clocks: clocks {
 110 +               compatible = "raspberrypi,firmware-clocks";
 111 +               #clock-cells = <1>;
 112 +       };
 113 +
 114 +       expgpio: gpio {
 115 +               compatible = "raspberrypi,firmware-gpio";
 116 +               gpio-controller;
 117 +               #gpio-cells = <2>;
 118 +               gpio-line-names = "BT_ON",
 119 +                                 "WL_ON",
 120 +                                 "PWR_LED_OFF",
 121 +                                 "GLOBAL_RESET",
 122 +                                 "VDD_SD_IO_SEL",
 123 +                                 "CAM_GPIO",
 124 +                                 "SD_PWR_ON",
 125 +                                 "SD_OC_N";
 126 +               status = "okay";
 127 +       };
 128 +
 129 +       reset: reset {
 130 +               compatible = "raspberrypi,firmware-reset";
 131 +               #reset-cells = <1>;
 132 +       };
 133 +};
 134 +
 135 +&gpio {
 136 +       /*
 137 +        * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
 138 +        * the official GPU firmware DT blob.
 139 +        *
 140 +        * Legend:
 141 +        * "FOO" = GPIO line named "FOO" on the schematic
 142 +        * "FOO_N" = GPIO line named "FOO" on schematic, active low
 143 +        */
 144 +       gpio-line-names = "ID_SDA",
 145 +                         "ID_SCL",
 146 +                         "SDA1",
 147 +                         "SCL1",
 148 +                         "GPIO_GCLK",
 149 +                         "GPIO5",
 150 +                         "GPIO6",
 151 +                         "SPI_CE1_N",
 152 +                         "SPI_CE0_N",
 153 +                         "SPI_MISO",
 154 +                         "SPI_MOSI",
 155 +                         "SPI_SCLK",
 156 +                         "GPIO12",
 157 +                         "GPIO13",
 158 +                         /* Serial port */
 159 +                         "TXD1",
 160 +                         "RXD1",
 161 +                         "GPIO16",
 162 +                         "GPIO17",
 163 +                         "GPIO18",
 164 +                         "GPIO19",
 165 +                         "GPIO20",
 166 +                         "GPIO21",
 167 +                         "GPIO22",
 168 +                         "GPIO23",
 169 +                         "GPIO24",
 170 +                         "GPIO25",
 171 +                         "GPIO26",
 172 +                         "GPIO27",
 173 +                         "RGMII_MDIO",
 174 +                         "RGMIO_MDC",
 175 +                         /* Used by BT module */
 176 +                         "CTS0",
 177 +                         "RTS0",
 178 +                         "TXD0",
 179 +                         "RXD0",
 180 +                         /* Used by Wifi */
 181 +                         "SD1_CLK",
 182 +                         "SD1_CMD",
 183 +                         "SD1_DATA0",
 184 +                         "SD1_DATA1",
 185 +                         "SD1_DATA2",
 186 +                         "SD1_DATA3",
 187 +                         /* Shared with SPI flash */
 188 +                         "PWM0_MISO",
 189 +                         "PWM1_MOSI",
 190 +                         "STATUS_LED_G_CLK",
 191 +                         "SPIFLASH_CE_N",
 192 +                         "SDA0",
 193 +                         "SCL0",
 194 +                         "RGMII_RXCLK",
 195 +                         "RGMII_RXCTL",
 196 +                         "RGMII_RXD0",
 197 +                         "RGMII_RXD1",
 198 +                         "RGMII_RXD2",
 199 +                         "RGMII_RXD3",
 200 +                         "RGMII_TXCLK",
 201 +                         "RGMII_TXCTL",
 202 +                         "RGMII_TXD0",
 203 +                         "RGMII_TXD1",
 204 +                         "RGMII_TXD2",
 205 +                         "RGMII_TXD3";
 206 +};
 207 +
 208 +&hdmi0 {
 209 +       clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
 210 +       clock-names = "hdmi", "bvb", "audio", "cec";
 211 +       status = "okay";
 212 +};
 213 +
 214 +&hdmi1 {
 215 +       clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
 216 +       clock-names = "hdmi", "bvb", "audio", "cec";
 217 +       status = "okay";
 218 +};
 219 +
 220 +&hvs {
 221 +       clocks = <&firmware_clocks 4>;
 222 +};
 223 +
 224 +&pixelvalve0 {
 225 +       status = "okay";
 226 +};
 227 +
 228 +&pixelvalve1 {
 229 +       status = "okay";
 230 +};
 231 +
 232 +&pixelvalve2 {
 233 +       status = "okay";
 234 +};
 235 +
 236 +&pixelvalve4 {
 237 +       status = "okay";
 238 +};
 239 +
 240 +&pwm1 {
 241 +       pinctrl-names = "default";
 242 +       pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
 243 +       status = "okay";
 244 +};
 245 +
 246 +/* SDHCI is used to control the SDIO for wireless */
 247 +&sdhci {
 248 +       #address-cells = <1>;
 249 +       #size-cells = <0>;
 250 +       pinctrl-names = "default";
 251 +       pinctrl-0 = <&emmc_gpio34>;
 252 +       bus-width = <4>;
 253 +       non-removable;
 254 +       mmc-pwrseq = <&wifi_pwrseq>;
 255 +       status = "okay";
 256 +
 257 +       brcmf: wifi@1 {
 258 +               reg = <1>;
 259 +               compatible = "brcm,bcm4329-fmac";
 260 +       };
 261 +};
 262 +
 263 +/* EMMC2 is used to drive the SD card */
 264 +&emmc2 {
 265 +       vqmmc-supply = <&sd_io_1v8_reg>;
 266 +       vmmc-supply = <&sd_vcc_reg>;
 267 +       broken-cd;
 268 +       status = "okay";
 269 +};
 270 +
 271 +&genet {
 272 +       phy-handle = <&phy1>;
 273 +       phy-mode = "rgmii-rxid";
 274 +       status = "okay";
 275 +};
 276 +
 277 +&genet_mdio {
 278 +       phy1: ethernet-phy@1 {
 279 +               /* No PHY interrupt */
 280 +               reg = <0x1>;
 281 +       };
 282 +};
 283 +
 284 +&pcie0 {
 285 +       pci@1,0 {
 286 +               #address-cells = <3>;
 287 +               #size-cells = <2>;
 288 +               ranges;
 289 +
 290 +               reg = <0 0 0 0 0>;
 291 +
 292 +               usb@1,0 {
 293 +                       reg = <0x10000 0 0 0 0>;
 294 +                       resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
 295 +               };
 296 +       };
 297 +};
 298 +
 299 +/* uart0 communicates with the BT module */
 300 +&uart0 {
 301 +       pinctrl-names = "default";
 302 +       pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
 303 +       uart-has-rtscts;
 304 +       status = "okay";
 305 +
 306 +       bluetooth {
 307 +               compatible = "brcm,bcm43438-bt";
 308 +               max-speed = <2000000>;
 309 +               shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
 310 +       };
 311 +};
 312 +
 313 +/* uart1 is mapped to the pin header */
 314 +&uart1 {
 315 +       pinctrl-names = "default";
 316 +       pinctrl-0 = <&uart1_gpio14>;
 317 +       status = "okay";
 318 +};
 319 +
 320 +&vchiq {
 321 +       interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 322 +};
 323 +
 324 +&vc4 {
 325 +       status = "okay";
 326 +};
 327 +
 328 +&vec {
 329 +       status = "disabled";
 330 +};
 331 +
 332 +// =============================================
 333 +// Downstream rpi- changes
 334 +
 335 +#define BCM2711
 336 +
 337 +#include "bcm270x.dtsi"
 338 +#include "bcm271x-rpi-bt.dtsi"
 339 +
 340 +/ {
 341 +       soc {
 342 +               /delete-node/ pixelvalve@7e807000;
 343 +               /delete-node/ hdmi@7e902000;
 344 +       };
 345 +};
 346 +
 347 +#include "bcm2711-rpi.dtsi"
 348 +#include "bcm283x-rpi-csi1-2lane.dtsi"
 349 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
 350 +
 351 +/ {
 352 +       chosen {
 353 +               bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
 354 +       };
 355 +
 356 +       aliases {
 357 +               serial0 = &uart1;
 358 +               serial1 = &uart0;
 359 +               mmc0 = &emmc2;
 360 +               mmc1 = &mmcnr;
 361 +               mmc2 = &sdhost;
 362 +               /delete-property/ i2c2;
 363 +               i2c3 = &i2c3;
 364 +               i2c4 = &i2c4;
 365 +               i2c5 = &i2c5;
 366 +               i2c6 = &i2c6;
 367 +               /delete-property/ intc;
 368 +       };
 369 +
 370 +       /delete-node/ wifi-pwrseq;
 371 +};
 372 +
 373 +&mmcnr {
 374 +       pinctrl-names = "default";
 375 +       pinctrl-0 = <&sdio_pins>;
 376 +       bus-width = <4>;
 377 +       status = "okay";
 378 +};
 379 +
 380 +&uart0 {
 381 +       pinctrl-0 = <&uart0_pins &bt_pins>;
 382 +       status = "okay";
 383 +};
 384 +
 385 +&uart1 {
 386 +       pinctrl-0 = <&uart1_pins>;
 387 +};
 388 +
 389 +&spi0 {
 390 +       pinctrl-names = "default";
 391 +       pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
 392 +       cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
 393 +
 394 +       spidev0: spidev@0{
 395 +               compatible = "spidev";
 396 +               reg = <0>;      /* CE0 */
 397 +               #address-cells = <1>;
 398 +               #size-cells = <0>;
 399 +               spi-max-frequency = <125000000>;
 400 +       };
 401 +
 402 +       spidev1: spidev@1{
 403 +               compatible = "spidev";
 404 +               reg = <1>;      /* CE1 */
 405 +               #address-cells = <1>;
 406 +               #size-cells = <0>;
 407 +               spi-max-frequency = <125000000>;
 408 +       };
 409 +};
 410 +
 411 +&gpio {
 412 +       spi0_pins: spi0_pins {
 413 +               brcm,pins = <9 10 11>;
 414 +               brcm,function = <BCM2835_FSEL_ALT0>;
 415 +       };
 416 +
 417 +       spi0_cs_pins: spi0_cs_pins {
 418 +               brcm,pins = <8 7>;
 419 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 420 +       };
 421 +
 422 +       spi3_pins: spi3_pins {
 423 +               brcm,pins = <1 2 3>;
 424 +               brcm,function = <BCM2835_FSEL_ALT3>;
 425 +       };
 426 +
 427 +       spi3_cs_pins: spi3_cs_pins {
 428 +               brcm,pins = <0 24>;
 429 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 430 +       };
 431 +
 432 +       spi4_pins: spi4_pins {
 433 +               brcm,pins = <5 6 7>;
 434 +               brcm,function = <BCM2835_FSEL_ALT3>;
 435 +       };
 436 +
 437 +       spi4_cs_pins: spi4_cs_pins {
 438 +               brcm,pins = <4 25>;
 439 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 440 +       };
 441 +
 442 +       spi5_pins: spi5_pins {
 443 +               brcm,pins = <13 14 15>;
 444 +               brcm,function = <BCM2835_FSEL_ALT3>;
 445 +       };
 446 +
 447 +       spi5_cs_pins: spi5_cs_pins {
 448 +               brcm,pins = <12 26>;
 449 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 450 +       };
 451 +
 452 +       spi6_pins: spi6_pins {
 453 +               brcm,pins = <19 20 21>;
 454 +               brcm,function = <BCM2835_FSEL_ALT3>;
 455 +       };
 456 +
 457 +       spi6_cs_pins: spi6_cs_pins {
 458 +               brcm,pins = <18 27>;
 459 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 460 +       };
 461 +
 462 +       i2c0_pins: i2c0 {
 463 +               brcm,pins = <0 1>;
 464 +               brcm,function = <BCM2835_FSEL_ALT0>;
 465 +               brcm,pull = <BCM2835_PUD_UP>;
 466 +       };
 467 +
 468 +       i2c1_pins: i2c1 {
 469 +               brcm,pins = <2 3>;
 470 +               brcm,function = <BCM2835_FSEL_ALT0>;
 471 +               brcm,pull = <BCM2835_PUD_UP>;
 472 +       };
 473 +
 474 +       i2c3_pins: i2c3 {
 475 +               brcm,pins = <4 5>;
 476 +               brcm,function = <BCM2835_FSEL_ALT5>;
 477 +               brcm,pull = <BCM2835_PUD_UP>;
 478 +       };
 479 +
 480 +       i2c4_pins: i2c4 {
 481 +               brcm,pins = <8 9>;
 482 +               brcm,function = <BCM2835_FSEL_ALT5>;
 483 +               brcm,pull = <BCM2835_PUD_UP>;
 484 +       };
 485 +
 486 +       i2c5_pins: i2c5 {
 487 +               brcm,pins = <12 13>;
 488 +               brcm,function = <BCM2835_FSEL_ALT5>;
 489 +               brcm,pull = <BCM2835_PUD_UP>;
 490 +       };
 491 +
 492 +       i2c6_pins: i2c6 {
 493 +               brcm,pins = <22 23>;
 494 +               brcm,function = <BCM2835_FSEL_ALT5>;
 495 +               brcm,pull = <BCM2835_PUD_UP>;
 496 +       };
 497 +
 498 +       i2s_pins: i2s {
 499 +               brcm,pins = <18 19 20 21>;
 500 +               brcm,function = <BCM2835_FSEL_ALT0>;
 501 +       };
 502 +
 503 +       sdio_pins: sdio_pins {
 504 +               brcm,pins =     <34 35 36 37 38 39>;
 505 +               brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
 506 +               brcm,pull =     <0 2 2 2 2 2>;
 507 +       };
 508 +
 509 +       bt_pins: bt_pins {
 510 +               brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
 511 +                                // to fool pinctrl
 512 +               brcm,function = <0>;
 513 +               brcm,pull = <2>;
 514 +       };
 515 +
 516 +       uart0_pins: uart0_pins {
 517 +               brcm,pins = <32 33>;
 518 +               brcm,function = <BCM2835_FSEL_ALT3>;
 519 +               brcm,pull = <0 2>;
 520 +       };
 521 +
 522 +       uart1_pins: uart1_pins {
 523 +               brcm,pins;
 524 +               brcm,function;
 525 +               brcm,pull;
 526 +       };
 527 +
 528 +       uart2_pins: uart2_pins {
 529 +               brcm,pins = <0 1>;
 530 +               brcm,function = <BCM2835_FSEL_ALT4>;
 531 +               brcm,pull = <0 2>;
 532 +       };
 533 +
 534 +       uart3_pins: uart3_pins {
 535 +               brcm,pins = <4 5>;
 536 +               brcm,function = <BCM2835_FSEL_ALT4>;
 537 +               brcm,pull = <0 2>;
 538 +       };
 539 +
 540 +       uart4_pins: uart4_pins {
 541 +               brcm,pins = <8 9>;
 542 +               brcm,function = <BCM2835_FSEL_ALT4>;
 543 +               brcm,pull = <0 2>;
 544 +       };
 545 +
 546 +       uart5_pins: uart5_pins {
 547 +               brcm,pins = <12 13>;
 548 +               brcm,function = <BCM2835_FSEL_ALT4>;
 549 +               brcm,pull = <0 2>;
 550 +       };
 551 +};
 552 +
 553 +&i2c0if {
 554 +       clock-frequency = <100000>;
 555 +};
 556 +
 557 +&i2c1 {
 558 +       pinctrl-names = "default";
 559 +       pinctrl-0 = <&i2c1_pins>;
 560 +       clock-frequency = <100000>;
 561 +};
 562 +
 563 +&i2s {
 564 +       pinctrl-names = "default";
 565 +       pinctrl-0 = <&i2s_pins>;
 566 +};
 567 +
 568 +/ {
 569 +       __overrides__ {
 570 +               /delete-property/ i2c2_baudrate;
 571 +               /delete-property/ i2c2_iknowwhatimdoing;
 572 +       };
 573 +};
 574 +
 575 +// =============================================
 576 +// Board specific stuff here
 577 +
 578 +/ {
 579 +       power_ctrl: power_ctrl {
 580 +               compatible = "gpio-poweroff";
 581 +               gpios = <&expgpio 5 0>;
 582 +               force;
 583 +       };
 584 +};
 585 +
 586 +&sdhost {
 587 +       status = "disabled";
 588 +};
 589 +
 590 +&phy1 {
 591 +       led-modes = <0x00 0x08>; /* link/activity link */
 592 +};
 593 +
 594 +&gpio {
 595 +       audio_pins: audio_pins {
 596 +               brcm,pins = <40 41>;
 597 +               brcm,function = <4>;
 598 +       };
 599 +};
 600 +
 601 +&leds {
 602 +       act_led: act {
 603 +               label = "led0";
 604 +               linux,default-trigger = "default-on";
 605 +               default-state = "on";
 606 +               gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
 607 +       };
 608 +
 609 +       pwr_led: pwr {
 610 +               label = "led1";
 611 +               linux,default-trigger = "default-on";
 612 +               gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
 613 +       };
 614 +};
 615 +
 616 +&pwm1 {
 617 +       status = "disabled";
 618 +};
 619 +
 620 +&audio {
 621 +       pinctrl-names = "default";
 622 +       pinctrl-0 = <&audio_pins>;
 623 +       brcm,disable-headphones = <1>;
 624 +};
 625 +
 626 +/ {
 627 +       __overrides__ {
 628 +               act_led_gpio = <&act_led>,"gpios:4";
 629 +               act_led_activelow = <&act_led>,"gpios:8";
 630 +               act_led_trigger = <&act_led>,"linux,default-trigger";
 631 +
 632 +               pwr_led_gpio = <&pwr_led>,"gpios:4";
 633 +               pwr_led_activelow = <&pwr_led>,"gpios:8";
 634 +               pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
 635 +
 636 +               eth_led0 = <&phy1>,"led-modes:0";
 637 +               eth_led1 = <&phy1>,"led-modes:4";
 638 +
 639 +               sd_poll_once = <&emmc2>, "non-removable?";
 640 +               spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
 641 +                          <&spi0>, "dmas:8=", <&dma40>;
 642 +       };
 643 +};
 644 --- a/arch/arm64/boot/dts/broadcom/Makefile
 645 +++ b/arch/arm64/boot/dts/broadcom/Makefile
 646 @@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rp
 647  dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb
 648  dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b-plus.dtb
 649  dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b.dtb
 650 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb
 651  dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-cm3.dtb
 652  dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-cm4.dtb
 653
 654 --- /dev/null
 655 +++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts
 656 @@ -0,0 +1 @@
 657 +#include "../../../../arm/boot/dts/bcm2711-rpi-400.dts"