target/linux/bcm27xx/patches-5.10/950-0194-drm-fourcc-Add-packed-10bit-YUV-4-2-0-format.patch

   1 From 1a3319588434a2acfe47a38fcdf6583a3b84ecd3 Mon Sep 17 00:00:00 2001
   2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
   3 Date: Fri, 24 Jan 2020 14:22:06 +0000
   4 Subject: [PATCH] drm/fourcc: Add packed 10bit YUV 4:2:0 format
   5
   6 Adds a format that is 3 10bit YUV 4:2:0 samples packed into
   7 a 32bit work (with 2 spare bits).
   8
   9 Supported on Broadcom BCM2711 chips.
  10
  11 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
  12 ---
  13  drivers/gpu/drm/drm_fourcc.c  |  3 +++
  14  include/uapi/drm/drm_fourcc.h | 11 +++++++++++
  15  2 files changed, 14 insertions(+)
  16
  17 --- a/drivers/gpu/drm/drm_fourcc.c
  18 +++ b/drivers/gpu/drm/drm_fourcc.c
  19 @@ -286,6 +286,9 @@ const struct drm_format_info *__drm_form
  20                   .num_planes = 3, .char_per_block = { 2, 2, 2 },
  21                   .block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0,
  22                   .vsub = 0, .is_yuv = true },
  23 +               { .format = DRM_FORMAT_P030,            .depth = 0,  .num_planes = 2,
  24 +                 .char_per_block = { 4, 4, 0 }, .block_w = { 3, 0, 0 }, .block_h = { 1, 0, 0 },
  25 +                 .hsub = 2, .vsub = 2, .is_yuv = true},
  26         };
  27
  28         unsigned int i;
  29 --- a/include/uapi/drm/drm_fourcc.h
  30 +++ b/include/uapi/drm/drm_fourcc.h
  31 @@ -288,6 +288,13 @@ extern "C" {
  32  #define DRM_FORMAT_Q401                fourcc_code('Q', '4', '0', '1')
  33
  34  /*
  35 + * 2 plane YCbCr MSB aligned, 3 pixels packed into 4 bytes.
  36 + * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian
  37 + * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian
  38 + */
  39 +#define DRM_FORMAT_P030                fourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel packed */
  40 +
  41 +/*
  42   * 3 plane YCbCr
  43   * index 0: Y plane, [7:0] Y
  44   * index 1: Cb plane, [7:0] Cb
  45 @@ -777,6 +784,10 @@ drm_fourcc_canonicalize_nvidia_format_mo
  46   * and UV.  Some SAND-using hardware stores UV in a separate tiled
  47   * image from Y to reduce the column height, which is not supported
  48   * with these modifiers.
  49 + *
  50 + * The DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT modifier is also
  51 + * supported for DRM_FORMAT_P030 where the columns remain as 128 bytes
  52 + * wide, but as this is a 10 bpp format that translates to 96 pixels.
  53   */
  54
  55  #define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \