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bcm27xx: add kernel 5.10 support
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.10 / 950-0054-BCM2708-Add-core-Device-Tree-support.patch
1 From 81589b5e28022d0a4738981f9e5ffb9fadcfaa5b Mon Sep 17 00:00:00 2001
2 From: notro <notro@tronnes.org>
3 Date: Wed, 9 Jul 2014 14:46:08 +0200
4 Subject: [PATCH] BCM2708: Add core Device Tree support
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Add the bare minimum needed to boot BCM2708 from a Device Tree.
10
11 Signed-off-by: Noralf Tronnes <notro@tronnes.org>
12
13 BCM2708: DT: change 'axi' nodename to 'soc'
14
15 Change DT node named 'axi' to 'soc' so it matches ARCH_BCM2835.
16 The VC4 bootloader fills in certain properties in the 'axi' subtree,
17 but since this is part of an upstreaming effort, the name is changed.
18
19 Signed-off-by: Noralf Tronnes notro@tronnes.org
20
21 BCM2708_DT: Correct length of the peripheral space
22
23 Use dts-dirs feature for overlays.
24
25 The kernel makefiles have a dts-dirs target that is for vendor subdirectories.
26
27 Using this fixes the install_dtbs target, which previously did not install the overlays.
28
29 BCM270X_DT: configure I2S DMA channels
30
31 Signed-off-by: Matthias Reichl <hias@horus.com>
32
33 BCM270X_DT: switch to bcm2835-i2s
34
35 I2S soundcard drivers with proper devicetree support (i.e. not linking
36 to the cpu_dai/platform via name but to cpu/platform via of_node)
37 will work out of the box without any modifications.
38
39 When the kernel is compiled without devicetree support the platform
40 code will instantiate the bcm2708-i2s driver and I2S soundcard drivers
41 will link to it via name, as before.
42
43 Signed-off-by: Matthias Reichl <hias@horus.com>
44
45 SDIO-overlay: add poll_once-boolean parameter
46
47 Add paramter to toggle sdio-device-polling
48 done every second or once at boot-time.
49
50 Signed-off-by: Patrick Boettcher <patrick.boettcher@posteo.de>
51
52 BCM270X_DT: Make mmc overlay compatible with current firmware
53
54 The original DT overlay logic followed a merge-then-patch procedure,
55 i.e. parameters are applied to the loaded overlay before the overlay
56 is merged into the base DTB. This sequence has been changed to
57 patch-then-merge, in order to support parameterised node names, and
58 to protect against bad overlays. As a result, overrides (parameters)
59 must only target labels in the overlay, but the overlay can obviously target nodes in the base DTB.
60
61 mmc-overlay.dts (that switches back to the original mmc sdcard
62 driver) is the only overlay violating that rule, and this patch
63 fixes it.
64
65 bcm270x_dt: Use the sdhost MMC controller by default
66
67 The "mmc" overlay reverts to using the other controller.
68
69 squash: Add cprman to dt
70
71 BCM270X_DT: Use clk_core for I2C interfaces
72
73 BCM270X_DT: Use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi
74
75 The mainline Device Tree files are quite close to downstream now.
76 Let's use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi as base files
77 for our dts files.
78
79 Mainline dts files are based on these files:
80
81 bcm2835-rpi.dtsi
82 bcm2835.dtsi bcm2836.dtsi
83 bcm283x.dtsi
84
85 Current downstream are based on these:
86
87 bcm2708.dtsi bcm2709.dtsi bcm2710.dtsi
88 bcm2708_common.dtsi
89
90 This patch introduces this dependency:
91
92 bcm2708.dtsi bcm2709.dtsi
93 bcm2708-rpi.dtsi
94 bcm270x.dtsi
95 bcm2835.dtsi bcm2836.dtsi
96 bcm283x.dtsi
97
98 And:
99 bcm2710.dtsi
100 bcm2708-rpi.dtsi
101 bcm270x.dtsi
102 bcm283x.dtsi
103
104 bcm270x.dtsi contains the downstream bcm283x.dtsi diff.
105 bcm2708-rpi.dtsi is the downstream version of bcm2835-rpi.dtsi.
106
107 Other changes:
108 - The led node has moved from /soc/leds to /leds. This is not a problem
109 since the label is used to reference it.
110 - The clk_osc reg property changes from 6 to 3.
111 - The gpu nodes has their interrupt property set in the base file.
112 - the clocks label does not point to the /clocks node anymore, but
113 points to the cprman node. This is not a problem since the overlays
114 that use the clock node refer to it directly: target-path = "/clocks";
115 - some nodes now have 2 labels since mainline and downstream differs in
116 this respect: cprman/clocks, spi0/spi, gpu/vc4.
117 - some nodes doesn't have an explicit status = "okay" since they're not
118 disabled in the base file: watchdog and random.
119 - gpiomem doesn't need an explicit status = "okay".
120 - bcm2708-rpi-cm.dts got the hpd-gpios property from bcm2708_common.dtsi,
121 it's now set directly in that file.
122 - bcm2709-rpi-2-b.dts has the timer node moved from /soc/timer to /timer.
123 - Removed clock-frequency property on the bcm{2709,2710}.dtsi timer nodes.
124
125 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
126
127 BCM270X_DT: Use raspberrypi-power to turn on USB power
128
129 Use the raspberrypi-power driver to turn on USB power.
130
131 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
132
133 BCM270X_DT: Add a .dtbo target, use for overlays
134
135 Change the filenames and extensions to keep the pre-DDT style of
136 overlay (<name>-overlay.dtb) distinct from new ones that use a
137 different style of local fixups (<name>.dtbo), and to match other
138 platforms.
139
140 The RPi firmware uses the DDTK trailer atom to choose which type of
141 overlay to use for each kernel.
142
143 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
144
145 BCM270X_DT: Don't generate "linux,phandle" props
146
147 The EPAPR standard says to use "phandle" properties to store phandles,
148 rather than the deprecated "linux,phandle" version. By default, dtc
149 generates both, but adding "-H epapr" causes it to only generate
150 "phandle"s, saving some space and clutter.
151
152 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
153
154 BCM270X_DT: Add overlay for enc28j60 on SPI2
155
156 Works on SPI2 for compute module
157
158 BCM270X_DT: Add midi-uart0 overlay
159
160 MIDI requires 31.25kbaud, a baudrate unsupported by Linux. The
161 midi-uart0 overlay configures uart0 (ttyAMA0) to use a fake clock
162 so that requesting 38.4kbaud actually gets 31.25kbaud.
163
164 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
165
166 BCM270X_DT: Add i2c-sensor overlay
167
168 The i2c-sensor overlay is a container for various pressure and
169 temperature sensors, currently bmp085 and bmp280. The standalone
170 bmp085_i2c-sensor overlay is now deprecated.
171
172 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
173
174 BCM270X_DT: overlays/*-overlay.dtb -> overlays/*.dtbo (#1752)
175
176 We now create overlays as .dtbo files.
177
178 build: support for .dtbo files for dtb overlays
179
180 Kernel 4.4.6+ on RaspberryPi support .dtbo files for overlays, instead of .dtb.
181 Patch the kernel, which has faulty rules to generate .dtbo the way yocto does
182
183 Signed-off-by: Herve Jourdain <herve.jourdain@neuf.fr>
184 Signed-off-by: Khem Raj <raj.khem@gmail.com>
185
186 BCM270X: Drop position requirement for CMA in VC4 overlay.
187
188 No longer necessary since 2aefcd576195a739a7a256099571c9c4a401005f,
189 and will probably let peeople that want to choose a larger CMA
190 allocation (particularly on pi0/1).
191
192 Signed-off-by: Eric Anholt <eric@anholt.net>
193
194 BCM270X_DT: RPi Device Tree tidy
195
196 Use the upstream sdhost node, add thermal-zones, and factor out some
197 common elements.
198
199 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
200
201 kbuild: Silence unhelpful DTC warnings
202
203 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
204
205 BCM270X_DT: DT build rules no longer arch-specific
206
207 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
208 ---
209 .gitignore | 1 +
210 arch/arm/boot/dts/Makefile | 27 +-
211 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 124 +
212 arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts | 127 +
213 arch/arm/boot/dts/bcm2708-rpi-b.dts | 114 +
214 arch/arm/boot/dts/bcm2708-rpi-bt.dtsi | 26 +
215 arch/arm/boot/dts/bcm2708-rpi-cm.dts | 97 +
216 arch/arm/boot/dts/bcm2708-rpi-cm.dtsi | 18 +
217 arch/arm/boot/dts/bcm2708-rpi-zero-w.dts | 163 +
218 arch/arm/boot/dts/bcm2708-rpi-zero.dts | 117 +
219 arch/arm/boot/dts/bcm2708-rpi.dtsi | 36 +
220 arch/arm/boot/dts/bcm2708.dtsi | 12 +
221 arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 124 +
222 arch/arm/boot/dts/bcm2709-rpi.dtsi | 5 +
223 arch/arm/boot/dts/bcm2709.dtsi | 22 +
224 arch/arm/boot/dts/bcm270x-rpi.dtsi | 154 +
225 arch/arm/boot/dts/bcm270x.dtsi | 197 ++
226 arch/arm/boot/dts/bcm2710-rpi-2-b.dts | 124 +
227 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 196 ++
228 arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 198 ++
229 arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 133 +
230 arch/arm/boot/dts/bcm2710.dtsi | 29 +
231 arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 306 +-
232 arch/arm/boot/dts/bcm2711-rpi-cm4.dts | 609 ++++
233 arch/arm/boot/dts/bcm2711-rpi.dtsi | 201 ++
234 arch/arm/boot/dts/bcm2711.dtsi | 34 +-
235 arch/arm/boot/dts/bcm271x-rpi-bt.dtsi | 26 +
236 arch/arm/boot/dts/bcm2835-common.dtsi | 4 +-
237 arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 5 +
238 arch/arm/boot/dts/bcm2835-rpi-a.dts | 7 +
239 arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 5 +
240 arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 7 +
241 arch/arm/boot/dts/bcm2835-rpi-b.dts | 7 +
242 arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts | 5 +
243 arch/arm/boot/dts/bcm2835-rpi-zero-w.dts | 5 +
244 arch/arm/boot/dts/bcm2835-rpi-zero.dts | 5 +
245 arch/arm/boot/dts/bcm2835-rpi.dtsi | 15 +-
246 arch/arm/boot/dts/bcm2835.dtsi | 2 +-
247 arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 5 +
248 arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts | 5 +
249 arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts | 5 +
250 arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 5 +
251 arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts | 5 +
252 arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi | 4 +
253 arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi | 4 +
254 arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi | 4 +
255 .../boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi | 4 +
256 .../boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi | 4 +
257 .../boot/dts/bcm283x-rpi-usb-peripheral.dtsi | 7 -
258 arch/arm/boot/dts/bcm283x.dtsi | 26 +-
259 arch/arm/boot/dts/overlays/Makefile | 216 ++
260 arch/arm/boot/dts/overlays/README | 3040 +++++++++++++++++
261 .../arm/boot/dts/overlays/act-led-overlay.dts | 27 +
262 .../boot/dts/overlays/adafruit18-overlay.dts | 55 +
263 .../dts/overlays/adau1977-adc-overlay.dts | 40 +
264 .../dts/overlays/adau7002-simple-overlay.dts | 52 +
265 .../arm/boot/dts/overlays/ads1015-overlay.dts | 98 +
266 .../arm/boot/dts/overlays/ads1115-overlay.dts | 103 +
267 .../arm/boot/dts/overlays/ads7846-overlay.dts | 89 +
268 .../boot/dts/overlays/adv7282m-overlay.dts | 65 +
269 .../boot/dts/overlays/adv728x-m-overlay.dts | 37 +
270 .../overlays/akkordion-iqdacplus-overlay.dts | 49 +
271 .../allo-boss-dac-pcm512x-audio-overlay.dts | 59 +
272 .../dts/overlays/allo-digione-overlay.dts | 44 +
273 .../allo-katana-dac-audio-overlay.dts | 57 +
274 .../allo-piano-dac-pcm512x-audio-overlay.dts | 54 +
275 ...o-piano-dac-plus-pcm512x-audio-overlay.dts | 55 +
276 arch/arm/boot/dts/overlays/anyspi-overlay.dts | 205 ++
277 .../boot/dts/overlays/apds9960-overlay.dts | 57 +
278 .../boot/dts/overlays/applepi-dac-overlay.dts | 57 +
279 .../boot/dts/overlays/at86rf233-overlay.dts | 57 +
280 .../overlays/audioinjector-addons-overlay.dts | 60 +
281 ...dioinjector-isolated-soundcard-overlay.dts | 55 +
282 .../overlays/audioinjector-ultra-overlay.dts | 71 +
283 .../audioinjector-wm8731-audio-overlay.dts | 39 +
284 .../dts/overlays/audiosense-pi-overlay.dts | 82 +
285 .../boot/dts/overlays/audremap-overlay.dts | 35 +
286 .../boot/dts/overlays/balena-fin-overlay.dts | 125 +
287 arch/arm/boot/dts/overlays/cma-overlay.dts | 36 +
288 arch/arm/boot/dts/overlays/dht11-overlay.dts | 41 +
289 .../dts/overlays/dionaudio-loco-overlay.dts | 39 +
290 .../overlays/dionaudio-loco-v2-overlay.dts | 49 +
291 .../boot/dts/overlays/disable-bt-overlay.dts | 64 +
292 .../dts/overlays/disable-wifi-overlay.dts | 20 +
293 arch/arm/boot/dts/overlays/dpi18-overlay.dts | 39 +
294 arch/arm/boot/dts/overlays/dpi24-overlay.dts | 39 +
295 arch/arm/boot/dts/overlays/draws-overlay.dts | 208 ++
296 .../arm/boot/dts/overlays/dwc-otg-overlay.dts | 14 +
297 arch/arm/boot/dts/overlays/dwc2-overlay.dts | 26 +
298 .../boot/dts/overlays/enc28j60-overlay.dts | 53 +
299 .../dts/overlays/enc28j60-spi2-overlay.dts | 47 +
300 .../arm/boot/dts/overlays/exc3000-overlay.dts | 48 +
301 .../boot/dts/overlays/fe-pi-audio-overlay.dts | 70 +
302 .../boot/dts/overlays/fsm-demo-overlay.dts | 104 +
303 .../boot/dts/overlays/ghost-amp-overlay.dts | 119 +
304 arch/arm/boot/dts/overlays/goodix-overlay.dts | 46 +
305 .../googlevoicehat-soundcard-overlay.dts | 49 +
306 .../boot/dts/overlays/gpio-fan-overlay.dts | 79 +
307 .../arm/boot/dts/overlays/gpio-ir-overlay.dts | 49 +
308 .../boot/dts/overlays/gpio-ir-tx-overlay.dts | 36 +
309 .../boot/dts/overlays/gpio-key-overlay.dts | 48 +
310 .../overlays/gpio-no-bank0-irq-overlay.dts | 14 +
311 .../boot/dts/overlays/gpio-no-irq-overlay.dts | 14 +
312 .../dts/overlays/gpio-poweroff-overlay.dts | 37 +
313 .../dts/overlays/gpio-shutdown-overlay.dts | 84 +
314 .../boot/dts/overlays/hd44780-lcd-overlay.dts | 46 +
315 .../hdmi-backlight-hwhack-gpio-overlay.dts | 47 +
316 .../dts/overlays/hifiberry-amp-overlay.dts | 39 +
317 .../dts/overlays/hifiberry-dac-overlay.dts | 34 +
318 .../overlays/hifiberry-dacplus-overlay.dts | 65 +
319 .../overlays/hifiberry-dacplusadc-overlay.dts | 72 +
320 .../hifiberry-dacplusadcpro-overlay.dts | 65 +
321 .../overlays/hifiberry-dacplusdsp-overlay.dts | 34 +
322 .../overlays/hifiberry-dacplushd-overlay.dts | 106 +
323 .../dts/overlays/hifiberry-digi-overlay.dts | 41 +
324 .../overlays/hifiberry-digi-pro-overlay.dts | 43 +
325 .../boot/dts/overlays/highperi-overlay.dts | 63 +
326 arch/arm/boot/dts/overlays/hy28a-overlay.dts | 93 +
327 .../boot/dts/overlays/hy28b-2017-overlay.dts | 152 +
328 arch/arm/boot/dts/overlays/hy28b-overlay.dts | 148 +
329 .../boot/dts/overlays/i-sabre-q2m-overlay.dts | 39 +
330 .../boot/dts/overlays/i2c-bcm2708-overlay.dts | 13 +
331 .../boot/dts/overlays/i2c-gpio-overlay.dts | 47 +
332 .../arm/boot/dts/overlays/i2c-mux-overlay.dts | 139 +
333 .../dts/overlays/i2c-pwm-pca9685a-overlay.dts | 26 +
334 .../dts/overlays/i2c-rtc-gpio-overlay.dts | 266 ++
335 .../arm/boot/dts/overlays/i2c-rtc-overlay.dts | 278 ++
336 .../boot/dts/overlays/i2c-sensor-overlay.dts | 271 ++
337 arch/arm/boot/dts/overlays/i2c0-overlay.dts | 74 +
338 arch/arm/boot/dts/overlays/i2c1-overlay.dts | 44 +
339 arch/arm/boot/dts/overlays/i2c3-overlay.dts | 36 +
340 arch/arm/boot/dts/overlays/i2c4-overlay.dts | 36 +
341 arch/arm/boot/dts/overlays/i2c5-overlay.dts | 36 +
342 arch/arm/boot/dts/overlays/i2c6-overlay.dts | 36 +
343 .../dts/overlays/i2s-gpio28-31-overlay.dts | 18 +
344 .../boot/dts/overlays/ilitek251x-overlay.dts | 45 +
345 arch/arm/boot/dts/overlays/imx219-overlay.dts | 119 +
346 arch/arm/boot/dts/overlays/imx290-overlay.dts | 32 +
347 .../boot/dts/overlays/imx290_327-overlay.dtsi | 145 +
348 arch/arm/boot/dts/overlays/imx477-overlay.dts | 119 +
349 .../dts/overlays/iqaudio-codec-overlay.dts | 42 +
350 .../boot/dts/overlays/iqaudio-dac-overlay.dts | 46 +
351 .../dts/overlays/iqaudio-dacplus-overlay.dts | 49 +
352 .../iqaudio-digi-wm8804-audio-overlay.dts | 47 +
353 .../arm/boot/dts/overlays/irs1125-overlay.dts | 85 +
354 .../dts/overlays/jedec-spi-nor-overlay.dts | 309 ++
355 .../dts/overlays/justboom-both-overlay.dts | 65 +
356 .../dts/overlays/justboom-dac-overlay.dts | 46 +
357 .../dts/overlays/justboom-digi-overlay.dts | 41 +
358 .../arm/boot/dts/overlays/ltc294x-overlay.dts | 86 +
359 .../boot/dts/overlays/max98357a-overlay.dts | 84 +
360 .../boot/dts/overlays/maxtherm-overlay.dts | 166 +
361 .../boot/dts/overlays/mbed-dac-overlay.dts | 64 +
362 .../boot/dts/overlays/mcp23017-overlay.dts | 69 +
363 .../boot/dts/overlays/mcp23s17-overlay.dts | 732 ++++
364 .../dts/overlays/mcp2515-can0-overlay.dts | 73 +
365 .../dts/overlays/mcp2515-can1-overlay.dts | 73 +
366 .../arm/boot/dts/overlays/mcp3008-overlay.dts | 205 ++
367 .../arm/boot/dts/overlays/mcp3202-overlay.dts | 205 ++
368 .../arm/boot/dts/overlays/mcp342x-overlay.dts | 164 +
369 .../dts/overlays/media-center-overlay.dts | 134 +
370 .../boot/dts/overlays/merus-amp-overlay.dts | 60 +
371 .../boot/dts/overlays/midi-uart0-overlay.dts | 36 +
372 .../boot/dts/overlays/midi-uart1-overlay.dts | 43 +
373 .../boot/dts/overlays/miniuart-bt-overlay.dts | 93 +
374 arch/arm/boot/dts/overlays/mmc-overlay.dts | 46 +
375 .../arm/boot/dts/overlays/mpu6050-overlay.dts | 28 +
376 .../arm/boot/dts/overlays/mz61581-overlay.dts | 117 +
377 arch/arm/boot/dts/overlays/ov5647-overlay.dts | 92 +
378 arch/arm/boot/dts/overlays/ov7251-overlay.dts | 111 +
379 arch/arm/boot/dts/overlays/ov9281-overlay.dts | 111 +
380 arch/arm/boot/dts/overlays/overlay_map.dts | 141 +
381 .../arm/boot/dts/overlays/papirus-overlay.dts | 89 +
382 .../arm/boot/dts/overlays/pca953x-overlay.dts | 240 ++
383 arch/arm/boot/dts/overlays/pibell-overlay.dts | 81 +
384 .../dts/overlays/pifacedigital-overlay.dts | 144 +
385 arch/arm/boot/dts/overlays/piglow-overlay.dts | 97 +
386 .../boot/dts/overlays/piscreen-overlay.dts | 102 +
387 .../boot/dts/overlays/piscreen2r-overlay.dts | 106 +
388 .../arm/boot/dts/overlays/pisound-overlay.dts | 120 +
389 .../arm/boot/dts/overlays/pitft22-overlay.dts | 69 +
390 .../overlays/pitft28-capacitive-overlay.dts | 91 +
391 .../overlays/pitft28-resistive-overlay.dts | 119 +
392 .../overlays/pitft35-resistive-overlay.dts | 119 +
393 .../boot/dts/overlays/pps-gpio-overlay.dts | 38 +
394 .../boot/dts/overlays/pwm-2chan-overlay.dts | 49 +
395 .../boot/dts/overlays/pwm-ir-tx-overlay.dts | 40 +
396 arch/arm/boot/dts/overlays/pwm-overlay.dts | 45 +
397 .../arm/boot/dts/overlays/qca7000-overlay.dts | 55 +
398 .../dts/overlays/rotary-encoder-overlay.dts | 59 +
399 .../dts/overlays/rpi-backlight-overlay.dts | 21 +
400 .../overlays/rpi-cirrus-wm5102-overlay.dts | 172 +
401 .../arm/boot/dts/overlays/rpi-dac-overlay.dts | 34 +
402 .../boot/dts/overlays/rpi-display-overlay.dts | 91 +
403 .../boot/dts/overlays/rpi-ft5406-overlay.dts | 25 +
404 .../arm/boot/dts/overlays/rpi-poe-overlay.dts | 95 +
405 .../boot/dts/overlays/rpi-proto-overlay.dts | 39 +
406 .../boot/dts/overlays/rpi-sense-overlay.dts | 47 +
407 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts | 34 +
408 .../boot/dts/overlays/rpivid-v4l2-overlay.dts | 61 +
409 .../rra-digidac1-wm8741-audio-overlay.dts | 49 +
410 .../boot/dts/overlays/sainsmart18-overlay.dts | 52 +
411 .../dts/overlays/sc16is750-i2c-overlay.dts | 43 +
412 .../dts/overlays/sc16is752-i2c-overlay.dts | 43 +
413 .../dts/overlays/sc16is752-spi0-overlay.dts | 49 +
414 .../dts/overlays/sc16is752-spi1-overlay.dts | 67 +
415 arch/arm/boot/dts/overlays/sdhost-overlay.dts | 38 +
416 arch/arm/boot/dts/overlays/sdio-overlay.dts | 77 +
417 .../arm/boot/dts/overlays/sdtweak-overlay.dts | 25 +
418 .../boot/dts/overlays/sh1106-spi-overlay.dts | 84 +
419 .../arm/boot/dts/overlays/smi-dev-overlay.dts | 20 +
420 .../boot/dts/overlays/smi-nand-overlay.dts | 66 +
421 arch/arm/boot/dts/overlays/smi-overlay.dts | 37 +
422 .../dts/overlays/spi-gpio35-39-overlay.dts | 31 +
423 .../dts/overlays/spi-gpio40-45-overlay.dts | 36 +
424 .../arm/boot/dts/overlays/spi-rtc-overlay.dts | 33 +
425 .../boot/dts/overlays/spi0-1cs-overlay.dts | 42 +
426 .../boot/dts/overlays/spi0-2cs-overlay.dts | 37 +
427 .../boot/dts/overlays/spi1-1cs-overlay.dts | 57 +
428 .../boot/dts/overlays/spi1-2cs-overlay.dts | 69 +
429 .../boot/dts/overlays/spi1-3cs-overlay.dts | 81 +
430 .../boot/dts/overlays/spi2-1cs-overlay.dts | 57 +
431 .../boot/dts/overlays/spi2-2cs-overlay.dts | 69 +
432 .../boot/dts/overlays/spi2-3cs-overlay.dts | 81 +
433 .../boot/dts/overlays/spi3-1cs-overlay.dts | 44 +
434 .../boot/dts/overlays/spi3-2cs-overlay.dts | 56 +
435 .../boot/dts/overlays/spi4-1cs-overlay.dts | 44 +
436 .../boot/dts/overlays/spi4-2cs-overlay.dts | 56 +
437 .../boot/dts/overlays/spi5-1cs-overlay.dts | 44 +
438 .../boot/dts/overlays/spi5-2cs-overlay.dts | 56 +
439 .../boot/dts/overlays/spi6-1cs-overlay.dts | 44 +
440 .../boot/dts/overlays/spi6-2cs-overlay.dts | 56 +
441 .../arm/boot/dts/overlays/ssd1306-overlay.dts | 36 +
442 .../boot/dts/overlays/ssd1306-spi-overlay.dts | 84 +
443 .../boot/dts/overlays/ssd1351-spi-overlay.dts | 83 +
444 .../dts/overlays/superaudioboard-overlay.dts | 73 +
445 arch/arm/boot/dts/overlays/sx150x-overlay.dts | 1706 +++++++++
446 .../dts/overlays/tc358743-audio-overlay.dts | 52 +
447 .../boot/dts/overlays/tc358743-overlay.dts | 107 +
448 .../boot/dts/overlays/tinylcd35-overlay.dts | 222 ++
449 .../boot/dts/overlays/tpm-slb9670-overlay.dts | 44 +
450 arch/arm/boot/dts/overlays/uart0-overlay.dts | 32 +
451 arch/arm/boot/dts/overlays/uart1-overlay.dts | 38 +
452 arch/arm/boot/dts/overlays/uart2-overlay.dts | 27 +
453 arch/arm/boot/dts/overlays/uart3-overlay.dts | 27 +
454 arch/arm/boot/dts/overlays/uart4-overlay.dts | 27 +
455 arch/arm/boot/dts/overlays/uart5-overlay.dts | 27 +
456 arch/arm/boot/dts/overlays/udrc-overlay.dts | 128 +
457 .../boot/dts/overlays/upstream-overlay.dts | 113 +
458 .../dts/overlays/upstream-pi4-overlay.dts | 161 +
459 .../dts/overlays/vc4-fkms-v3d-overlay.dts | 40 +
460 .../overlays/vc4-kms-kippah-7inch-overlay.dts | 43 +
461 .../boot/dts/overlays/vc4-kms-v3d-overlay.dts | 122 +
462 .../dts/overlays/vc4-kms-v3d-pi4-overlay.dts | 186 +
463 arch/arm/boot/dts/overlays/vga666-overlay.dts | 30 +
464 .../arm/boot/dts/overlays/w1-gpio-overlay.dts | 40 +
465 .../dts/overlays/w1-gpio-pullup-overlay.dts | 42 +
466 arch/arm/boot/dts/overlays/w5500-overlay.dts | 63 +
467 .../arm/boot/dts/overlays/wittypi-overlay.dts | 44 +
468 arch/arm64/boot/dts/Makefile | 2 +
469 arch/arm64/boot/dts/broadcom/Makefile | 16 +-
470 .../boot/dts/broadcom/bcm2710-rpi-2-b.dts | 3 +
471 .../dts/broadcom/bcm2710-rpi-3-b-plus.dts | 3 +
472 .../boot/dts/broadcom/bcm2710-rpi-3-b.dts | 3 +
473 .../boot/dts/broadcom/bcm2710-rpi-cm3.dts | 3 +
474 .../boot/dts/broadcom/bcm2711-rpi-4-b.dts | 5 +-
475 .../dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi | 1 +
476 .../dts/broadcom/bcm283x-rpi-lan7515.dtsi | 1 +
477 arch/arm64/boot/dts/overlays | 1 +
478 scripts/Makefile.dtbinst | 6 +-
479 scripts/Makefile.lib | 13 +
480 271 files changed, 23898 insertions(+), 31 deletions(-)
481 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
482 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts
483 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b.dts
484 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-bt.dtsi
485 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dts
486 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
487 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
488 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-zero.dts
489 create mode 100644 arch/arm/boot/dts/bcm2708-rpi.dtsi
490 create mode 100644 arch/arm/boot/dts/bcm2708.dtsi
491 create mode 100644 arch/arm/boot/dts/bcm2709-rpi-2-b.dts
492 create mode 100644 arch/arm/boot/dts/bcm2709-rpi.dtsi
493 create mode 100644 arch/arm/boot/dts/bcm2709.dtsi
494 create mode 100644 arch/arm/boot/dts/bcm270x-rpi.dtsi
495 create mode 100644 arch/arm/boot/dts/bcm270x.dtsi
496 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-2-b.dts
497 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
498 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b.dts
499 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-cm3.dts
500 create mode 100644 arch/arm/boot/dts/bcm2710.dtsi
501 create mode 100644 arch/arm/boot/dts/bcm2711-rpi-cm4.dts
502 create mode 100644 arch/arm/boot/dts/bcm2711-rpi.dtsi
503 create mode 100644 arch/arm/boot/dts/bcm271x-rpi-bt.dtsi
504 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi
505 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
506 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi
507 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi
508 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi
509 delete mode 100644 arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
510 create mode 100644 arch/arm/boot/dts/overlays/Makefile
511 create mode 100644 arch/arm/boot/dts/overlays/README
512 create mode 100644 arch/arm/boot/dts/overlays/act-led-overlay.dts
513 create mode 100644 arch/arm/boot/dts/overlays/adafruit18-overlay.dts
514 create mode 100644 arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
515 create mode 100644 arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
516 create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts
517 create mode 100644 arch/arm/boot/dts/overlays/ads1115-overlay.dts
518 create mode 100644 arch/arm/boot/dts/overlays/ads7846-overlay.dts
519 create mode 100644 arch/arm/boot/dts/overlays/adv7282m-overlay.dts
520 create mode 100644 arch/arm/boot/dts/overlays/adv728x-m-overlay.dts
521 create mode 100644 arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
522 create mode 100644 arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
523 create mode 100644 arch/arm/boot/dts/overlays/allo-digione-overlay.dts
524 create mode 100644 arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
525 create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
526 create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
527 create mode 100755 arch/arm/boot/dts/overlays/anyspi-overlay.dts
528 create mode 100644 arch/arm/boot/dts/overlays/apds9960-overlay.dts
529 create mode 100644 arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
530 create mode 100644 arch/arm/boot/dts/overlays/at86rf233-overlay.dts
531 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
532 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts
533 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
534 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
535 create mode 100644 arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
536 create mode 100644 arch/arm/boot/dts/overlays/audremap-overlay.dts
537 create mode 100644 arch/arm/boot/dts/overlays/balena-fin-overlay.dts
538 create mode 100644 arch/arm/boot/dts/overlays/cma-overlay.dts
539 create mode 100644 arch/arm/boot/dts/overlays/dht11-overlay.dts
540 create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
541 create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
542 create mode 100644 arch/arm/boot/dts/overlays/disable-bt-overlay.dts
543 create mode 100644 arch/arm/boot/dts/overlays/disable-wifi-overlay.dts
544 create mode 100644 arch/arm/boot/dts/overlays/dpi18-overlay.dts
545 create mode 100644 arch/arm/boot/dts/overlays/dpi24-overlay.dts
546 create mode 100644 arch/arm/boot/dts/overlays/draws-overlay.dts
547 create mode 100644 arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
548 create mode 100644 arch/arm/boot/dts/overlays/dwc2-overlay.dts
549 create mode 100644 arch/arm/boot/dts/overlays/enc28j60-overlay.dts
550 create mode 100644 arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
551 create mode 100644 arch/arm/boot/dts/overlays/exc3000-overlay.dts
552 create mode 100644 arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
553 create mode 100644 arch/arm/boot/dts/overlays/fsm-demo-overlay.dts
554 create mode 100644 arch/arm/boot/dts/overlays/ghost-amp-overlay.dts
555 create mode 100644 arch/arm/boot/dts/overlays/goodix-overlay.dts
556 create mode 100644 arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
557 create mode 100644 arch/arm/boot/dts/overlays/gpio-fan-overlay.dts
558 create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
559 create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
560 create mode 100644 arch/arm/boot/dts/overlays/gpio-key-overlay.dts
561 create mode 100755 arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts
562 create mode 100644 arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
563 create mode 100644 arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
564 create mode 100644 arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
565 create mode 100644 arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts
566 create mode 100644 arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts
567 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
568 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
569 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
570 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
571 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
572 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
573 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
574 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
575 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
576 create mode 100644 arch/arm/boot/dts/overlays/highperi-overlay.dts
577 create mode 100644 arch/arm/boot/dts/overlays/hy28a-overlay.dts
578 create mode 100644 arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts
579 create mode 100644 arch/arm/boot/dts/overlays/hy28b-overlay.dts
580 create mode 100644 arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
581 create mode 100644 arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
582 create mode 100644 arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
583 create mode 100644 arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
584 create mode 100644 arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
585 create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
586 create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
587 create mode 100644 arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
588 create mode 100644 arch/arm/boot/dts/overlays/i2c0-overlay.dts
589 create mode 100644 arch/arm/boot/dts/overlays/i2c1-overlay.dts
590 create mode 100644 arch/arm/boot/dts/overlays/i2c3-overlay.dts
591 create mode 100644 arch/arm/boot/dts/overlays/i2c4-overlay.dts
592 create mode 100644 arch/arm/boot/dts/overlays/i2c5-overlay.dts
593 create mode 100644 arch/arm/boot/dts/overlays/i2c6-overlay.dts
594 create mode 100644 arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
595 create mode 100644 arch/arm/boot/dts/overlays/ilitek251x-overlay.dts
596 create mode 100644 arch/arm/boot/dts/overlays/imx219-overlay.dts
597 create mode 100644 arch/arm/boot/dts/overlays/imx290-overlay.dts
598 create mode 100644 arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi
599 create mode 100644 arch/arm/boot/dts/overlays/imx477-overlay.dts
600 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
601 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
602 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
603 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
604 create mode 100644 arch/arm/boot/dts/overlays/irs1125-overlay.dts
605 create mode 100644 arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
606 create mode 100644 arch/arm/boot/dts/overlays/justboom-both-overlay.dts
607 create mode 100644 arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
608 create mode 100644 arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
609 create mode 100644 arch/arm/boot/dts/overlays/ltc294x-overlay.dts
610 create mode 100644 arch/arm/boot/dts/overlays/max98357a-overlay.dts
611 create mode 100644 arch/arm/boot/dts/overlays/maxtherm-overlay.dts
612 create mode 100644 arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
613 create mode 100644 arch/arm/boot/dts/overlays/mcp23017-overlay.dts
614 create mode 100644 arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
615 create mode 100755 arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
616 create mode 100644 arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
617 create mode 100755 arch/arm/boot/dts/overlays/mcp3008-overlay.dts
618 create mode 100755 arch/arm/boot/dts/overlays/mcp3202-overlay.dts
619 create mode 100644 arch/arm/boot/dts/overlays/mcp342x-overlay.dts
620 create mode 100644 arch/arm/boot/dts/overlays/media-center-overlay.dts
621 create mode 100644 arch/arm/boot/dts/overlays/merus-amp-overlay.dts
622 create mode 100644 arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
623 create mode 100644 arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
624 create mode 100644 arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts
625 create mode 100644 arch/arm/boot/dts/overlays/mmc-overlay.dts
626 create mode 100644 arch/arm/boot/dts/overlays/mpu6050-overlay.dts
627 create mode 100644 arch/arm/boot/dts/overlays/mz61581-overlay.dts
628 create mode 100644 arch/arm/boot/dts/overlays/ov5647-overlay.dts
629 create mode 100644 arch/arm/boot/dts/overlays/ov7251-overlay.dts
630 create mode 100644 arch/arm/boot/dts/overlays/ov9281-overlay.dts
631 create mode 100644 arch/arm/boot/dts/overlays/overlay_map.dts
632 create mode 100644 arch/arm/boot/dts/overlays/papirus-overlay.dts
633 create mode 100644 arch/arm/boot/dts/overlays/pca953x-overlay.dts
634 create mode 100644 arch/arm/boot/dts/overlays/pibell-overlay.dts
635 create mode 100644 arch/arm/boot/dts/overlays/pifacedigital-overlay.dts
636 create mode 100644 arch/arm/boot/dts/overlays/piglow-overlay.dts
637 create mode 100644 arch/arm/boot/dts/overlays/piscreen-overlay.dts
638 create mode 100644 arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
639 create mode 100644 arch/arm/boot/dts/overlays/pisound-overlay.dts
640 create mode 100644 arch/arm/boot/dts/overlays/pitft22-overlay.dts
641 create mode 100644 arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
642 create mode 100644 arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
643 create mode 100644 arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
644 create mode 100644 arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
645 create mode 100644 arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
646 create mode 100644 arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
647 create mode 100644 arch/arm/boot/dts/overlays/pwm-overlay.dts
648 create mode 100644 arch/arm/boot/dts/overlays/qca7000-overlay.dts
649 create mode 100644 arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
650 create mode 100644 arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
651 create mode 100644 arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
652 create mode 100644 arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
653 create mode 100644 arch/arm/boot/dts/overlays/rpi-display-overlay.dts
654 create mode 100644 arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
655 create mode 100644 arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
656 create mode 100644 arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
657 create mode 100644 arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
658 create mode 100644 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
659 create mode 100644 arch/arm/boot/dts/overlays/rpivid-v4l2-overlay.dts
660 create mode 100644 arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
661 create mode 100644 arch/arm/boot/dts/overlays/sainsmart18-overlay.dts
662 create mode 100644 arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
663 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
664 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts
665 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
666 create mode 100644 arch/arm/boot/dts/overlays/sdhost-overlay.dts
667 create mode 100644 arch/arm/boot/dts/overlays/sdio-overlay.dts
668 create mode 100644 arch/arm/boot/dts/overlays/sdtweak-overlay.dts
669 create mode 100644 arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts
670 create mode 100644 arch/arm/boot/dts/overlays/smi-dev-overlay.dts
671 create mode 100644 arch/arm/boot/dts/overlays/smi-nand-overlay.dts
672 create mode 100644 arch/arm/boot/dts/overlays/smi-overlay.dts
673 create mode 100644 arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
674 create mode 100644 arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
675 create mode 100644 arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
676 create mode 100644 arch/arm/boot/dts/overlays/spi0-1cs-overlay.dts
677 create mode 100644 arch/arm/boot/dts/overlays/spi0-2cs-overlay.dts
678 create mode 100644 arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
679 create mode 100644 arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
680 create mode 100644 arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
681 create mode 100644 arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
682 create mode 100644 arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
683 create mode 100644 arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
684 create mode 100644 arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
685 create mode 100644 arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
686 create mode 100644 arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
687 create mode 100644 arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
688 create mode 100644 arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
689 create mode 100644 arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
690 create mode 100644 arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
691 create mode 100644 arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
692 create mode 100644 arch/arm/boot/dts/overlays/ssd1306-overlay.dts
693 create mode 100644 arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts
694 create mode 100644 arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts
695 create mode 100755 arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
696 create mode 100644 arch/arm/boot/dts/overlays/sx150x-overlay.dts
697 create mode 100644 arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
698 create mode 100644 arch/arm/boot/dts/overlays/tc358743-overlay.dts
699 create mode 100644 arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
700 create mode 100644 arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts
701 create mode 100755 arch/arm/boot/dts/overlays/uart0-overlay.dts
702 create mode 100644 arch/arm/boot/dts/overlays/uart1-overlay.dts
703 create mode 100644 arch/arm/boot/dts/overlays/uart2-overlay.dts
704 create mode 100644 arch/arm/boot/dts/overlays/uart3-overlay.dts
705 create mode 100644 arch/arm/boot/dts/overlays/uart4-overlay.dts
706 create mode 100644 arch/arm/boot/dts/overlays/uart5-overlay.dts
707 create mode 100644 arch/arm/boot/dts/overlays/udrc-overlay.dts
708 create mode 100644 arch/arm/boot/dts/overlays/upstream-overlay.dts
709 create mode 100644 arch/arm/boot/dts/overlays/upstream-pi4-overlay.dts
710 create mode 100644 arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
711 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts
712 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
713 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-pi4-overlay.dts
714 create mode 100644 arch/arm/boot/dts/overlays/vga666-overlay.dts
715 create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
716 create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
717 create mode 100644 arch/arm/boot/dts/overlays/w5500-overlay.dts
718 create mode 100644 arch/arm/boot/dts/overlays/wittypi-overlay.dts
719 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts
720 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
721 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts
722 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts
723 create mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi
724 create mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
725 create mode 120000 arch/arm64/boot/dts/overlays
726
727 diff --git a/.gitignore b/.gitignore
728 index 67d2f3503128..8b0b16eeca88 100644
729 --- a/.gitignore
730 +++ b/.gitignore
731 @@ -18,6 +18,7 @@
732 *.c.[012]*.*
733 *.dt.yaml
734 *.dtb
735 +*.dtbo
736 *.dtb.S
737 *.dwo
738 *.elf
739 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
740 index ce66ffd5a1bb..87241fe26e10 100644
741 --- a/arch/arm/boot/dts/Makefile
742 +++ b/arch/arm/boot/dts/Makefile
743 @@ -1,4 +1,20 @@
744 # SPDX-License-Identifier: GPL-2.0
745 +
746 +dtb-$(CONFIG_ARCH_BCM2835) += \
747 + bcm2708-rpi-b.dtb \
748 + bcm2708-rpi-b-rev1.dtb \
749 + bcm2708-rpi-b-plus.dtb \
750 + bcm2708-rpi-cm.dtb \
751 + bcm2708-rpi-zero.dtb \
752 + bcm2708-rpi-zero-w.dtb \
753 + bcm2709-rpi-2-b.dtb \
754 + bcm2710-rpi-2-b.dtb \
755 + bcm2710-rpi-3-b.dtb \
756 + bcm2711-rpi-4-b.dtb \
757 + bcm2710-rpi-3-b-plus.dtb \
758 + bcm2710-rpi-cm3.dtb \
759 + bcm2711-rpi-cm4.dtb
760 +
761 dtb-$(CONFIG_ARCH_ALPINE) += \
762 alpine-db.dtb
763 dtb-$(CONFIG_MACH_ARTPEC6) += \
764 @@ -92,7 +108,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
765 bcm2837-rpi-3-b.dtb \
766 bcm2837-rpi-3-b-plus.dtb \
767 bcm2837-rpi-cm3-io3.dtb \
768 - bcm2711-rpi-4-b.dtb \
769 bcm2835-rpi-zero.dtb \
770 bcm2835-rpi-zero-w.dtb
771 dtb-$(CONFIG_ARCH_BCM_5301X) += \
772 @@ -1408,3 +1423,13 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
773 aspeed-bmc-opp-zaius.dtb \
774 aspeed-bmc-portwell-neptune.dtb \
775 aspeed-bmc-quanta-q71l.dtb
776 +
777 +targets += dtbs dtbs_install
778 +targets += $(dtb-y)
779 +
780 +subdir-y := overlays
781 +
782 +# Enable fixups to support overlays on BCM2835 platforms
783 +ifeq ($(CONFIG_ARCH_BCM2835),y)
784 + DTC_FLAGS ?= -@
785 +endif
786 diff --git a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
787 new file mode 100644
788 index 000000000000..98581eec4bdc
789 --- /dev/null
790 +++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
791 @@ -0,0 +1,124 @@
792 +/dts-v1/;
793 +
794 +#include "bcm2708.dtsi"
795 +#include "bcm2708-rpi.dtsi"
796 +#include "bcm283x-rpi-smsc9514.dtsi"
797 +#include "bcm283x-rpi-csi1-2lane.dtsi"
798 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
799 +
800 +/ {
801 + compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
802 + model = "Raspberry Pi Model B+";
803 +};
804 +
805 +&gpio {
806 + spi0_pins: spi0_pins {
807 + brcm,pins = <9 10 11>;
808 + brcm,function = <4>; /* alt0 */
809 + };
810 +
811 + spi0_cs_pins: spi0_cs_pins {
812 + brcm,pins = <8 7>;
813 + brcm,function = <1>; /* output */
814 + };
815 +
816 + i2c0_pins: i2c0 {
817 + brcm,pins = <0 1>;
818 + brcm,function = <4>;
819 + };
820 +
821 + i2c1_pins: i2c1 {
822 + brcm,pins = <2 3>;
823 + brcm,function = <4>;
824 + };
825 +
826 + i2s_pins: i2s {
827 + brcm,pins = <18 19 20 21>;
828 + brcm,function = <4>; /* alt0 */
829 + };
830 +
831 + audio_pins: audio_pins {
832 + brcm,pins = <40 45>;
833 + brcm,function = <4>;
834 + };
835 +};
836 +
837 +&uart0 {
838 + status = "okay";
839 +};
840 +
841 +&spi0 {
842 + pinctrl-names = "default";
843 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
844 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
845 +
846 + spidev0: spidev@0{
847 + compatible = "spidev";
848 + reg = <0>; /* CE0 */
849 + #address-cells = <1>;
850 + #size-cells = <0>;
851 + spi-max-frequency = <125000000>;
852 + };
853 +
854 + spidev1: spidev@1{
855 + compatible = "spidev";
856 + reg = <1>; /* CE1 */
857 + #address-cells = <1>;
858 + #size-cells = <0>;
859 + spi-max-frequency = <125000000>;
860 + };
861 +};
862 +
863 +&i2c0if {
864 + clock-frequency = <100000>;
865 +};
866 +
867 +&i2c1 {
868 + pinctrl-names = "default";
869 + pinctrl-0 = <&i2c1_pins>;
870 + clock-frequency = <100000>;
871 +};
872 +
873 +&i2c2 {
874 + clock-frequency = <100000>;
875 +};
876 +
877 +&i2s {
878 + pinctrl-names = "default";
879 + pinctrl-0 = <&i2s_pins>;
880 +};
881 +
882 +&leds {
883 + act_led: act {
884 + label = "led0";
885 + linux,default-trigger = "mmc0";
886 + gpios = <&gpio 47 0>;
887 + };
888 +
889 + pwr_led: pwr {
890 + label = "led1";
891 + linux,default-trigger = "input";
892 + gpios = <&gpio 35 0>;
893 + };
894 +};
895 +
896 +&hdmi {
897 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
898 +};
899 +
900 +&audio {
901 + pinctrl-names = "default";
902 + pinctrl-0 = <&audio_pins>;
903 +};
904 +
905 +/ {
906 + __overrides__ {
907 + act_led_gpio = <&act_led>,"gpios:4";
908 + act_led_activelow = <&act_led>,"gpios:8";
909 + act_led_trigger = <&act_led>,"linux,default-trigger";
910 +
911 + pwr_led_gpio = <&pwr_led>,"gpios:4";
912 + pwr_led_activelow = <&pwr_led>,"gpios:8";
913 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
914 + };
915 +};
916 diff --git a/arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts b/arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts
917 new file mode 100644
918 index 000000000000..7b554b465b27
919 --- /dev/null
920 +++ b/arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts
921 @@ -0,0 +1,127 @@
922 +/dts-v1/;
923 +
924 +#include "bcm2708.dtsi"
925 +#include "bcm2708-rpi.dtsi"
926 +#include "bcm283x-rpi-smsc9512.dtsi"
927 +#include "bcm283x-rpi-csi1-2lane.dtsi"
928 +
929 +/ {
930 + compatible = "raspberrypi,model-b", "brcm,bcm2835";
931 + model = "Raspberry Pi Model B";
932 +};
933 +
934 +&gpio {
935 + spi0_pins: spi0_pins {
936 + brcm,pins = <9 10 11>;
937 + brcm,function = <4>; /* alt0 */
938 + };
939 +
940 + spi0_cs_pins: spi0_cs_pins {
941 + brcm,pins = <8 7>;
942 + brcm,function = <1>; /* output */
943 + };
944 +
945 + i2c0_pins: i2c0 {
946 + brcm,pins = <0 1>;
947 + brcm,function = <4>;
948 + };
949 +
950 + i2c1_pins: i2c1 {
951 + brcm,pins = <2 3>;
952 + brcm,function = <4>;
953 + };
954 +
955 + i2s_pins: i2s {
956 + brcm,pins = <28 29 30 31>;
957 + brcm,function = <6>; /* alt2 */
958 + };
959 +
960 + audio_pins: audio_pins {
961 + brcm,pins = <40 45>;
962 + brcm,function = <4>;
963 + };
964 +};
965 +
966 +&uart0 {
967 + status = "okay";
968 +};
969 +
970 +&spi0 {
971 + pinctrl-names = "default";
972 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
973 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
974 +
975 + spidev0: spidev@0{
976 + compatible = "spidev";
977 + reg = <0>; /* CE0 */
978 + #address-cells = <1>;
979 + #size-cells = <0>;
980 + spi-max-frequency = <125000000>;
981 + };
982 +
983 + spidev1: spidev@1{
984 + compatible = "spidev";
985 + reg = <1>; /* CE1 */
986 + #address-cells = <1>;
987 + #size-cells = <0>;
988 + spi-max-frequency = <125000000>;
989 + };
990 +};
991 +
992 +/delete-node/ &i2c0mux;
993 +
994 +i2c0: &i2c0if {
995 + pinctrl-names = "default";
996 + pinctrl-0 = <&i2c0_pins>;
997 + clock-frequency = <100000>;
998 +};
999 +
1000 +i2c_csi_dsi: &i2c1 {
1001 + pinctrl-names = "default";
1002 + pinctrl-0 = <&i2c1_pins>;
1003 + clock-frequency = <100000>;
1004 +};
1005 +
1006 +/ {
1007 + aliases {
1008 + i2c0 = &i2c0;
1009 + };
1010 +
1011 + __overrides__ {
1012 + i2c0 = <&i2c0>, "status";
1013 + };
1014 +};
1015 +
1016 +&i2c2 {
1017 + clock-frequency = <100000>;
1018 +};
1019 +
1020 +&i2s {
1021 + pinctrl-names = "default";
1022 + pinctrl-0 = <&i2s_pins>;
1023 +};
1024 +
1025 +&leds {
1026 + act_led: act {
1027 + label = "led0";
1028 + linux,default-trigger = "mmc0";
1029 + gpios = <&gpio 16 1>;
1030 + };
1031 +};
1032 +
1033 +&hdmi {
1034 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
1035 +};
1036 +
1037 +&audio {
1038 + pinctrl-names = "default";
1039 + pinctrl-0 = <&audio_pins>;
1040 +};
1041 +
1042 +/ {
1043 + __overrides__ {
1044 + act_led_gpio = <&act_led>,"gpios:4";
1045 + act_led_activelow = <&act_led>,"gpios:8";
1046 + act_led_trigger = <&act_led>,"linux,default-trigger";
1047 + };
1048 +};
1049 diff --git a/arch/arm/boot/dts/bcm2708-rpi-b.dts b/arch/arm/boot/dts/bcm2708-rpi-b.dts
1050 new file mode 100644
1051 index 000000000000..305f1dbde60f
1052 --- /dev/null
1053 +++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
1054 @@ -0,0 +1,114 @@
1055 +/dts-v1/;
1056 +
1057 +#include "bcm2708.dtsi"
1058 +#include "bcm2708-rpi.dtsi"
1059 +#include "bcm283x-rpi-smsc9512.dtsi"
1060 +#include "bcm283x-rpi-csi1-2lane.dtsi"
1061 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
1062 +
1063 +/ {
1064 + compatible = "raspberrypi,model-b", "brcm,bcm2835";
1065 + model = "Raspberry Pi Model B";
1066 +};
1067 +
1068 +&gpio {
1069 + spi0_pins: spi0_pins {
1070 + brcm,pins = <9 10 11>;
1071 + brcm,function = <4>; /* alt0 */
1072 + };
1073 +
1074 + spi0_cs_pins: spi0_cs_pins {
1075 + brcm,pins = <8 7>;
1076 + brcm,function = <1>; /* output */
1077 + };
1078 +
1079 + i2c0_pins: i2c0 {
1080 + brcm,pins = <0 1>;
1081 + brcm,function = <4>;
1082 + };
1083 +
1084 + i2c1_pins: i2c1 {
1085 + brcm,pins = <2 3>;
1086 + brcm,function = <4>;
1087 + };
1088 +
1089 + i2s_pins: i2s {
1090 + brcm,pins = <28 29 30 31>;
1091 + brcm,function = <6>; /* alt2 */
1092 + };
1093 +
1094 + audio_pins: audio_pins {
1095 + brcm,pins = <40 45>;
1096 + brcm,function = <4>;
1097 + };
1098 +};
1099 +
1100 +&uart0 {
1101 + status = "okay";
1102 +};
1103 +
1104 +&spi0 {
1105 + pinctrl-names = "default";
1106 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1107 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1108 +
1109 + spidev0: spidev@0{
1110 + compatible = "spidev";
1111 + reg = <0>; /* CE0 */
1112 + #address-cells = <1>;
1113 + #size-cells = <0>;
1114 + spi-max-frequency = <125000000>;
1115 + };
1116 +
1117 + spidev1: spidev@1{
1118 + compatible = "spidev";
1119 + reg = <1>; /* CE1 */
1120 + #address-cells = <1>;
1121 + #size-cells = <0>;
1122 + spi-max-frequency = <125000000>;
1123 + };
1124 +};
1125 +
1126 +&i2c0if {
1127 + clock-frequency = <100000>;
1128 +};
1129 +
1130 +&i2c1 {
1131 + pinctrl-names = "default";
1132 + pinctrl-0 = <&i2c1_pins>;
1133 + clock-frequency = <100000>;
1134 +};
1135 +
1136 +&i2c2 {
1137 + clock-frequency = <100000>;
1138 +};
1139 +
1140 +&i2s {
1141 + pinctrl-names = "default";
1142 + pinctrl-0 = <&i2s_pins>;
1143 +};
1144 +
1145 +&leds {
1146 + act_led: act {
1147 + label = "led0";
1148 + linux,default-trigger = "mmc0";
1149 + gpios = <&gpio 16 1>;
1150 + };
1151 +};
1152 +
1153 +&hdmi {
1154 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
1155 +};
1156 +
1157 +&audio {
1158 + pinctrl-names = "default";
1159 + pinctrl-0 = <&audio_pins>;
1160 +};
1161 +
1162 +/ {
1163 + __overrides__ {
1164 + act_led_gpio = <&act_led>,"gpios:4";
1165 + act_led_activelow = <&act_led>,"gpios:8";
1166 + act_led_trigger = <&act_led>,"linux,default-trigger";
1167 + };
1168 +};
1169 diff --git a/arch/arm/boot/dts/bcm2708-rpi-bt.dtsi b/arch/arm/boot/dts/bcm2708-rpi-bt.dtsi
1170 new file mode 100644
1171 index 000000000000..a18f80af97d3
1172 --- /dev/null
1173 +++ b/arch/arm/boot/dts/bcm2708-rpi-bt.dtsi
1174 @@ -0,0 +1,26 @@
1175 +// SPDX-License-Identifier: GPL-2.0
1176 +
1177 +&uart0 {
1178 + bt: bluetooth {
1179 + compatible = "brcm,bcm43438-bt";
1180 + max-speed = <3000000>;
1181 + shutdown-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
1182 + status = "disabled";
1183 + };
1184 +};
1185 +
1186 +&uart1 {
1187 + minibt: bluetooth {
1188 + compatible = "brcm,bcm43438-bt";
1189 + max-speed = <460800>;
1190 + shutdown-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
1191 + status = "disabled";
1192 + };
1193 +};
1194 +
1195 +/ {
1196 + __overrides__ {
1197 + krnbt = <&bt>,"status";
1198 + krnbt_baudrate = <&bt>,"max-speed:0";
1199 + };
1200 +};
1201 diff --git a/arch/arm/boot/dts/bcm2708-rpi-cm.dts b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
1202 new file mode 100644
1203 index 000000000000..93062c4ffad2
1204 --- /dev/null
1205 +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
1206 @@ -0,0 +1,97 @@
1207 +/dts-v1/;
1208 +
1209 +#include "bcm2708-rpi-cm.dtsi"
1210 +#include "bcm283x-rpi-csi0-2lane.dtsi"
1211 +#include "bcm283x-rpi-csi1-4lane.dtsi"
1212 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
1213 +
1214 +/ {
1215 + compatible = "raspberrypi,compute-module", "brcm,bcm2835";
1216 + model = "Raspberry Pi Compute Module";
1217 +};
1218 +
1219 +&uart0 {
1220 + status = "okay";
1221 +};
1222 +
1223 +&gpio {
1224 + spi0_pins: spi0_pins {
1225 + brcm,pins = <9 10 11>;
1226 + brcm,function = <4>; /* alt0 */
1227 + };
1228 +
1229 + spi0_cs_pins: spi0_cs_pins {
1230 + brcm,pins = <8 7>;
1231 + brcm,function = <1>; /* output */
1232 + };
1233 +
1234 + i2c0_pins: i2c0 {
1235 + brcm,pins = <0 1>;
1236 + brcm,function = <4>;
1237 + };
1238 +
1239 + i2c1_pins: i2c1 {
1240 + brcm,pins = <2 3>;
1241 + brcm,function = <4>;
1242 + };
1243 +
1244 + i2s_pins: i2s {
1245 + brcm,pins = <18 19 20 21>;
1246 + brcm,function = <4>; /* alt0 */
1247 + };
1248 +
1249 + audio_pins: audio_pins {
1250 + brcm,pins;
1251 + brcm,function;
1252 + };
1253 +};
1254 +
1255 +&spi0 {
1256 + pinctrl-names = "default";
1257 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1258 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1259 +
1260 + spidev0: spidev@0{
1261 + compatible = "spidev";
1262 + reg = <0>; /* CE0 */
1263 + #address-cells = <1>;
1264 + #size-cells = <0>;
1265 + spi-max-frequency = <125000000>;
1266 + };
1267 +
1268 + spidev1: spidev@1{
1269 + compatible = "spidev";
1270 + reg = <1>; /* CE1 */
1271 + #address-cells = <1>;
1272 + #size-cells = <0>;
1273 + spi-max-frequency = <125000000>;
1274 + };
1275 +};
1276 +
1277 +&i2c0if {
1278 + clock-frequency = <100000>;
1279 +};
1280 +
1281 +&i2c1 {
1282 + pinctrl-names = "default";
1283 + pinctrl-0 = <&i2c1_pins>;
1284 + clock-frequency = <100000>;
1285 +};
1286 +
1287 +&i2c2 {
1288 + clock-frequency = <100000>;
1289 +};
1290 +
1291 +&i2s {
1292 + pinctrl-names = "default";
1293 + pinctrl-0 = <&i2s_pins>;
1294 +};
1295 +
1296 +&audio {
1297 + pinctrl-names = "default";
1298 + pinctrl-0 = <&audio_pins>;
1299 +};
1300 +
1301 +&hdmi {
1302 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
1303 +};
1304 diff --git a/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
1305 new file mode 100644
1306 index 000000000000..dce160f420fd
1307 --- /dev/null
1308 +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
1309 @@ -0,0 +1,18 @@
1310 +#include "bcm2708.dtsi"
1311 +#include "bcm2708-rpi.dtsi"
1312 +
1313 +&leds {
1314 + act_led: act {
1315 + label = "led0";
1316 + linux,default-trigger = "mmc0";
1317 + gpios = <&gpio 47 0>;
1318 + };
1319 +};
1320 +
1321 +/ {
1322 + __overrides__ {
1323 + act_led_gpio = <&act_led>,"gpios:4";
1324 + act_led_activelow = <&act_led>,"gpios:8";
1325 + act_led_trigger = <&act_led>,"linux,default-trigger";
1326 + };
1327 +};
1328 diff --git a/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
1329 new file mode 100644
1330 index 000000000000..f1bbed9fbf73
1331 --- /dev/null
1332 +++ b/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
1333 @@ -0,0 +1,163 @@
1334 +/dts-v1/;
1335 +
1336 +#include "bcm2708.dtsi"
1337 +#include "bcm2708-rpi.dtsi"
1338 +#include "bcm283x-rpi-csi1-2lane.dtsi"
1339 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
1340 +#include "bcm2708-rpi-bt.dtsi"
1341 +
1342 +/ {
1343 + compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
1344 + model = "Raspberry Pi Zero W";
1345 +
1346 + chosen {
1347 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
1348 + };
1349 +
1350 + aliases {
1351 + serial0 = &uart1;
1352 + serial1 = &uart0;
1353 + mmc1 = &mmcnr;
1354 + };
1355 +};
1356 +
1357 +&gpio {
1358 + spi0_pins: spi0_pins {
1359 + brcm,pins = <9 10 11>;
1360 + brcm,function = <4>; /* alt0 */
1361 + };
1362 +
1363 + spi0_cs_pins: spi0_cs_pins {
1364 + brcm,pins = <8 7>;
1365 + brcm,function = <1>; /* output */
1366 + };
1367 +
1368 + i2c0_pins: i2c0 {
1369 + brcm,pins = <0 1>;
1370 + brcm,function = <4>;
1371 + };
1372 +
1373 + i2c1_pins: i2c1 {
1374 + brcm,pins = <2 3>;
1375 + brcm,function = <4>;
1376 + };
1377 +
1378 + i2s_pins: i2s {
1379 + brcm,pins = <18 19 20 21>;
1380 + brcm,function = <4>; /* alt0 */
1381 + };
1382 +
1383 + sdio_pins: sdio_pins {
1384 + brcm,pins = <34 35 36 37 38 39>;
1385 + brcm,function = <7>; /* ALT3 = SD1 */
1386 + brcm,pull = <0 2 2 2 2 2>;
1387 + };
1388 +
1389 + bt_pins: bt_pins {
1390 + brcm,pins = <43>;
1391 + brcm,function = <4>; /* alt0:GPCLK2 */
1392 + brcm,pull = <0>; /* none */
1393 + };
1394 +
1395 + uart0_pins: uart0_pins {
1396 + brcm,pins = <30 31 32 33>;
1397 + brcm,function = <7>; /* alt3=UART0 */
1398 + brcm,pull = <2 0 0 2>; /* up none none up */
1399 + };
1400 +
1401 + uart1_pins: uart1_pins {
1402 + brcm,pins;
1403 + brcm,function;
1404 + brcm,pull;
1405 + };
1406 +
1407 + audio_pins: audio_pins {
1408 + brcm,pins = <>;
1409 + brcm,function = <>;
1410 + };
1411 +};
1412 +
1413 +&mmcnr {
1414 + pinctrl-names = "default";
1415 + pinctrl-0 = <&sdio_pins>;
1416 + bus-width = <4>;
1417 + status = "okay";
1418 +};
1419 +
1420 +&uart0 {
1421 + pinctrl-names = "default";
1422 + pinctrl-0 = <&uart0_pins &bt_pins>;
1423 + status = "okay";
1424 +};
1425 +
1426 +&uart1 {
1427 + pinctrl-names = "default";
1428 + pinctrl-0 = <&uart1_pins>;
1429 + status = "okay";
1430 +};
1431 +
1432 +&spi0 {
1433 + pinctrl-names = "default";
1434 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1435 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1436 +
1437 + spidev0: spidev@0{
1438 + compatible = "spidev";
1439 + reg = <0>; /* CE0 */
1440 + #address-cells = <1>;
1441 + #size-cells = <0>;
1442 + spi-max-frequency = <125000000>;
1443 + };
1444 +
1445 + spidev1: spidev@1{
1446 + compatible = "spidev";
1447 + reg = <1>; /* CE1 */
1448 + #address-cells = <1>;
1449 + #size-cells = <0>;
1450 + spi-max-frequency = <125000000>;
1451 + };
1452 +};
1453 +
1454 +&i2c0if {
1455 + clock-frequency = <100000>;
1456 +};
1457 +
1458 +&i2c1 {
1459 + pinctrl-names = "default";
1460 + pinctrl-0 = <&i2c1_pins>;
1461 + clock-frequency = <100000>;
1462 +};
1463 +
1464 +&i2c2 {
1465 + clock-frequency = <100000>;
1466 +};
1467 +
1468 +&i2s {
1469 + pinctrl-names = "default";
1470 + pinctrl-0 = <&i2s_pins>;
1471 +};
1472 +
1473 +&leds {
1474 + act_led: act {
1475 + label = "led0";
1476 + linux,default-trigger = "actpwr";
1477 + gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
1478 + };
1479 +};
1480 +
1481 +&hdmi {
1482 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
1483 +};
1484 +
1485 +&audio {
1486 + pinctrl-names = "default";
1487 + pinctrl-0 = <&audio_pins>;
1488 +};
1489 +
1490 +/ {
1491 + __overrides__ {
1492 + act_led_gpio = <&act_led>,"gpios:4";
1493 + act_led_activelow = <&act_led>,"gpios:8";
1494 + act_led_trigger = <&act_led>,"linux,default-trigger";
1495 + };
1496 +};
1497 diff --git a/arch/arm/boot/dts/bcm2708-rpi-zero.dts b/arch/arm/boot/dts/bcm2708-rpi-zero.dts
1498 new file mode 100644
1499 index 000000000000..e7578788b839
1500 --- /dev/null
1501 +++ b/arch/arm/boot/dts/bcm2708-rpi-zero.dts
1502 @@ -0,0 +1,117 @@
1503 +/dts-v1/;
1504 +
1505 +#include "bcm2708.dtsi"
1506 +#include "bcm2708-rpi.dtsi"
1507 +#include "bcm283x-rpi-csi1-2lane.dtsi"
1508 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
1509 +
1510 +/ {
1511 + compatible = "raspberrypi,model-zero", "brcm,bcm2835";
1512 + model = "Raspberry Pi Zero";
1513 +
1514 + chosen {
1515 + bootargs = "coherent_pool=1M snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
1516 + };
1517 +};
1518 +
1519 +&gpio {
1520 + spi0_pins: spi0_pins {
1521 + brcm,pins = <9 10 11>;
1522 + brcm,function = <4>; /* alt0 */
1523 + };
1524 +
1525 + spi0_cs_pins: spi0_cs_pins {
1526 + brcm,pins = <8 7>;
1527 + brcm,function = <1>; /* output */
1528 + };
1529 +
1530 + i2c0_pins: i2c0 {
1531 + brcm,pins = <0 1>;
1532 + brcm,function = <4>;
1533 + };
1534 +
1535 + i2c1_pins: i2c1 {
1536 + brcm,pins = <2 3>;
1537 + brcm,function = <4>;
1538 + };
1539 +
1540 + i2s_pins: i2s {
1541 + brcm,pins = <18 19 20 21>;
1542 + brcm,function = <4>; /* alt0 */
1543 + };
1544 +
1545 + audio_pins: audio_pins {
1546 + brcm,pins = <>;
1547 + brcm,function = <>;
1548 + };
1549 +};
1550 +
1551 +&uart0 {
1552 + status = "okay";
1553 +};
1554 +
1555 +&spi0 {
1556 + pinctrl-names = "default";
1557 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1558 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1559 +
1560 + spidev0: spidev@0{
1561 + compatible = "spidev";
1562 + reg = <0>; /* CE0 */
1563 + #address-cells = <1>;
1564 + #size-cells = <0>;
1565 + spi-max-frequency = <125000000>;
1566 + };
1567 +
1568 + spidev1: spidev@1{
1569 + compatible = "spidev";
1570 + reg = <1>; /* CE1 */
1571 + #address-cells = <1>;
1572 + #size-cells = <0>;
1573 + spi-max-frequency = <125000000>;
1574 + };
1575 +};
1576 +
1577 +&i2c0if {
1578 + clock-frequency = <100000>;
1579 +};
1580 +
1581 +&i2c1 {
1582 + pinctrl-names = "default";
1583 + pinctrl-0 = <&i2c1_pins>;
1584 + clock-frequency = <100000>;
1585 +};
1586 +
1587 +&i2c2 {
1588 + clock-frequency = <100000>;
1589 +};
1590 +
1591 +&i2s {
1592 + pinctrl-names = "default";
1593 + pinctrl-0 = <&i2s_pins>;
1594 +};
1595 +
1596 +&leds {
1597 + act_led: act {
1598 + label = "led0";
1599 + linux,default-trigger = "actpwr";
1600 + gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
1601 + };
1602 +};
1603 +
1604 +&hdmi {
1605 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
1606 +};
1607 +
1608 +&audio {
1609 + pinctrl-names = "default";
1610 + pinctrl-0 = <&audio_pins>;
1611 +};
1612 +
1613 +/ {
1614 + __overrides__ {
1615 + act_led_gpio = <&act_led>,"gpios:4";
1616 + act_led_activelow = <&act_led>,"gpios:8";
1617 + act_led_trigger = <&act_led>,"linux,default-trigger";
1618 + };
1619 +};
1620 diff --git a/arch/arm/boot/dts/bcm2708-rpi.dtsi b/arch/arm/boot/dts/bcm2708-rpi.dtsi
1621 new file mode 100644
1622 index 000000000000..e2458b15d64a
1623 --- /dev/null
1624 +++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi
1625 @@ -0,0 +1,36 @@
1626 +/* Downstream modifications common to bcm2835, bcm2836, bcm2837 */
1627 +
1628 +#include "bcm2835-rpi.dtsi"
1629 +#include "bcm270x-rpi.dtsi"
1630 +
1631 +/ {
1632 + memory@0 {
1633 + device_type = "memory";
1634 + reg = <0x0 0x0>;
1635 + };
1636 +
1637 + aliases {
1638 + i2c2 = &i2c2;
1639 + };
1640 +
1641 + __overrides__ {
1642 + i2c2_iknowwhatimdoing = <&i2c2>,"status";
1643 + i2c2_baudrate = <&i2c2>,"clock-frequency:0";
1644 + sd_poll_once = <&sdhost>,"non-removable?";
1645 + };
1646 +};
1647 +
1648 +&sdhost {
1649 + pinctrl-names = "default";
1650 + pinctrl-0 = <&sdhost_gpio48>;
1651 + status = "okay";
1652 +};
1653 +
1654 +&hdmi {
1655 + power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
1656 + status = "disabled";
1657 +};
1658 +
1659 +&i2c2 {
1660 + status = "disabled";
1661 +};
1662 diff --git a/arch/arm/boot/dts/bcm2708.dtsi b/arch/arm/boot/dts/bcm2708.dtsi
1663 new file mode 100644
1664 index 000000000000..36ec4989403f
1665 --- /dev/null
1666 +++ b/arch/arm/boot/dts/bcm2708.dtsi
1667 @@ -0,0 +1,12 @@
1668 +#include "bcm2835.dtsi"
1669 +#include "bcm270x.dtsi"
1670 +
1671 +/ {
1672 + __overrides__ {
1673 + arm_freq;
1674 + };
1675 +};
1676 +
1677 +&vc4 {
1678 + status = "disabled";
1679 +};
1680 diff --git a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
1681 new file mode 100644
1682 index 000000000000..6b2e3c291d72
1683 --- /dev/null
1684 +++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
1685 @@ -0,0 +1,124 @@
1686 +/dts-v1/;
1687 +
1688 +#include "bcm2709.dtsi"
1689 +#include "bcm2709-rpi.dtsi"
1690 +#include "bcm283x-rpi-smsc9514.dtsi"
1691 +#include "bcm283x-rpi-csi1-2lane.dtsi"
1692 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
1693 +
1694 +/ {
1695 + compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
1696 + model = "Raspberry Pi 2 Model B";
1697 +};
1698 +
1699 +&gpio {
1700 + spi0_pins: spi0_pins {
1701 + brcm,pins = <9 10 11>;
1702 + brcm,function = <4>; /* alt0 */
1703 + };
1704 +
1705 + spi0_cs_pins: spi0_cs_pins {
1706 + brcm,pins = <8 7>;
1707 + brcm,function = <1>; /* output */
1708 + };
1709 +
1710 + i2c0_pins: i2c0 {
1711 + brcm,pins = <0 1>;
1712 + brcm,function = <4>;
1713 + };
1714 +
1715 + i2c1_pins: i2c1 {
1716 + brcm,pins = <2 3>;
1717 + brcm,function = <4>;
1718 + };
1719 +
1720 + i2s_pins: i2s {
1721 + brcm,pins = <18 19 20 21>;
1722 + brcm,function = <4>; /* alt0 */
1723 + };
1724 +
1725 + audio_pins: audio_pins {
1726 + brcm,pins = <40 45>;
1727 + brcm,function = <4>;
1728 + };
1729 +};
1730 +
1731 +&uart0 {
1732 + status = "okay";
1733 +};
1734 +
1735 +&spi0 {
1736 + pinctrl-names = "default";
1737 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1738 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1739 +
1740 + spidev0: spidev@0{
1741 + compatible = "spidev";
1742 + reg = <0>; /* CE0 */
1743 + #address-cells = <1>;
1744 + #size-cells = <0>;
1745 + spi-max-frequency = <125000000>;
1746 + };
1747 +
1748 + spidev1: spidev@1{
1749 + compatible = "spidev";
1750 + reg = <1>; /* CE1 */
1751 + #address-cells = <1>;
1752 + #size-cells = <0>;
1753 + spi-max-frequency = <125000000>;
1754 + };
1755 +};
1756 +
1757 +&i2c0if {
1758 + clock-frequency = <100000>;
1759 +};
1760 +
1761 +&i2c1 {
1762 + pinctrl-names = "default";
1763 + pinctrl-0 = <&i2c1_pins>;
1764 + clock-frequency = <100000>;
1765 +};
1766 +
1767 +&i2c2 {
1768 + clock-frequency = <100000>;
1769 +};
1770 +
1771 +&i2s {
1772 + pinctrl-names = "default";
1773 + pinctrl-0 = <&i2s_pins>;
1774 +};
1775 +
1776 +&leds {
1777 + act_led: act {
1778 + label = "led0";
1779 + linux,default-trigger = "mmc0";
1780 + gpios = <&gpio 47 0>;
1781 + };
1782 +
1783 + pwr_led: pwr {
1784 + label = "led1";
1785 + linux,default-trigger = "input";
1786 + gpios = <&gpio 35 0>;
1787 + };
1788 +};
1789 +
1790 +&hdmi {
1791 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
1792 +};
1793 +
1794 +&audio {
1795 + pinctrl-names = "default";
1796 + pinctrl-0 = <&audio_pins>;
1797 +};
1798 +
1799 +/ {
1800 + __overrides__ {
1801 + act_led_gpio = <&act_led>,"gpios:4";
1802 + act_led_activelow = <&act_led>,"gpios:8";
1803 + act_led_trigger = <&act_led>,"linux,default-trigger";
1804 +
1805 + pwr_led_gpio = <&pwr_led>,"gpios:4";
1806 + pwr_led_activelow = <&pwr_led>,"gpios:8";
1807 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
1808 + };
1809 +};
1810 diff --git a/arch/arm/boot/dts/bcm2709-rpi.dtsi b/arch/arm/boot/dts/bcm2709-rpi.dtsi
1811 new file mode 100644
1812 index 000000000000..babfa41cd9f7
1813 --- /dev/null
1814 +++ b/arch/arm/boot/dts/bcm2709-rpi.dtsi
1815 @@ -0,0 +1,5 @@
1816 +#include "bcm2708-rpi.dtsi"
1817 +
1818 +&vchiq {
1819 + compatible = "brcm,bcm2836-vchiq", "brcm,bcm2835-vchiq";
1820 +};
1821 diff --git a/arch/arm/boot/dts/bcm2709.dtsi b/arch/arm/boot/dts/bcm2709.dtsi
1822 new file mode 100644
1823 index 000000000000..68eafc1b281a
1824 --- /dev/null
1825 +++ b/arch/arm/boot/dts/bcm2709.dtsi
1826 @@ -0,0 +1,22 @@
1827 +#include "bcm2836.dtsi"
1828 +#include "bcm270x.dtsi"
1829 +
1830 +/ {
1831 + soc {
1832 + ranges = <0x7e000000 0x3f000000 0x01000000>,
1833 + <0x40000000 0x40000000 0x00040000>;
1834 +
1835 + /delete-node/ timer@7e003000;
1836 + };
1837 +
1838 + __overrides__ {
1839 + arm_freq = <&v7_cpu0>, "clock-frequency:0",
1840 + <&v7_cpu1>, "clock-frequency:0",
1841 + <&v7_cpu2>, "clock-frequency:0",
1842 + <&v7_cpu3>, "clock-frequency:0";
1843 + };
1844 +};
1845 +
1846 +&vc4 {
1847 + status = "disabled";
1848 +};
1849 diff --git a/arch/arm/boot/dts/bcm270x-rpi.dtsi b/arch/arm/boot/dts/bcm270x-rpi.dtsi
1850 new file mode 100644
1851 index 000000000000..68a7e1c09db1
1852 --- /dev/null
1853 +++ b/arch/arm/boot/dts/bcm270x-rpi.dtsi
1854 @@ -0,0 +1,154 @@
1855 +/* Downstream modifications to bcm2835-rpi.dtsi */
1856 +
1857 +/ {
1858 + aliases {
1859 + audio = &audio;
1860 + aux = &aux;
1861 + sound = &sound;
1862 + soc = &soc;
1863 + dma = &dma;
1864 + intc = &intc;
1865 + watchdog = &watchdog;
1866 + random = &random;
1867 + mailbox = &mailbox;
1868 + gpio = &gpio;
1869 + uart0 = &uart0;
1870 + uart1 = &uart1;
1871 + sdhost = &sdhost;
1872 + mmc = &mmc;
1873 + mmc1 = &mmc;
1874 + mmc0 = &sdhost;
1875 + i2s = &i2s;
1876 + i2c0 = &i2c0;
1877 + i2c1 = &i2c1;
1878 + i2c10 = &i2c_csi_dsi;
1879 + spi0 = &spi0;
1880 + spi1 = &spi1;
1881 + spi2 = &spi2;
1882 + usb = &usb;
1883 + leds = &leds;
1884 + fb = &fb;
1885 + thermal = &thermal;
1886 + axiperf = &axiperf;
1887 + };
1888 +
1889 + /* Define these notional regulators for use by overlays */
1890 + vdd_3v3_reg: fixedregulator_3v3 {
1891 + compatible = "regulator-fixed";
1892 + regulator-always-on;
1893 + regulator-max-microvolt = <3300000>;
1894 + regulator-min-microvolt = <3300000>;
1895 + regulator-name = "3v3";
1896 + };
1897 +
1898 + vdd_5v0_reg: fixedregulator_5v0 {
1899 + compatible = "regulator-fixed";
1900 + regulator-always-on;
1901 + regulator-max-microvolt = <5000000>;
1902 + regulator-min-microvolt = <5000000>;
1903 + regulator-name = "5v0";
1904 + };
1905 +
1906 + leds: leds {
1907 + compatible = "gpio-leds";
1908 + };
1909 +
1910 + soc {
1911 + gpiomem {
1912 + compatible = "brcm,bcm2835-gpiomem";
1913 + reg = <0x7e200000 0x1000>;
1914 + };
1915 +
1916 + fb: fb {
1917 + compatible = "brcm,bcm2708-fb";
1918 + firmware = <&firmware>;
1919 + status = "okay";
1920 + };
1921 +
1922 + vcsm: vcsm {
1923 + compatible = "raspberrypi,bcm2835-vcsm";
1924 + firmware = <&firmware>;
1925 + status = "okay";
1926 + };
1927 +
1928 + /* External sound card */
1929 + sound: sound {
1930 + status = "disabled";
1931 + };
1932 + };
1933 +
1934 + __overrides__ {
1935 + cache_line_size;
1936 +
1937 + uart0 = <&uart0>,"status";
1938 + uart1 = <&uart1>,"status";
1939 + i2s = <&i2s>,"status";
1940 + spi = <&spi0>,"status";
1941 + i2c0 = <&i2c0if>,"status",<&i2c0mux>,"status";
1942 + i2c1 = <&i2c1>,"status";
1943 + i2c0_baudrate = <&i2c0if>,"clock-frequency:0";
1944 + i2c1_baudrate = <&i2c1>,"clock-frequency:0";
1945 +
1946 + audio = <&audio>,"status";
1947 + watchdog = <&watchdog>,"status";
1948 + random = <&random>,"status";
1949 + sd_overclock = <&sdhost>,"brcm,overclock-50:0";
1950 + sd_force_pio = <&sdhost>,"brcm,force-pio?";
1951 + sd_pio_limit = <&sdhost>,"brcm,pio-limit:0";
1952 + sd_debug = <&sdhost>,"brcm,debug";
1953 + sdio_overclock = <&mmc>,"brcm,overclock-50:0",
1954 + <&mmcnr>,"brcm,overclock-50:0";
1955 + axiperf = <&axiperf>,"status";
1956 + };
1957 +};
1958 +
1959 +&uart0 {
1960 + skip-init;
1961 +};
1962 +
1963 +&uart1 {
1964 + skip-init;
1965 +};
1966 +
1967 +&txp {
1968 + status = "disabled";
1969 +};
1970 +
1971 +&i2c0if {
1972 + status = "disabled";
1973 +};
1974 +
1975 +&i2c0mux {
1976 + status = "disabled";
1977 +};
1978 +
1979 +&i2c1 {
1980 + status = "disabled";
1981 +};
1982 +
1983 +&clocks {
1984 + firmware = <&firmware>;
1985 +};
1986 +
1987 +&sdhci {
1988 + pinctrl-names = "default";
1989 + pinctrl-0 = <&emmc_gpio48>;
1990 + bus-width = <4>;
1991 +};
1992 +
1993 +&cpu_thermal {
1994 + /delete-node/ trips;
1995 +};
1996 +
1997 +&vec {
1998 + status = "disabled";
1999 +};
2000 +
2001 +&vchiq {
2002 + /* Onboard audio */
2003 + audio: bcm2835_audio {
2004 + compatible = "brcm,bcm2835-audio";
2005 + brcm,pwm-channels = <8>;
2006 + status = "disabled";
2007 + };
2008 +};
2009 diff --git a/arch/arm/boot/dts/bcm270x.dtsi b/arch/arm/boot/dts/bcm270x.dtsi
2010 new file mode 100644
2011 index 000000000000..446d4ff64842
2012 --- /dev/null
2013 +++ b/arch/arm/boot/dts/bcm270x.dtsi
2014 @@ -0,0 +1,197 @@
2015 +/* Downstream bcm283x.dtsi diff */
2016 +#include <dt-bindings/power/raspberrypi-power.h>
2017 +
2018 +/ {
2019 + chosen {
2020 + bootargs = "coherent_pool=1M snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
2021 + /delete-property/ stdout-path;
2022 + };
2023 +
2024 + soc: soc {
2025 +
2026 + watchdog: watchdog@7e100000 {
2027 + /* Add label */
2028 + };
2029 +
2030 + random: rng@7e104000 {
2031 + /* Add label */
2032 + };
2033 +
2034 + spi0: spi@7e204000 {
2035 + /* Add label */
2036 + };
2037 +
2038 +#ifndef BCM2711
2039 + pixelvalve0: pixelvalve@7e206000 {
2040 + /* Add label */
2041 + status = "disabled";
2042 + };
2043 +
2044 + pixelvalve1: pixelvalve@7e207000 {
2045 + /* Add label */
2046 + status = "disabled";
2047 + };
2048 +#endif
2049 +
2050 + /delete-node/ sdhci@7e300000;
2051 +
2052 + sdhci: mmc: mmc@7e300000 {
2053 + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
2054 + reg = <0x7e300000 0x100>;
2055 + interrupts = <2 30>;
2056 + clocks = <&clocks BCM2835_CLOCK_EMMC>;
2057 + dmas = <&dma 11>;
2058 + dma-names = "rx-tx";
2059 + brcm,overclock-50 = <0>;
2060 + status = "disabled";
2061 + };
2062 +
2063 + /* A clone of mmc but with non-removable set */
2064 + mmcnr: mmcnr@7e300000 {
2065 + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
2066 + reg = <0x7e300000 0x100>;
2067 + interrupts = <2 30>;
2068 + clocks = <&clocks BCM2835_CLOCK_EMMC>;
2069 + dmas = <&dma 11>;
2070 + dma-names = "rx-tx";
2071 + brcm,overclock-50 = <0>;
2072 + non-removable;
2073 + status = "disabled";
2074 + };
2075 +
2076 + hvs: hvs@7e400000 {
2077 + /* Add label */
2078 + status = "disabled";
2079 + };
2080 +
2081 + firmwarekms: firmwarekms@7e600000 {
2082 + compatible = "raspberrypi,rpi-firmware-kms";
2083 + /* SMI interrupt reg */
2084 + reg = <0x7e600000 0x100>;
2085 + interrupts = <2 16>;
2086 + brcm,firmware = <&firmware>;
2087 + status = "disabled";
2088 + };
2089 +
2090 + smi: smi@7e600000 {
2091 + compatible = "brcm,bcm2835-smi";
2092 + reg = <0x7e600000 0x100>;
2093 + interrupts = <2 16>;
2094 + clocks = <&clocks BCM2835_CLOCK_SMI>;
2095 + assigned-clocks = <&clocks BCM2835_CLOCK_SMI>;
2096 + assigned-clock-rates = <125000000>;
2097 + dmas = <&dma 4>;
2098 + dma-names = "rx-tx";
2099 + status = "disabled";
2100 + };
2101 +
2102 + csi0: csi@7e800000 {
2103 + compatible = "brcm,bcm2835-unicam";
2104 + reg = <0x7e800000 0x800>,
2105 + <0x7e802000 0x4>;
2106 + interrupts = <2 6>;
2107 + clocks = <&clocks BCM2835_CLOCK_CAM0>,
2108 + <&firmware_clocks 4>;
2109 + clock-names = "lp", "vpu";
2110 + power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>;
2111 + #address-cells = <1>;
2112 + #size-cells = <0>;
2113 + #clock-cells = <1>;
2114 + status = "disabled";
2115 + };
2116 +
2117 + csi1: csi@7e801000 {
2118 + compatible = "brcm,bcm2835-unicam";
2119 + reg = <0x7e801000 0x800>,
2120 + <0x7e802004 0x4>;
2121 + interrupts = <2 7>;
2122 + clocks = <&clocks BCM2835_CLOCK_CAM1>,
2123 + <&firmware_clocks 4>;
2124 + clock-names = "lp", "vpu";
2125 + power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>;
2126 + #address-cells = <1>;
2127 + #size-cells = <0>;
2128 + #clock-cells = <1>;
2129 + status = "disabled";
2130 + };
2131 +
2132 +#ifndef BCM2711
2133 + pixelvalve2: pixelvalve@7e807000 {
2134 + /* Add label */
2135 + status = "disabled";
2136 + };
2137 +#endif
2138 +
2139 + hdmi@7e902000 { /* hdmi */
2140 + status = "disabled";
2141 + };
2142 +
2143 + usb@7e980000 { /* usb */
2144 + compatible = "brcm,bcm2708-usb";
2145 + reg = <0x7e980000 0x10000>,
2146 + <0x7e006000 0x1000>;
2147 + interrupt-names = "usb",
2148 + "soft";
2149 + interrupts = <1 9>,
2150 + <2 0>;
2151 + };
2152 +
2153 +#ifndef BCM2711
2154 + v3d@7ec00000 { /* vd3 */
2155 + compatible = "brcm,vc4-v3d";
2156 + power-domains = <&power RPI_POWER_DOMAIN_V3D>;
2157 + status = "disabled";
2158 + };
2159 +#endif
2160 +
2161 + axiperf: axiperf {
2162 + compatible = "brcm,bcm2835-axiperf";
2163 + reg = <0x7e009800 0x100>,
2164 + <0x7ee08000 0x100>;
2165 + firmware = <&firmware>;
2166 + status = "disabled";
2167 + };
2168 + };
2169 +
2170 + __overrides__ {
2171 + cam0-pwdn-ctrl;
2172 + cam0-pwdn;
2173 + cam0-led-ctrl;
2174 + cam0-led;
2175 + };
2176 +};
2177 +
2178 +&gpio {
2179 + interrupts = <2 17>, <2 18>;
2180 +
2181 + dpi_18bit_gpio0: dpi_18bit_gpio0 {
2182 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
2183 + 12 13 14 15 16 17 18 19
2184 + 20 21>;
2185 + brcm,function = <BCM2835_FSEL_ALT2>;
2186 + };
2187 +};
2188 +
2189 +&uart0 {
2190 + /* Enable CTS bug workaround */
2191 + cts-event-workaround;
2192 +};
2193 +
2194 +&i2s {
2195 + #sound-dai-cells = <0>;
2196 + dmas = <&dma 2>, <&dma 3>;
2197 + dma-names = "tx", "rx";
2198 +};
2199 +
2200 +&sdhost {
2201 + dmas = <&dma (13|(1<<29))>;
2202 + dma-names = "rx-tx";
2203 + bus-width = <4>;
2204 + brcm,overclock-50 = <0>;
2205 + brcm,pio-limit = <1>;
2206 +};
2207 +
2208 +&spi0 {
2209 + dmas = <&dma 6>, <&dma 7>;
2210 + dma-names = "tx", "rx";
2211 +};
2212 diff --git a/arch/arm/boot/dts/bcm2710-rpi-2-b.dts b/arch/arm/boot/dts/bcm2710-rpi-2-b.dts
2213 new file mode 100644
2214 index 000000000000..49cfda63606e
2215 --- /dev/null
2216 +++ b/arch/arm/boot/dts/bcm2710-rpi-2-b.dts
2217 @@ -0,0 +1,124 @@
2218 +/dts-v1/;
2219 +
2220 +#include "bcm2710.dtsi"
2221 +#include "bcm2709-rpi.dtsi"
2222 +#include "bcm283x-rpi-smsc9514.dtsi"
2223 +#include "bcm283x-rpi-csi1-2lane.dtsi"
2224 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
2225 +
2226 +/ {
2227 + compatible = "raspberrypi,2-model-b-rev2", "brcm,bcm2837";
2228 + model = "Raspberry Pi 2 Model B rev 1.2";
2229 +};
2230 +
2231 +&gpio {
2232 + spi0_pins: spi0_pins {
2233 + brcm,pins = <9 10 11>;
2234 + brcm,function = <4>; /* alt0 */
2235 + };
2236 +
2237 + spi0_cs_pins: spi0_cs_pins {
2238 + brcm,pins = <8 7>;
2239 + brcm,function = <1>; /* output */
2240 + };
2241 +
2242 + i2c0_pins: i2c0 {
2243 + brcm,pins = <0 1>;
2244 + brcm,function = <4>;
2245 + };
2246 +
2247 + i2c1_pins: i2c1 {
2248 + brcm,pins = <2 3>;
2249 + brcm,function = <4>;
2250 + };
2251 +
2252 + i2s_pins: i2s {
2253 + brcm,pins = <18 19 20 21>;
2254 + brcm,function = <4>; /* alt0 */
2255 + };
2256 +
2257 + audio_pins: audio_pins {
2258 + brcm,pins = <40 45>;
2259 + brcm,function = <4>;
2260 + };
2261 +};
2262 +
2263 +&uart0 {
2264 + status = "okay";
2265 +};
2266 +
2267 +&spi0 {
2268 + pinctrl-names = "default";
2269 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2270 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2271 +
2272 + spidev0: spidev@0{
2273 + compatible = "spidev";
2274 + reg = <0>; /* CE0 */
2275 + #address-cells = <1>;
2276 + #size-cells = <0>;
2277 + spi-max-frequency = <125000000>;
2278 + };
2279 +
2280 + spidev1: spidev@1{
2281 + compatible = "spidev";
2282 + reg = <1>; /* CE1 */
2283 + #address-cells = <1>;
2284 + #size-cells = <0>;
2285 + spi-max-frequency = <125000000>;
2286 + };
2287 +};
2288 +
2289 +&i2c0if {
2290 + clock-frequency = <100000>;
2291 +};
2292 +
2293 +&i2c1 {
2294 + pinctrl-names = "default";
2295 + pinctrl-0 = <&i2c1_pins>;
2296 + clock-frequency = <100000>;
2297 +};
2298 +
2299 +&i2c2 {
2300 + clock-frequency = <100000>;
2301 +};
2302 +
2303 +&i2s {
2304 + pinctrl-names = "default";
2305 + pinctrl-0 = <&i2s_pins>;
2306 +};
2307 +
2308 +&leds {
2309 + act_led: act {
2310 + label = "led0";
2311 + linux,default-trigger = "mmc0";
2312 + gpios = <&gpio 47 0>;
2313 + };
2314 +
2315 + pwr_led: pwr {
2316 + label = "led1";
2317 + linux,default-trigger = "input";
2318 + gpios = <&gpio 35 0>;
2319 + };
2320 +};
2321 +
2322 +&hdmi {
2323 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
2324 +};
2325 +
2326 +&audio {
2327 + pinctrl-names = "default";
2328 + pinctrl-0 = <&audio_pins>;
2329 +};
2330 +
2331 +/ {
2332 + __overrides__ {
2333 + act_led_gpio = <&act_led>,"gpios:4";
2334 + act_led_activelow = <&act_led>,"gpios:8";
2335 + act_led_trigger = <&act_led>,"linux,default-trigger";
2336 +
2337 + pwr_led_gpio = <&pwr_led>,"gpios:4";
2338 + pwr_led_activelow = <&pwr_led>,"gpios:8";
2339 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
2340 + };
2341 +};
2342 diff --git a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
2343 new file mode 100644
2344 index 000000000000..4e4e47100831
2345 --- /dev/null
2346 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
2347 @@ -0,0 +1,196 @@
2348 +/dts-v1/;
2349 +
2350 +#include "bcm2710.dtsi"
2351 +#include "bcm2709-rpi.dtsi"
2352 +#include "bcm283x-rpi-lan7515.dtsi"
2353 +#include "bcm283x-rpi-csi1-2lane.dtsi"
2354 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
2355 +#include "bcm271x-rpi-bt.dtsi"
2356 +
2357 +/ {
2358 + compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
2359 + model = "Raspberry Pi 3 Model B+";
2360 +
2361 + chosen {
2362 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
2363 + };
2364 +
2365 + aliases {
2366 + serial0 = &uart1;
2367 + serial1 = &uart0;
2368 + mmc1 = &mmcnr;
2369 + };
2370 +};
2371 +
2372 +&gpio {
2373 + spi0_pins: spi0_pins {
2374 + brcm,pins = <9 10 11>;
2375 + brcm,function = <4>; /* alt0 */
2376 + };
2377 +
2378 + spi0_cs_pins: spi0_cs_pins {
2379 + brcm,pins = <8 7>;
2380 + brcm,function = <1>; /* output */
2381 + };
2382 +
2383 + i2c0_pins: i2c0 {
2384 + brcm,pins = <0 1>;
2385 + brcm,function = <4>;
2386 + };
2387 +
2388 + i2c1_pins: i2c1 {
2389 + brcm,pins = <2 3>;
2390 + brcm,function = <4>;
2391 + };
2392 +
2393 + i2s_pins: i2s {
2394 + brcm,pins = <18 19 20 21>;
2395 + brcm,function = <4>; /* alt0 */
2396 + };
2397 +
2398 + sdio_pins: sdio_pins {
2399 + brcm,pins = <34 35 36 37 38 39>;
2400 + brcm,function = <7>; // alt3 = SD1
2401 + brcm,pull = <0 2 2 2 2 2>;
2402 + };
2403 +
2404 + bt_pins: bt_pins {
2405 + brcm,pins = <43>;
2406 + brcm,function = <4>; /* alt0:GPCLK2 */
2407 + brcm,pull = <0>;
2408 + };
2409 +
2410 + uart0_pins: uart0_pins {
2411 + brcm,pins = <32 33>;
2412 + brcm,function = <7>; /* alt3=UART0 */
2413 + brcm,pull = <0 2>;
2414 + };
2415 +
2416 + uart1_pins: uart1_pins {
2417 + brcm,pins;
2418 + brcm,function;
2419 + brcm,pull;
2420 + };
2421 +
2422 + audio_pins: audio_pins {
2423 + brcm,pins = <40 41>;
2424 + brcm,function = <4>;
2425 + };
2426 +};
2427 +
2428 +&mmcnr {
2429 + pinctrl-names = "default";
2430 + pinctrl-0 = <&sdio_pins>;
2431 + bus-width = <4>;
2432 + status = "okay";
2433 +};
2434 +
2435 +&firmware {
2436 + expgpio: expgpio {
2437 + compatible = "raspberrypi,firmware-gpio";
2438 + gpio-controller;
2439 + #gpio-cells = <2>;
2440 + status = "okay";
2441 + };
2442 +};
2443 +
2444 +&uart0 {
2445 + pinctrl-names = "default";
2446 + pinctrl-0 = <&uart0_pins &bt_pins>;
2447 + status = "okay";
2448 +};
2449 +
2450 +&uart1 {
2451 + pinctrl-names = "default";
2452 + pinctrl-0 = <&uart1_pins>;
2453 + status = "okay";
2454 +};
2455 +
2456 +&spi0 {
2457 + pinctrl-names = "default";
2458 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2459 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2460 +
2461 + spidev0: spidev@0{
2462 + compatible = "spidev";
2463 + reg = <0>; /* CE0 */
2464 + #address-cells = <1>;
2465 + #size-cells = <0>;
2466 + spi-max-frequency = <125000000>;
2467 + };
2468 +
2469 + spidev1: spidev@1{
2470 + compatible = "spidev";
2471 + reg = <1>; /* CE1 */
2472 + #address-cells = <1>;
2473 + #size-cells = <0>;
2474 + spi-max-frequency = <125000000>;
2475 + };
2476 +};
2477 +
2478 +&i2c0if {
2479 + clock-frequency = <100000>;
2480 +};
2481 +
2482 +&i2c1 {
2483 + pinctrl-names = "default";
2484 + pinctrl-0 = <&i2c1_pins>;
2485 + clock-frequency = <100000>;
2486 +};
2487 +
2488 +&i2c2 {
2489 + clock-frequency = <100000>;
2490 +};
2491 +
2492 +&i2s {
2493 + pinctrl-names = "default";
2494 + pinctrl-0 = <&i2s_pins>;
2495 +};
2496 +
2497 +&leds {
2498 + act_led: act {
2499 + label = "led0";
2500 + linux,default-trigger = "mmc0";
2501 + gpios = <&gpio 29 0>;
2502 + };
2503 +
2504 + pwr_led: pwr {
2505 + label = "led1";
2506 + linux,default-trigger = "default-on";
2507 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
2508 + };
2509 +};
2510 +
2511 +&hdmi {
2512 + hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
2513 +};
2514 +
2515 +&audio {
2516 + pinctrl-names = "default";
2517 + pinctrl-0 = <&audio_pins>;
2518 +};
2519 +
2520 +&eth_phy {
2521 + microchip,eee-enabled;
2522 + microchip,tx-lpi-timer = <600>; /* non-aggressive*/
2523 + microchip,downshift-after = <2>;
2524 +};
2525 +
2526 +/ {
2527 + __overrides__ {
2528 + act_led_gpio = <&act_led>,"gpios:4";
2529 + act_led_activelow = <&act_led>,"gpios:8";
2530 + act_led_trigger = <&act_led>,"linux,default-trigger";
2531 +
2532 + pwr_led_gpio = <&pwr_led>,"gpios:4";
2533 + pwr_led_activelow = <&pwr_led>,"gpios:8";
2534 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
2535 +
2536 + eee = <&eth_phy>,"microchip,eee-enabled?";
2537 + tx_lpi_timer = <&eth_phy>,"microchip,tx-lpi-timer:0";
2538 + eth_led0 = <&eth_phy>,"microchip,led-modes:0";
2539 + eth_led1 = <&eth_phy>,"microchip,led-modes:4";
2540 + eth_downshift_after = <&eth_phy>,"microchip,downshift-after:0";
2541 + eth_max_speed = <&eth_phy>,"max-speed:0";
2542 + };
2543 +};
2544 diff --git a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
2545 new file mode 100644
2546 index 000000000000..8989c00b03e5
2547 --- /dev/null
2548 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
2549 @@ -0,0 +1,198 @@
2550 +/dts-v1/;
2551 +
2552 +#include "bcm2710.dtsi"
2553 +#include "bcm2709-rpi.dtsi"
2554 +#include "bcm283x-rpi-smsc9514.dtsi"
2555 +#include "bcm283x-rpi-csi1-2lane.dtsi"
2556 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
2557 +#include "bcm271x-rpi-bt.dtsi"
2558 +
2559 +/ {
2560 + compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
2561 + model = "Raspberry Pi 3 Model B";
2562 +
2563 + chosen {
2564 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
2565 + };
2566 +
2567 + aliases {
2568 + serial0 = &uart1;
2569 + serial1 = &uart0;
2570 + mmc1 = &mmcnr;
2571 + };
2572 +};
2573 +
2574 +&gpio {
2575 + spi0_pins: spi0_pins {
2576 + brcm,pins = <9 10 11>;
2577 + brcm,function = <4>; /* alt0 */
2578 + };
2579 +
2580 + spi0_cs_pins: spi0_cs_pins {
2581 + brcm,pins = <8 7>;
2582 + brcm,function = <1>; /* output */
2583 + };
2584 +
2585 + i2c0_pins: i2c0 {
2586 + brcm,pins = <0 1>;
2587 + brcm,function = <4>;
2588 + };
2589 +
2590 + i2c1_pins: i2c1 {
2591 + brcm,pins = <2 3>;
2592 + brcm,function = <4>;
2593 + };
2594 +
2595 + i2s_pins: i2s {
2596 + brcm,pins = <18 19 20 21>;
2597 + brcm,function = <4>; /* alt0 */
2598 + };
2599 +
2600 + sdio_pins: sdio_pins {
2601 + brcm,pins = <34 35 36 37 38 39>;
2602 + brcm,function = <7>; // alt3 = SD1
2603 + brcm,pull = <0 2 2 2 2 2>;
2604 + };
2605 +
2606 + bt_pins: bt_pins {
2607 + brcm,pins = <43>;
2608 + brcm,function = <4>; /* alt0:GPCLK2 */
2609 + brcm,pull = <0>;
2610 + };
2611 +
2612 + uart0_pins: uart0_pins {
2613 + brcm,pins = <32 33>;
2614 + brcm,function = <7>; /* alt3=UART0 */
2615 + brcm,pull = <0 2>;
2616 + };
2617 +
2618 + uart1_pins: uart1_pins {
2619 + brcm,pins;
2620 + brcm,function;
2621 + brcm,pull;
2622 + };
2623 +
2624 + audio_pins: audio_pins {
2625 + brcm,pins = <40 41>;
2626 + brcm,function = <4>;
2627 + };
2628 +};
2629 +
2630 +&mmcnr {
2631 + pinctrl-names = "default";
2632 + pinctrl-0 = <&sdio_pins>;
2633 + bus-width = <4>;
2634 + status = "okay";
2635 +};
2636 +
2637 +&soc {
2638 + virtgpio: virtgpio {
2639 + compatible = "brcm,bcm2835-virtgpio";
2640 + gpio-controller;
2641 + #gpio-cells = <2>;
2642 + firmware = <&firmware>;
2643 + status = "okay";
2644 + };
2645 +
2646 +};
2647 +
2648 +&firmware {
2649 + expgpio: expgpio {
2650 + compatible = "raspberrypi,firmware-gpio";
2651 + gpio-controller;
2652 + #gpio-cells = <2>;
2653 + status = "okay";
2654 + };
2655 +};
2656 +
2657 +&uart0 {
2658 + pinctrl-names = "default";
2659 + pinctrl-0 = <&uart0_pins &bt_pins>;
2660 + status = "okay";
2661 +};
2662 +
2663 +&uart1 {
2664 + pinctrl-names = "default";
2665 + pinctrl-0 = <&uart1_pins>;
2666 + status = "okay";
2667 +};
2668 +
2669 +&bt {
2670 + max-speed = <921600>;
2671 +};
2672 +
2673 +&spi0 {
2674 + pinctrl-names = "default";
2675 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2676 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2677 +
2678 + spidev0: spidev@0{
2679 + compatible = "spidev";
2680 + reg = <0>; /* CE0 */
2681 + #address-cells = <1>;
2682 + #size-cells = <0>;
2683 + spi-max-frequency = <125000000>;
2684 + };
2685 +
2686 + spidev1: spidev@1{
2687 + compatible = "spidev";
2688 + reg = <1>; /* CE1 */
2689 + #address-cells = <1>;
2690 + #size-cells = <0>;
2691 + spi-max-frequency = <125000000>;
2692 + };
2693 +};
2694 +
2695 +&i2c0if {
2696 + clock-frequency = <100000>;
2697 +};
2698 +
2699 +&i2c1 {
2700 + pinctrl-names = "default";
2701 + pinctrl-0 = <&i2c1_pins>;
2702 + clock-frequency = <100000>;
2703 +};
2704 +
2705 +&i2c2 {
2706 + clock-frequency = <100000>;
2707 +};
2708 +
2709 +&i2s {
2710 + pinctrl-names = "default";
2711 + pinctrl-0 = <&i2s_pins>;
2712 +};
2713 +
2714 +&leds {
2715 + act_led: act {
2716 + label = "led0";
2717 + linux,default-trigger = "mmc0";
2718 + gpios = <&virtgpio 0 0>;
2719 + };
2720 +
2721 + pwr_led: pwr {
2722 + label = "led1";
2723 + linux,default-trigger = "input";
2724 + gpios = <&expgpio 7 0>;
2725 + };
2726 +};
2727 +
2728 +&hdmi {
2729 + hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
2730 +};
2731 +
2732 +&audio {
2733 + pinctrl-names = "default";
2734 + pinctrl-0 = <&audio_pins>;
2735 +};
2736 +
2737 +/ {
2738 + __overrides__ {
2739 + act_led_gpio = <&act_led>,"gpios:4";
2740 + act_led_activelow = <&act_led>,"gpios:8";
2741 + act_led_trigger = <&act_led>,"linux,default-trigger";
2742 +
2743 + pwr_led_gpio = <&pwr_led>,"gpios:4";
2744 + pwr_led_activelow = <&pwr_led>,"gpios:8";
2745 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
2746 + };
2747 +};
2748 diff --git a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
2749 new file mode 100644
2750 index 000000000000..f972979281f5
2751 --- /dev/null
2752 +++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
2753 @@ -0,0 +1,133 @@
2754 +/dts-v1/;
2755 +
2756 +#include "bcm2710.dtsi"
2757 +#include "bcm2709-rpi.dtsi"
2758 +#include "bcm283x-rpi-csi0-2lane.dtsi"
2759 +#include "bcm283x-rpi-csi1-4lane.dtsi"
2760 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
2761 +/ {
2762 + compatible = "raspberrypi,3-compute-module", "brcm,bcm2837";
2763 + model = "Raspberry Pi Compute Module 3";
2764 +};
2765 +
2766 +&uart0 {
2767 + status = "okay";
2768 +};
2769 +
2770 +&gpio {
2771 + spi0_pins: spi0_pins {
2772 + brcm,pins = <9 10 11>;
2773 + brcm,function = <4>; /* alt0 */
2774 + };
2775 +
2776 + spi0_cs_pins: spi0_cs_pins {
2777 + brcm,pins = <8 7>;
2778 + brcm,function = <1>; /* output */
2779 + };
2780 +
2781 + i2c0_pins: i2c0 {
2782 + brcm,pins = <0 1>;
2783 + brcm,function = <4>;
2784 + };
2785 +
2786 + i2c1_pins: i2c1 {
2787 + brcm,pins = <2 3>;
2788 + brcm,function = <4>;
2789 + };
2790 +
2791 + i2s_pins: i2s {
2792 + brcm,pins = <18 19 20 21>;
2793 + brcm,function = <4>; /* alt0 */
2794 + };
2795 +
2796 + audio_pins: audio_pins {
2797 + brcm,pins;
2798 + brcm,function;
2799 + };
2800 +};
2801 +
2802 +&soc {
2803 + virtgpio: virtgpio {
2804 + compatible = "brcm,bcm2835-virtgpio";
2805 + gpio-controller;
2806 + #gpio-cells = <2>;
2807 + firmware = <&firmware>;
2808 + status = "okay";
2809 + };
2810 +
2811 +};
2812 +
2813 +&firmware {
2814 + expgpio: expgpio {
2815 + compatible = "raspberrypi,firmware-gpio";
2816 + gpio-controller;
2817 + #gpio-cells = <2>;
2818 + status = "okay";
2819 + };
2820 +};
2821 +
2822 +&spi0 {
2823 + pinctrl-names = "default";
2824 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2825 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2826 +
2827 + spidev0: spidev@0{
2828 + compatible = "spidev";
2829 + reg = <0>; /* CE0 */
2830 + #address-cells = <1>;
2831 + #size-cells = <0>;
2832 + spi-max-frequency = <125000000>;
2833 + };
2834 +
2835 + spidev1: spidev@1{
2836 + compatible = "spidev";
2837 + reg = <1>; /* CE1 */
2838 + #address-cells = <1>;
2839 + #size-cells = <0>;
2840 + spi-max-frequency = <125000000>;
2841 + };
2842 +};
2843 +
2844 +&i2c0if {
2845 + clock-frequency = <100000>;
2846 +};
2847 +
2848 +&i2c1 {
2849 + pinctrl-names = "default";
2850 + pinctrl-0 = <&i2c1_pins>;
2851 + clock-frequency = <100000>;
2852 +};
2853 +
2854 +&i2c2 {
2855 + clock-frequency = <100000>;
2856 +};
2857 +
2858 +&i2s {
2859 + pinctrl-names = "default";
2860 + pinctrl-0 = <&i2s_pins>;
2861 +};
2862 +
2863 +&leds {
2864 + act_led: act {
2865 + label = "led0";
2866 + linux,default-trigger = "mmc0";
2867 + gpios = <&virtgpio 0 0>;
2868 + };
2869 +};
2870 +
2871 +&hdmi {
2872 + hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>;
2873 +};
2874 +
2875 +&audio {
2876 + pinctrl-names = "default";
2877 + pinctrl-0 = <&audio_pins>;
2878 +};
2879 +
2880 +/ {
2881 + __overrides__ {
2882 + act_led_gpio = <&act_led>,"gpios:4";
2883 + act_led_activelow = <&act_led>,"gpios:8";
2884 + act_led_trigger = <&act_led>,"linux,default-trigger";
2885 + };
2886 +};
2887 diff --git a/arch/arm/boot/dts/bcm2710.dtsi b/arch/arm/boot/dts/bcm2710.dtsi
2888 new file mode 100644
2889 index 000000000000..4e47480dd933
2890 --- /dev/null
2891 +++ b/arch/arm/boot/dts/bcm2710.dtsi
2892 @@ -0,0 +1,29 @@
2893 +#include "bcm2837.dtsi"
2894 +#include "bcm270x.dtsi"
2895 +
2896 +/ {
2897 + compatible = "brcm,bcm2837", "brcm,bcm2836";
2898 +
2899 + arm-pmu {
2900 +#ifdef RPI364
2901 + compatible = "arm,armv8-pmuv3", "arm,cortex-a7-pmu";
2902 +#else
2903 + compatible = "arm,cortex-a7-pmu";
2904 +#endif
2905 + };
2906 +
2907 + soc {
2908 + /delete-node/ timer@7e003000;
2909 + };
2910 +
2911 + __overrides__ {
2912 + arm_freq = <&cpu0>, "clock-frequency:0",
2913 + <&cpu1>, "clock-frequency:0",
2914 + <&cpu2>, "clock-frequency:0",
2915 + <&cpu3>, "clock-frequency:0";
2916 + };
2917 +};
2918 +
2919 +&vc4 {
2920 + status = "disabled";
2921 +};
2922 diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
2923 index 5395e8c2484e..3e67c2b634be 100644
2924 --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
2925 +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
2926 @@ -2,7 +2,6 @@
2927 /dts-v1/;
2928 #include "bcm2711.dtsi"
2929 #include "bcm2835-rpi.dtsi"
2930 -#include "bcm283x-rpi-usb-peripheral.dtsi"
2931
2932 #include <dt-bindings/reset/raspberrypi,firmware-reset.h>
2933
2934 @@ -95,7 +94,7 @@ expgpio: gpio {
2935 "VDD_SD_IO_SEL",
2936 "CAM_GPIO",
2937 "SD_PWR_ON",
2938 - "";
2939 + "SD_OC_N";
2940 status = "okay";
2941 };
2942
2943 @@ -301,3 +300,306 @@ &vc4 {
2944 &vec {
2945 status = "disabled";
2946 };
2947 +
2948 +// =============================================
2949 +// Downstream rpi- changes
2950 +
2951 +#define BCM2711
2952 +
2953 +#include "bcm270x.dtsi"
2954 +#include "bcm271x-rpi-bt.dtsi"
2955 +
2956 +/ {
2957 + soc {
2958 + /delete-node/ pixelvalve@7e807000;
2959 + /delete-node/ hdmi@7e902000;
2960 + };
2961 +};
2962 +
2963 +#include "bcm2711-rpi.dtsi"
2964 +#include "bcm283x-rpi-csi1-2lane.dtsi"
2965 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
2966 +
2967 +/ {
2968 + chosen {
2969 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
2970 + };
2971 +
2972 + aliases {
2973 + serial0 = &uart1;
2974 + serial1 = &uart0;
2975 + mmc0 = &emmc2;
2976 + mmc1 = &mmcnr;
2977 + mmc2 = &sdhost;
2978 + /delete-property/ i2c2;
2979 + i2c3 = &i2c3;
2980 + i2c4 = &i2c4;
2981 + i2c5 = &i2c5;
2982 + i2c6 = &i2c6;
2983 + /delete-property/ intc;
2984 + };
2985 +
2986 + /delete-node/ wifi-pwrseq;
2987 +};
2988 +
2989 +&mmcnr {
2990 + pinctrl-names = "default";
2991 + pinctrl-0 = <&sdio_pins>;
2992 + bus-width = <4>;
2993 + status = "okay";
2994 +};
2995 +
2996 +&uart0 {
2997 + pinctrl-0 = <&uart0_pins &bt_pins>;
2998 + status = "okay";
2999 +};
3000 +
3001 +&uart1 {
3002 + pinctrl-0 = <&uart1_pins>;
3003 +};
3004 +
3005 +&spi0 {
3006 + pinctrl-names = "default";
3007 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
3008 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
3009 +
3010 + spidev0: spidev@0{
3011 + compatible = "spidev";
3012 + reg = <0>; /* CE0 */
3013 + #address-cells = <1>;
3014 + #size-cells = <0>;
3015 + spi-max-frequency = <125000000>;
3016 + };
3017 +
3018 + spidev1: spidev@1{
3019 + compatible = "spidev";
3020 + reg = <1>; /* CE1 */
3021 + #address-cells = <1>;
3022 + #size-cells = <0>;
3023 + spi-max-frequency = <125000000>;
3024 + };
3025 +};
3026 +
3027 +&gpio {
3028 + spi0_pins: spi0_pins {
3029 + brcm,pins = <9 10 11>;
3030 + brcm,function = <BCM2835_FSEL_ALT0>;
3031 + };
3032 +
3033 + spi0_cs_pins: spi0_cs_pins {
3034 + brcm,pins = <8 7>;
3035 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3036 + };
3037 +
3038 + spi3_pins: spi3_pins {
3039 + brcm,pins = <1 2 3>;
3040 + brcm,function = <BCM2835_FSEL_ALT3>;
3041 + };
3042 +
3043 + spi3_cs_pins: spi3_cs_pins {
3044 + brcm,pins = <0 24>;
3045 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3046 + };
3047 +
3048 + spi4_pins: spi4_pins {
3049 + brcm,pins = <5 6 7>;
3050 + brcm,function = <BCM2835_FSEL_ALT3>;
3051 + };
3052 +
3053 + spi4_cs_pins: spi4_cs_pins {
3054 + brcm,pins = <4 25>;
3055 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3056 + };
3057 +
3058 + spi5_pins: spi5_pins {
3059 + brcm,pins = <13 14 15>;
3060 + brcm,function = <BCM2835_FSEL_ALT3>;
3061 + };
3062 +
3063 + spi5_cs_pins: spi5_cs_pins {
3064 + brcm,pins = <12 26>;
3065 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3066 + };
3067 +
3068 + spi6_pins: spi6_pins {
3069 + brcm,pins = <19 20 21>;
3070 + brcm,function = <BCM2835_FSEL_ALT3>;
3071 + };
3072 +
3073 + spi6_cs_pins: spi6_cs_pins {
3074 + brcm,pins = <18 27>;
3075 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3076 + };
3077 +
3078 + i2c0_pins: i2c0 {
3079 + brcm,pins = <0 1>;
3080 + brcm,function = <BCM2835_FSEL_ALT0>;
3081 + brcm,pull = <BCM2835_PUD_UP>;
3082 + };
3083 +
3084 + i2c1_pins: i2c1 {
3085 + brcm,pins = <2 3>;
3086 + brcm,function = <BCM2835_FSEL_ALT0>;
3087 + brcm,pull = <BCM2835_PUD_UP>;
3088 + };
3089 +
3090 + i2c3_pins: i2c3 {
3091 + brcm,pins = <4 5>;
3092 + brcm,function = <BCM2835_FSEL_ALT5>;
3093 + brcm,pull = <BCM2835_PUD_UP>;
3094 + };
3095 +
3096 + i2c4_pins: i2c4 {
3097 + brcm,pins = <8 9>;
3098 + brcm,function = <BCM2835_FSEL_ALT5>;
3099 + brcm,pull = <BCM2835_PUD_UP>;
3100 + };
3101 +
3102 + i2c5_pins: i2c5 {
3103 + brcm,pins = <12 13>;
3104 + brcm,function = <BCM2835_FSEL_ALT5>;
3105 + brcm,pull = <BCM2835_PUD_UP>;
3106 + };
3107 +
3108 + i2c6_pins: i2c6 {
3109 + brcm,pins = <22 23>;
3110 + brcm,function = <BCM2835_FSEL_ALT5>;
3111 + brcm,pull = <BCM2835_PUD_UP>;
3112 + };
3113 +
3114 + i2s_pins: i2s {
3115 + brcm,pins = <18 19 20 21>;
3116 + brcm,function = <BCM2835_FSEL_ALT0>;
3117 + };
3118 +
3119 + sdio_pins: sdio_pins {
3120 + brcm,pins = <34 35 36 37 38 39>;
3121 + brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
3122 + brcm,pull = <0 2 2 2 2 2>;
3123 + };
3124 +
3125 + bt_pins: bt_pins {
3126 + brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
3127 + // to fool pinctrl
3128 + brcm,function = <0>;
3129 + brcm,pull = <2>;
3130 + };
3131 +
3132 + uart0_pins: uart0_pins {
3133 + brcm,pins = <32 33>;
3134 + brcm,function = <BCM2835_FSEL_ALT3>;
3135 + brcm,pull = <0 2>;
3136 + };
3137 +
3138 + uart1_pins: uart1_pins {
3139 + brcm,pins;
3140 + brcm,function;
3141 + brcm,pull;
3142 + };
3143 +
3144 + uart2_pins: uart2_pins {
3145 + brcm,pins = <0 1>;
3146 + brcm,function = <BCM2835_FSEL_ALT4>;
3147 + brcm,pull = <0 2>;
3148 + };
3149 +
3150 + uart3_pins: uart3_pins {
3151 + brcm,pins = <4 5>;
3152 + brcm,function = <BCM2835_FSEL_ALT4>;
3153 + brcm,pull = <0 2>;
3154 + };
3155 +
3156 + uart4_pins: uart4_pins {
3157 + brcm,pins = <8 9>;
3158 + brcm,function = <BCM2835_FSEL_ALT4>;
3159 + brcm,pull = <0 2>;
3160 + };
3161 +
3162 + uart5_pins: uart5_pins {
3163 + brcm,pins = <12 13>;
3164 + brcm,function = <BCM2835_FSEL_ALT4>;
3165 + brcm,pull = <0 2>;
3166 + };
3167 +};
3168 +
3169 +&i2c0if {
3170 + clock-frequency = <100000>;
3171 +};
3172 +
3173 +&i2c1 {
3174 + pinctrl-names = "default";
3175 + pinctrl-0 = <&i2c1_pins>;
3176 + clock-frequency = <100000>;
3177 +};
3178 +
3179 +&i2s {
3180 + pinctrl-names = "default";
3181 + pinctrl-0 = <&i2s_pins>;
3182 +};
3183 +
3184 +/ {
3185 + __overrides__ {
3186 + /delete-property/ i2c2_baudrate;
3187 + /delete-property/ i2c2_iknowwhatimdoing;
3188 + };
3189 +};
3190 +
3191 +// =============================================
3192 +// Board specific stuff here
3193 +
3194 +&sdhost {
3195 + status = "disabled";
3196 +};
3197 +
3198 +&phy1 {
3199 + led-modes = <0x00 0x08>; /* link/activity link */
3200 +};
3201 +
3202 +&gpio {
3203 + audio_pins: audio_pins {
3204 + brcm,pins = <40 41>;
3205 + brcm,function = <4>;
3206 + };
3207 +};
3208 +
3209 +&leds {
3210 + act_led: act {
3211 + label = "led0";
3212 + linux,default-trigger = "mmc0";
3213 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
3214 + };
3215 +
3216 + pwr_led: pwr {
3217 + label = "led1";
3218 + linux,default-trigger = "default-on";
3219 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
3220 + };
3221 +};
3222 +
3223 +&pwm1 {
3224 + status = "disabled";
3225 +};
3226 +
3227 +&audio {
3228 + pinctrl-names = "default";
3229 + pinctrl-0 = <&audio_pins>;
3230 +};
3231 +
3232 +/ {
3233 + __overrides__ {
3234 + act_led_gpio = <&act_led>,"gpios:4";
3235 + act_led_activelow = <&act_led>,"gpios:8";
3236 + act_led_trigger = <&act_led>,"linux,default-trigger";
3237 +
3238 + pwr_led_gpio = <&pwr_led>,"gpios:4";
3239 + pwr_led_activelow = <&pwr_led>,"gpios:8";
3240 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
3241 +
3242 + eth_led0 = <&phy1>,"led-modes:0";
3243 + eth_led1 = <&phy1>,"led-modes:4";
3244 +
3245 + sd_poll_once = <&emmc2>, "non-removable?";
3246 + spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
3247 + <&spi0>, "dmas:8=", <&dma40>;
3248 + };
3249 +};
3250 diff --git a/arch/arm/boot/dts/bcm2711-rpi-cm4.dts b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
3251 new file mode 100644
3252 index 000000000000..0ca3a0126220
3253 --- /dev/null
3254 +++ b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
3255 @@ -0,0 +1,609 @@
3256 +// SPDX-License-Identifier: GPL-2.0
3257 +/dts-v1/;
3258 +#include "bcm2711.dtsi"
3259 +#include "bcm2835-rpi.dtsi"
3260 +
3261 +/ {
3262 + compatible = "raspberrypi,4-compute-module", "brcm,bcm2711";
3263 + model = "Raspberry Pi Compute Module 4";
3264 +
3265 + chosen {
3266 + /* 8250 auxiliary UART instead of pl011 */
3267 + stdout-path = "serial1:115200n8";
3268 + };
3269 +
3270 + /* Will be filled by the bootloader */
3271 + memory@0 {
3272 + device_type = "memory";
3273 + reg = <0 0 0>;
3274 + };
3275 +
3276 + aliases {
3277 + emmc2bus = &emmc2bus;
3278 + ethernet0 = &genet;
3279 + pcie0 = &pcie0;
3280 + };
3281 +
3282 + leds {
3283 + act {
3284 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
3285 + };
3286 +
3287 + pwr {
3288 + label = "PWR";
3289 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
3290 + default-state = "keep";
3291 + linux,default-trigger = "default-on";
3292 + };
3293 + };
3294 +
3295 + wifi_pwrseq: wifi-pwrseq {
3296 + compatible = "mmc-pwrseq-simple";
3297 + reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
3298 + };
3299 +
3300 + sd_io_1v8_reg: sd_io_1v8_reg {
3301 + compatible = "regulator-gpio";
3302 + regulator-name = "vdd-sd-io";
3303 + regulator-min-microvolt = <1800000>;
3304 + regulator-max-microvolt = <3300000>;
3305 + regulator-boot-on;
3306 + regulator-always-on;
3307 + regulator-settling-time-us = <5000>;
3308 + gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
3309 + states = <1800000 0x1
3310 + 3300000 0x0>;
3311 + status = "okay";
3312 + };
3313 +
3314 + sd_vcc_reg: sd_vcc_reg {
3315 + compatible = "regulator-fixed";
3316 + regulator-name = "vcc-sd";
3317 + regulator-min-microvolt = <3300000>;
3318 + regulator-max-microvolt = <3300000>;
3319 + regulator-boot-on;
3320 + enable-active-high;
3321 + gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
3322 + };
3323 +};
3324 +
3325 +&ddc0 {
3326 + status = "okay";
3327 +};
3328 +
3329 +&ddc1 {
3330 + status = "okay";
3331 +};
3332 +
3333 +&firmware {
3334 + expgpio: gpio {
3335 + compatible = "raspberrypi,firmware-gpio";
3336 + gpio-controller;
3337 + #gpio-cells = <2>;
3338 + gpio-line-names = "BT_ON",
3339 + "WL_ON",
3340 + "PWR_LED_OFF",
3341 + "ANT1",
3342 + "VDD_SD_IO_SEL",
3343 + "CAM_GPIO",
3344 + "SD_PWR_ON",
3345 + "ANT2";
3346 + status = "okay";
3347 +
3348 + ant1: ant1 {
3349 + gpio-hog;
3350 + gpios = <3 GPIO_ACTIVE_HIGH>;
3351 + output-high;
3352 + };
3353 +
3354 + ant2: ant2 {
3355 + gpio-hog;
3356 + gpios = <7 GPIO_ACTIVE_HIGH>;
3357 + output-low;
3358 + };
3359 + };
3360 +};
3361 +
3362 +&gpio {
3363 + /*
3364 + * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
3365 + * the official GPU firmware DT blob.
3366 + *
3367 + * Legend:
3368 + * "FOO" = GPIO line named "FOO" on the schematic
3369 + * "FOO_N" = GPIO line named "FOO" on schematic, active low
3370 + */
3371 + gpio-line-names = "ID_SDA",
3372 + "ID_SCL",
3373 + "SDA1",
3374 + "SCL1",
3375 + "GPIO_GCLK",
3376 + "GPIO5",
3377 + "GPIO6",
3378 + "SPI_CE1_N",
3379 + "SPI_CE0_N",
3380 + "SPI_MISO",
3381 + "SPI_MOSI",
3382 + "SPI_SCLK",
3383 + "GPIO12",
3384 + "GPIO13",
3385 + /* Serial port */
3386 + "TXD1",
3387 + "RXD1",
3388 + "GPIO16",
3389 + "GPIO17",
3390 + "GPIO18",
3391 + "GPIO19",
3392 + "GPIO20",
3393 + "GPIO21",
3394 + "GPIO22",
3395 + "GPIO23",
3396 + "GPIO24",
3397 + "GPIO25",
3398 + "GPIO26",
3399 + "GPIO27",
3400 + "RGMII_MDIO",
3401 + "RGMIO_MDC",
3402 + /* Used by BT module */
3403 + "CTS0",
3404 + "RTS0",
3405 + "TXD0",
3406 + "RXD0",
3407 + /* Used by Wifi */
3408 + "SD1_CLK",
3409 + "SD1_CMD",
3410 + "SD1_DATA0",
3411 + "SD1_DATA1",
3412 + "SD1_DATA2",
3413 + "SD1_DATA3",
3414 + /* Shared with SPI flash */
3415 + "PWM0_MISO",
3416 + "PWM1_MOSI",
3417 + "STATUS_LED_G_CLK",
3418 + "SPIFLASH_CE_N",
3419 + "SDA0",
3420 + "SCL0",
3421 + "RGMII_RXCLK",
3422 + "RGMII_RXCTL",
3423 + "RGMII_RXD0",
3424 + "RGMII_RXD1",
3425 + "RGMII_RXD2",
3426 + "RGMII_RXD3",
3427 + "RGMII_TXCLK",
3428 + "RGMII_TXCTL",
3429 + "RGMII_TXD0",
3430 + "RGMII_TXD1",
3431 + "RGMII_TXD2",
3432 + "RGMII_TXD3";
3433 +};
3434 +
3435 +&hdmi0 {
3436 + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
3437 + clock-names = "hdmi", "bvb", "audio", "cec";
3438 + status = "okay";
3439 +};
3440 +
3441 +&hdmi1 {
3442 + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
3443 + clock-names = "hdmi", "bvb", "audio", "cec";
3444 + status = "okay";
3445 +};
3446 +
3447 +&hvs {
3448 + clocks = <&firmware_clocks 4>;
3449 +};
3450 +
3451 +&pixelvalve0 {
3452 + status = "okay";
3453 +};
3454 +
3455 +&pixelvalve1 {
3456 + status = "okay";
3457 +};
3458 +
3459 +&pixelvalve2 {
3460 + status = "okay";
3461 +};
3462 +
3463 +&pixelvalve4 {
3464 + status = "okay";
3465 +};
3466 +
3467 +&vc4 {
3468 + status = "okay";
3469 +};
3470 +
3471 +&vec {
3472 + status = "disabled";
3473 +};
3474 +
3475 +&pwm1 {
3476 + pinctrl-names = "default";
3477 + pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
3478 + status = "okay";
3479 +};
3480 +
3481 +/* SDHCI is used to control the SDIO for wireless */
3482 +&sdhci {
3483 + #address-cells = <1>;
3484 + #size-cells = <0>;
3485 + pinctrl-names = "default";
3486 + pinctrl-0 = <&emmc_gpio34>;
3487 + bus-width = <4>;
3488 + non-removable;
3489 + mmc-pwrseq = <&wifi_pwrseq>;
3490 + status = "okay";
3491 +
3492 + brcmf: wifi@1 {
3493 + reg = <1>;
3494 + compatible = "brcm,bcm4329-fmac";
3495 + };
3496 +};
3497 +
3498 +/* EMMC2 is used to drive the EMMC card */
3499 +&emmc2 {
3500 + bus-width = <8>;
3501 + vqmmc-supply = <&sd_io_1v8_reg>;
3502 + vmmc-supply = <&sd_vcc_reg>;
3503 + broken-cd;
3504 + status = "okay";
3505 +};
3506 +
3507 +&genet {
3508 + phy-handle = <&phy1>;
3509 + phy-mode = "rgmii-rxid";
3510 + status = "okay";
3511 +};
3512 +
3513 +&genet_mdio {
3514 + phy1: ethernet-phy@1 {
3515 + /* No PHY interrupt */
3516 + reg = <0x1>;
3517 + };
3518 +};
3519 +
3520 +/* uart0 communicates with the BT module */
3521 +&uart0 {
3522 + pinctrl-names = "default";
3523 + pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
3524 + uart-has-rtscts;
3525 + status = "okay";
3526 +
3527 + bluetooth {
3528 + compatible = "brcm,bcm43438-bt";
3529 + max-speed = <2000000>;
3530 + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
3531 + };
3532 +};
3533 +
3534 +/* uart1 is mapped to the pin header */
3535 +&uart1 {
3536 + pinctrl-names = "default";
3537 + pinctrl-0 = <&uart1_gpio14>;
3538 + status = "okay";
3539 +};
3540 +
3541 +&vchiq {
3542 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
3543 +};
3544 +
3545 +// =============================================
3546 +// Downstream rpi- changes
3547 +
3548 +#define BCM2711
3549 +
3550 +#include "bcm270x.dtsi"
3551 +#include "bcm271x-rpi-bt.dtsi"
3552 +
3553 +/ {
3554 + soc {
3555 + /delete-node/ pixelvalve@7e807000;
3556 + /delete-node/ hdmi@7e902000;
3557 + };
3558 +};
3559 +
3560 +#include "bcm2711-rpi.dtsi"
3561 +#include "bcm283x-rpi-csi0-2lane.dtsi"
3562 +#include "bcm283x-rpi-csi1-4lane.dtsi"
3563 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
3564 +
3565 +/ {
3566 + chosen {
3567 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
3568 + };
3569 +
3570 + aliases {
3571 + serial0 = &uart1;
3572 + serial1 = &uart0;
3573 + mmc0 = &emmc2;
3574 + mmc1 = &mmcnr;
3575 + mmc2 = &sdhost;
3576 + /delete-property/ i2c2;
3577 + i2c3 = &i2c3;
3578 + i2c4 = &i2c4;
3579 + i2c5 = &i2c5;
3580 + i2c6 = &i2c6;
3581 + /delete-property/ intc;
3582 + };
3583 +
3584 + /delete-node/ wifi-pwrseq;
3585 +};
3586 +
3587 +&mmcnr {
3588 + pinctrl-names = "default";
3589 + pinctrl-0 = <&sdio_pins>;
3590 + bus-width = <4>;
3591 + status = "okay";
3592 +};
3593 +
3594 +&uart0 {
3595 + pinctrl-0 = <&uart0_pins &bt_pins>;
3596 + status = "okay";
3597 +};
3598 +
3599 +&uart1 {
3600 + pinctrl-0 = <&uart1_pins>;
3601 +};
3602 +
3603 +&spi0 {
3604 + pinctrl-names = "default";
3605 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
3606 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
3607 +
3608 + spidev0: spidev@0{
3609 + compatible = "spidev";
3610 + reg = <0>; /* CE0 */
3611 + #address-cells = <1>;
3612 + #size-cells = <0>;
3613 + spi-max-frequency = <125000000>;
3614 + };
3615 +
3616 + spidev1: spidev@1{
3617 + compatible = "spidev";
3618 + reg = <1>; /* CE1 */
3619 + #address-cells = <1>;
3620 + #size-cells = <0>;
3621 + spi-max-frequency = <125000000>;
3622 + };
3623 +};
3624 +
3625 +&gpio {
3626 + spi0_pins: spi0_pins {
3627 + brcm,pins = <9 10 11>;
3628 + brcm,function = <BCM2835_FSEL_ALT0>;
3629 + };
3630 +
3631 + spi0_cs_pins: spi0_cs_pins {
3632 + brcm,pins = <8 7>;
3633 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3634 + };
3635 +
3636 + spi3_pins: spi3_pins {
3637 + brcm,pins = <1 2 3>;
3638 + brcm,function = <BCM2835_FSEL_ALT3>;
3639 + };
3640 +
3641 + spi3_cs_pins: spi3_cs_pins {
3642 + brcm,pins = <0 24>;
3643 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3644 + };
3645 +
3646 + spi4_pins: spi4_pins {
3647 + brcm,pins = <5 6 7>;
3648 + brcm,function = <BCM2835_FSEL_ALT3>;
3649 + };
3650 +
3651 + spi4_cs_pins: spi4_cs_pins {
3652 + brcm,pins = <4 25>;
3653 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3654 + };
3655 +
3656 + spi5_pins: spi5_pins {
3657 + brcm,pins = <13 14 15>;
3658 + brcm,function = <BCM2835_FSEL_ALT3>;
3659 + };
3660 +
3661 + spi5_cs_pins: spi5_cs_pins {
3662 + brcm,pins = <12 26>;
3663 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3664 + };
3665 +
3666 + spi6_pins: spi6_pins {
3667 + brcm,pins = <19 20 21>;
3668 + brcm,function = <BCM2835_FSEL_ALT3>;
3669 + };
3670 +
3671 + spi6_cs_pins: spi6_cs_pins {
3672 + brcm,pins = <18 27>;
3673 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3674 + };
3675 +
3676 + i2c0_pins: i2c0 {
3677 + brcm,pins = <0 1>;
3678 + brcm,function = <BCM2835_FSEL_ALT0>;
3679 + brcm,pull = <BCM2835_PUD_UP>;
3680 + };
3681 +
3682 + i2c1_pins: i2c1 {
3683 + brcm,pins = <2 3>;
3684 + brcm,function = <BCM2835_FSEL_ALT0>;
3685 + brcm,pull = <BCM2835_PUD_UP>;
3686 + };
3687 +
3688 + i2c3_pins: i2c3 {
3689 + brcm,pins = <4 5>;
3690 + brcm,function = <BCM2835_FSEL_ALT5>;
3691 + brcm,pull = <BCM2835_PUD_UP>;
3692 + };
3693 +
3694 + i2c4_pins: i2c4 {
3695 + brcm,pins = <8 9>;
3696 + brcm,function = <BCM2835_FSEL_ALT5>;
3697 + brcm,pull = <BCM2835_PUD_UP>;
3698 + };
3699 +
3700 + i2c5_pins: i2c5 {
3701 + brcm,pins = <12 13>;
3702 + brcm,function = <BCM2835_FSEL_ALT5>;
3703 + brcm,pull = <BCM2835_PUD_UP>;
3704 + };
3705 +
3706 + i2c6_pins: i2c6 {
3707 + brcm,pins = <22 23>;
3708 + brcm,function = <BCM2835_FSEL_ALT5>;
3709 + brcm,pull = <BCM2835_PUD_UP>;
3710 + };
3711 +
3712 + i2s_pins: i2s {
3713 + brcm,pins = <18 19 20 21>;
3714 + brcm,function = <BCM2835_FSEL_ALT0>;
3715 + };
3716 +
3717 + sdio_pins: sdio_pins {
3718 + brcm,pins = <34 35 36 37 38 39>;
3719 + brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
3720 + brcm,pull = <0 2 2 2 2 2>;
3721 + };
3722 +
3723 + bt_pins: bt_pins {
3724 + brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
3725 + // to fool pinctrl
3726 + brcm,function = <0>;
3727 + brcm,pull = <2>;
3728 + };
3729 +
3730 + uart0_pins: uart0_pins {
3731 + brcm,pins = <32 33>;
3732 + brcm,function = <BCM2835_FSEL_ALT3>;
3733 + brcm,pull = <0 2>;
3734 + };
3735 +
3736 + uart1_pins: uart1_pins {
3737 + brcm,pins;
3738 + brcm,function;
3739 + brcm,pull;
3740 + };
3741 +
3742 + uart2_pins: uart2_pins {
3743 + brcm,pins = <0 1>;
3744 + brcm,function = <BCM2835_FSEL_ALT4>;
3745 + brcm,pull = <0 2>;
3746 + };
3747 +
3748 + uart3_pins: uart3_pins {
3749 + brcm,pins = <4 5>;
3750 + brcm,function = <BCM2835_FSEL_ALT4>;
3751 + brcm,pull = <0 2>;
3752 + };
3753 +
3754 + uart4_pins: uart4_pins {
3755 + brcm,pins = <8 9>;
3756 + brcm,function = <BCM2835_FSEL_ALT4>;
3757 + brcm,pull = <0 2>;
3758 + };
3759 +
3760 + uart5_pins: uart5_pins {
3761 + brcm,pins = <12 13>;
3762 + brcm,function = <BCM2835_FSEL_ALT4>;
3763 + brcm,pull = <0 2>;
3764 + };
3765 +};
3766 +
3767 +&i2c0if {
3768 + clock-frequency = <100000>;
3769 +};
3770 +
3771 +&i2c1 {
3772 + pinctrl-names = "default";
3773 + pinctrl-0 = <&i2c1_pins>;
3774 + clock-frequency = <100000>;
3775 +};
3776 +
3777 +&i2s {
3778 + pinctrl-names = "default";
3779 + pinctrl-0 = <&i2s_pins>;
3780 +};
3781 +
3782 +/ {
3783 + __overrides__ {
3784 + /delete-property/ i2c2_baudrate;
3785 + /delete-property/ i2c2_iknowwhatimdoing;
3786 + };
3787 +};
3788 +
3789 +// =============================================
3790 +// Board specific stuff here
3791 +
3792 +&pcie0 {
3793 + brcm,enable-l1ss;
3794 +};
3795 +
3796 +&sdhost {
3797 + status = "disabled";
3798 +};
3799 +
3800 +&phy1 {
3801 + led-modes = <0x00 0x08>; /* link/activity link */
3802 +};
3803 +
3804 +&gpio {
3805 + audio_pins: audio_pins {
3806 + brcm,pins = <40 41>;
3807 + brcm,function = <4>;
3808 + };
3809 +};
3810 +
3811 +&leds {
3812 + act_led: act {
3813 + label = "led0";
3814 + linux,default-trigger = "mmc0";
3815 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
3816 + };
3817 +
3818 + pwr_led: pwr {
3819 + label = "led1";
3820 + linux,default-trigger = "default-on";
3821 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
3822 + };
3823 +};
3824 +
3825 +&pwm1 {
3826 + status = "disabled";
3827 +};
3828 +
3829 +&audio {
3830 + pinctrl-names = "default";
3831 + pinctrl-0 = <&audio_pins>;
3832 +};
3833 +
3834 +/ {
3835 + __overrides__ {
3836 + act_led_gpio = <&act_led>,"gpios:4";
3837 + act_led_activelow = <&act_led>,"gpios:8";
3838 + act_led_trigger = <&act_led>,"linux,default-trigger";
3839 +
3840 + pwr_led_gpio = <&pwr_led>,"gpios:4";
3841 + pwr_led_activelow = <&pwr_led>,"gpios:8";
3842 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
3843 +
3844 + eth_led0 = <&phy1>,"led-modes:0";
3845 + eth_led1 = <&phy1>,"led-modes:4";
3846 +
3847 + ant1 = <&ant1>,"output-high?=on",
3848 + <&ant1>, "output-low?=off",
3849 + <&ant2>, "output-high?=off",
3850 + <&ant2>, "output-low?=on";
3851 + ant2 = <&ant1>,"output-high?=off",
3852 + <&ant1>, "output-low?=on",
3853 + <&ant2>, "output-high?=on",
3854 + <&ant2>, "output-low?=off";
3855 + noant = <&ant1>,"output-high?=off",
3856 + <&ant1>, "output-low?=on",
3857 + <&ant2>, "output-high?=off",
3858 + <&ant2>, "output-low?=on";
3859 +
3860 + sd_poll_once = <&emmc2>, "non-removable?";
3861 + spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
3862 + <&spi0>, "dmas:8=", <&dma40>;
3863 + };
3864 +};
3865 diff --git a/arch/arm/boot/dts/bcm2711-rpi.dtsi b/arch/arm/boot/dts/bcm2711-rpi.dtsi
3866 new file mode 100644
3867 index 000000000000..4f903a787d65
3868 --- /dev/null
3869 +++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi
3870 @@ -0,0 +1,201 @@
3871 +// SPDX-License-Identifier: GPL-2.0
3872 +#include "bcm270x-rpi.dtsi"
3873 +
3874 +/ {
3875 + __overrides__ {
3876 + arm_freq;
3877 + };
3878 +
3879 + v3dbus: v3dbus {
3880 + compatible = "simple-bus";
3881 + #address-cells = <1>;
3882 + #size-cells = <2>;
3883 + ranges = <0x7c500000 0x0 0xfc500000 0x0 0x03300000>,
3884 + <0x40000000 0x0 0xff800000 0x0 0x00800000>;
3885 + dma-ranges = <0x00000000 0x0 0x00000000 0x4 0x00000000>;
3886 +
3887 + v3d: v3d@7ec04000 {
3888 + compatible = "brcm,2711-v3d";
3889 + reg =
3890 + <0x7ec00000 0x0 0x4000>,
3891 + <0x7ec04000 0x0 0x4000>;
3892 + reg-names = "hub", "core0";
3893 +
3894 + power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
3895 + resets = <&pm BCM2835_RESET_V3D>;
3896 + clocks = <&firmware_clocks 5>;
3897 + clocks-names = "v3d";
3898 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
3899 + status = "disabled";
3900 + };
3901 + };
3902 +
3903 + scb: scb {
3904 + /* Add a label */
3905 + };
3906 +};
3907 +
3908 +&cma {
3909 + /* Limit cma to the lower 768MB to allow room for HIGHMEM on 32-bit */
3910 + alloc-ranges = <0x0 0x00000000 0x30000000>;
3911 +};
3912 +
3913 +&scb {
3914 + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x0 0x03800000>,
3915 + <0x0 0x40000000 0x0 0xff800000 0x0 0x00800000>,
3916 + <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>,
3917 + <0x0 0x00000000 0x0 0x00000000 0x0 0xfc000000>;
3918 + dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x4 0x00000000>;
3919 +
3920 + dma40: dma@7e007b00 {
3921 + compatible = "brcm,bcm2711-dma";
3922 + reg = <0x0 0x7e007b00 0x0 0x400>;
3923 + interrupts =
3924 + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, /* dma4 11 */
3925 + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* dma4 12 */
3926 + <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, /* dma4 13 */
3927 + <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; /* dma4 14 */
3928 + interrupt-names = "dma11",
3929 + "dma12",
3930 + "dma13",
3931 + "dma14";
3932 + #dma-cells = <1>;
3933 + brcm,dma-channel-mask = <0x7800>;
3934 + };
3935 +
3936 + xhci: xhci@7e9c0000 {
3937 + compatible = "generic-xhci";
3938 + status = "disabled";
3939 + reg = <0x0 0x7e9c0000 0x0 0x100000>;
3940 + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
3941 + power-domains = <&power RPI_POWER_DOMAIN_USB>;
3942 + };
3943 +
3944 + hevc-decoder@7eb00000 {
3945 + compatible = "raspberrypi,rpivid-hevc-decoder";
3946 + reg = <0x0 0x7eb00000 0x0 0x10000>;
3947 + status = "okay";
3948 + };
3949 +
3950 + rpivid-local-intc@7eb10000 {
3951 + compatible = "raspberrypi,rpivid-local-intc";
3952 + reg = <0x0 0x7eb10000 0x0 0x1000>;
3953 + status = "okay";
3954 + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
3955 + };
3956 +
3957 + h264-decoder@7eb20000 {
3958 + compatible = "raspberrypi,rpivid-h264-decoder";
3959 + reg = <0x0 0x7eb20000 0x0 0x10000>;
3960 + status = "okay";
3961 + };
3962 +
3963 + vp9-decoder@7eb30000 {
3964 + compatible = "raspberrypi,rpivid-vp9-decoder";
3965 + reg = <0x0 0x7eb30000 0x0 0x10000>;
3966 + status = "okay";
3967 + };
3968 +};
3969 +
3970 +&dma40 {
3971 + /* The VPU firmware uses DMA channel 11 for VCHIQ */
3972 + brcm,dma-channel-mask = <0x7000>;
3973 +};
3974 +
3975 +&vchiq {
3976 + compatible = "brcm,bcm2711-vchiq";
3977 +};
3978 +
3979 +&firmwarekms {
3980 + compatible = "raspberrypi,rpi-firmware-kms-2711";
3981 + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
3982 +};
3983 +
3984 +&smi {
3985 + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
3986 +};
3987 +
3988 +&mmc {
3989 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
3990 +};
3991 +
3992 +&mmcnr {
3993 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
3994 +};
3995 +
3996 +&csi0 {
3997 + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
3998 +};
3999 +
4000 +&csi1 {
4001 + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
4002 +};
4003 +
4004 +&random {
4005 + compatible = "brcm,bcm2711-rng200";
4006 + status = "okay";
4007 +};
4008 +
4009 +&usb {
4010 + /* Enable the FIQ support */
4011 + reg = <0x7e980000 0x10000>,
4012 + <0x7e00b200 0x200>;
4013 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
4014 + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
4015 + status = "disabled";
4016 +};
4017 +
4018 +&gpio {
4019 + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
4020 + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
4021 +};
4022 +
4023 +&emmc2 {
4024 + mmc-ddr-3_3v;
4025 +};
4026 +
4027 +&vc4 {
4028 + status = "disabled";
4029 +};
4030 +
4031 +&pixelvalve0 {
4032 + status = "disabled";
4033 +};
4034 +
4035 +&pixelvalve1 {
4036 + status = "disabled";
4037 +};
4038 +
4039 +&pixelvalve2 {
4040 + status = "disabled";
4041 +};
4042 +
4043 +&pixelvalve3 {
4044 + status = "disabled";
4045 +};
4046 +
4047 +&pixelvalve4 {
4048 + status = "disabled";
4049 +};
4050 +
4051 +&hdmi0 {
4052 + dmas = <&dma (10|(1<<27))>;
4053 + status = "disabled";
4054 +};
4055 +
4056 +&ddc0 {
4057 + status = "disabled";
4058 +};
4059 +
4060 +&hdmi1 {
4061 + dmas = <&dma (17|(1<<27))>;
4062 + status = "disabled";
4063 +};
4064 +
4065 +&ddc1 {
4066 + status = "disabled";
4067 +};
4068 +
4069 +&dvp {
4070 + status = "disabled";
4071 +};
4072 diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
4073 index 3d040f6e2a20..6e0339266027 100644
4074 --- a/arch/arm/boot/dts/bcm2711.dtsi
4075 +++ b/arch/arm/boot/dts/bcm2711.dtsi
4076 @@ -318,7 +318,8 @@ hdmi0: hdmi@7ef00700 {
4077 <0x7ef01f00 0x400>,
4078 <0x7ef00200 0x80>,
4079 <0x7ef04300 0x100>,
4080 - <0x7ef20000 0x100>;
4081 + <0x7ef20000 0x100>,
4082 + <0x7ef00100 0x30>;
4083 reg-names = "hdmi",
4084 "dvp",
4085 "phy",
4086 @@ -327,12 +328,18 @@ hdmi0: hdmi@7ef00700 {
4087 "metadata",
4088 "csc",
4089 "cec",
4090 - "hd";
4091 + "hd",
4092 + "intr2";
4093 + clocks = <&firmware_clocks 13>,
4094 + <&firmware_clocks 14>,
4095 + <&dvp 0>,
4096 + <&clk_27MHz>;
4097 clock-names = "hdmi", "bvb", "audio", "cec";
4098 resets = <&dvp 0>;
4099 ddc = <&ddc0>;
4100 dmas = <&dma 10>;
4101 dma-names = "audio-rx";
4102 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
4103 status = "disabled";
4104 };
4105
4106 @@ -354,7 +361,8 @@ hdmi1: hdmi@7ef05700 {
4107 <0x7ef06f00 0x400>,
4108 <0x7ef00280 0x80>,
4109 <0x7ef09300 0x100>,
4110 - <0x7ef20000 0x100>;
4111 + <0x7ef20000 0x100>,
4112 + <0x7ef00100 0x30>;
4113 reg-names = "hdmi",
4114 "dvp",
4115 "phy",
4116 @@ -363,12 +371,18 @@ hdmi1: hdmi@7ef05700 {
4117 "metadata",
4118 "csc",
4119 "cec",
4120 - "hd";
4121 + "hd",
4122 + "intr2";
4123 ddc = <&ddc1>;
4124 clock-names = "hdmi", "bvb", "audio", "cec";
4125 + clocks = <&firmware_clocks 13>,
4126 + <&firmware_clocks 14>,
4127 + <&dvp 0>,
4128 + <&clk_27MHz>;
4129 resets = <&dvp 1>;
4130 dmas = <&dma 17>;
4131 dma-names = "audio-rx";
4132 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
4133 status = "disabled";
4134 };
4135
4136 @@ -468,14 +482,14 @@ cpu3: cpu@3 {
4137 scb {
4138 compatible = "simple-bus";
4139 #address-cells = <2>;
4140 - #size-cells = <1>;
4141 + #size-cells = <2>;
4142
4143 - ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>,
4144 - <0x6 0x00000000 0x6 0x00000000 0x40000000>;
4145 + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x0 0x03800000>,
4146 + <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>;
4147
4148 pcie0: pcie@7d500000 {
4149 compatible = "brcm,bcm2711-pcie";
4150 - reg = <0x0 0x7d500000 0x9310>;
4151 + reg = <0x0 0x7d500000 0x0 0x9310>;
4152 device_type = "pci";
4153 #address-cells = <3>;
4154 #interrupt-cells = <1>;
4155 @@ -503,7 +517,7 @@ pcie0: pcie@7d500000 {
4156
4157 genet: ethernet@7d580000 {
4158 compatible = "brcm,bcm2711-genet-v5";
4159 - reg = <0x0 0x7d580000 0x10000>;
4160 + reg = <0x0 0x7d580000 0x0 0x10000>;
4161 #address-cells = <0x1>;
4162 #size-cells = <0x1>;
4163 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
4164 @@ -1010,7 +1024,7 @@ &cma {
4165 alloc-ranges = <0x0 0x00000000 0x40000000>;
4166 };
4167
4168 -&i2c0 {
4169 +&i2c0if {
4170 compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
4171 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
4172 };
4173 diff --git a/arch/arm/boot/dts/bcm271x-rpi-bt.dtsi b/arch/arm/boot/dts/bcm271x-rpi-bt.dtsi
4174 new file mode 100644
4175 index 000000000000..6b9b79f74cf3
4176 --- /dev/null
4177 +++ b/arch/arm/boot/dts/bcm271x-rpi-bt.dtsi
4178 @@ -0,0 +1,26 @@
4179 +// SPDX-License-Identifier: GPL-2.0
4180 +
4181 +&uart0 {
4182 + bt: bluetooth {
4183 + compatible = "brcm,bcm43438-bt";
4184 + max-speed = <3000000>;
4185 + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
4186 + status = "disabled";
4187 + };
4188 +};
4189 +
4190 +&uart1 {
4191 + minibt: bluetooth {
4192 + compatible = "brcm,bcm43438-bt";
4193 + max-speed = <460800>;
4194 + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
4195 + status = "disabled";
4196 + };
4197 +};
4198 +
4199 +/ {
4200 + __overrides__ {
4201 + krnbt = <&bt>,"status";
4202 + krnbt_baudrate = <&bt>,"max-speed:0";
4203 + };
4204 +};
4205 diff --git a/arch/arm/boot/dts/bcm2835-common.dtsi b/arch/arm/boot/dts/bcm2835-common.dtsi
4206 index 4119271c979d..bd77ba3a3562 100644
4207 --- a/arch/arm/boot/dts/bcm2835-common.dtsi
4208 +++ b/arch/arm/boot/dts/bcm2835-common.dtsi
4209 @@ -116,12 +116,14 @@ hdmi: hdmi@7e902000 {
4210 compatible = "brcm,bcm2835-hdmi";
4211 reg = <0x7e902000 0x600>,
4212 <0x7e808000 0x100>;
4213 + reg-names = "hdmi",
4214 + "hd";
4215 interrupts = <2 8>, <2 9>;
4216 ddc = <&i2c2>;
4217 clocks = <&clocks BCM2835_PLLH_PIX>,
4218 <&clocks BCM2835_CLOCK_HSM>;
4219 clock-names = "pixel", "hdmi";
4220 - dmas = <&dma 17>;
4221 + dmas = <&dma (17|(1<<27))>;
4222 dma-names = "audio-rx";
4223 status = "disabled";
4224 };
4225 diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
4226 index 40b9405f1a8e..d2384d8e8555 100644
4227 --- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
4228 +++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
4229 @@ -126,3 +126,8 @@ &uart0 {
4230 pinctrl-0 = <&uart0_gpio14>;
4231 status = "okay";
4232 };
4233 +
4234 +/* i2c on camera/display connector is gpio 28&29 */
4235 +&i2c0mux {
4236 + pinctrl-1 = <&i2c0_gpio28>;
4237 +};
4238 diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
4239 index 11edb581dbaf..4ceca674b752 100644
4240 --- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
4241 +++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
4242 @@ -121,3 +121,10 @@ &uart0 {
4243 pinctrl-0 = <&uart0_gpio14>;
4244 status = "okay";
4245 };
4246 +
4247 +/* i2c0 on camera/display connector is gpio 0&1. Not exposed on header.
4248 + * To avoid having to remap everything, map both ports to gpios 0&1
4249 + */
4250 +&i2c0mux {
4251 + pinctrl-1 = <&i2c0_gpio0>;
4252 +};
4253 diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
4254 index 1b435c64bd9c..8f2d10d82fa1 100644
4255 --- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
4256 +++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
4257 @@ -128,3 +128,8 @@ &uart0 {
4258 pinctrl-0 = <&uart0_gpio14>;
4259 status = "okay";
4260 };
4261 +
4262 +/* i2c on camera/display connector is gpio 28&29 */
4263 +&i2c0mux {
4264 + pinctrl-1 = <&i2c0_gpio28>;
4265 +};
4266 diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
4267 index a23c25c00eea..547c88a3ae9f 100644
4268 --- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
4269 +++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
4270 @@ -121,3 +121,10 @@ &uart0 {
4271 pinctrl-0 = <&uart0_gpio14>;
4272 status = "okay";
4273 };
4274 +
4275 +/* i2c0 on camera/display connector is gpio 0&1. Not exposed on header.
4276 + * To avoid having to remap everything, map both ports to gpios 0&1
4277 + */
4278 +&i2c0mux {
4279 + pinctrl-1 = <&i2c0_gpio0>;
4280 +};
4281 diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
4282 index 1b63d6b19750..073fc99ef8a2 100644
4283 --- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
4284 +++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
4285 @@ -116,3 +116,10 @@ &uart0 {
4286 pinctrl-0 = <&uart0_gpio14>;
4287 status = "okay";
4288 };
4289 +
4290 +/* camera/display connector use BSC1 on GPIOS 2&3.
4291 + * To avoid having to remap everything, map both ports to gpios 0&1
4292 + */
4293 +&i2c0mux {
4294 + pinctrl-1 = <&i2c0_gpio0>;
4295 +};
4296 diff --git a/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts b/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts
4297 index a75c882e6575..95564c93a645 100644
4298 --- a/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts
4299 +++ b/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts
4300 @@ -95,3 +95,8 @@ &uart0 {
4301 pinctrl-0 = <&uart0_gpio14>;
4302 status = "okay";
4303 };
4304 +
4305 +/* WHAT TO DO HERE? */
4306 +&i2c0mux {
4307 + pinctrl-1 = <&i2c0_gpio28>;
4308 +};
4309 diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
4310 index 33b2b77aa47d..3ea5c7e6be54 100644
4311 --- a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
4312 +++ b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
4313 @@ -149,3 +149,8 @@ &uart1 {
4314 pinctrl-0 = <&uart1_gpio14>;
4315 status = "okay";
4316 };
4317 +
4318 +/* i2c on camera/display connector is gpio 28&29 */
4319 +&i2c0mux {
4320 + pinctrl-1 = <&i2c0_gpio28>;
4321 +};
4322 diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
4323 index 6f9b3a908f28..a0eabab12c99 100644
4324 --- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts
4325 +++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
4326 @@ -117,3 +117,8 @@ &uart0 {
4327 pinctrl-0 = <&uart0_gpio14>;
4328 status = "okay";
4329 };
4330 +
4331 +/* i2c on camera/display connector is gpio 28&29 */
4332 +&i2c0mux {
4333 + pinctrl-1 = <&i2c0_gpio28>;
4334 +};
4335 diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
4336 index 87ddcad76083..1b16cb9ccb88 100644
4337 --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
4338 +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
4339 @@ -19,6 +19,11 @@ firmware: firmware {
4340
4341 mboxes = <&mailbox>;
4342 dma-ranges;
4343 +
4344 + firmware_clocks: clocks {
4345 + compatible = "raspberrypi,firmware-clocks";
4346 + #clock-cells = <1>;
4347 + };
4348 };
4349
4350 power: power {
4351 @@ -49,13 +54,17 @@ alt0: alt0 {
4352 };
4353 };
4354
4355 -&i2c0 {
4356 - pinctrl-names = "default";
4357 - pinctrl-0 = <&i2c0_gpio0>;
4358 +&i2c0if {
4359 status = "okay";
4360 clock-frequency = <100000>;
4361 };
4362
4363 +&i2c0mux {
4364 + pinctrl-0 = <&i2c0_gpio0>;
4365 + /* pinctrl-1 varies based on platform */
4366 + status = "okay";
4367 +};
4368 +
4369 &i2c1 {
4370 pinctrl-names = "default";
4371 pinctrl-0 = <&i2c1_gpio2>;
4372 diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
4373 index 0549686134ea..2ea891228ea0 100644
4374 --- a/arch/arm/boot/dts/bcm2835.dtsi
4375 +++ b/arch/arm/boot/dts/bcm2835.dtsi
4376 @@ -19,7 +19,7 @@ cpu@0 {
4377
4378 soc {
4379 ranges = <0x7e000000 0x20000000 0x02000000>;
4380 - dma-ranges = <0x40000000 0x00000000 0x20000000>;
4381 + dma-ranges = <0x80000000 0x00000000 0x20000000>;
4382 };
4383
4384 arm-pmu {
4385 diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
4386 index d8af8eeac7b6..bf22b74359d8 100644
4387 --- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
4388 +++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
4389 @@ -128,3 +128,8 @@ &uart0 {
4390 pinctrl-0 = <&uart0_gpio14>;
4391 status = "okay";
4392 };
4393 +
4394 +/* i2c on camera/display connector is gpio 28&29 */
4395 +&i2c0mux {
4396 + pinctrl-1 = <&i2c0_gpio28>;
4397 +};
4398 diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
4399 index 77099a7871b0..9529c0475673 100644
4400 --- a/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
4401 +++ b/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
4402 @@ -178,3 +178,8 @@ &uart1 {
4403 pinctrl-0 = <&uart1_gpio14>;
4404 status = "okay";
4405 };
4406 +
4407 +/* i2c on camera/display connector is gpio 44&45 */
4408 +&i2c0mux {
4409 + pinctrl-1 = <&i2c0_gpio44>;
4410 +};
4411 diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
4412 index 61010266ca9a..40cb269aed0f 100644
4413 --- a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
4414 +++ b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
4415 @@ -181,3 +181,8 @@ &uart1 {
4416 pinctrl-0 = <&uart1_gpio14>;
4417 status = "okay";
4418 };
4419 +
4420 +/* i2c on camera/display connector is gpio 44&45 */
4421 +&i2c0mux {
4422 + pinctrl-1 = <&i2c0_gpio44>;
4423 +};
4424 diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
4425 index dd4a48604097..8f16b6b3fe08 100644
4426 --- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
4427 +++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
4428 @@ -174,3 +174,8 @@ &sdhost {
4429 status = "okay";
4430 bus-width = <4>;
4431 };
4432 +
4433 +/* i2c on camera/display connector is gpio 44&45 */
4434 +&i2c0mux {
4435 + pinctrl-1 = <&i2c0_gpio44>;
4436 +};
4437 diff --git a/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts b/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts
4438 index 588d9411ceb6..dde209ade51b 100644
4439 --- a/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts
4440 +++ b/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts
4441 @@ -94,3 +94,8 @@ &uart0 {
4442 pinctrl-0 = <&uart0_gpio14>;
4443 status = "okay";
4444 };
4445 +
4446 +/* WHAT TO DO HERE? */
4447 +&i2c0mux {
4448 + pinctrl-1 = <&i2c0_gpio28>;
4449 +};
4450 diff --git a/arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi b/arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi
4451 new file mode 100644
4452 index 000000000000..6e4ce8622b47
4453 --- /dev/null
4454 +++ b/arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi
4455 @@ -0,0 +1,4 @@
4456 +// SPDX-License-Identifier: GPL-2.0-only
4457 +&csi0 {
4458 + brcm,num-data-lanes = <2>;
4459 +};
4460 diff --git a/arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi b/arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
4461 new file mode 100644
4462 index 000000000000..6938f4daacdc
4463 --- /dev/null
4464 +++ b/arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
4465 @@ -0,0 +1,4 @@
4466 +// SPDX-License-Identifier: GPL-2.0-only
4467 +&csi1 {
4468 + brcm,num-data-lanes = <2>;
4469 +};
4470 diff --git a/arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi b/arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi
4471 new file mode 100644
4472 index 000000000000..b37037437bee
4473 --- /dev/null
4474 +++ b/arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi
4475 @@ -0,0 +1,4 @@
4476 +// SPDX-License-Identifier: GPL-2.0-only
4477 +&csi1 {
4478 + brcm,num-data-lanes = <4>;
4479 +};
4480 diff --git a/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi b/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi
4481 new file mode 100644
4482 index 000000000000..38f0074bce3f
4483 --- /dev/null
4484 +++ b/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi
4485 @@ -0,0 +1,4 @@
4486 +&i2c0mux {
4487 + pinctrl-0 = <&i2c0_gpio0>;
4488 + pinctrl-1 = <&i2c0_gpio28>;
4489 +};
4490 diff --git a/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi b/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi
4491 new file mode 100644
4492 index 000000000000..119946d878db
4493 --- /dev/null
4494 +++ b/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi
4495 @@ -0,0 +1,4 @@
4496 +&i2c0mux {
4497 + pinctrl-0 = <&i2c0_gpio0>;
4498 + pinctrl-1 = <&i2c0_gpio44>;
4499 +};
4500 diff --git a/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi b/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
4501 deleted file mode 100644
4502 index 0ff0e9e25327..000000000000
4503 --- a/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
4504 +++ /dev/null
4505 @@ -1,7 +0,0 @@
4506 -// SPDX-License-Identifier: GPL-2.0
4507 -&usb {
4508 - dr_mode = "peripheral";
4509 - g-rx-fifo-size = <256>;
4510 - g-np-tx-fifo-size = <32>;
4511 - g-tx-fifo-size = <256 256 512 512 512 768 768>;
4512 -};
4513 diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
4514 index 0f3be55201a5..6d305b8b5ebe 100644
4515 --- a/arch/arm/boot/dts/bcm283x.dtsi
4516 +++ b/arch/arm/boot/dts/bcm283x.dtsi
4517 @@ -334,7 +334,7 @@ spi: spi@7e204000 {
4518 status = "disabled";
4519 };
4520
4521 - i2c0: i2c@7e205000 {
4522 + i2c0if: i2c@7e205000 {
4523 compatible = "brcm,bcm2835-i2c";
4524 reg = <0x7e205000 0x200>;
4525 interrupts = <2 21>;
4526 @@ -344,6 +344,30 @@ i2c0: i2c@7e205000 {
4527 status = "disabled";
4528 };
4529
4530 + i2c0mux: i2c0mux {
4531 + compatible = "i2c-mux-pinctrl";
4532 + #address-cells = <1>;
4533 + #size-cells = <0>;
4534 +
4535 + i2c-parent = <&i2c0if>;
4536 +
4537 + pinctrl-names = "i2c0", "i2c_csi_dsi";
4538 +
4539 + status = "disabled";
4540 +
4541 + i2c0: i2c@0 {
4542 + reg = <0>;
4543 + #address-cells = <1>;
4544 + #size-cells = <0>;
4545 + };
4546 +
4547 + i2c_csi_dsi: i2c@1 {
4548 + reg = <1>;
4549 + #address-cells = <1>;
4550 + #size-cells = <0>;
4551 + };
4552 + };
4553 +
4554 dpi: dpi@7e208000 {
4555 compatible = "brcm,bcm2835-dpi";
4556 reg = <0x7e208000 0x8c>;
4557 diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile
4558 new file mode 100644
4559 index 000000000000..b30568e29526
4560 --- /dev/null
4561 +++ b/arch/arm/boot/dts/overlays/Makefile
4562 @@ -0,0 +1,216 @@
4563 +# Overlays for the Raspberry Pi platform
4564 +
4565 +dtb-$(CONFIG_ARCH_BCM2835) += overlay_map.dtb
4566 +
4567 +dtbo-$(CONFIG_ARCH_BCM2835) += \
4568 + act-led.dtbo \
4569 + adafruit18.dtbo \
4570 + adau1977-adc.dtbo \
4571 + adau7002-simple.dtbo \
4572 + ads1015.dtbo \
4573 + ads1115.dtbo \
4574 + ads7846.dtbo \
4575 + adv7282m.dtbo \
4576 + adv728x-m.dtbo \
4577 + akkordion-iqdacplus.dtbo \
4578 + allo-boss-dac-pcm512x-audio.dtbo \
4579 + allo-digione.dtbo \
4580 + allo-katana-dac-audio.dtbo \
4581 + allo-piano-dac-pcm512x-audio.dtbo \
4582 + allo-piano-dac-plus-pcm512x-audio.dtbo \
4583 + anyspi.dtbo \
4584 + apds9960.dtbo \
4585 + applepi-dac.dtbo \
4586 + at86rf233.dtbo \
4587 + audioinjector-addons.dtbo \
4588 + audioinjector-isolated-soundcard.dtbo \
4589 + audioinjector-ultra.dtbo \
4590 + audioinjector-wm8731-audio.dtbo \
4591 + audiosense-pi.dtbo \
4592 + audremap.dtbo \
4593 + balena-fin.dtbo \
4594 + cma.dtbo \
4595 + dht11.dtbo \
4596 + dionaudio-loco.dtbo \
4597 + dionaudio-loco-v2.dtbo \
4598 + disable-bt.dtbo \
4599 + disable-wifi.dtbo \
4600 + dpi18.dtbo \
4601 + dpi24.dtbo \
4602 + draws.dtbo \
4603 + dwc-otg.dtbo \
4604 + dwc2.dtbo \
4605 + enc28j60.dtbo \
4606 + enc28j60-spi2.dtbo \
4607 + exc3000.dtbo \
4608 + fe-pi-audio.dtbo \
4609 + fsm-demo.dtbo \
4610 + ghost-amp.dtbo \
4611 + goodix.dtbo \
4612 + googlevoicehat-soundcard.dtbo \
4613 + gpio-fan.dtbo \
4614 + gpio-ir.dtbo \
4615 + gpio-ir-tx.dtbo \
4616 + gpio-key.dtbo \
4617 + gpio-no-bank0-irq.dtbo \
4618 + gpio-no-irq.dtbo \
4619 + gpio-poweroff.dtbo \
4620 + gpio-shutdown.dtbo \
4621 + hd44780-lcd.dtbo \
4622 + hdmi-backlight-hwhack-gpio.dtbo \
4623 + hifiberry-amp.dtbo \
4624 + hifiberry-dac.dtbo \
4625 + hifiberry-dacplus.dtbo \
4626 + hifiberry-dacplusadc.dtbo \
4627 + hifiberry-dacplusadcpro.dtbo \
4628 + hifiberry-dacplusdsp.dtbo \
4629 + hifiberry-dacplushd.dtbo \
4630 + hifiberry-digi.dtbo \
4631 + hifiberry-digi-pro.dtbo \
4632 + highperi.dtbo \
4633 + hy28a.dtbo \
4634 + hy28b.dtbo \
4635 + hy28b-2017.dtbo \
4636 + i-sabre-q2m.dtbo \
4637 + i2c-bcm2708.dtbo \
4638 + i2c-gpio.dtbo \
4639 + i2c-mux.dtbo \
4640 + i2c-pwm-pca9685a.dtbo \
4641 + i2c-rtc.dtbo \
4642 + i2c-rtc-gpio.dtbo \
4643 + i2c-sensor.dtbo \
4644 + i2c0.dtbo \
4645 + i2c1.dtbo \
4646 + i2c3.dtbo \
4647 + i2c4.dtbo \
4648 + i2c5.dtbo \
4649 + i2c6.dtbo \
4650 + i2s-gpio28-31.dtbo \
4651 + ilitek251x.dtbo \
4652 + imx219.dtbo \
4653 + imx290.dtbo \
4654 + imx477.dtbo \
4655 + iqaudio-codec.dtbo \
4656 + iqaudio-dac.dtbo \
4657 + iqaudio-dacplus.dtbo \
4658 + iqaudio-digi-wm8804-audio.dtbo \
4659 + irs1125.dtbo \
4660 + jedec-spi-nor.dtbo \
4661 + justboom-both.dtbo \
4662 + justboom-dac.dtbo \
4663 + justboom-digi.dtbo \
4664 + ltc294x.dtbo \
4665 + max98357a.dtbo \
4666 + maxtherm.dtbo \
4667 + mbed-dac.dtbo \
4668 + mcp23017.dtbo \
4669 + mcp23s17.dtbo \
4670 + mcp2515-can0.dtbo \
4671 + mcp2515-can1.dtbo \
4672 + mcp3008.dtbo \
4673 + mcp3202.dtbo \
4674 + mcp342x.dtbo \
4675 + media-center.dtbo \
4676 + merus-amp.dtbo \
4677 + midi-uart0.dtbo \
4678 + midi-uart1.dtbo \
4679 + miniuart-bt.dtbo \
4680 + mmc.dtbo \
4681 + mpu6050.dtbo \
4682 + mz61581.dtbo \
4683 + ov5647.dtbo \
4684 + ov7251.dtbo \
4685 + ov9281.dtbo \
4686 + papirus.dtbo \
4687 + pca953x.dtbo \
4688 + pibell.dtbo \
4689 + pifacedigital.dtbo \
4690 + piglow.dtbo \
4691 + piscreen.dtbo \
4692 + piscreen2r.dtbo \
4693 + pisound.dtbo \
4694 + pitft22.dtbo \
4695 + pitft28-capacitive.dtbo \
4696 + pitft28-resistive.dtbo \
4697 + pitft35-resistive.dtbo \
4698 + pps-gpio.dtbo \
4699 + pwm.dtbo \
4700 + pwm-2chan.dtbo \
4701 + pwm-ir-tx.dtbo \
4702 + qca7000.dtbo \
4703 + rotary-encoder.dtbo \
4704 + rpi-backlight.dtbo \
4705 + rpi-cirrus-wm5102.dtbo \
4706 + rpi-dac.dtbo \
4707 + rpi-display.dtbo \
4708 + rpi-ft5406.dtbo \
4709 + rpi-poe.dtbo \
4710 + rpi-proto.dtbo \
4711 + rpi-sense.dtbo \
4712 + rpi-tv.dtbo \
4713 + rpivid-v4l2.dtbo \
4714 + rra-digidac1-wm8741-audio.dtbo \
4715 + sainsmart18.dtbo \
4716 + sc16is750-i2c.dtbo \
4717 + sc16is752-i2c.dtbo \
4718 + sc16is752-spi0.dtbo \
4719 + sc16is752-spi1.dtbo \
4720 + sdhost.dtbo \
4721 + sdio.dtbo \
4722 + sdtweak.dtbo \
4723 + sh1106-spi.dtbo \
4724 + smi.dtbo \
4725 + smi-dev.dtbo \
4726 + smi-nand.dtbo \
4727 + spi-gpio35-39.dtbo \
4728 + spi-gpio40-45.dtbo \
4729 + spi-rtc.dtbo \
4730 + spi0-1cs.dtbo \
4731 + spi0-2cs.dtbo \
4732 + spi1-1cs.dtbo \
4733 + spi1-2cs.dtbo \
4734 + spi1-3cs.dtbo \
4735 + spi2-1cs.dtbo \
4736 + spi2-2cs.dtbo \
4737 + spi2-3cs.dtbo \
4738 + spi3-1cs.dtbo \
4739 + spi3-2cs.dtbo \
4740 + spi4-1cs.dtbo \
4741 + spi4-2cs.dtbo \
4742 + spi5-1cs.dtbo \
4743 + spi5-2cs.dtbo \
4744 + spi6-1cs.dtbo \
4745 + spi6-2cs.dtbo \
4746 + ssd1306.dtbo \
4747 + ssd1306-spi.dtbo \
4748 + ssd1351-spi.dtbo \
4749 + superaudioboard.dtbo \
4750 + sx150x.dtbo \
4751 + tc358743.dtbo \
4752 + tc358743-audio.dtbo \
4753 + tinylcd35.dtbo \
4754 + tpm-slb9670.dtbo \
4755 + uart0.dtbo \
4756 + uart1.dtbo \
4757 + uart2.dtbo \
4758 + uart3.dtbo \
4759 + uart4.dtbo \
4760 + uart5.dtbo \
4761 + udrc.dtbo \
4762 + upstream.dtbo \
4763 + upstream-pi4.dtbo \
4764 + vc4-fkms-v3d.dtbo \
4765 + vc4-kms-kippah-7inch.dtbo \
4766 + vc4-kms-v3d.dtbo \
4767 + vc4-kms-v3d-pi4.dtbo \
4768 + vga666.dtbo \
4769 + w1-gpio.dtbo \
4770 + w1-gpio-pullup.dtbo \
4771 + w5500.dtbo \
4772 + wittypi.dtbo
4773 +
4774 +targets += dtbs dtbs_install
4775 +targets += $(dtbo-y)
4776 +
4777 +always-y := $(dtbo-y)
4778 +clean-files := *.dtbo
4779 diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README
4780 new file mode 100644
4781 index 000000000000..eff90baed406
4782 --- /dev/null
4783 +++ b/arch/arm/boot/dts/overlays/README
4784 @@ -0,0 +1,3040 @@
4785 +Introduction
4786 +============
4787 +
4788 +This directory contains Device Tree overlays. Device Tree makes it possible
4789 +to support many hardware configurations with a single kernel and without the
4790 +need to explicitly load or blacklist kernel modules. Note that this isn't a
4791 +"pure" Device Tree configuration (c.f. MACH_BCM2835) - some on-board devices
4792 +are still configured by the board support code, but the intention is to
4793 +eventually reach that goal.
4794 +
4795 +On Raspberry Pi, Device Tree usage is controlled from /boot/config.txt. By
4796 +default, the Raspberry Pi kernel boots with device tree enabled. You can
4797 +completely disable DT usage (for now) by adding:
4798 +
4799 + device_tree=
4800 +
4801 +to your config.txt, which should cause your Pi to revert to the old way of
4802 +doing things after a reboot.
4803 +
4804 +In /boot you will find a .dtb for each base platform. This describes the
4805 +hardware that is part of the Raspberry Pi board. The loader (start.elf and its
4806 +siblings) selects the .dtb file appropriate for the platform by name, and reads
4807 +it into memory. At this point, all of the optional interfaces (i2c, i2s, spi)
4808 +are disabled, but they can be enabled using Device Tree parameters:
4809 +
4810 + dtparam=i2c=on,i2s=on,spi=on
4811 +
4812 +However, this shouldn't be necessary in many use cases because loading an
4813 +overlay that requires one of those interfaces will cause it to be enabled
4814 +automatically, and it is advisable to only enable interfaces if they are
4815 +needed.
4816 +
4817 +Configuring additional, optional hardware is done using Device Tree overlays
4818 +(see below).
4819 +
4820 +GPIO numbering uses the hardware pin numbering scheme (aka BCM scheme) and
4821 +not the physical pin numbers.
4822 +
4823 +raspi-config
4824 +============
4825 +
4826 +The Advanced Options section of the raspi-config utility can enable and disable
4827 +Device Tree use, as well as toggling the I2C and SPI interfaces. Note that it
4828 +is possible to both enable an interface and blacklist the driver, if for some
4829 +reason you should want to defer the loading.
4830 +
4831 +Modules
4832 +=======
4833 +
4834 +As well as describing the hardware, Device Tree also gives enough information
4835 +to allow suitable driver modules to be located and loaded, with the corollary
4836 +that unneeded modules are not loaded. As a result it should be possible to
4837 +remove lines from /etc/modules, and /etc/modprobe.d/raspi-blacklist.conf can
4838 +have its contents deleted (or commented out).
4839 +
4840 +Using Overlays
4841 +==============
4842 +
4843 +Overlays are loaded using the "dtoverlay" config.txt setting. As an example,
4844 +consider I2C Real Time Clock drivers. In the pre-DT world these would be loaded
4845 +by writing a magic string comprising a device identifier and an I2C address to
4846 +a special file in /sys/class/i2c-adapter, having first loaded the driver for
4847 +the I2C interface and the RTC device - something like this:
4848 +
4849 + modprobe i2c-bcm2835
4850 + modprobe rtc-ds1307
4851 + echo ds1307 0x68 > /sys/class/i2c-adapter/i2c-1/new_device
4852 +
4853 +With DT enabled, this becomes a line in config.txt:
4854 +
4855 + dtoverlay=i2c-rtc,ds1307
4856 +
4857 +This causes the file /boot/overlays/i2c-rtc.dtbo to be loaded and a "node"
4858 +describing the DS1307 I2C device to be added to the Device Tree for the Pi. By
4859 +default it usees address 0x68, but this can be modified with an additional DT
4860 +parameter:
4861 +
4862 + dtoverlay=i2c-rtc,ds1307,addr=0x68
4863 +
4864 +Parameters usually have default values, although certain parameters are
4865 +mandatory. See the list of overlays below for a description of the parameters
4866 +and their defaults.
4867 +
4868 +The Overlay and Parameter Reference
4869 +===================================
4870 +
4871 +N.B. When editing this file, please preserve the indentation levels to make it
4872 +simple to parse programmatically. NO HARD TABS.
4873 +
4874 +
4875 +Name: <The base DTB>
4876 +Info: Configures the base Raspberry Pi hardware
4877 +Load: <loaded automatically>
4878 +Params:
4879 + ant1 Select antenna 1 (default). CM4 only.
4880 +
4881 + ant2 Select antenna 2. CM4 only.
4882 +
4883 + noant Disable both antennas. CM4 only.
4884 +
4885 + audio Set to "on" to enable the onboard ALSA audio
4886 + interface (default "off")
4887 +
4888 + axiperf Set to "on" to enable the AXI bus performance
4889 + monitors.
4890 + See /sys/kernel/debug/raspberrypi_axi_monitor
4891 + for the results.
4892 +
4893 + eee Enable Energy Efficient Ethernet support for
4894 + compatible devices (default "on"). See also
4895 + "tx_lpi_timer". Pi3B+ only.
4896 +
4897 + eth_downshift_after Set the number of auto-negotiation failures
4898 + after which the 1000Mbps modes are disabled.
4899 + Legal values are 2, 3, 4, 5 and 0, where
4900 + 0 means never downshift (default 2). Pi3B+ only.
4901 +
4902 + eth_led0 Set mode of LED0 - amber on Pi3B+ (default "1"),
4903 + green on Pi4 (default "0").
4904 + The legal values are:
4905 +
4906 + Pi3B+
4907 +
4908 + 0=link/activity 1=link1000/activity
4909 + 2=link100/activity 3=link10/activity
4910 + 4=link100/1000/activity 5=link10/1000/activity
4911 + 6=link10/100/activity 14=off 15=on
4912 +
4913 + Pi4
4914 +
4915 + 0=Speed/Activity 1=Speed
4916 + 2=Flash activity 3=FDX
4917 + 4=Off 5=On
4918 + 6=Alt 7=Speed/Flash
4919 + 8=Link 9=Activity
4920 +
4921 + eth_led1 Set mode of LED1 - green on Pi3B+ (default "6"),
4922 + amber on Pi4 (default "8"). See eth_led0 for
4923 + legal values.
4924 +
4925 + eth_max_speed Set the maximum speed a link is allowed
4926 + to negotiate. Legal values are 10, 100 and
4927 + 1000 (default 1000). Pi3B+ only.
4928 +
4929 + i2c_arm Set to "on" to enable the ARM's i2c interface
4930 + (default "off")
4931 +
4932 + i2c_vc Set to "on" to enable the i2c interface
4933 + usually reserved for the VideoCore processor
4934 + (default "off")
4935 +
4936 + i2c An alias for i2c_arm
4937 +
4938 + i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
4939 + (default "100000")
4940 +
4941 + i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface
4942 + (default "100000")
4943 +
4944 + i2c_baudrate An alias for i2c_arm_baudrate
4945 +
4946 + i2s Set to "on" to enable the i2s interface
4947 + (default "off")
4948 +
4949 + krnbt Set to "on" to enable autoprobing of Bluetooth
4950 + driver without need of hciattach/btattach
4951 + (default "off")
4952 +
4953 + krnbt_baudrate Set the baudrate of the PL011 UART when used
4954 + with krnbt=on
4955 +
4956 + spi Set to "on" to enable the spi interfaces
4957 + (default "off")
4958 +
4959 + spi_dma4 Use to enable 40-bit DMA on spi interfaces
4960 + (the assigned value doesn't matter)
4961 + (2711 only)
4962 +
4963 + random Set to "on" to enable the hardware random
4964 + number generator (default "on")
4965 +
4966 + sd_overclock Clock (in MHz) to use when the MMC framework
4967 + requests 50MHz
4968 +
4969 + sd_poll_once Looks for a card once after booting. Useful
4970 + for network booting scenarios to avoid the
4971 + overhead of continuous polling. N.B. Using
4972 + this option restricts the system to using a
4973 + single card per boot (or none at all).
4974 + (default off)
4975 +
4976 + sd_force_pio Disable DMA support for SD driver (default off)
4977 +
4978 + sd_pio_limit Number of blocks above which to use DMA for
4979 + SD card (default 1)
4980 +
4981 + sd_debug Enable debug output from SD driver (default off)
4982 +
4983 + sdio_overclock Clock (in MHz) to use when the MMC framework
4984 + requests 50MHz for the SDIO/WiFi interface.
4985 +
4986 + tx_lpi_timer Set the delay in microseconds between going idle
4987 + and entering the low power state (default 600).
4988 + Requires EEE to be enabled - see "eee".
4989 +
4990 + uart0 Set to "off" to disable uart0 (default "on")
4991 +
4992 + uart1 Set to "on" or "off" to enable or disable uart1
4993 + (default varies)
4994 +
4995 + watchdog Set to "on" to enable the hardware watchdog
4996 + (default "off")
4997 +
4998 + act_led_trigger Choose which activity the LED tracks.
4999 + Use "heartbeat" for a nice load indicator.
5000 + (default "mmc")
5001 +
5002 + act_led_activelow Set to "on" to invert the sense of the LED
5003 + (default "off")
5004 + N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led
5005 + overlay.
5006 +
5007 + act_led_gpio Set which GPIO to use for the activity LED
5008 + (in case you want to connect it to an external
5009 + device)
5010 + (default "16" on a non-Plus board, "47" on a
5011 + Plus or Pi 2)
5012 + N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led
5013 + overlay.
5014 +
5015 + pwr_led_trigger
5016 + pwr_led_activelow
5017 + pwr_led_gpio
5018 + As for act_led_*, but using the PWR LED.
5019 + Not available on Model A/B boards.
5020 +
5021 + N.B. It is recommended to only enable those interfaces that are needed.
5022 + Leaving all interfaces enabled can lead to unwanted behaviour (i2c_vc
5023 + interfering with Pi Camera, I2S and SPI hogging GPIO pins, etc.)
5024 + Note also that i2c, i2c_arm and i2c_vc are aliases for the physical
5025 + interfaces i2c0 and i2c1. Use of the numeric variants is still possible
5026 + but deprecated because the ARM/VC assignments differ between board
5027 + revisions. The same board-specific mapping applies to i2c_baudrate,
5028 + and the other i2c baudrate parameters.
5029 +
5030 +
5031 +Name: act-led
5032 +Info: Pi 3B, 3B+, 3A+ and 4B use a GPIO expander to drive the LEDs which can
5033 + only be accessed from the VPU. There is a special driver for this with a
5034 + separate DT node, which has the unfortunate consequence of breaking the
5035 + act_led_gpio and act_led_activelow dtparams.
5036 + This overlay changes the GPIO controller back to the standard one and
5037 + restores the dtparams.
5038 +Load: dtoverlay=act-led,<param>=<val>
5039 +Params: activelow Set to "on" to invert the sense of the LED
5040 + (default "off")
5041 +
5042 + gpio Set which GPIO to use for the activity LED
5043 + (in case you want to connect it to an external
5044 + device)
5045 + REQUIRED
5046 +
5047 +
5048 +Name: adafruit18
5049 +Info: Overlay for the SPI-connected Adafruit 1.8" display (based on the
5050 + ST7735R chip). It includes support for the "green tab" version.
5051 +Load: dtoverlay=adafruit18,<param>=<val>
5052 +Params: green Use the adafruit18_green variant.
5053 + rotate Display rotation {0,90,180,270}
5054 + speed SPI bus speed in Hz (default 4000000)
5055 + fps Display frame rate in Hz
5056 + bgr Enable BGR mode (default off)
5057 + debug Debug output level {0-7}
5058 + dc_pin GPIO pin for D/C (default 24)
5059 + reset_pin GPIO pin for RESET (default 25)
5060 + led_pin GPIO used to control backlight (default 18)
5061 +
5062 +
5063 +Name: adau1977-adc
5064 +Info: Overlay for activation of ADAU1977 ADC codec over I2C for control
5065 + and I2S for data.
5066 +Load: dtoverlay=adau1977-adc
5067 +Params: <None>
5068 +
5069 +
5070 +Name: adau7002-simple
5071 +Info: Overlay for the activation of ADAU7002 stereo PDM to I2S converter.
5072 +Load: dtoverlay=adau7002-simple,<param>=<val>
5073 +Params: card-name Override the default, "adau7002", card name.
5074 +
5075 +
5076 +Name: ads1015
5077 +Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C
5078 +Load: dtoverlay=ads1015,<param>=<val>
5079 +Params: addr I2C bus address of device. Set based on how the
5080 + addr pin is wired. (default=0x48 assumes addr
5081 + is pulled to GND)
5082 + cha_enable Enable virtual channel a. (default=true)
5083 + cha_cfg Set the configuration for virtual channel a.
5084 + (default=4 configures this channel for the
5085 + voltage at A0 with respect to GND)
5086 + cha_datarate Set the datarate (samples/sec) for this channel.
5087 + (default=4 sets 1600 sps)
5088 + cha_gain Set the gain of the Programmable Gain
5089 + Amplifier for this channel. (default=2 sets the
5090 + full scale of the channel to 2.048 Volts)
5091 +
5092 + Channel (ch) parameters can be set for each enabled channel.
5093 + A maximum of 4 channels can be enabled (letters a thru d).
5094 + For more information refer to the device datasheet at:
5095 + http://www.ti.com/lit/ds/symlink/ads1015.pdf
5096 +
5097 +
5098 +Name: ads1115
5099 +Info: Texas Instruments ADS1115 ADC
5100 +Load: dtoverlay=ads1115,<param>[=<val>]
5101 +Params: addr I2C bus address of device. Set based on how the
5102 + addr pin is wired. (default=0x48 assumes addr
5103 + is pulled to GND)
5104 + cha_enable Enable virtual channel a.
5105 + cha_cfg Set the configuration for virtual channel a.
5106 + (default=4 configures this channel for the
5107 + voltage at A0 with respect to GND)
5108 + cha_datarate Set the datarate (samples/sec) for this channel.
5109 + (default=7 sets 860 sps)
5110 + cha_gain Set the gain of the Programmable Gain
5111 + Amplifier for this channel. (Default 1 sets the
5112 + full scale of the channel to 4.096 Volts)
5113 +
5114 + Channel parameters can be set for each enabled channel.
5115 + A maximum of 4 channels can be enabled (letters a thru d).
5116 + For more information refer to the device datasheet at:
5117 + http://www.ti.com/lit/ds/symlink/ads1115.pdf
5118 +
5119 +
5120 +Name: ads7846
5121 +Info: ADS7846 Touch controller
5122 +Load: dtoverlay=ads7846,<param>=<val>
5123 +Params: cs SPI bus Chip Select (default 1)
5124 + speed SPI bus speed (default 2MHz, max 3.25MHz)
5125 + penirq GPIO used for PENIRQ. REQUIRED
5126 + penirq_pull Set GPIO pull (default 0=none, 2=pullup)
5127 + swapxy Swap x and y axis
5128 + xmin Minimum value on the X axis (default 0)
5129 + ymin Minimum value on the Y axis (default 0)
5130 + xmax Maximum value on the X axis (default 4095)
5131 + ymax Maximum value on the Y axis (default 4095)
5132 + pmin Minimum reported pressure value (default 0)
5133 + pmax Maximum reported pressure value (default 65535)
5134 + xohms Touchpanel sensitivity (X-plate resistance)
5135 + (default 400)
5136 +
5137 + penirq is required and usually xohms (60-100) has to be set as well.
5138 + Apart from that, pmax (255) and swapxy are also common.
5139 + The rest of the calibration can be done with xinput-calibrator.
5140 + See: github.com/notro/fbtft/wiki/FBTFT-on-Raspian
5141 + Device Tree binding document:
5142 + www.kernel.org/doc/Documentation/devicetree/bindings/input/ads7846.txt
5143 +
5144 +
5145 +Name: adv7282m
5146 +Info: Analog Devices ADV7282M analogue video to CSI2 bridge.
5147 + Uses Unicam1, which is the standard camera connector on most Pi
5148 + variants.
5149 +Load: dtoverlay=adv7282m,<param>=<val>
5150 +Params: addr Overrides the I2C address (default 0x21)
5151 +
5152 +
5153 +Name: adv728x-m
5154 +Info: Analog Devices ADV728[0|1|2]-M analogue video to CSI2 bridges.
5155 + This is a wrapper for adv7282m, and defaults to ADV7282M.
5156 +Load: dtoverlay=adv728x-m,<param>=<val>
5157 +Params: addr Overrides the I2C address (default 0x21)
5158 + adv7280m Select ADV7280-M.
5159 + adv7281m Select ADV7281-M.
5160 + adv7281ma Select ADV7281-MA.
5161 +
5162 +
5163 +Name: akkordion-iqdacplus
5164 +Info: Configures the Digital Dreamtime Akkordion Music Player (based on the
5165 + OEM IQAudIO DAC+ or DAC Zero module).
5166 +Load: dtoverlay=akkordion-iqdacplus,<param>=<val>
5167 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5168 + Digital volume control. Enable with
5169 + dtoverlay=akkordion-iqdacplus,24db_digital_gain
5170 + (The default behaviour is that the Digital
5171 + volume control is limited to a maximum of
5172 + 0dB. ie. it can attenuate but not provide
5173 + gain. For most users, this will be desired
5174 + as it will prevent clipping. By appending
5175 + the 24db_digital_gain parameter, the Digital
5176 + volume control will allow up to 24dB of
5177 + gain. If this parameter is enabled, it is the
5178 + responsibility of the user to ensure that
5179 + the Digital volume control is set to a value
5180 + that does not result in clipping/distortion!)
5181 +
5182 +
5183 +Name: allo-boss-dac-pcm512x-audio
5184 +Info: Configures the Allo Boss DAC audio cards.
5185 +Load: dtoverlay=allo-boss-dac-pcm512x-audio,<param>
5186 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5187 + Digital volume control. Enable with
5188 + "dtoverlay=allo-boss-dac-pcm512x-audio,
5189 + 24db_digital_gain"
5190 + (The default behaviour is that the Digital
5191 + volume control is limited to a maximum of
5192 + 0dB. ie. it can attenuate but not provide
5193 + gain. For most users, this will be desired
5194 + as it will prevent clipping. By appending
5195 + the 24db_digital_gain parameter, the Digital
5196 + volume control will allow up to 24dB of
5197 + gain. If this parameter is enabled, it is the
5198 + responsibility of the user to ensure that
5199 + the Digital volume control is set to a value
5200 + that does not result in clipping/distortion!)
5201 + slave Force Boss DAC into slave mode, using Pi a
5202 + master for bit clock and frame clock. Enable
5203 + with "dtoverlay=allo-boss-dac-pcm512x-audio,
5204 + slave"
5205 +
5206 +
5207 +Name: allo-digione
5208 +Info: Configures the Allo Digione audio card
5209 +Load: dtoverlay=allo-digione
5210 +Params: <None>
5211 +
5212 +
5213 +Name: allo-katana-dac-audio
5214 +Info: Configures the Allo Katana DAC audio card
5215 +Load: dtoverlay=allo-katana-dac-audio
5216 +Params: <None>
5217 +
5218 +
5219 +Name: allo-piano-dac-pcm512x-audio
5220 +Info: Configures the Allo Piano DAC (2.0/2.1) audio cards.
5221 + (NB. This initial support is for 2.0 channel audio ONLY! ie. stereo.
5222 + The subwoofer outputs on the Piano 2.1 are not currently supported!)
5223 +Load: dtoverlay=allo-piano-dac-pcm512x-audio,<param>
5224 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5225 + Digital volume control.
5226 + (The default behaviour is that the Digital
5227 + volume control is limited to a maximum of
5228 + 0dB. ie. it can attenuate but not provide
5229 + gain. For most users, this will be desired
5230 + as it will prevent clipping. By appending
5231 + the 24db_digital_gain parameter, the Digital
5232 + volume control will allow up to 24dB of
5233 + gain. If this parameter is enabled, it is the
5234 + responsibility of the user to ensure that
5235 + the Digital volume control is set to a value
5236 + that does not result in clipping/distortion!)
5237 +
5238 +
5239 +Name: allo-piano-dac-plus-pcm512x-audio
5240 +Info: Configures the Allo Piano DAC (2.1) audio cards.
5241 +Load: dtoverlay=allo-piano-dac-plus-pcm512x-audio,<param>
5242 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5243 + Digital volume control.
5244 + (The default behaviour is that the Digital
5245 + volume control is limited to a maximum of
5246 + 0dB. ie. it can attenuate but not provide
5247 + gain. For most users, this will be desired
5248 + as it will prevent clipping. By appending
5249 + the 24db_digital_gain parameter, the Digital
5250 + volume control will allow up to 24dB of
5251 + gain. If this parameter is enabled, it is the
5252 + responsibility of the user to ensure that
5253 + the Digital volume control is set to a value
5254 + that does not result in clipping/distortion!)
5255 + glb_mclk This option is only with Kali board. If enabled,
5256 + MCLK for Kali is used and PLL is disabled for
5257 + better voice quality. (default Off)
5258 +
5259 +
5260 +Name: anyspi
5261 +Info: Universal device tree overlay for SPI devices
5262 +
5263 + Just specify the SPI address and device name ("compatible" property).
5264 + This overlay lacks any device-specific parameter support!
5265 +
5266 + For devices on spi1 or spi2, the interfaces should be enabled
5267 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
5268 +
5269 + Examples:
5270 + 1. SPI NOR flash on spi0.1, maximum SPI clock frequency 45MHz:
5271 + dtoverlay=anyspi:spi0-1,dev="jedec,spi-nor",speed=45000000
5272 + 2. MCP3204 ADC on spi1.2, maximum SPI clock frequency 500kHz:
5273 + dtoverlay=anyspi:spi1-2,dev="microchip,mcp3204"
5274 +Load: dtoverlay=anyspi,<param>=<val>
5275 +Params: spi<n>-<m> Configure device at spi<n>, cs<m>
5276 + (boolean, required)
5277 + dev Set device name to search compatible module
5278 + (string, required)
5279 + speed Set SPI clock frequency in Hz
5280 + (integer, optional, default 500000)
5281 +
5282 +
5283 +Name: apds9960
5284 +Info: Configures the AVAGO APDS9960 digital proximity, ambient light, RGB and
5285 + gesture sensor
5286 +Load: dtoverlay=apds9960,<param>=<val>
5287 +Params: gpiopin GPIO used for INT (default 4)
5288 + noints Disable the interrupt GPIO line.
5289 +
5290 +
5291 +Name: applepi-dac
5292 +Info: Configures the Orchard Audio ApplePi-DAC audio card
5293 +Load: dtoverlay=applepi-dac
5294 +Params: <None>
5295 +
5296 +
5297 +Name: at86rf233
5298 +Info: Configures the Atmel AT86RF233 802.15.4 low-power WPAN transceiver,
5299 + connected to spi0.0
5300 +Load: dtoverlay=at86rf233,<param>=<val>
5301 +Params: interrupt GPIO used for INT (default 23)
5302 + reset GPIO used for Reset (default 24)
5303 + sleep GPIO used for Sleep (default 25)
5304 + speed SPI bus speed in Hz (default 3000000)
5305 + trim Fine tuning of the internal capacitance
5306 + arrays (0=+0pF, 15=+4.5pF, default 15)
5307 +
5308 +
5309 +Name: audioinjector-addons
5310 +Info: Configures the audioinjector.net audio add on soundcards
5311 +Load: dtoverlay=audioinjector-addons,<param>=<val>
5312 +Params: non-stop-clocks Keeps the clocks running even when the stream
5313 + is paused or stopped (default off)
5314 +
5315 +
5316 +Name: audioinjector-isolated-soundcard
5317 +Info: Configures the audioinjector.net isolated soundcard
5318 +Load: dtoverlay=audioinjector-isolated-soundcard
5319 +Params: <None>
5320 +
5321 +
5322 +Name: audioinjector-ultra
5323 +Info: Configures the audioinjector.net ultra soundcard
5324 +Load: dtoverlay=audioinjector-ultra
5325 +Params: <None>
5326 +
5327 +
5328 +Name: audioinjector-wm8731-audio
5329 +Info: Configures the audioinjector.net audio add on soundcard
5330 +Load: dtoverlay=audioinjector-wm8731-audio
5331 +Params: <None>
5332 +
5333 +
5334 +Name: audiosense-pi
5335 +Info: Configures the audiosense-pi add on soundcard
5336 + For more information refer to
5337 + https://gitlab.com/kakar0t/audiosense-pi
5338 +Load: dtoverlay=audiosense-pi
5339 +Params: <None>
5340 +
5341 +
5342 +Name: audremap
5343 +Info: Switches PWM sound output to GPIOs on the 40-pin header
5344 +Load: dtoverlay=audremap,<param>=<val>
5345 +Params: swap_lr Reverse the channel allocation, which will also
5346 + swap the audio jack outputs (default off)
5347 + enable_jack Don't switch off the audio jack output
5348 + (default off)
5349 + pins_12_13 Select GPIOs 12 & 13 (default)
5350 + pins_18_19 Select GPIOs 18 & 19
5351 +
5352 +
5353 +Name: balena-fin
5354 +Info: Overlay that enables WiFi, Bluetooth and the GPIO expander on the
5355 + balenaFin carrier board for the Raspberry Pi Compute Module 3/3+ Lite.
5356 +Load: dtoverlay=balena-fin
5357 +Params: <None>
5358 +
5359 +
5360 +Name: bmp085_i2c-sensor
5361 +Info: This overlay is now deprecated - see i2c-sensor
5362 +Load: <Deprecated>
5363 +
5364 +
5365 +Name: cma
5366 +Info: Set custom CMA sizes, only use if you know what you are doing, might
5367 + clash with other overlays like vc4-fkms-v3d and vc4-kms-v3d.
5368 +Load: dtoverlay=cma,<param>=<val>
5369 +Params: cma-512 CMA is 512MB (needs 1GB)
5370 + cma-448 CMA is 448MB (needs 1GB)
5371 + cma-384 CMA is 384MB (needs 1GB)
5372 + cma-320 CMA is 320MB (needs 1GB)
5373 + cma-256 CMA is 256MB (needs 1GB)
5374 + cma-192 CMA is 192MB (needs 1GB)
5375 + cma-128 CMA is 128MB
5376 + cma-96 CMA is 96MB
5377 + cma-64 CMA is 64MB
5378 + cma-size CMA size in bytes, 4MB aligned
5379 + cma-default Use upstream's default value
5380 +
5381 +
5382 +Name: dht11
5383 +Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
5384 + Also sometimes found with the part number(s) AM230x.
5385 +Load: dtoverlay=dht11,<param>=<val>
5386 +Params: gpiopin GPIO connected to the sensor's DATA output.
5387 + (default 4)
5388 +
5389 +
5390 +Name: dionaudio-loco
5391 +Info: Configures the Dion Audio LOCO DAC-AMP
5392 +Load: dtoverlay=dionaudio-loco
5393 +Params: <None>
5394 +
5395 +
5396 +Name: dionaudio-loco-v2
5397 +Info: Configures the Dion Audio LOCO-V2 DAC-AMP
5398 +Load: dtoverlay=dionaudio-loco-v2,<param>=<val>
5399 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5400 + Digital volume control. Enable with
5401 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
5402 + (The default behaviour is that the Digital
5403 + volume control is limited to a maximum of
5404 + 0dB. ie. it can attenuate but not provide
5405 + gain. For most users, this will be desired
5406 + as it will prevent clipping. By appending
5407 + the 24dB_digital_gain parameter, the Digital
5408 + volume control will allow up to 24dB of
5409 + gain. If this parameter is enabled, it is the
5410 + responsibility of the user to ensure that
5411 + the Digital volume control is set to a value
5412 + that does not result in clipping/distortion!)
5413 +
5414 +
5415 +Name: disable-bt
5416 +Info: Disable onboard Bluetooth on Pi 3B, 3B+, 3A+, 4B and Zero W, restoring
5417 + UART0/ttyAMA0 over GPIOs 14 & 15.
5418 + N.B. To disable the systemd service that initialises the modem so it
5419 + doesn't use the UART, use 'sudo systemctl disable hciuart'.
5420 +Load: dtoverlay=disable-bt
5421 +Params: <None>
5422 +
5423 +
5424 +Name: disable-wifi
5425 +Info: Disable onboard WiFi on Pi 3B, 3B+, 3A+, 4B and Zero W.
5426 +Load: dtoverlay=disable-wifi
5427 +Params: <None>
5428 +
5429 +
5430 +Name: dpi18
5431 +Info: Overlay for a generic 18-bit DPI display
5432 + This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output
5433 + 2-3 seconds after the kernel has started.
5434 +Load: dtoverlay=dpi18
5435 +Params: <None>
5436 +
5437 +
5438 +Name: dpi24
5439 +Info: Overlay for a generic 24-bit DPI display
5440 + This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output
5441 + 2-3 seconds after the kernel has started.
5442 +Load: dtoverlay=dpi24
5443 +Params: <None>
5444 +
5445 +
5446 +Name: draws
5447 +Info: Configures the NW Digital Radio DRAWS Hat
5448 +
5449 + The board includes an ADC to measure various board values and also
5450 + provides two analog user inputs on the expansion header. The ADC
5451 + can be configured for various sample rates and gain values to adjust
5452 + the input range. Tables describing the two parameters follow.
5453 +
5454 + ADC Gain Values:
5455 + 0 = +/- 6.144V
5456 + 1 = +/- 4.096V
5457 + 2 = +/- 2.048V
5458 + 3 = +/- 1.024V
5459 + 4 = +/- 0.512V
5460 + 5 = +/- 0.256V
5461 + 6 = +/- 0.256V
5462 + 7 = +/- 0.256V
5463 +
5464 + ADC Datarate Values:
5465 + 0 = 128sps
5466 + 1 = 250sps
5467 + 2 = 490sps
5468 + 3 = 920sps
5469 + 4 = 1600sps (default)
5470 + 5 = 2400sps
5471 + 6 = 3300sps
5472 + 7 = 3300sps
5473 +Load: dtoverlay=draws,<param>=<val>
5474 +Params: draws_adc_ch4_gain Sets the full scale resolution of the ADCs
5475 + input voltage sensor (default 1)
5476 +
5477 + draws_adc_ch4_datarate Sets the datarate of the ADCs input voltage
5478 + sensor
5479 +
5480 + draws_adc_ch5_gain Sets the full scale resolution of the ADCs
5481 + 5V rail voltage sensor (default 1)
5482 +
5483 + draws_adc_ch5_datarate Sets the datarate of the ADCs 4V rail voltage
5484 + sensor
5485 +
5486 + draws_adc_ch6_gain Sets the full scale resolution of the ADCs
5487 + AIN2 input (default 2)
5488 +
5489 + draws_adc_ch6_datarate Sets the datarate of the ADCs AIN2 input
5490 +
5491 + draws_adc_ch7_gain Sets the full scale resolution of the ADCs
5492 + AIN3 input (default 2)
5493 +
5494 + draws_adc_ch7_datarate Sets the datarate of the ADCs AIN3 input
5495 +
5496 + alsaname Name of the ALSA audio device (default "draws")
5497 +
5498 +
5499 +Name: dwc-otg
5500 +Info: Selects the dwc_otg USB controller driver which has fiq support. This
5501 + is the default on all except the Pi Zero which defaults to dwc2.
5502 +Load: dtoverlay=dwc-otg
5503 +Params: <None>
5504 +
5505 +
5506 +Name: dwc2
5507 +Info: Selects the dwc2 USB controller driver
5508 +Load: dtoverlay=dwc2,<param>=<val>
5509 +Params: dr_mode Dual role mode: "host", "peripheral" or "otg"
5510 +
5511 + g-rx-fifo-size Size of rx fifo size in gadget mode
5512 +
5513 + g-np-tx-fifo-size Size of non-periodic tx fifo size in gadget
5514 + mode
5515 +
5516 +
5517 +[ The ds1307-rtc overlay has been deleted. See i2c-rtc. ]
5518 +
5519 +
5520 +Name: enc28j60
5521 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI0
5522 +Load: dtoverlay=enc28j60,<param>=<val>
5523 +Params: int_pin GPIO used for INT (default 25)
5524 +
5525 + speed SPI bus speed (default 12000000)
5526 +
5527 +
5528 +Name: enc28j60-spi2
5529 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI2
5530 +Load: dtoverlay=enc28j60-spi2,<param>=<val>
5531 +Params: int_pin GPIO used for INT (default 39)
5532 +
5533 + speed SPI bus speed (default 12000000)
5534 +
5535 +
5536 +Name: exc3000
5537 +Info: Enables I2C connected EETI EXC3000 multiple touch controller using
5538 + GPIO 4 (pin 7 on GPIO header) for interrupt.
5539 +Load: dtoverlay=exc3000,<param>=<val>
5540 +Params: interrupt GPIO used for interrupt (default 4)
5541 + sizex Touchscreen size x (default 4096)
5542 + sizey Touchscreen size y (default 4096)
5543 + invx Touchscreen inverted x axis
5544 + invy Touchscreen inverted y axis
5545 + swapxy Touchscreen swapped x y axis
5546 +
5547 +
5548 +Name: fe-pi-audio
5549 +Info: Configures the Fe-Pi Audio Sound Card
5550 +Load: dtoverlay=fe-pi-audio
5551 +Params: <None>
5552 +
5553 +
5554 +Name: fsm-demo
5555 +Info: A demonstration of the gpio-fsm driver. The GPIOs are chosen to work
5556 + nicely with a "traffic-light" display of red, amber and green LEDs on
5557 + GPIOs 7, 8 and 25 respectively.
5558 +Load: dtoverlay=fsm-demo,<param>=<val>
5559 +Params: fsm_debug Enable debug logging (default off)
5560 +
5561 +
5562 +Name: ghost-amp
5563 +Info: An overlay for the Ghost amplifier.
5564 +Load: dtoverlay=ghost-amp,<param>=<val>
5565 +Params: fsm_debug Enable debug logging of the GPIO FSM (default
5566 + off)
5567 +
5568 +
5569 +Name: goodix
5570 +Info: Enables I2C connected Goodix gt9271 multiple touch controller using
5571 + GPIOs 4 and 17 (pins 7 and 11 on GPIO header) for interrupt and reset.
5572 +Load: dtoverlay=goodix,<param>=<val>
5573 +Params: interrupt GPIO used for interrupt (default 4)
5574 + reset GPIO used for reset (default 17)
5575 +
5576 +
5577 +Name: googlevoicehat-soundcard
5578 +Info: Configures the Google voiceHAT soundcard
5579 +Load: dtoverlay=googlevoicehat-soundcard
5580 +Params: <None>
5581 +
5582 +
5583 +Name: gpio-fan
5584 +Info: Configure a GPIO pin to control a cooling fan.
5585 +Load: dtoverlay=gpio-fan,<param>=<val>
5586 +Params: gpiopin GPIO used to control the fan (default 12)
5587 + temp Temperature at which the fan switches on, in
5588 + millicelcius (default 55000)
5589 +
5590 +
5591 +Name: gpio-ir
5592 +Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core-
5593 + based gpio_ir_recv driver maps received keys directly to a
5594 + /dev/input/event* device, all decoding is done by the kernel - LIRC is
5595 + not required! The key mapping and other decoding parameters can be
5596 + configured by "ir-keytable" tool.
5597 +Load: dtoverlay=gpio-ir,<param>=<val>
5598 +Params: gpio_pin Input pin number. Default is 18.
5599 +
5600 + gpio_pull Desired pull-up/down state (off, down, up)
5601 + Default is "up".
5602 +
5603 + invert "1" = invert the input (active-low signalling).
5604 + "0" = non-inverted input (active-high
5605 + signalling). Default is "1".
5606 +
5607 + rc-map-name Default rc keymap (can also be changed by
5608 + ir-keytable), defaults to "rc-rc6-mce"
5609 +
5610 +
5611 +Name: gpio-ir-tx
5612 +Info: Use GPIO pin as bit-banged infrared transmitter output.
5613 + This is an alternative to "pwm-ir-tx". gpio-ir-tx doesn't require
5614 + a PWM so it can be used together with onboard analog audio.
5615 +Load: dtoverlay=gpio-ir-tx,<param>=<val>
5616 +Params: gpio_pin Output GPIO (default 18)
5617 +
5618 + invert "1" = invert the output (make it active-low).
5619 + Default is "0" (active-high).
5620 +
5621 +
5622 +Name: gpio-key
5623 +Info: This is a generic overlay for activating GPIO keypresses using
5624 + the gpio-keys library and this dtoverlay. Multiple keys can be
5625 + set up using multiple calls to the overlay for configuring
5626 + additional buttons or joysticks. You can see available keycodes
5627 + at https://github.com/torvalds/linux/blob/v4.12/include/uapi/
5628 + linux/input-event-codes.h#L64
5629 +Load: dtoverlay=gpio-key,<param>=<val>
5630 +Params: gpio GPIO pin to trigger on (default 3)
5631 + active_low When this is 1 (active low), a falling
5632 + edge generates a key down event and a
5633 + rising edge generates a key up event.
5634 + When this is 0 (active high), this is
5635 + reversed. The default is 1 (active low)
5636 + gpio_pull Desired pull-up/down state (off, down, up)
5637 + Default is "up". Note that the default pin
5638 + (GPIO3) has an external pullup
5639 + label Set a label for the key
5640 + keycode Set the key code for the button
5641 +
5642 +
5643 +Name: gpio-no-bank0-irq
5644 +Info: Use this overlay to disable GPIO interrupts for GPIOs in bank 0 (0-27),
5645 + which can be useful for UIO drivers.
5646 + N.B. Using this overlay will trigger a kernel WARN during booting, but
5647 + this can safely be ignored - the system should work as expected.
5648 +Load: dtoverlay=gpio-no-bank0-irq
5649 +Params: <None>
5650 +
5651 +
5652 +Name: gpio-no-irq
5653 +Info: Use this overlay to disable all GPIO interrupts, which can be useful
5654 + for user-space GPIO edge detection systems.
5655 +Load: dtoverlay=gpio-no-irq
5656 +Params: <None>
5657 +
5658 +
5659 +Name: gpio-poweroff
5660 +Info: Drives a GPIO high or low on poweroff (including halt). Enabling this
5661 + overlay will prevent the ability to boot by driving GPIO3 low.
5662 +Load: dtoverlay=gpio-poweroff,<param>=<val>
5663 +Params: gpiopin GPIO for signalling (default 26)
5664 +
5665 + active_low Set if the power control device requires a
5666 + high->low transition to trigger a power-down.
5667 + Note that this will require the support of a
5668 + custom dt-blob.bin to prevent a power-down
5669 + during the boot process, and that a reboot
5670 + will also cause the pin to go low.
5671 + input Set if the gpio pin should be configured as
5672 + an input.
5673 + export Set to export the configured pin to sysfs
5674 + timeout_ms Specify (in ms) how long the kernel waits for
5675 + power-down before issuing a WARN (default 3000).
5676 +
5677 +
5678 +Name: gpio-shutdown
5679 +Info: Initiates a shutdown when GPIO pin changes. The given GPIO pin
5680 + is configured as an input key that generates KEY_POWER events.
5681 +
5682 + This event is handled by systemd-logind by initiating a
5683 + shutdown. Systemd versions older than 225 need an udev rule
5684 + enable listening to the input device:
5685 +
5686 + ACTION!="REMOVE", SUBSYSTEM=="input", KERNEL=="event*", \
5687 + SUBSYSTEMS=="platform", DRIVERS=="gpio-keys", \
5688 + ATTRS{keys}=="116", TAG+="power-switch"
5689 +
5690 + Alternatively this event can be handled also on systems without
5691 + systemd, just by traditional SysV init daemon. KEY_POWER event
5692 + (keycode 116) needs to be mapped to KeyboardSignal on console
5693 + and then kb::kbrequest inittab action which is triggered by
5694 + KeyboardSignal from console can be configured to issue system
5695 + shutdown. Steps for this configuration are:
5696 +
5697 + Add following lines to the /etc/console-setup/remap.inc file:
5698 +
5699 + # Key Power as special keypress
5700 + keycode 116 = KeyboardSignal
5701 +
5702 + Then add following lines to /etc/inittab file:
5703 +
5704 + # Action on special keypress (Key Power)
5705 + kb::kbrequest:/sbin/shutdown -t1 -a -h -P now
5706 +
5707 + And finally reload configuration by calling following commands:
5708 +
5709 + # dpkg-reconfigure console-setup
5710 + # service console-setup reload
5711 + # init q
5712 +
5713 + This overlay only handles shutdown. After shutdown, the system
5714 + can be powered up again by driving GPIO3 low. The default
5715 + configuration uses GPIO3 with a pullup, so if you connect a
5716 + button between GPIO3 and GND (pin 5 and 6 on the 40-pin header),
5717 + you get a shutdown and power-up button. Please note that
5718 + Raspberry Pi 1 Model B rev 1 uses GPIO1 instead of GPIO3.
5719 +Load: dtoverlay=gpio-shutdown,<param>=<val>
5720 +Params: gpio_pin GPIO pin to trigger on (default 3)
5721 + For Raspberry Pi 1 Model B rev 1 set this
5722 + explicitly to value 1, e.g.:
5723 +
5724 + dtoverlay=gpio-shutdown,gpio_pin=1
5725 +
5726 + active_low When this is 1 (active low), a falling
5727 + edge generates a key down event and a
5728 + rising edge generates a key up event.
5729 + When this is 0 (active high), this is
5730 + reversed. The default is 1 (active low).
5731 +
5732 + gpio_pull Desired pull-up/down state (off, down, up)
5733 + Default is "up".
5734 +
5735 + Note that the default pin (GPIO3) has an
5736 + external pullup. Same applies for GPIO1
5737 + on Raspberry Pi 1 Model B rev 1.
5738 +
5739 + debounce Specify the debounce interval in milliseconds
5740 + (default 100)
5741 +
5742 +
5743 +Name: hd44780-lcd
5744 +Info: Configures an HD44780 compatible LCD display. Uses 4 gpio pins for
5745 + data, 2 gpio pins for enable and register select and 1 optional pin
5746 + for enabling/disabling the backlight display.
5747 +Load: dtoverlay=hd44780-lcd,<param>=<val>
5748 +Params: pin_d4 GPIO pin for data pin D4 (default 6)
5749 +
5750 + pin_d5 GPIO pin for data pin D5 (default 13)
5751 +
5752 + pin_d6 GPIO pin for data pin D6 (default 19)
5753 +
5754 + pin_d7 GPIO pin for data pin D7 (default 26)
5755 +
5756 + pin_en GPIO pin for "Enable" (default 21)
5757 +
5758 + pin_rs GPIO pin for "Register Select" (default 20)
5759 +
5760 + pin_bl Optional pin for enabling/disabling the
5761 + display backlight. (default disabled)
5762 +
5763 + display_height Height of the display in characters
5764 +
5765 + display_width Width of the display in characters
5766 +
5767 +
5768 +Name: hdmi-backlight-hwhack-gpio
5769 +Info: Devicetree overlay for GPIO based backlight on/off capability.
5770 + Use this if you have one of those HDMI displays whose backlight cannot
5771 + be controlled via DPMS over HDMI and plan to do a little soldering to
5772 + use an RPi gpio pin for on/off switching. See:
5773 + https://www.waveshare.com/wiki/7inch_HDMI_LCD_(C)#Backlight_Control
5774 +Load: dtoverlay=hdmi-backlight-hwhack-gpio,<param>=<val>
5775 +Params: gpio_pin GPIO pin used (default 17)
5776 + active_low Set this to 1 if the display backlight is
5777 + switched on when the wire goes low.
5778 + Leave the default (value 0) if the backlight
5779 + expects a high to switch it on.
5780 +
5781 +
5782 +Name: hifiberry-amp
5783 +Info: Configures the HifiBerry Amp and Amp+ audio cards
5784 +Load: dtoverlay=hifiberry-amp
5785 +Params: <None>
5786 +
5787 +
5788 +Name: hifiberry-dac
5789 +Info: Configures the HifiBerry DAC audio card
5790 +Load: dtoverlay=hifiberry-dac
5791 +Params: <None>
5792 +
5793 +
5794 +Name: hifiberry-dacplus
5795 +Info: Configures the HifiBerry DAC+ audio card
5796 +Load: dtoverlay=hifiberry-dacplus,<param>=<val>
5797 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5798 + Digital volume control. Enable with
5799 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
5800 + (The default behaviour is that the Digital
5801 + volume control is limited to a maximum of
5802 + 0dB. ie. it can attenuate but not provide
5803 + gain. For most users, this will be desired
5804 + as it will prevent clipping. By appending
5805 + the 24dB_digital_gain parameter, the Digital
5806 + volume control will allow up to 24dB of
5807 + gain. If this parameter is enabled, it is the
5808 + responsibility of the user to ensure that
5809 + the Digital volume control is set to a value
5810 + that does not result in clipping/distortion!)
5811 + slave Force DAC+ Pro into slave mode, using Pi as
5812 + master for bit clock and frame clock.
5813 + leds_off If set to 'true' the onboard indicator LEDs
5814 + are switched off at all times.
5815 +
5816 +
5817 +Name: hifiberry-dacplusadc
5818 +Info: Configures the HifiBerry DAC+ADC audio card
5819 +Load: dtoverlay=hifiberry-dacplusadc,<param>=<val>
5820 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5821 + Digital volume control. Enable with
5822 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
5823 + (The default behaviour is that the Digital
5824 + volume control is limited to a maximum of
5825 + 0dB. ie. it can attenuate but not provide
5826 + gain. For most users, this will be desired
5827 + as it will prevent clipping. By appending
5828 + the 24dB_digital_gain parameter, the Digital
5829 + volume control will allow up to 24dB of
5830 + gain. If this parameter is enabled, it is the
5831 + responsibility of the user to ensure that
5832 + the Digital volume control is set to a value
5833 + that does not result in clipping/distortion!)
5834 + slave Force DAC+ Pro into slave mode, using Pi as
5835 + master for bit clock and frame clock.
5836 + leds_off If set to 'true' the onboard indicator LEDs
5837 + are switched off at all times.
5838 +
5839 +
5840 +Name: hifiberry-dacplusadcpro
5841 +Info: Configures the HifiBerry DAC+ADC PRO audio card
5842 +Load: dtoverlay=hifiberry-dacplusadcpro,<param>=<val>
5843 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
5844 + Digital volume control. Enable with
5845 + "dtoverlay=hifiberry-dacplusadcpro,24db_digital_gain"
5846 + (The default behaviour is that the Digital
5847 + volume control is limited to a maximum of
5848 + 0dB. ie. it can attenuate but not provide
5849 + gain. For most users, this will be desired
5850 + as it will prevent clipping. By appending
5851 + the 24dB_digital_gain parameter, the Digital
5852 + volume control will allow up to 24dB of
5853 + gain. If this parameter is enabled, it is the
5854 + responsibility of the user to ensure that
5855 + the Digital volume control is set to a value
5856 + that does not result in clipping/distortion!)
5857 + slave Force DAC+ADC Pro into slave mode, using Pi as
5858 + master for bit clock and frame clock.
5859 + leds_off If set to 'true' the onboard indicator LEDs
5860 + are switched off at all times.
5861 +
5862 +
5863 +Name: hifiberry-dacplusdsp
5864 +Info: Configures the HifiBerry DAC+DSP audio card
5865 +Load: dtoverlay=hifiberry-dacplusdsp
5866 +Params: <None>
5867 +
5868 +
5869 +Name: hifiberry-dacplushd
5870 +Info: Configures the HifiBerry DAC+ HD audio card
5871 +Load: dtoverlay=hifiberry-dacplushd
5872 +Params: <None>
5873 +
5874 +
5875 +Name: hifiberry-digi
5876 +Info: Configures the HifiBerry Digi and Digi+ audio card
5877 +Load: dtoverlay=hifiberry-digi
5878 +Params: <None>
5879 +
5880 +
5881 +Name: hifiberry-digi-pro
5882 +Info: Configures the HifiBerry Digi+ Pro audio card
5883 +Load: dtoverlay=hifiberry-digi-pro
5884 +Params: <None>
5885 +
5886 +
5887 +Name: highperi
5888 +Info: Enables "High Peripheral" mode
5889 +Load: dtoverlay=highperi
5890 +Params: <None>
5891 +
5892 +
5893 +Name: hy28a
5894 +Info: HY28A - 2.8" TFT LCD Display Module by HAOYU Electronics
5895 + Default values match Texy's display shield
5896 +Load: dtoverlay=hy28a,<param>=<val>
5897 +Params: speed Display SPI bus speed
5898 +
5899 + rotate Display rotation {0,90,180,270}
5900 +
5901 + fps Delay between frame updates
5902 +
5903 + debug Debug output level {0-7}
5904 +
5905 + xohms Touchpanel sensitivity (X-plate resistance)
5906 +
5907 + resetgpio GPIO used to reset controller
5908 +
5909 + ledgpio GPIO used to control backlight
5910 +
5911 +
5912 +Name: hy28b
5913 +Info: HY28B - 2.8" TFT LCD Display Module by HAOYU Electronics
5914 + Default values match Texy's display shield
5915 +Load: dtoverlay=hy28b,<param>=<val>
5916 +Params: speed Display SPI bus speed
5917 +
5918 + rotate Display rotation {0,90,180,270}
5919 +
5920 + fps Delay between frame updates
5921 +
5922 + debug Debug output level {0-7}
5923 +
5924 + xohms Touchpanel sensitivity (X-plate resistance)
5925 +
5926 + resetgpio GPIO used to reset controller
5927 +
5928 + ledgpio GPIO used to control backlight
5929 +
5930 +
5931 +Name: hy28b-2017
5932 +Info: HY28B 2017 version - 2.8" TFT LCD Display Module by HAOYU Electronics
5933 + Default values match Texy's display shield
5934 +Load: dtoverlay=hy28b-2017,<param>=<val>
5935 +Params: speed Display SPI bus speed
5936 +
5937 + rotate Display rotation {0,90,180,270}
5938 +
5939 + fps Delay between frame updates
5940 +
5941 + debug Debug output level {0-7}
5942 +
5943 + xohms Touchpanel sensitivity (X-plate resistance)
5944 +
5945 + resetgpio GPIO used to reset controller
5946 +
5947 + ledgpio GPIO used to control backlight
5948 +
5949 +
5950 +Name: i-sabre-q2m
5951 +Info: Configures the Audiophonics I-SABRE Q2M DAC
5952 +Load: dtoverlay=i-sabre-q2m
5953 +Params: <None>
5954 +
5955 +
5956 +Name: i2c-bcm2708
5957 +Info: Fall back to the i2c_bcm2708 driver for the i2c_arm bus.
5958 +Load: dtoverlay=i2c-bcm2708
5959 +Params: <None>
5960 +
5961 +
5962 +Name: i2c-gpio
5963 +Info: Adds support for software i2c controller on gpio pins
5964 +Load: dtoverlay=i2c-gpio,<param>=<val>
5965 +Params: i2c_gpio_sda GPIO used for I2C data (default "23")
5966 +
5967 + i2c_gpio_scl GPIO used for I2C clock (default "24")
5968 +
5969 + i2c_gpio_delay_us Clock delay in microseconds
5970 + (default "2" = ~100kHz)
5971 +
5972 + bus Set to a unique, non-zero value if wanting
5973 + multiple i2c-gpio busses. If set, will be used
5974 + as the preferred bus number (/dev/i2c-<n>). If
5975 + not set, the default value is 0, but the bus
5976 + number will be dynamically assigned - probably
5977 + 3.
5978 +
5979 +
5980 +Name: i2c-mux
5981 +Info: Adds support for a number of I2C bus multiplexers on i2c_arm
5982 +Load: dtoverlay=i2c-mux,<param>=<val>
5983 +Params: pca9542 Select the NXP PCA9542 device
5984 +
5985 + pca9545 Select the NXP PCA9545 device
5986 +
5987 + pca9548 Select the NXP PCA9548 device
5988 +
5989 + addr Change I2C address of the device (default 0x70)
5990 +
5991 +
5992 +[ The i2c-mux-pca9548a overlay has been deleted. See i2c-mux. ]
5993 +
5994 +
5995 +Name: i2c-pwm-pca9685a
5996 +Info: Adds support for an NXP PCA9685A I2C PWM controller on i2c_arm
5997 +Load: dtoverlay=i2c-pwm-pca9685a,<param>=<val>
5998 +Params: addr I2C address of PCA9685A (default 0x40)
5999 +
6000 +
6001 +Name: i2c-rtc
6002 +Info: Adds support for a number of I2C Real Time Clock devices
6003 +Load: dtoverlay=i2c-rtc,<param>=<val>
6004 +Params: abx80x Select one of the ABx80x family:
6005 + AB0801, AB0803, AB0804, AB0805,
6006 + AB1801, AB1803, AB1804, AB1805
6007 +
6008 + ds1307 Select the DS1307 device
6009 +
6010 + ds1339 Select the DS1339 device
6011 +
6012 + ds3231 Select the DS3231 device
6013 +
6014 + m41t62 Select the M41T62 device
6015 +
6016 + mcp7940x Select the MCP7940x device
6017 +
6018 + mcp7941x Select the MCP7941x device
6019 +
6020 + pcf2127 Select the PCF2127 device
6021 +
6022 + pcf2129 Select the PCF2129 device
6023 +
6024 + pcf8523 Select the PCF8523 device
6025 +
6026 + pcf85363 Select the PCF85363 device
6027 +
6028 + pcf8563 Select the PCF8563 device
6029 +
6030 + rv1805 Select the Micro Crystal RV1805 device
6031 +
6032 + rv3028 Select the Micro Crystal RV3028 device
6033 +
6034 + sd3078 Select the ZXW Shenzhen whwave SD3078 device
6035 +
6036 + addr Sets the address for the RTC. Note that the
6037 + device must be configured to use the specified
6038 + address.
6039 +
6040 + trickle-diode-type Diode type for trickle charge - "standard" or
6041 + "schottky" (ABx80x and RV1805 only)
6042 +
6043 + trickle-resistor-ohms Resistor value for trickle charge (DS1339,
6044 + ABx80x, RV1805, RV3028)
6045 +
6046 + wakeup-source Specify that the RTC can be used as a wakeup
6047 + source
6048 +
6049 + backup-switchover-mode Backup power supply switch mode. Must be 0 for
6050 + off or 1 for Vdd < VBackup (RV3028 only)
6051 +
6052 +
6053 +Name: i2c-rtc-gpio
6054 +Info: Adds support for a number of I2C Real Time Clock devices
6055 + using the software i2c controller
6056 +Load: dtoverlay=i2c-rtc-gpio,<param>=<val>
6057 +Params: abx80x Select one of the ABx80x family:
6058 + AB0801, AB0803, AB0804, AB0805,
6059 + AB1801, AB1803, AB1804, AB1805
6060 +
6061 + ds1307 Select the DS1307 device
6062 +
6063 + ds1339 Select the DS1339 device
6064 +
6065 + ds3231 Select the DS3231 device
6066 +
6067 + m41t62 Select the M41T62 device
6068 +
6069 + mcp7940x Select the MCP7940x device
6070 +
6071 + mcp7941x Select the MCP7941x device
6072 +
6073 + pcf2127 Select the PCF2127 device
6074 +
6075 + pcf2129 Select the PCF2129 device
6076 +
6077 + pcf8523 Select the PCF8523 device
6078 +
6079 + pcf8563 Select the PCF8563 device
6080 +
6081 + rv1805 Select the Micro Crystal RV1805 device
6082 +
6083 + rv3028 Select the Micro Crystal RV3028 device
6084 +
6085 + addr Sets the address for the RTC. Note that the
6086 + device must be configured to use the specified
6087 + address.
6088 +
6089 + trickle-diode-type Diode type for trickle charge - "standard" or
6090 + "schottky" (ABx80x and RV1805 only)
6091 +
6092 + trickle-resistor-ohms Resistor value for trickle charge (DS1339,
6093 + ABx80x, RV1805, RV3028)
6094 +
6095 + wakeup-source Specify that the RTC can be used as a wakeup
6096 + source
6097 +
6098 + backup-switchover-mode Backup power supply switch mode. Must be 0 for
6099 + off or 1 for Vdd < VBackup (RV3028 only)
6100 +
6101 + i2c_gpio_sda GPIO used for I2C data (default "23")
6102 +
6103 + i2c_gpio_scl GPIO used for I2C clock (default "24")
6104 +
6105 + i2c_gpio_delay_us Clock delay in microseconds
6106 + (default "2" = ~100kHz)
6107 +
6108 +
6109 +Name: i2c-sensor
6110 +Info: Adds support for a number of I2C barometric pressure and temperature
6111 + sensors on i2c_arm
6112 +Load: dtoverlay=i2c-sensor,<param>=<val>
6113 +Params: addr Set the address for the BME280, BME680, BMP280,
6114 + DS1621, HDC100X, LM75, SHT3x or TMP102
6115 +
6116 + bme280 Select the Bosch Sensortronic BME280
6117 + Valid addresses 0x76-0x77, default 0x76
6118 +
6119 + bme680 Select the Bosch Sensortronic BME680
6120 + Valid addresses 0x76-0x77, default 0x76
6121 +
6122 + bmp085 Select the Bosch Sensortronic BMP085
6123 +
6124 + bmp180 Select the Bosch Sensortronic BMP180
6125 +
6126 + bmp280 Select the Bosch Sensortronic BMP280
6127 + Valid addresses 0x76-0x77, default 0x76
6128 +
6129 + ds1621 Select the Dallas Semiconductors DS1621 temp
6130 + sensor. Valid addresses 0x48-0x4f, default 0x48
6131 +
6132 + hdc100x Select the Texas Instruments HDC100x temp sensor
6133 + Valid addresses 0x40-0x43, default 0x40
6134 +
6135 + htu21 Select the HTU21 temperature and humidity sensor
6136 +
6137 + lm75 Select the Maxim LM75 temperature sensor
6138 + Valid addresses 0x48-0x4f, default 0x4f
6139 +
6140 + lm75addr Deprecated - use addr parameter instead
6141 +
6142 + max17040 Select the Maxim Integrated MAX17040 battery
6143 + monitor
6144 +
6145 + sht3x Select the Sensiron SHT3x temperature and
6146 + humidity sensor. Valid addresses 0x44-0x45,
6147 + default 0x44
6148 +
6149 + si7020 Select the Silicon Labs Si7013/20/21 humidity/
6150 + temperature sensor
6151 +
6152 + sps30 Select the Sensirion SPS30 particulate matter
6153 + sensor. Fixed address 0x69.
6154 +
6155 + tmp102 Select the Texas Instruments TMP102 temp sensor
6156 + Valid addresses 0x48-0x4b, default 0x48
6157 +
6158 + tsl4531 Select the AMS TSL4531 digital ambient light
6159 + sensor
6160 +
6161 + veml6070 Select the Vishay VEML6070 ultraviolet light
6162 + sensor
6163 +
6164 +
6165 +Name: i2c0
6166 +Info: Change i2c0 pin usage. Not all pin combinations are usable on all
6167 + platforms - platforms other then Compute Modules can only use this
6168 + to disable transaction combining.
6169 + Do NOT use in conjunction with dtparam=i2c_vc=on. From the 5.4 kernel
6170 + onwards the base DT includes the use of i2c_mux_pinctrl to expose two
6171 + muxings of BSC0 - GPIOs 0&1, and whichever combination is used for the
6172 + camera and display connectors. This overlay disables that mux and
6173 + configures /dev/i2c0 to point at whichever set of pins is requested.
6174 + dtparam=i2c_vc=on will try and enable the mux, so combining the two
6175 + will cause conflicts.
6176 +Load: dtoverlay=i2c0,<param>=<val>
6177 +Params: pins_0_1 Use pins 0 and 1 (default)
6178 + pins_28_29 Use pins 28 and 29
6179 + pins_44_45 Use pins 44 and 45
6180 + pins_46_47 Use pins 46 and 47
6181 + combine Allow transactions to be combined (default
6182 + "yes")
6183 +
6184 +
6185 +Name: i2c0-bcm2708
6186 +Info: Deprecated, legacy version of i2c0.
6187 +Load: <Deprecated>
6188 +
6189 +
6190 +Name: i2c1
6191 +Info: Change i2c1 pin usage. Not all pin combinations are usable on all
6192 + platforms - platforms other then Compute Modules can only use this
6193 + to disable transaction combining.
6194 +Load: dtoverlay=i2c1,<param>=<val>
6195 +Params: pins_2_3 Use pins 2 and 3 (default)
6196 + pins_44_45 Use pins 44 and 45
6197 + combine Allow transactions to be combined (default
6198 + "yes")
6199 +
6200 +
6201 +Name: i2c1-bcm2708
6202 +Info: Deprecated, legacy version of i2c1.
6203 +Load: <Deprecated>
6204 +
6205 +
6206 +Name: i2c3
6207 +Info: Enable the i2c3 bus. BCM2711 only.
6208 +Load: dtoverlay=i2c3,<param>
6209 +Params: pins_2_3 Use GPIOs 2 and 3
6210 + pins_4_5 Use GPIOs 4 and 5 (default)
6211 + baudrate Set the baudrate for the interface (default
6212 + "100000")
6213 +
6214 +
6215 +Name: i2c4
6216 +Info: Enable the i2c4 bus. BCM2711 only.
6217 +Load: dtoverlay=i2c4,<param>
6218 +Params: pins_6_7 Use GPIOs 6 and 7
6219 + pins_8_9 Use GPIOs 8 and 9 (default)
6220 + baudrate Set the baudrate for the interface (default
6221 + "100000")
6222 +
6223 +
6224 +Name: i2c5
6225 +Info: Enable the i2c5 bus. BCM2711 only.
6226 +Load: dtoverlay=i2c5,<param>
6227 +Params: pins_10_11 Use GPIOs 10 and 11
6228 + pins_12_13 Use GPIOs 12 and 13 (default)
6229 + baudrate Set the baudrate for the interface (default
6230 + "100000")
6231 +
6232 +
6233 +Name: i2c6
6234 +Info: Enable the i2c6 bus. BCM2711 only.
6235 +Load: dtoverlay=i2c6,<param>
6236 +Params: pins_0_1 Use GPIOs 0 and 1
6237 + pins_22_23 Use GPIOs 22 and 23 (default)
6238 + baudrate Set the baudrate for the interface (default
6239 + "100000")
6240 +
6241 +
6242 +Name: i2s-gpio28-31
6243 +Info: move I2S function block to GPIO 28 to 31
6244 +Load: dtoverlay=i2s-gpio28-31
6245 +Params: <None>
6246 +
6247 +
6248 +Name: ilitek251x
6249 +Info: Enables I2C connected Ilitek 251x multiple touch controller using
6250 + GPIO 4 (pin 7 on GPIO header) for interrupt.
6251 +Load: dtoverlay=ilitek251x,<param>=<val>
6252 +Params: interrupt GPIO used for interrupt (default 4)
6253 + sizex Touchscreen size x, horizontal resolution of
6254 + touchscreen (in pixels)
6255 + sizey Touchscreen size y, vertical resolution of
6256 + touchscreen (in pixels)
6257 +
6258 +
6259 +Name: imx219
6260 +Info: Sony IMX219 camera module.
6261 + Uses Unicam 1, which is the standard camera connector on most Pi
6262 + variants.
6263 +Load: dtoverlay=imx219,<param>=<val>
6264 +Params: rotation Mounting rotation of the camera sensor (0 or
6265 + 180, default 180)
6266 +
6267 +
6268 +Name: imx290
6269 +Info: Sony IMX290 camera module.
6270 + Uses Unicam 1, which is the standard camera connector on most Pi
6271 + variants. NB This currently uses 4 CSI2 data lanes and therefore will
6272 + only work on a CM.
6273 +Load: dtoverlay=imx290,<param>
6274 +Params: 4lane Enable 4 CSI2 lanes. This requires a Compute
6275 + Module (1, 3, or 4).
6276 + clock-frequency Sets the clock frequency to match that used on
6277 + the board.
6278 + Modules from Vision Components use 37.125MHz
6279 + (the default), whilst those from Innomaker use
6280 + 74.25MHz.
6281 + mono Denote that the module is a mono sensor.
6282 +
6283 +
6284 +Name: imx477
6285 +Info: Sony IMX477 camera module.
6286 + Uses Unicam 1, which is the standard camera connector on most Pi
6287 + variants.
6288 +Load: dtoverlay=imx477,<param>=<val>
6289 +Params: rotation Mounting rotation of the camera sensor (0 or
6290 + 180, default 180)
6291 +
6292 +
6293 +Name: iqaudio-codec
6294 +Info: Configures the IQaudio Codec audio card
6295 +Load: dtoverlay=iqaudio-codec
6296 +Params: <None>
6297 +
6298 +
6299 +Name: iqaudio-dac
6300 +Info: Configures the IQaudio DAC audio card
6301 +Load: dtoverlay=iqaudio-dac,<param>
6302 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
6303 + Digital volume control. Enable with
6304 + "dtoverlay=iqaudio-dac,24db_digital_gain"
6305 + (The default behaviour is that the Digital
6306 + volume control is limited to a maximum of
6307 + 0dB. ie. it can attenuate but not provide
6308 + gain. For most users, this will be desired
6309 + as it will prevent clipping. By appending
6310 + the 24db_digital_gain parameter, the Digital
6311 + volume control will allow up to 24dB of
6312 + gain. If this parameter is enabled, it is the
6313 + responsibility of the user to ensure that
6314 + the Digital volume control is set to a value
6315 + that does not result in clipping/distortion!)
6316 +
6317 +
6318 +Name: iqaudio-dacplus
6319 +Info: Configures the IQaudio DAC+ audio card
6320 +Load: dtoverlay=iqaudio-dacplus,<param>=<val>
6321 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
6322 + Digital volume control. Enable with
6323 + "dtoverlay=iqaudio-dacplus,24db_digital_gain"
6324 + (The default behaviour is that the Digital
6325 + volume control is limited to a maximum of
6326 + 0dB. ie. it can attenuate but not provide
6327 + gain. For most users, this will be desired
6328 + as it will prevent clipping. By appending
6329 + the 24db_digital_gain parameter, the Digital
6330 + volume control will allow up to 24dB of
6331 + gain. If this parameter is enabled, it is the
6332 + responsibility of the user to ensure that
6333 + the Digital volume control is set to a value
6334 + that does not result in clipping/distortion!)
6335 + auto_mute_amp If specified, unmute/mute the IQaudIO amp when
6336 + starting/stopping audio playback.
6337 + unmute_amp If specified, unmute the IQaudIO amp once when
6338 + the DAC driver module loads.
6339 +
6340 +
6341 +Name: iqaudio-digi-wm8804-audio
6342 +Info: Configures the IQAudIO Digi WM8804 audio card
6343 +Load: dtoverlay=iqaudio-digi-wm8804-audio,<param>=<val>
6344 +Params: card_name Override the default, "IQAudIODigi", card name.
6345 + dai_name Override the default, "IQAudIO Digi", dai name.
6346 + dai_stream_name Override the default, "IQAudIO Digi HiFi",
6347 + dai stream name.
6348 +
6349 +
6350 +Name: irs1125
6351 +Info: Infineon irs1125 TOF camera module.
6352 + Uses Unicam 1, which is the standard camera connector on most Pi
6353 + variants.
6354 +Load: dtoverlay=irs1125
6355 +Params: <None>
6356 +
6357 +
6358 +Name: jedec-spi-nor
6359 +Info: Adds support for JEDEC-compliant SPI NOR flash devices. (Note: The
6360 + "jedec,spi-nor" kernel driver was formerly known as "m25p80".)
6361 +Load: dtoverlay=jedec-spi-nor,<param>=<val>
6362 +Params: flash-spi<n>-<m> Enables flash device on SPI<n>, CS#<m>.
6363 + flash-fastr-spi<n>-<m> Enables flash device with fast read capability
6364 + on SPI<n>, CS#<m>.
6365 +
6366 +
6367 +Name: justboom-both
6368 +Info: Simultaneous usage of an justboom-dac and justboom-digi based
6369 + card
6370 +Load: dtoverlay=justboom-both,<param>=<val>
6371 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
6372 + Digital volume control. Enable with
6373 + "dtoverlay=justboom-dac,24db_digital_gain"
6374 + (The default behaviour is that the Digital
6375 + volume control is limited to a maximum of
6376 + 0dB. ie. it can attenuate but not provide
6377 + gain. For most users, this will be desired
6378 + as it will prevent clipping. By appending
6379 + the 24dB_digital_gain parameter, the Digital
6380 + volume control will allow up to 24dB of
6381 + gain. If this parameter is enabled, it is the
6382 + responsibility of the user to ensure that
6383 + the Digital volume control is set to a value
6384 + that does not result in clipping/distortion!)
6385 +
6386 +
6387 +Name: justboom-dac
6388 +Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
6389 + cards
6390 +Load: dtoverlay=justboom-dac,<param>=<val>
6391 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
6392 + Digital volume control. Enable with
6393 + "dtoverlay=justboom-dac,24db_digital_gain"
6394 + (The default behaviour is that the Digital
6395 + volume control is limited to a maximum of
6396 + 0dB. ie. it can attenuate but not provide
6397 + gain. For most users, this will be desired
6398 + as it will prevent clipping. By appending
6399 + the 24dB_digital_gain parameter, the Digital
6400 + volume control will allow up to 24dB of
6401 + gain. If this parameter is enabled, it is the
6402 + responsibility of the user to ensure that
6403 + the Digital volume control is set to a value
6404 + that does not result in clipping/distortion!)
6405 +
6406 +
6407 +Name: justboom-digi
6408 +Info: Configures the JustBoom Digi HAT and Digi Zero audio cards
6409 +Load: dtoverlay=justboom-digi
6410 +Params: <None>
6411 +
6412 +
6413 +Name: lirc-rpi
6414 +Info: This overlay has been deprecated and removed - see gpio-ir
6415 +Load: <Deprecated>
6416 +
6417 +
6418 +Name: ltc294x
6419 +Info: Adds support for the ltc294x family of battery gauges
6420 +Load: dtoverlay=ltc294x,<param>=<val>
6421 +Params: ltc2941 Select the ltc2941 device
6422 +
6423 + ltc2942 Select the ltc2942 device
6424 +
6425 + ltc2943 Select the ltc2943 device
6426 +
6427 + ltc2944 Select the ltc2944 device
6428 +
6429 + resistor-sense The sense resistor value in milli-ohms.
6430 + Can be a 32-bit negative value when the battery
6431 + has been connected to the wrong end of the
6432 + resistor.
6433 +
6434 + prescaler-exponent Range and accuracy of the gauge. The value is
6435 + programmed into the chip only if it differs
6436 + from the current setting.
6437 + For LTC2941 only:
6438 + - Default value is 128
6439 + - the exponent is in the range 0-7 (default 7)
6440 + See the datasheet for more information.
6441 +
6442 +
6443 +Name: max98357a
6444 +Info: Configures the Maxim MAX98357A I2S DAC
6445 +Load: dtoverlay=max98357a,<param>=<val>
6446 +Params: no-sdmode Driver does not manage the state of the DAC's
6447 + SD_MODE pin (i.e. chip is always on).
6448 + sdmode-pin integer, GPIO pin connected to the SD_MODE input
6449 + of the DAC (default GPIO4 if parameter omitted).
6450 +
6451 +
6452 +Name: maxtherm
6453 +Info: Configure a MAX6675 or MAX31855 thermocouple as an IIO device.
6454 +
6455 + For devices on spi1 or spi2, the interfaces should be enabled
6456 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
6457 + The overlay expects to disable the relevant spidev node, so also using
6458 + e.g. cs0_spidev=off is unnecessary.
6459 +
6460 + Note: with the 5.7 kernel (and later) there will also be
6461 + overlays for MAX31855E, MAX31855J, MAX31855K,
6462 + MAX31885N, MAX31855R, MAX31855S and MAX31855T.
6463 +
6464 + Example:
6465 + MAX31855 on /dev/spidev0.0
6466 + dtoverlay=maxtherm,spi0-0,max31855
6467 +
6468 +Load: dtoverlay=maxtherm,<param>=<val>
6469 +Params: spi<n>-<m> Configure device at spi<n>, cs<m>
6470 + (boolean, required)
6471 + max6675 Enable support for the MAX6675 (default)
6472 + max31855 Enable support for the MAX31855
6473 + max31855e Enable support for the MAX31855E
6474 + max31855j Enable support for the MAX31855J
6475 + max31855k Enable support for the MAX31855K
6476 + max31855n Enable support for the MAX31855N
6477 + max31855r Enable support for the MAX31855R
6478 + max31855s Enable support for the MAX31855S
6479 + max31855t Enable support for the MAX31855T
6480 +
6481 +
6482 +Name: mbed-dac
6483 +Info: Configures the mbed AudioCODEC (TLV320AIC23B)
6484 +Load: dtoverlay=mbed-dac
6485 +Params: <None>
6486 +
6487 +
6488 +Name: mcp23017
6489 +Info: Configures the MCP23017 I2C GPIO expander
6490 +Load: dtoverlay=mcp23017,<param>=<val>
6491 +Params: gpiopin Gpio pin connected to the INTA output of the
6492 + MCP23017 (default: 4)
6493 +
6494 + addr I2C address of the MCP23017 (default: 0x20)
6495 +
6496 + mcp23008 Configure an MCP23008 instead.
6497 + noints Disable the interrupt GPIO line.
6498 +
6499 +
6500 +Name: mcp23s17
6501 +Info: Configures the MCP23S08/17 SPI GPIO expanders.
6502 + If devices are present on SPI1 or SPI2, those interfaces must be enabled
6503 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
6504 + If interrupts are enabled for a device on a given CS# on a SPI bus, that
6505 + device must be the only one present on that SPI bus/CS#.
6506 +Load: dtoverlay=mcp23s17,<param>=<val>
6507 +Params: s08-spi<n>-<m>-present 4-bit integer, bitmap indicating MCP23S08
6508 + devices present on SPI<n>, CS#<m>
6509 +
6510 + s17-spi<n>-<m>-present 8-bit integer, bitmap indicating MCP23S17
6511 + devices present on SPI<n>, CS#<m>
6512 +
6513 + s08-spi<n>-<m>-int-gpio integer, enables interrupts on a single
6514 + MCP23S08 device on SPI<n>, CS#<m>, specifies
6515 + the GPIO pin to which INT output of MCP23S08
6516 + is connected.
6517 +
6518 + s17-spi<n>-<m>-int-gpio integer, enables mirrored interrupts on a
6519 + single MCP23S17 device on SPI<n>, CS#<m>,
6520 + specifies the GPIO pin to which either INTA
6521 + or INTB output of MCP23S17 is connected.
6522 +
6523 +
6524 +Name: mcp2515-can0
6525 +Info: Configures the MCP2515 CAN controller on spi0.0
6526 +Load: dtoverlay=mcp2515-can0,<param>=<val>
6527 +Params: oscillator Clock frequency for the CAN controller (Hz)
6528 +
6529 + spimaxfrequency Maximum SPI frequence (Hz)
6530 +
6531 + interrupt GPIO for interrupt signal
6532 +
6533 +
6534 +Name: mcp2515-can1
6535 +Info: Configures the MCP2515 CAN controller on spi0.1
6536 +Load: dtoverlay=mcp2515-can1,<param>=<val>
6537 +Params: oscillator Clock frequency for the CAN controller (Hz)
6538 +
6539 + spimaxfrequency Maximum SPI frequence (Hz)
6540 +
6541 + interrupt GPIO for interrupt signal
6542 +
6543 +
6544 +Name: mcp3008
6545 +Info: Configures MCP3008 A/D converters
6546 + For devices on spi1 or spi2, the interfaces should be enabled
6547 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
6548 +Load: dtoverlay=mcp3008,<param>[=<val>]
6549 +Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
6550 + spi<n>-<m>-speed integer, set the spi bus speed for this device
6551 +
6552 +
6553 +Name: mcp3202
6554 +Info: Configures MCP3202 A/D converters
6555 + For devices on spi1 or spi2, the interfaces should be enabled
6556 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
6557 +Load: dtoverlay=mcp3202,<param>[=<val>]
6558 +Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
6559 + spi<n>-<m>-speed integer, set the spi bus speed for this device
6560 +
6561 +
6562 +Name: mcp342x
6563 +Info: Overlay for activation of Microchip MCP3421-3428 ADCs over I2C
6564 +Load: dtoverlay=mcp342x,<param>=<val>
6565 +Params: addr I2C bus address of device, for devices with
6566 + addresses that are configurable, e.g. by
6567 + hardware links (default=0x68)
6568 + mcp3421 The device is an MCP3421
6569 + mcp3422 The device is an MCP3422
6570 + mcp3423 The device is an MCP3423
6571 + mcp3424 The device is an MCP3424
6572 + mcp3425 The device is an MCP3425
6573 + mcp3426 The device is an MCP3426
6574 + mcp3427 The device is an MCP3427
6575 + mcp3428 The device is an MCP3428
6576 +
6577 +
6578 +Name: media-center
6579 +Info: Media Center HAT - 2.83" Touch Display + extras by Pi Supply
6580 +Load: dtoverlay=media-center,<param>=<val>
6581 +Params: speed Display SPI bus speed
6582 + rotate Display rotation {0,90,180,270}
6583 + fps Delay between frame updates
6584 + xohms Touchpanel sensitivity (X-plate resistance)
6585 + swapxy Swap x and y axis
6586 + backlight Change backlight GPIO pin {e.g. 12, 18}
6587 + gpio_out_pin GPIO for output (default "17")
6588 + gpio_in_pin GPIO for input (default "18")
6589 + gpio_in_pull Pull up/down/off on the input pin
6590 + (default "down")
6591 + sense Override the IR receive auto-detection logic:
6592 + "0" = force active-high
6593 + "1" = force active-low
6594 + "-1" = use auto-detection
6595 + (default "-1")
6596 + softcarrier Turn the software carrier "on" or "off"
6597 + (default "on")
6598 + invert "on" = invert the output pin (default "off")
6599 + debug "on" = enable additional debug messages
6600 + (default "off")
6601 +
6602 +
6603 +Name: merus-amp
6604 +Info: Configures the merus-amp audio card
6605 +Load: dtoverlay=merus-amp
6606 +Params: <None>
6607 +
6608 +
6609 +Name: midi-uart0
6610 +Info: Configures UART0 (ttyAMA0) so that a requested 38.4kbaud actually gets
6611 + 31.25kbaud, the frequency required for MIDI
6612 +Load: dtoverlay=midi-uart0
6613 +Params: <None>
6614 +
6615 +
6616 +Name: midi-uart1
6617 +Info: Configures UART1 (ttyS0) so that a requested 38.4kbaud actually gets
6618 + 31.25kbaud, the frequency required for MIDI
6619 +Load: dtoverlay=midi-uart1
6620 +Params: <None>
6621 +
6622 +
6623 +Name: miniuart-bt
6624 +Info: Switch the onboard Bluetooth function on Pi 3B, 3B+, 3A+, 4B and Zero W
6625 + to use the mini-UART (ttyS0) and restore UART0/ttyAMA0 over GPIOs 14 &
6626 + 15. Note that this may reduce the maximum usable baudrate.
6627 + N.B. It is also necessary to edit /lib/systemd/system/hciuart.service
6628 + and replace ttyAMA0 with ttyS0, unless using Raspbian or another
6629 + distribution with udev rules that create /dev/serial0 and /dev/serial1,
6630 + in which case use /dev/serial1 instead because it will always be
6631 + correct. Furthermore, you must also set core_freq and core_freq_min to
6632 + the same value in config.txt or the miniuart will not work.
6633 +Load: dtoverlay=miniuart-bt,<param>=<val>
6634 +Params: krnbt Set to "on" to enable autoprobing of Bluetooth
6635 + driver without need of hciattach/btattach
6636 +
6637 +
6638 +Name: mmc
6639 +Info: Selects the bcm2835-mmc SD/MMC driver, optionally with overclock
6640 +Load: dtoverlay=mmc,<param>=<val>
6641 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
6642 + requests 50MHz
6643 +
6644 +
6645 +Name: mpu6050
6646 +Info: Overlay for i2c connected mpu6050 imu
6647 +Load: dtoverlay=mpu6050,<param>=<val>
6648 +Params: interrupt GPIO pin for interrupt (default 4)
6649 +
6650 +
6651 +Name: mz61581
6652 +Info: MZ61581 display by Tontec
6653 +Load: dtoverlay=mz61581,<param>=<val>
6654 +Params: speed Display SPI bus speed
6655 +
6656 + rotate Display rotation {0,90,180,270}
6657 +
6658 + fps Delay between frame updates
6659 +
6660 + txbuflen Transmit buffer length (default 32768)
6661 +
6662 + debug Debug output level {0-7}
6663 +
6664 + xohms Touchpanel sensitivity (X-plate resistance)
6665 +
6666 +
6667 +Name: ov5647
6668 +Info: Omnivision OV5647 camera module.
6669 + Uses Unicam 1, which is the standard camera connector on most Pi
6670 + variants.
6671 +Load: dtoverlay=ov5647,<param>=<val>
6672 +Params: rotation Mounting rotation of the camera sensor (0 or
6673 + 180, default 0)
6674 +
6675 +
6676 +Name: ov7251
6677 +Info: Omnivision OV7251 camera module.
6678 + Uses Unicam 1, which is the standard camera connector on most Pi
6679 + variants.
6680 +Load: dtoverlay=ov7251
6681 +Params: <None>
6682 +
6683 +
6684 +Name: ov9281
6685 +Info: Omnivision OV9281 camera module.
6686 + Uses Unicam 1, which is the standard camera connector on most Pi
6687 + variants.
6688 +Load: dtoverlay=ov9281
6689 +Params: <None>
6690 +
6691 +
6692 +Name: papirus
6693 +Info: PaPiRus ePaper Screen by Pi Supply (both HAT and pHAT)
6694 +Load: dtoverlay=papirus,<param>=<val>
6695 +Params: panel Display panel (required):
6696 + 1.44": e1144cs021
6697 + 2.0": e2200cs021
6698 + 2.7": e2271cs021
6699 +
6700 + speed Display SPI bus speed
6701 +
6702 +
6703 +Name: pca953x
6704 +Info: TI PCA953x family of I2C GPIO expanders. Default is for NXP PCA9534.
6705 +Load: dtoverlay=pca953x,<param>=<val>
6706 +Params: addr I2C address of expander. Default 0x20.
6707 + pca6416 Select the NXP PCA6416 (16 bit)
6708 + pca9505 Select the NXP PCA9505 (40 bit)
6709 + pca9535 Select the NXP PCA9535 (16 bit)
6710 + pca9536 Select the NXP PCA9536 or TI PCA9536 (4 bit)
6711 + pca9537 Select the NXP PCA9537 (4 bit)
6712 + pca9538 Select the NXP PCA9538 (8 bit)
6713 + pca9539 Select the NXP PCA9539 (16 bit)
6714 + pca9554 Select the NXP PCA9554 (8 bit)
6715 + pca9555 Select the NXP PCA9555 (16 bit)
6716 + pca9556 Select the NXP PCA9556 (8 bit)
6717 + pca9557 Select the NXP PCA9557 (8 bit)
6718 + pca9574 Select the NXP PCA9574 (8 bit)
6719 + pca9575 Select the NXP PCA9575 (16 bit)
6720 + pca9698 Select the NXP PCA9698 (40 bit)
6721 + pca16416 Select the NXP PCA16416 (16 bit)
6722 + pca16524 Select the NXP PCA16524 (24 bit)
6723 + pca19555a Select the NXP PCA19555A (16 bit)
6724 + max7310 Select the Maxim MAX7310 (8 bit)
6725 + max7312 Select the Maxim MAX7312 (16 bit)
6726 + max7313 Select the Maxim MAX7313 (16 bit)
6727 + max7315 Select the Maxim MAX7315 (8 bit)
6728 + pca6107 Select the TI PCA6107 (8 bit)
6729 + tca6408 Select the TI TCA6408 (8 bit)
6730 + tca6416 Select the TI TCA6416 (16 bit)
6731 + tca6424 Select the TI TCA6424 (24 bit)
6732 + tca9539 Select the TI TCA9539 (16 bit)
6733 + tca9554 Select the TI TCA9554 (8 bit)
6734 + cat9554 Select the Onnn CAT9554 (8 bit)
6735 + pca9654 Select the Onnn PCA9654 (8 bit)
6736 + xra1202 Select the Exar XRA1202 (8 bit)
6737 +
6738 +
6739 +[ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ]
6740 +
6741 +
6742 +[ The pcf8523-rtc overlay has been deleted. See i2c-rtc. ]
6743 +
6744 +
6745 +[ The pcf8563-rtc overlay has been deleted. See i2c-rtc. ]
6746 +
6747 +
6748 +Name: pi3-act-led
6749 +Info: This overlay has been renamed act-led, keeping pi3-act-led as an alias
6750 + for backwards compatibility.
6751 +Load: <Deprecated>
6752 +
6753 +
6754 +Name: pi3-disable-bt
6755 +Info: This overlay has been renamed disable-bt, keeping pi3-disable-bt as an
6756 + alias for backwards compatibility.
6757 +Load: <Deprecated>
6758 +
6759 +
6760 +Name: pi3-disable-wifi
6761 +Info: This overlay has been renamed disable-wifi, keeping pi3-disable-wifi as
6762 + an alias for backwards compatibility.
6763 +Load: <Deprecated>
6764 +
6765 +
6766 +Name: pi3-miniuart-bt
6767 +Info: This overlay has been renamed miniuart-bt, keeping pi3-miniuart-bt as
6768 + an alias for backwards compatibility.
6769 +Load: <Deprecated>
6770 +
6771 +
6772 +Name: pibell
6773 +Info: Configures the pibell audio card.
6774 +Load: dtoverlay=pibell,<param>=<val>
6775 +Params: alsaname Set the name as it appears in ALSA (default
6776 + "PiBell")
6777 +
6778 +
6779 +Name: pifacedigital
6780 +Info: Configures the PiFace Digital mcp23s17 GPIO port expander.
6781 +Load: dtoverlay=pifacedigital,<param>=<val>
6782 +Params: spi-present-mask 8-bit integer, bitmap indicating MCP23S17 SPI0
6783 + CS0 address. PiFace Digital supports addresses
6784 + 0-3, which can be configured with JP1 and JP2.
6785 +
6786 +
6787 +Name: piglow
6788 +Info: Configures the PiGlow by pimoroni.com
6789 +Load: dtoverlay=piglow
6790 +Params: <None>
6791 +
6792 +
6793 +Name: piscreen
6794 +Info: PiScreen display by OzzMaker.com
6795 +Load: dtoverlay=piscreen,<param>=<val>
6796 +Params: speed Display SPI bus speed
6797 +
6798 + rotate Display rotation {0,90,180,270}
6799 +
6800 + fps Delay between frame updates
6801 +
6802 + debug Debug output level {0-7}
6803 +
6804 + xohms Touchpanel sensitivity (X-plate resistance)
6805 +
6806 +
6807 +Name: piscreen2r
6808 +Info: PiScreen 2 with resistive TP display by OzzMaker.com
6809 +Load: dtoverlay=piscreen2r,<param>=<val>
6810 +Params: speed Display SPI bus speed
6811 +
6812 + rotate Display rotation {0,90,180,270}
6813 +
6814 + fps Delay between frame updates
6815 +
6816 + debug Debug output level {0-7}
6817 +
6818 + xohms Touchpanel sensitivity (X-plate resistance)
6819 +
6820 +
6821 +Name: pisound
6822 +Info: Configures the Blokas Labs pisound card
6823 +Load: dtoverlay=pisound
6824 +Params: <None>
6825 +
6826 +
6827 +Name: pitft22
6828 +Info: Adafruit PiTFT 2.2" screen
6829 +Load: dtoverlay=pitft22,<param>=<val>
6830 +Params: speed Display SPI bus speed
6831 +
6832 + rotate Display rotation {0,90,180,270}
6833 +
6834 + fps Delay between frame updates
6835 +
6836 + debug Debug output level {0-7}
6837 +
6838 +
6839 +Name: pitft28-capacitive
6840 +Info: Adafruit PiTFT 2.8" capacitive touch screen
6841 +Load: dtoverlay=pitft28-capacitive,<param>=<val>
6842 +Params: speed Display SPI bus speed
6843 +
6844 + rotate Display rotation {0,90,180,270}
6845 +
6846 + fps Delay between frame updates
6847 +
6848 + debug Debug output level {0-7}
6849 +
6850 + touch-sizex Touchscreen size x (default 240)
6851 +
6852 + touch-sizey Touchscreen size y (default 320)
6853 +
6854 + touch-invx Touchscreen inverted x axis
6855 +
6856 + touch-invy Touchscreen inverted y axis
6857 +
6858 + touch-swapxy Touchscreen swapped x y axis
6859 +
6860 +
6861 +Name: pitft28-resistive
6862 +Info: Adafruit PiTFT 2.8" resistive touch screen
6863 +Load: dtoverlay=pitft28-resistive,<param>=<val>
6864 +Params: speed Display SPI bus speed
6865 +
6866 + rotate Display rotation {0,90,180,270}
6867 +
6868 + fps Delay between frame updates
6869 +
6870 + debug Debug output level {0-7}
6871 +
6872 +
6873 +Name: pitft35-resistive
6874 +Info: Adafruit PiTFT 3.5" resistive touch screen
6875 +Load: dtoverlay=pitft35-resistive,<param>=<val>
6876 +Params: speed Display SPI bus speed
6877 +
6878 + rotate Display rotation {0,90,180,270}
6879 +
6880 + fps Delay between frame updates
6881 +
6882 + debug Debug output level {0-7}
6883 +
6884 +
6885 +Name: pps-gpio
6886 +Info: Configures the pps-gpio (pulse-per-second time signal via GPIO).
6887 +Load: dtoverlay=pps-gpio,<param>=<val>
6888 +Params: gpiopin Input GPIO (default "18")
6889 + assert_falling_edge When present, assert is indicated by a falling
6890 + edge, rather than by a rising edge (default
6891 + off)
6892 + capture_clear Generate clear events on the trailing edge
6893 + (default off)
6894 +
6895 +
6896 +Name: pwm
6897 +Info: Configures a single PWM channel
6898 + Legal pin,function combinations for each channel:
6899 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
6900 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
6901 + N.B.:
6902 + 1) Pin 18 is the only one available on all platforms, and
6903 + it is the one used by the I2S audio interface.
6904 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
6905 + 2) The onboard analogue audio output uses both PWM channels.
6906 + 3) So be careful mixing audio and PWM.
6907 + 4) Currently the clock must have been enabled and configured
6908 + by other means.
6909 +Load: dtoverlay=pwm,<param>=<val>
6910 +Params: pin Output pin (default 18) - see table
6911 + func Pin function (default 2 = Alt5) - see above
6912 + clock PWM clock frequency (informational)
6913 +
6914 +
6915 +Name: pwm-2chan
6916 +Info: Configures both PWM channels
6917 + Legal pin,function combinations for each channel:
6918 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
6919 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
6920 + N.B.:
6921 + 1) Pin 18 is the only one available on all platforms, and
6922 + it is the one used by the I2S audio interface.
6923 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
6924 + 2) The onboard analogue audio output uses both PWM channels.
6925 + 3) So be careful mixing audio and PWM.
6926 + 4) Currently the clock must have been enabled and configured
6927 + by other means.
6928 +Load: dtoverlay=pwm-2chan,<param>=<val>
6929 +Params: pin Output pin (default 18) - see table
6930 + pin2 Output pin for other channel (default 19)
6931 + func Pin function (default 2 = Alt5) - see above
6932 + func2 Function for pin2 (default 2 = Alt5)
6933 + clock PWM clock frequency (informational)
6934 +
6935 +
6936 +Name: pwm-ir-tx
6937 +Info: Use GPIO pin as pwm-assisted infrared transmitter output.
6938 + This is an alternative to "gpio-ir-tx". pwm-ir-tx makes use
6939 + of PWM0 to reduce the CPU load during transmission compared to
6940 + gpio-ir-tx which uses bit-banging.
6941 + Legal pin,function combinations are:
6942 + 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
6943 +Load: dtoverlay=pwm-ir-tx,<param>=<val>
6944 +Params: gpio_pin Output GPIO (default 18)
6945 +
6946 + func Pin function (default 2 = Alt5)
6947 +
6948 +
6949 +Name: qca7000
6950 +Info: I2SE's Evaluation Board for PLC Stamp micro
6951 +Load: dtoverlay=qca7000,<param>=<val>
6952 +Params: int_pin GPIO pin for interrupt signal (default 23)
6953 +
6954 + speed SPI bus speed (default 12 MHz)
6955 +
6956 +
6957 +Name: rotary-encoder
6958 +Info: Overlay for GPIO connected rotary encoder.
6959 +Load: dtoverlay=rotary-encoder,<param>=<val>
6960 +Params: pin_a GPIO connected to rotary encoder channel A
6961 + (default 4).
6962 + pin_b GPIO connected to rotary encoder channel B
6963 + (default 17).
6964 + relative_axis register a relative axis rather than an
6965 + absolute one. Relative axis will only
6966 + generate +1/-1 events on the input device,
6967 + hence no steps need to be passed.
6968 + linux_axis the input subsystem axis to map to this
6969 + rotary encoder. Defaults to 0 (ABS_X / REL_X)
6970 + rollover Automatic rollover when the rotary value
6971 + becomes greater than the specified steps or
6972 + smaller than 0. For absolute axis only.
6973 + steps-per-period Number of steps (stable states) per period.
6974 + The values have the following meaning:
6975 + 1: Full-period mode (default)
6976 + 2: Half-period mode
6977 + 4: Quarter-period mode
6978 + steps Number of steps in a full turnaround of the
6979 + encoder. Only relevant for absolute axis.
6980 + Defaults to 24 which is a typical value for
6981 + such devices.
6982 + wakeup Boolean, rotary encoder can wake up the
6983 + system.
6984 + encoding String, the method used to encode steps.
6985 + Supported are "gray" (the default and more
6986 + common) and "binary".
6987 +
6988 +
6989 +Name: rpi-backlight
6990 +Info: Raspberry Pi official display backlight driver
6991 +Load: dtoverlay=rpi-backlight
6992 +Params: <None>
6993 +
6994 +
6995 +Name: rpi-cirrus-wm5102
6996 +Info: Configures the Cirrus Logic Audio Card
6997 +Load: dtoverlay=rpi-cirrus-wm5102
6998 +Params: <None>
6999 +
7000 +
7001 +Name: rpi-dac
7002 +Info: Configures the RPi DAC audio card
7003 +Load: dtoverlay=rpi-dac
7004 +Params: <None>
7005 +
7006 +
7007 +Name: rpi-display
7008 +Info: RPi-Display - 2.8" Touch Display by Watterott
7009 +Load: dtoverlay=rpi-display,<param>=<val>
7010 +Params: speed Display SPI bus speed
7011 + rotate Display rotation {0,90,180,270}
7012 + fps Delay between frame updates
7013 + debug Debug output level {0-7}
7014 + xohms Touchpanel sensitivity (X-plate resistance)
7015 + swapxy Swap x and y axis
7016 + backlight Change backlight GPIO pin {e.g. 12, 18}
7017 +
7018 +
7019 +Name: rpi-ft5406
7020 +Info: Official Raspberry Pi display touchscreen
7021 +Load: dtoverlay=rpi-ft5406,<param>=<val>
7022 +Params: touchscreen-size-x Touchscreen X resolution (default 800)
7023 + touchscreen-size-y Touchscreen Y resolution (default 600);
7024 + touchscreen-inverted-x Invert touchscreen X coordinates (default 0);
7025 + touchscreen-inverted-y Invert touchscreen Y coordinates (default 0);
7026 + touchscreen-swapped-x-y Swap X and Y cordinates (default 0);
7027 +
7028 +
7029 +Name: rpi-poe
7030 +Info: Raspberry Pi PoE HAT fan
7031 +Load: dtoverlay=rpi-poe,<param>[=<val>]
7032 +Params: poe_fan_temp0 Temperature (in millicelcius) at which the fan
7033 + turns on (default 40000)
7034 + poe_fan_temp0_hyst Temperature delta (in millicelcius) at which
7035 + the fan turns off (default 2000)
7036 + poe_fan_temp1 Temperature (in millicelcius) at which the fan
7037 + speeds up (default 45000)
7038 + poe_fan_temp1_hyst Temperature delta (in millicelcius) at which
7039 + the fan slows down (default 2000)
7040 + poe_fan_temp2 Temperature (in millicelcius) at which the fan
7041 + speeds up (default 50000)
7042 + poe_fan_temp2_hyst Temperature delta (in millicelcius) at which
7043 + the fan slows down (default 2000)
7044 + poe_fan_temp3 Temperature (in millicelcius) at which the fan
7045 + speeds up (default 55000)
7046 + poe_fan_temp3_hyst Temperature delta (in millicelcius) at which
7047 + the fan slows down (default 5000)
7048 +
7049 +
7050 +Name: rpi-proto
7051 +Info: Configures the RPi Proto audio card
7052 +Load: dtoverlay=rpi-proto
7053 +Params: <None>
7054 +
7055 +
7056 +Name: rpi-sense
7057 +Info: Raspberry Pi Sense HAT
7058 +Load: dtoverlay=rpi-sense
7059 +Params: <None>
7060 +
7061 +
7062 +Name: rpi-tv
7063 +Info: Raspberry Pi TV HAT
7064 +Load: dtoverlay=rpi-tv
7065 +Params: <None>
7066 +
7067 +
7068 +Name: rpivid-v4l2
7069 +Info: Load the V4L2 stateless video decoder driver for the HEVC block,
7070 + disabling the memory mapped devices in the process.
7071 +Load: dtoverlay=rpivid-v4l2
7072 +Params: <None>
7073 +
7074 +
7075 +Name: rra-digidac1-wm8741-audio
7076 +Info: Configures the Red Rocks Audio DigiDAC1 soundcard
7077 +Load: dtoverlay=rra-digidac1-wm8741-audio
7078 +Params: <None>
7079 +
7080 +
7081 +Name: sainsmart18
7082 +Info: Overlay for the SPI-connected Sainsmart 1.8" display (based on the
7083 + ST7735R chip).
7084 +Load: dtoverlay=sainsmart18,<param>=<val>
7085 +Params: rotate Display rotation {0,90,180,270}
7086 + speed SPI bus speed in Hz (default 4000000)
7087 + fps Display frame rate in Hz
7088 + bgr Enable BGR mode (default off)
7089 + debug Debug output level {0-7}
7090 + dc_pin GPIO pin for D/C (default 24)
7091 + reset_pin GPIO pin for RESET (default 25)
7092 +
7093 +
7094 +Name: sc16is750-i2c
7095 +Info: Overlay for the NXP SC16IS750 UART with I2C Interface
7096 + Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
7097 + select another address, please refer to table 10 in reference manual.
7098 +Load: dtoverlay=sc16is750-i2c,<param>=<val>
7099 +Params: int_pin GPIO used for IRQ (default 24)
7100 + addr Address (default 0x48)
7101 + xtal On-board crystal frequency (default 14745600)
7102 +
7103 +
7104 +Name: sc16is752-i2c
7105 +Info: Overlay for the NXP SC16IS752 dual UART with I2C Interface
7106 + Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
7107 + select another address, please refer to table 10 in reference manual.
7108 +Load: dtoverlay=sc16is752-i2c,<param>=<val>
7109 +Params: int_pin GPIO used for IRQ (default 24)
7110 + addr Address (default 0x48)
7111 + xtal On-board crystal frequency (default 14745600)
7112 +
7113 +
7114 +Name: sc16is752-spi0
7115 +Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
7116 + Enables the chip on SPI0.
7117 +Load: dtoverlay=sc16is752-spi0,<param>=<val>
7118 +Params: int_pin GPIO used for IRQ (default 24)
7119 + xtal On-board crystal frequency (default 14745600)
7120 +
7121 +
7122 +Name: sc16is752-spi1
7123 +Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
7124 + Enables the chip on SPI1.
7125 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
7126 + A+, B+, Zero and PI2 B; as well as the Compute Module.
7127 +
7128 +Load: dtoverlay=sc16is752-spi1,<param>=<val>
7129 +Params: int_pin GPIO used for IRQ (default 24)
7130 + xtal On-board crystal frequency (default 14745600)
7131 +
7132 +
7133 +Name: sdhost
7134 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
7135 + N.B. This overlay is designed for situations where the mmc driver is
7136 + the default, so it disables the other (mmc) interface - this will kill
7137 + WiFi on a Pi3. If this isn't what you want, either use the sdtweak
7138 + overlay or the new sd_* dtparams of the base DTBs.
7139 +Load: dtoverlay=sdhost,<param>=<val>
7140 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
7141 + requests 50MHz
7142 +
7143 + force_pio Disable DMA support (default off)
7144 +
7145 + pio_limit Number of blocks above which to use DMA
7146 + (default 1)
7147 +
7148 + debug Enable debug output (default off)
7149 +
7150 +
7151 +Name: sdio
7152 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock,
7153 + and enables SDIO via GPIOs 22-27. An example of use in 1-bit mode is
7154 + "dtoverlay=sdio,bus_width=1,gpios_22_25"
7155 +Load: dtoverlay=sdio,<param>=<val>
7156 +Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC
7157 + framework requests 50MHz
7158 +
7159 + poll_once Disable SDIO-device polling every second
7160 + (default on: polling once at boot-time)
7161 +
7162 + bus_width Set the SDIO host bus width (default 4 bits)
7163 +
7164 + gpios_22_25 Select GPIOs 22-25 for 1-bit mode. Must be used
7165 + with bus_width=1. This replaces the sdio-1bit
7166 + overlay, which is now deprecated.
7167 +
7168 + gpios_34_37 Select GPIOs 34-37 for 1-bit mode. Must be used
7169 + with bus_width=1.
7170 +
7171 + gpios_34_39 Select GPIOs 34-39 for 4-bit mode. Must be used
7172 + with bus_width=4 (the default).
7173 +
7174 +
7175 +Name: sdio-1bit
7176 +Info: This overlay is now deprecated. Use
7177 + "dtoverlay=sdio,bus_width=1,gpios_22_25" instead.
7178 +Load: <Deprecated>
7179 +
7180 +
7181 +Name: sdtweak
7182 +Info: Tunes the bcm2835-sdhost SD/MMC driver
7183 + N.B. This functionality is now available via the sd_* dtparams in the
7184 + base DTB.
7185 +Load: dtoverlay=sdtweak,<param>=<val>
7186 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
7187 + requests 50MHz
7188 +
7189 + force_pio Disable DMA support (default off)
7190 +
7191 + pio_limit Number of blocks above which to use DMA
7192 + (default 1)
7193 +
7194 + debug Enable debug output (default off)
7195 +
7196 + poll_once Looks for a card once after booting. Useful
7197 + for network booting scenarios to avoid the
7198 + overhead of continuous polling. N.B. Using
7199 + this option restricts the system to using a
7200 + single card per boot (or none at all).
7201 + (default off)
7202 +
7203 + enable Set to off to completely disable the interface
7204 + (default on)
7205 +
7206 +
7207 +Name: sh1106-spi
7208 +Info: Overlay for SH1106 OLED via SPI using fbtft staging driver.
7209 +Load: dtoverlay=sh1106-spi,<param>=<val>
7210 +Params: speed SPI bus speed (default 4000000)
7211 + rotate Display rotation (0, 90, 180 or 270; default 0)
7212 + fps Delay between frame updates (default 25)
7213 + debug Debug output level (0-7; default 0)
7214 + dc_pin GPIO pin for D/C (default 24)
7215 + reset_pin GPIO pin for RESET (default 25)
7216 + height Display height (32 or 64; default 64)
7217 +
7218 +
7219 +Name: smi
7220 +Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25!
7221 +Load: dtoverlay=smi
7222 +Params: <None>
7223 +
7224 +
7225 +Name: smi-dev
7226 +Info: Enables the userspace interface for the SMI driver
7227 +Load: dtoverlay=smi-dev
7228 +Params: <None>
7229 +
7230 +
7231 +Name: smi-nand
7232 +Info: Enables access to NAND flash via the SMI interface
7233 +Load: dtoverlay=smi-nand
7234 +Params: <None>
7235 +
7236 +
7237 +Name: spi-gpio35-39
7238 +Info: Move SPI function block to GPIO 35 to 39
7239 +Load: dtoverlay=spi-gpio35-39
7240 +Params: <None>
7241 +
7242 +
7243 +Name: spi-gpio40-45
7244 +Info: Move SPI function block to GPIOs 40 to 45
7245 +Load: dtoverlay=spi-gpio40-45
7246 +Params: <None>
7247 +
7248 +
7249 +Name: spi-rtc
7250 +Info: Adds support for a number of SPI Real Time Clock devices
7251 +Load: dtoverlay=spi-rtc,<param>=<val>
7252 +Params: pcf2123 Select the PCF2123 device
7253 +
7254 +
7255 +Name: spi0-1cs
7256 +Info: Only use one CS pin for SPI0
7257 +Load: dtoverlay=spi0-1cs,<param>=<val>
7258 +Params: cs0_pin GPIO pin for CS0 (default 8)
7259 + no_miso Don't claim and use the MISO pin (9), freeing
7260 + it for other uses.
7261 +
7262 +
7263 +Name: spi0-2cs
7264 +Info: Change the CS pins for SPI0
7265 +Load: dtoverlay=spi0-2cs,<param>=<val>
7266 +Params: cs0_pin GPIO pin for CS0 (default 8)
7267 + cs1_pin GPIO pin for CS1 (default 7)
7268 + no_miso Don't claim and use the MISO pin (9), freeing
7269 + it for other uses.
7270 +
7271 +
7272 +Name: spi0-cs
7273 +Info: This overlay has been renamed spi0-2cs, keeping spi0-cs as an
7274 + alias for backwards compatibility.
7275 +Load: <Deprecated>
7276 +
7277 +
7278 +Name: spi0-hw-cs
7279 +Info: This overlay has been deprecated and removed because it is no longer
7280 + necessary and has been seen to prevent spi0 from working.
7281 +Load: <Deprecated>
7282 +
7283 +
7284 +Name: spi1-1cs
7285 +Info: Enables spi1 with a single chip select (CS) line and associated spidev
7286 + dev node. The gpio pin number for the CS line and spidev device node
7287 + creation are configurable.
7288 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
7289 + A+, B+, Zero and PI2 B; as well as the Compute Module.
7290 +Load: dtoverlay=spi1-1cs,<param>=<val>
7291 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
7292 + cs0_spidev Set to 'disabled' to stop the creation of a
7293 + userspace device node /dev/spidev1.0 (default
7294 + is 'okay' or enabled).
7295 +
7296 +
7297 +Name: spi1-2cs
7298 +Info: Enables spi1 with two chip select (CS) lines and associated spidev
7299 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
7300 + creation are configurable.
7301 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
7302 + A+, B+, Zero and PI2 B; as well as the Compute Module.
7303 +Load: dtoverlay=spi1-2cs,<param>=<val>
7304 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
7305 + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
7306 + cs0_spidev Set to 'disabled' to stop the creation of a
7307 + userspace device node /dev/spidev1.0 (default
7308 + is 'okay' or enabled).
7309 + cs1_spidev Set to 'disabled' to stop the creation of a
7310 + userspace device node /dev/spidev1.1 (default
7311 + is 'okay' or enabled).
7312 +
7313 +
7314 +Name: spi1-3cs
7315 +Info: Enables spi1 with three chip select (CS) lines and associated spidev
7316 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
7317 + creation are configurable.
7318 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
7319 + A+, B+, Zero and PI2 B; as well as the Compute Module.
7320 +Load: dtoverlay=spi1-3cs,<param>=<val>
7321 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
7322 + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
7323 + cs2_pin GPIO pin for CS2 (default 16 - BCM SPI1_CE2).
7324 + cs0_spidev Set to 'disabled' to stop the creation of a
7325 + userspace device node /dev/spidev1.0 (default
7326 + is 'okay' or enabled).
7327 + cs1_spidev Set to 'disabled' to stop the creation of a
7328 + userspace device node /dev/spidev1.1 (default
7329 + is 'okay' or enabled).
7330 + cs2_spidev Set to 'disabled' to stop the creation of a
7331 + userspace device node /dev/spidev1.2 (default
7332 + is 'okay' or enabled).
7333 +
7334 +
7335 +Name: spi2-1cs
7336 +Info: Enables spi2 with a single chip select (CS) line and associated spidev
7337 + dev node. The gpio pin number for the CS line and spidev device node
7338 + creation are configurable.
7339 + N.B.: spi2 is only accessible with the Compute Module.
7340 +Load: dtoverlay=spi2-1cs,<param>=<val>
7341 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
7342 + cs0_spidev Set to 'disabled' to stop the creation of a
7343 + userspace device node /dev/spidev2.0 (default
7344 + is 'okay' or enabled).
7345 +
7346 +
7347 +Name: spi2-2cs
7348 +Info: Enables spi2 with two chip select (CS) lines and associated spidev
7349 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
7350 + creation are configurable.
7351 + N.B.: spi2 is only accessible with the Compute Module.
7352 +Load: dtoverlay=spi2-2cs,<param>=<val>
7353 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
7354 + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
7355 + cs0_spidev Set to 'disabled' to stop the creation of a
7356 + userspace device node /dev/spidev2.0 (default
7357 + is 'okay' or enabled).
7358 + cs1_spidev Set to 'disabled' to stop the creation of a
7359 + userspace device node /dev/spidev2.1 (default
7360 + is 'okay' or enabled).
7361 +
7362 +
7363 +Name: spi2-3cs
7364 +Info: Enables spi2 with three chip select (CS) lines and associated spidev
7365 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
7366 + creation are configurable.
7367 + N.B.: spi2 is only accessible with the Compute Module.
7368 +Load: dtoverlay=spi2-3cs,<param>=<val>
7369 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
7370 + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
7371 + cs2_pin GPIO pin for CS2 (default 45 - BCM SPI2_CE2).
7372 + cs0_spidev Set to 'disabled' to stop the creation of a
7373 + userspace device node /dev/spidev2.0 (default
7374 + is 'okay' or enabled).
7375 + cs1_spidev Set to 'disabled' to stop the creation of a
7376 + userspace device node /dev/spidev2.1 (default
7377 + is 'okay' or enabled).
7378 + cs2_spidev Set to 'disabled' to stop the creation of a
7379 + userspace device node /dev/spidev2.2 (default
7380 + is 'okay' or enabled).
7381 +
7382 +
7383 +Name: spi3-1cs
7384 +Info: Enables spi3 with a single chip select (CS) line and associated spidev
7385 + dev node. The gpio pin number for the CS line and spidev device node
7386 + creation are configurable. BCM2711 only.
7387 +Load: dtoverlay=spi3-1cs,<param>=<val>
7388 +Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
7389 + cs0_spidev Set to 'off' to prevent the creation of a
7390 + userspace device node /dev/spidev3.0 (default
7391 + is 'on' or enabled).
7392 +
7393 +
7394 +Name: spi3-2cs
7395 +Info: Enables spi3 with two chip select (CS) lines and associated spidev
7396 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
7397 + creation are configurable. BCM2711 only.
7398 +Load: dtoverlay=spi3-2cs,<param>=<val>
7399 +Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
7400 + cs1_pin GPIO pin for CS1 (default 24 - BCM SPI3_CE1).
7401 + cs0_spidev Set to 'off' to prevent the creation of a
7402 + userspace device node /dev/spidev3.0 (default
7403 + is 'on' or enabled).
7404 + cs1_spidev Set to 'off' to prevent the creation of a
7405 + userspace device node /dev/spidev3.1 (default
7406 + is 'on' or enabled).
7407 +
7408 +
7409 +Name: spi4-1cs
7410 +Info: Enables spi4 with a single chip select (CS) line and associated spidev
7411 + dev node. The gpio pin number for the CS line and spidev device node
7412 + creation are configurable. BCM2711 only.
7413 +Load: dtoverlay=spi4-1cs,<param>=<val>
7414 +Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
7415 + cs0_spidev Set to 'off' to prevent the creation of a
7416 + userspace device node /dev/spidev4.0 (default
7417 + is 'on' or enabled).
7418 +
7419 +
7420 +Name: spi4-2cs
7421 +Info: Enables spi4 with two chip select (CS) lines and associated spidev
7422 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
7423 + creation are configurable. BCM2711 only.
7424 +Load: dtoverlay=spi4-2cs,<param>=<val>
7425 +Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
7426 + cs1_pin GPIO pin for CS1 (default 25 - BCM SPI4_CE1).
7427 + cs0_spidev Set to 'off' to prevent the creation of a
7428 + userspace device node /dev/spidev4.0 (default
7429 + is 'on' or enabled).
7430 + cs1_spidev Set to 'off' to prevent the creation of a
7431 + userspace device node /dev/spidev4.1 (default
7432 + is 'on' or enabled).
7433 +
7434 +
7435 +Name: spi5-1cs
7436 +Info: Enables spi5 with a single chip select (CS) line and associated spidev
7437 + dev node. The gpio pin numbers for the CS lines and spidev device node
7438 + creation are configurable. BCM2711 only.
7439 +Load: dtoverlay=spi5-1cs,<param>=<val>
7440 +Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
7441 + cs0_spidev Set to 'off' to prevent the creation of a
7442 + userspace device node /dev/spidev5.0 (default
7443 + is 'on' or enabled).
7444 +
7445 +
7446 +Name: spi5-2cs
7447 +Info: Enables spi5 with two chip select (CS) lines and associated spidev
7448 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
7449 + creation are configurable. BCM2711 only.
7450 +Load: dtoverlay=spi5-2cs,<param>=<val>
7451 +Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
7452 + cs1_pin GPIO pin for CS1 (default 26 - BCM SPI5_CE1).
7453 + cs0_spidev Set to 'off' to prevent the creation of a
7454 + userspace device node /dev/spidev5.0 (default
7455 + is 'on' or enabled).
7456 + cs1_spidev Set to 'off' to prevent the creation of a
7457 + userspace device node /dev/spidev5.1 (default
7458 + is 'on' or enabled).
7459 +
7460 +
7461 +Name: spi6-1cs
7462 +Info: Enables spi6 with a single chip select (CS) line and associated spidev
7463 + dev node. The gpio pin number for the CS line and spidev device node
7464 + creation are configurable. BCM2711 only.
7465 +Load: dtoverlay=spi6-1cs,<param>=<val>
7466 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
7467 + cs0_spidev Set to 'off' to prevent the creation of a
7468 + userspace device node /dev/spidev6.0 (default
7469 + is 'on' or enabled).
7470 +
7471 +
7472 +Name: spi6-2cs
7473 +Info: Enables spi6 with two chip select (CS) lines and associated spidev
7474 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
7475 + creation are configurable. BCM2711 only.
7476 +Load: dtoverlay=spi6-2cs,<param>=<val>
7477 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
7478 + cs1_pin GPIO pin for CS1 (default 27 - BCM SPI6_CE1).
7479 + cs0_spidev Set to 'off' to prevent the creation of a
7480 + userspace device node /dev/spidev6.0 (default
7481 + is 'on' or enabled).
7482 + cs1_spidev Set to 'off' to prevent the creation of a
7483 + userspace device node /dev/spidev6.1 (default
7484 + is 'on' or enabled).
7485 +
7486 +
7487 +Name: ssd1306
7488 +Info: Overlay for activation of SSD1306 over I2C OLED display framebuffer.
7489 +Load: dtoverlay=ssd1306,<param>=<val>
7490 +Params: address Location in display memory of first character.
7491 + (default=0)
7492 + width Width of display. (default=128)
7493 + height Height of display. (default=64)
7494 + offset virtual channel a. (default=0)
7495 + normal Has no effect on displays tested. (default=not
7496 + set)
7497 + sequential Set this if every other scan line is missing.
7498 + (default=not set)
7499 + remapped Set this if display is garbled. (default=not
7500 + set)
7501 + inverted Set this if display is inverted and mirrored.
7502 + (default=not set)
7503 +
7504 + Examples:
7505 + Typical usage for 128x64 display: dtoverlay=ssd1306,inverted
7506 +
7507 + Typical usage for 128x32 display: dtoverlay=ssd1306,inverted,sequential
7508 +
7509 + i2c_baudrate=400000 will speed up the display.
7510 +
7511 + i2c_baudrate=1000000 seems to work even though it's not officially
7512 + supported by the hardware, and is faster still.
7513 +
7514 + For more information refer to the device datasheet at:
7515 + https://cdn-shop.adafruit.com/datasheets/SSD1306.pdf
7516 +
7517 +
7518 +Name: ssd1306-spi
7519 +Info: Overlay for SSD1306 OLED via SPI using fbtft staging driver.
7520 +Load: dtoverlay=ssd1306-spi,<param>=<val>
7521 +Params: speed SPI bus speed (default 10000000)
7522 + rotate Display rotation (0, 90, 180 or 270; default 0)
7523 + fps Delay between frame updates (default 25)
7524 + debug Debug output level (0-7; default 0)
7525 + dc_pin GPIO pin for D/C (default 24)
7526 + reset_pin GPIO pin for RESET (default 25)
7527 + height Display height (32 or 64; default 64)
7528 +
7529 +
7530 +Name: ssd1351-spi
7531 +Info: Overlay for SSD1351 OLED via SPI using fbtft staging driver.
7532 +Load: dtoverlay=ssd1351-spi,<param>=<val>
7533 +Params: speed SPI bus speed (default 4500000)
7534 + rotate Display rotation (0, 90, 180 or 270; default 0)
7535 + fps Delay between frame updates (default 25)
7536 + debug Debug output level (0-7; default 0)
7537 + dc_pin GPIO pin for D/C (default 24)
7538 + reset_pin GPIO pin for RESET (default 25)
7539 +
7540 +
7541 +Name: superaudioboard
7542 +Info: Configures the SuperAudioBoard sound card
7543 +Load: dtoverlay=superaudioboard,<param>=<val>
7544 +Params: gpiopin GPIO pin for codec reset
7545 +
7546 +
7547 +Name: sx150x
7548 +Info: Configures the Semtech SX150X I2C GPIO expanders.
7549 +Load: dtoverlay=sx150x,<param>=<val>
7550 +Params: sx150<x>-<n>-<m> Enables SX150X device on I2C#<n> with slave
7551 + address <m>. <x> may be 1-9. <n> may be 0 or 1.
7552 + Permissible values of <m> (which is denoted in
7553 + hex) depend on the device variant. For SX1501,
7554 + SX1502, SX1504 and SX1505, <m> may be 20 or 21.
7555 + For SX1503 and SX1506, <m> may be 20. For
7556 + SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
7557 + For SX1508, <m> may be 20, 21, 22 or 23.
7558 +
7559 + sx150<x>-<n>-<m>-int-gpio
7560 + Integer, enables interrupts on SX150X device on
7561 + I2C#<n> with slave address <m>, specifies
7562 + the GPIO pin to which NINT output of SX150X is
7563 + connected.
7564 +
7565 +
7566 +Name: tc358743
7567 +Info: Toshiba TC358743 HDMI to CSI-2 bridge chip.
7568 + Uses Unicam 1, which is the standard camera connector on most Pi
7569 + variants.
7570 +Load: dtoverlay=tc358743,<param>=<val>
7571 +Params: 4lane Use 4 lanes (only applicable to Compute Modules
7572 + CAM1 connector).
7573 +
7574 + link-frequency Set the link frequency. Only values of 297000000
7575 + (574Mbit/s) and 486000000 (972Mbit/s - default)
7576 + are supported by the driver.
7577 +
7578 +
7579 +Name: tc358743-audio
7580 +Info: Used in combination with the tc358743-fast overlay to route the audio
7581 + from the TC358743 over I2S to the Pi.
7582 + Wiring is LRCK/WFS to GPIO 19, BCK/SCK to GPIO 18, and DATA/SD to GPIO
7583 + 20.
7584 +Load: dtoverlay=tc358743-audio,<param>=<val>
7585 +Params: card-name Override the default, "tc358743", card name.
7586 +
7587 +
7588 +Name: tinylcd35
7589 +Info: 3.5" Color TFT Display by www.tinylcd.com
7590 + Options: Touch, RTC, keypad
7591 +Load: dtoverlay=tinylcd35,<param>=<val>
7592 +Params: speed Display SPI bus speed
7593 +
7594 + rotate Display rotation {0,90,180,270}
7595 +
7596 + fps Delay between frame updates
7597 +
7598 + debug Debug output level {0-7}
7599 +
7600 + touch Enable touch panel
7601 +
7602 + touchgpio Touch controller IRQ GPIO
7603 +
7604 + xohms Touchpanel: Resistance of X-plate in ohms
7605 +
7606 + rtc-pcf PCF8563 Real Time Clock
7607 +
7608 + rtc-ds DS1307 Real Time Clock
7609 +
7610 + keypad Enable keypad
7611 +
7612 + Examples:
7613 + Display with touchpanel, PCF8563 RTC and keypad:
7614 + dtoverlay=tinylcd35,touch,rtc-pcf,keypad
7615 + Old touch display:
7616 + dtoverlay=tinylcd35,touch,touchgpio=3
7617 +
7618 +
7619 +Name: tpm-slb9670
7620 +Info: Enables support for Infineon SLB9670 Trusted Platform Module add-on
7621 + boards, which can be used as a secure key storage and hwrng,
7622 + available as "Iridium SLB9670" by Infineon and "LetsTrust TPM" by pi3g.
7623 +Load: dtoverlay=tpm-slb9670
7624 +Params: <None>
7625 +
7626 +
7627 +Name: uart0
7628 +Info: Change the pin usage of uart0
7629 +Load: dtoverlay=uart0,<param>=<val>
7630 +Params: txd0_pin GPIO pin for TXD0 (14, 32 or 36 - default 14)
7631 +
7632 + rxd0_pin GPIO pin for RXD0 (15, 33 or 37 - default 15)
7633 +
7634 + pin_func Alternative pin function - 4(Alt0) for 14&15,
7635 + 7(Alt3) for 32&33, 6(Alt2) for 36&37
7636 +
7637 +
7638 +Name: uart1
7639 +Info: Change the pin usage of uart1
7640 +Load: dtoverlay=uart1,<param>=<val>
7641 +Params: txd1_pin GPIO pin for TXD1 (14, 32 or 40 - default 14)
7642 +
7643 + rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
7644 +
7645 +
7646 +Name: uart2
7647 +Info: Enable uart 2 on GPIOs 0-3. BCM2711 only.
7648 +Load: dtoverlay=uart2,<param>
7649 +Params: ctsrts Enable CTS/RTS on GPIOs 2-3 (default off)
7650 +
7651 +
7652 +Name: uart3
7653 +Info: Enable uart 3 on GPIOs 4-7. BCM2711 only.
7654 +Load: dtoverlay=uart3,<param>
7655 +Params: ctsrts Enable CTS/RTS on GPIOs 6-7 (default off)
7656 +
7657 +
7658 +Name: uart4
7659 +Info: Enable uart 4 on GPIOs 8-11. BCM2711 only.
7660 +Load: dtoverlay=uart4,<param>
7661 +Params: ctsrts Enable CTS/RTS on GPIOs 10-11 (default off)
7662 +
7663 +
7664 +Name: uart5
7665 +Info: Enable uart 5 on GPIOs 12-15. BCM2711 only.
7666 +Load: dtoverlay=uart5,<param>
7667 +Params: ctsrts Enable CTS/RTS on GPIOs 14-15 (default off)
7668 +
7669 +
7670 +Name: udrc
7671 +Info: Configures the NW Digital Radio UDRC Hat
7672 +Load: dtoverlay=udrc,<param>=<val>
7673 +Params: alsaname Name of the ALSA audio device (default "udrc")
7674 +
7675 +
7676 +Name: upstream
7677 +Info: Allow usage of downstream .dtb with upstream kernel. Comprises the
7678 + vc4-kms-v3d and dwc2 overlays.
7679 +Load: dtoverlay=upstream
7680 +Params: <None>
7681 +
7682 +
7683 +Name: upstream-aux-interrupt
7684 +Info: This overlay has been deprecated and removed because it is no longer
7685 + necessary.
7686 +Load: <Deprecated>
7687 +
7688 +
7689 +Name: upstream-pi4
7690 +Info: Allow usage of downstream .dtb with upstream kernel on Pi 4. Comprises
7691 + the vc4-kms-v3d-pi4 and dwc2 overlays.
7692 +Load: dtoverlay=upstream-pi4
7693 +Params: <None>
7694 +
7695 +
7696 +Name: vc4-fkms-v3d
7697 +Info: Enable Eric Anholt's DRM VC4 V3D driver on top of the dispmanx
7698 + display stack.
7699 +Load: dtoverlay=vc4-fkms-v3d,<param>
7700 +Params: cma-512 CMA is 512MB (needs 1GB)
7701 + cma-448 CMA is 448MB (needs 1GB)
7702 + cma-384 CMA is 384MB (needs 1GB)
7703 + cma-320 CMA is 320MB (needs 1GB)
7704 + cma-256 CMA is 256MB (needs 1GB)
7705 + cma-192 CMA is 192MB (needs 1GB)
7706 + cma-128 CMA is 128MB
7707 + cma-96 CMA is 96MB
7708 + cma-64 CMA is 64MB
7709 + cma-size CMA size in bytes, 4MB aligned
7710 + cma-default Use upstream's default value
7711 +
7712 +
7713 +Name: vc4-kms-kippah-7inch
7714 +Info: Enable the Adafruit DPI Kippah with the 7" Ontat panel attached.
7715 + Requires vc4-kms-v3d to be loaded.
7716 +Load: dtoverlay=vc4-kms-kippah-7inch
7717 +Params: <None>
7718 +
7719 +
7720 +Name: vc4-kms-v3d
7721 +Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver.
7722 +Load: dtoverlay=vc4-kms-v3d,<param>
7723 +Params: cma-512 CMA is 512MB (needs 1GB)
7724 + cma-448 CMA is 448MB (needs 1GB)
7725 + cma-384 CMA is 384MB (needs 1GB)
7726 + cma-320 CMA is 320MB (needs 1GB)
7727 + cma-256 CMA is 256MB (needs 1GB)
7728 + cma-192 CMA is 192MB (needs 1GB)
7729 + cma-128 CMA is 128MB
7730 + cma-96 CMA is 96MB
7731 + cma-64 CMA is 64MB
7732 + cma-size CMA size in bytes, 4MB aligned
7733 + cma-default Use upstream's default value
7734 + audio Enable or disable audio over HDMI (default "on")
7735 + noaudio Disable all HDMI audio (default "off")
7736 +
7737 +
7738 +Name: vc4-kms-v3d-pi4
7739 +Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver for Pi4.
7740 +Load: dtoverlay=vc4-kms-v3d-pi4,<param>
7741 +Params: cma-512 CMA is 512MB
7742 + cma-448 CMA is 448MB
7743 + cma-384 CMA is 384MB
7744 + cma-320 CMA is 320MB
7745 + cma-256 CMA is 256MB
7746 + cma-192 CMA is 192MB
7747 + cma-128 CMA is 128MB
7748 + cma-96 CMA is 96MB
7749 + cma-64 CMA is 64MB
7750 + cma-size CMA size in bytes, 4MB aligned
7751 + cma-default Use upstream's default value
7752 + audio Enable or disable audio over HDMI0 (default
7753 + "on")
7754 + audio1 Enable or disable audio over HDMI1 (default
7755 + "on")
7756 + noaudio Disable all HDMI audio (default "off")
7757 + composite Enable the composite output (disables all other
7758 + outputs)
7759 +
7760 +
7761 +Name: vga666
7762 +Info: Overlay for the Fen Logic VGA666 board
7763 + This uses GPIOs 2-21 (so no I2C), and activates the output 2-3 seconds
7764 + after the kernel has started.
7765 +Load: dtoverlay=vga666
7766 +Params: <None>
7767 +
7768 +
7769 +Name: w1-gpio
7770 +Info: Configures the w1-gpio Onewire interface module.
7771 + Use this overlay if you *don't* need a GPIO to drive an external pullup.
7772 +Load: dtoverlay=w1-gpio,<param>=<val>
7773 +Params: gpiopin GPIO for I/O (default "4")
7774 + pullup Now enabled by default (ignored)
7775 +
7776 +
7777 +Name: w1-gpio-pullup
7778 +Info: Configures the w1-gpio Onewire interface module.
7779 + Use this overlay if you *do* need a GPIO to drive an external pullup.
7780 +Load: dtoverlay=w1-gpio-pullup,<param>=<val>
7781 +Params: gpiopin GPIO for I/O (default "4")
7782 + extpullup GPIO for external pullup (default "5")
7783 + pullup Now enabled by default (ignored)
7784 +
7785 +
7786 +Name: w5500
7787 +Info: Overlay for the Wiznet W5500 Ethernet Controller on SPI0
7788 +Load: dtoverlay=w5500,<param>=<val>
7789 +Params: int_pin GPIO used for INT (default 25)
7790 +
7791 + speed SPI bus speed (default 30000000)
7792 +
7793 + cs SPI bus Chip Select (default 0)
7794 +
7795 +
7796 +Name: wittypi
7797 +Info: Configures the wittypi RTC module.
7798 +Load: dtoverlay=wittypi,<param>=<val>
7799 +Params: led_gpio GPIO for LED (default "17")
7800 + led_trigger Choose which activity the LED tracks (default
7801 + "default-on")
7802 +
7803 +
7804 +Troubleshooting
7805 +===============
7806 +
7807 +If you are experiencing problems that you think are DT-related, enable DT
7808 +diagnostic output by adding this to /boot/config.txt:
7809 +
7810 + dtdebug=on
7811 +
7812 +and rebooting. Then run:
7813 +
7814 + sudo vcdbg log msg
7815 +
7816 +and look for relevant messages.
7817 +
7818 +Further reading
7819 +===============
7820 +
7821 +This is only meant to be a quick introduction to the subject of Device Tree on
7822 +Raspberry Pi. There is a more complete explanation here:
7823 +
7824 +http://www.raspberrypi.org/documentation/configuration/device-tree.md
7825 diff --git a/arch/arm/boot/dts/overlays/act-led-overlay.dts b/arch/arm/boot/dts/overlays/act-led-overlay.dts
7826 new file mode 100644
7827 index 000000000000..2f4bbb407f89
7828 --- /dev/null
7829 +++ b/arch/arm/boot/dts/overlays/act-led-overlay.dts
7830 @@ -0,0 +1,27 @@
7831 +/dts-v1/;
7832 +/plugin/;
7833 +
7834 +/* Pi3 uses a GPIO expander to drive the LEDs which can only be accessed
7835 + from the VPU. There is a special driver for this with a separate DT node,
7836 + which has the unfortunate consequence of breaking the act_led_gpio and
7837 + act_led_activelow dtparams.
7838 +
7839 + This overlay changes the GPIO controller back to the standard one and
7840 + restores the dtparams.
7841 +*/
7842 +
7843 +/{
7844 + compatible = "brcm,bcm2835";
7845 +
7846 + fragment@0 {
7847 + target = <&act_led>;
7848 + frag0: __overlay__ {
7849 + gpios = <&gpio 0 0>;
7850 + };
7851 + };
7852 +
7853 + __overrides__ {
7854 + gpio = <&frag0>,"gpios:4";
7855 + activelow = <&frag0>,"gpios:8";
7856 + };
7857 +};
7858 diff --git a/arch/arm/boot/dts/overlays/adafruit18-overlay.dts b/arch/arm/boot/dts/overlays/adafruit18-overlay.dts
7859 new file mode 100644
7860 index 000000000000..e1ce94a8cd3e
7861 --- /dev/null
7862 +++ b/arch/arm/boot/dts/overlays/adafruit18-overlay.dts
7863 @@ -0,0 +1,55 @@
7864 +/*
7865 + * Device Tree overlay for Adafruit 1.8" TFT LCD with ST7735R chip 160x128
7866 + */
7867 +
7868 +/dts-v1/;
7869 +/plugin/;
7870 +
7871 +/ {
7872 + compatible = "brcm,bcm2835";
7873 +
7874 + fragment@0 {
7875 + target = <&spidev0>;
7876 + __overlay__ {
7877 + status = "disabled";
7878 + };
7879 + };
7880 +
7881 + fragment@1 {
7882 + target = <&spi0>;
7883 + __overlay__ {
7884 + /* needed to avoid dtc warning */
7885 + #address-cells = <1>;
7886 + #size-cells = <0>;
7887 + status = "okay";
7888 +
7889 + af18: adafruit18@0 {
7890 + compatible = "fbtft,adafruit18";
7891 + reg = <0>;
7892 + pinctrl-names = "default";
7893 + spi-max-frequency = <40000000>;
7894 + rotate = <90>;
7895 + buswidth = <8>;
7896 + fps = <50>;
7897 + height = <160>;
7898 + width = <128>;
7899 + reset-gpios = <&gpio 25 1>;
7900 + dc-gpios = <&gpio 24 0>;
7901 + led-gpios = <&gpio 18 0>;
7902 + debug = <0>;
7903 + };
7904 + };
7905 + };
7906 +
7907 + __overrides__ {
7908 + green = <&af18>, "compatible=fbtft,adafruit18_green";
7909 + speed = <&af18>,"spi-max-frequency:0";
7910 + rotate = <&af18>,"rotate:0";
7911 + fps = <&af18>,"fps:0";
7912 + bgr = <&af18>,"bgr?";
7913 + debug = <&af18>,"debug:0";
7914 + dc_pin = <&af18>,"dc-gpios:4";
7915 + reset_pin = <&af18>,"reset-gpios:4";
7916 + led_pin = <&af18>,"led-gpios:4";
7917 + };
7918 +};
7919 diff --git a/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
7920 new file mode 100644
7921 index 000000000000..298488e19156
7922 --- /dev/null
7923 +++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
7924 @@ -0,0 +1,40 @@
7925 +// Definitions for ADAU1977 ADC
7926 +/dts-v1/;
7927 +/plugin/;
7928 +
7929 +/ {
7930 + compatible = "brcm,bcm2835";
7931 +
7932 + fragment@0 {
7933 + target = <&i2c>;
7934 +
7935 + __overlay__ {
7936 + #address-cells = <1>;
7937 + #size-cells = <0>;
7938 + status = "okay";
7939 +
7940 + adau1977: codec@11 {
7941 + compatible = "adi,adau1977";
7942 + reg = <0x11>;
7943 + reset-gpios = <&gpio 5 0>;
7944 + AVDD-supply = <&vdd_3v3_reg>;
7945 + };
7946 + };
7947 + };
7948 +
7949 + fragment@1 {
7950 + target = <&i2s>;
7951 + __overlay__ {
7952 + status = "okay";
7953 + };
7954 + };
7955 +
7956 + fragment@2 {
7957 + target = <&sound>;
7958 + __overlay__ {
7959 + compatible = "adi,adau1977-adc";
7960 + i2s-controller = <&i2s>;
7961 + status = "okay";
7962 + };
7963 + };
7964 +};
7965 diff --git a/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
7966 new file mode 100644
7967 index 000000000000..5fed769d2526
7968 --- /dev/null
7969 +++ b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
7970 @@ -0,0 +1,52 @@
7971 +/dts-v1/;
7972 +/plugin/;
7973 +
7974 +/ {
7975 + compatible = "brcm,bcm2835";
7976 +
7977 + fragment@0 {
7978 + target = <&i2s>;
7979 + __overlay__ {
7980 + status = "okay";
7981 + };
7982 + };
7983 +
7984 + fragment@1 {
7985 + target-path = "/";
7986 + __overlay__ {
7987 + adau7002_codec: adau7002-codec {
7988 + #sound-dai-cells = <0>;
7989 + compatible = "adi,adau7002";
7990 +/* IOVDD-supply = <&supply>;*/
7991 + status = "okay";
7992 + };
7993 + };
7994 + };
7995 +
7996 + fragment@2 {
7997 + target = <&sound>;
7998 + sound_overlay: __overlay__ {
7999 + compatible = "simple-audio-card";
8000 + simple-audio-card,format = "i2s";
8001 + simple-audio-card,name = "adau7002";
8002 + simple-audio-card,bitclock-slave = <&dailink0_slave>;
8003 + simple-audio-card,frame-slave = <&dailink0_slave>;
8004 + simple-audio-card,widgets =
8005 + "Microphone", "Microphone Jack";
8006 + simple-audio-card,routing =
8007 + "PDM_DAT", "Microphone Jack";
8008 + status = "okay";
8009 + simple-audio-card,cpu {
8010 + sound-dai = <&i2s>;
8011 + };
8012 + dailink0_slave: simple-audio-card,codec {
8013 + sound-dai = <&adau7002_codec>;
8014 + };
8015 + };
8016 + };
8017 +
8018 +
8019 + __overrides__ {
8020 + card-name = <&sound_overlay>,"simple-audio-card,name";
8021 + };
8022 +};
8023 diff --git a/arch/arm/boot/dts/overlays/ads1015-overlay.dts b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
8024 new file mode 100644
8025 index 000000000000..deeee1228395
8026 --- /dev/null
8027 +++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
8028 @@ -0,0 +1,98 @@
8029 +/*
8030 + * 2016 - Erik Sejr
8031 + */
8032 +/dts-v1/;
8033 +/plugin/;
8034 +
8035 +/ {
8036 + compatible = "brcm,bcm2835";
8037 + /* ----------- ADS1015 ------------ */
8038 + fragment@0 {
8039 + target = <&i2c_arm>;
8040 + __overlay__ {
8041 + #address-cells = <1>;
8042 + #size-cells = <0>;
8043 + status = "okay";
8044 + ads1015: ads1015 {
8045 + compatible = "ti,ads1015";
8046 + status = "okay";
8047 + #address-cells = <1>;
8048 + #size-cells = <0>;
8049 + reg = <0x48>;
8050 + };
8051 + };
8052 + };
8053 +
8054 + fragment@1 {
8055 + target = <&ads1015>;
8056 + __overlay__ {
8057 + #address-cells = <1>;
8058 + #size-cells = <0>;
8059 + channel_a: channel_a {
8060 + reg = <4>;
8061 + ti,gain = <2>;
8062 + ti,datarate = <4>;
8063 + };
8064 + };
8065 + };
8066 +
8067 + fragment@2 {
8068 + target = <&ads1015>;
8069 + __dormant__ {
8070 + #address-cells = <1>;
8071 + #size-cells = <0>;
8072 + channel_b: channel_b {
8073 + reg = <5>;
8074 + ti,gain = <2>;
8075 + ti,datarate = <4>;
8076 + };
8077 + };
8078 + };
8079 +
8080 + fragment@3 {
8081 + target = <&ads1015>;
8082 + __dormant__ {
8083 + #address-cells = <1>;
8084 + #size-cells = <0>;
8085 + channel_c: channel_c {
8086 + reg = <6>;
8087 + ti,gain = <2>;
8088 + ti,datarate = <4>;
8089 + };
8090 + };
8091 + };
8092 +
8093 + fragment@4 {
8094 + target = <&ads1015>;
8095 + __dormant__ {
8096 + #address-cells = <1>;
8097 + #size-cells = <0>;
8098 + channel_d: channel_d {
8099 + reg = <7>;
8100 + ti,gain = <2>;
8101 + ti,datarate = <4>;
8102 + };
8103 + };
8104 + };
8105 +
8106 + __overrides__ {
8107 + addr = <&ads1015>,"reg:0";
8108 + cha_enable = <0>,"=1";
8109 + cha_cfg = <&channel_a>,"reg:0";
8110 + cha_gain = <&channel_a>,"ti,gain:0";
8111 + cha_datarate = <&channel_a>,"ti,datarate:0";
8112 + chb_enable = <0>,"=2";
8113 + chb_cfg = <&channel_b>,"reg:0";
8114 + chb_gain = <&channel_b>,"ti,gain:0";
8115 + chb_datarate = <&channel_b>,"ti,datarate:0";
8116 + chc_enable = <0>,"=3";
8117 + chc_cfg = <&channel_c>,"reg:0";
8118 + chc_gain = <&channel_c>,"ti,gain:0";
8119 + chc_datarate = <&channel_c>,"ti,datarate:0";
8120 + chd_enable = <0>,"=4";
8121 + chd_cfg = <&channel_d>,"reg:0";
8122 + chd_gain = <&channel_d>,"ti,gain:0";
8123 + chd_datarate = <&channel_d>,"ti,datarate:0";
8124 + };
8125 +
8126 +};
8127 diff --git a/arch/arm/boot/dts/overlays/ads1115-overlay.dts b/arch/arm/boot/dts/overlays/ads1115-overlay.dts
8128 new file mode 100644
8129 index 000000000000..4fc571c2db33
8130 --- /dev/null
8131 +++ b/arch/arm/boot/dts/overlays/ads1115-overlay.dts
8132 @@ -0,0 +1,103 @@
8133 +/*
8134 + * TI ADS1115 multi-channel ADC overlay
8135 + */
8136 +
8137 +/dts-v1/;
8138 +/plugin/;
8139 +
8140 +/ {
8141 + compatible = "brcm,bcm2835";
8142 +
8143 + fragment@0 {
8144 + target = <&i2c_arm>;
8145 + __overlay__ {
8146 + #address-cells = <1>;
8147 + #size-cells = <0>;
8148 + status = "okay";
8149 +
8150 + ads1115: ads1115 {
8151 + compatible = "ti,ads1115";
8152 + status = "okay";
8153 + #address-cells = <1>;
8154 + #size-cells = <0>;
8155 + reg = <0x48>;
8156 + };
8157 + };
8158 + };
8159 +
8160 + fragment@1 {
8161 + target = <&ads1115>;
8162 + __dormant__ {
8163 + #address-cells = <1>;
8164 + #size-cells = <0>;
8165 +
8166 + channel_a: channel_a {
8167 + reg = <4>;
8168 + ti,gain = <1>;
8169 + ti,datarate = <7>;
8170 + };
8171 + };
8172 + };
8173 +
8174 + fragment@2 {
8175 + target = <&ads1115>;
8176 + __dormant__ {
8177 + #address-cells = <1>;
8178 + #size-cells = <0>;
8179 +
8180 + channel_b: channel_b {
8181 + reg = <5>;
8182 + ti,gain = <1>;
8183 + ti,datarate = <7>;
8184 + };
8185 + };
8186 + };
8187 +
8188 + fragment@3 {
8189 + target = <&ads1115>;
8190 + __dormant__ {
8191 + #address-cells = <1>;
8192 + #size-cells = <0>;
8193 +
8194 + channel_c: channel_c {
8195 + reg = <6>;
8196 + ti,gain = <1>;
8197 + ti,datarate = <7>;
8198 + };
8199 + };
8200 + };
8201 +
8202 + fragment@4 {
8203 + target = <&ads1115>;
8204 + __dormant__ {
8205 + #address-cells = <1>;
8206 + #size-cells = <0>;
8207 +
8208 + channel_d: channel_d {
8209 + reg = <7>;
8210 + ti,gain = <1>;
8211 + ti,datarate = <7>;
8212 + };
8213 + };
8214 + };
8215 +
8216 + __overrides__ {
8217 + addr = <&ads1115>,"reg:0";
8218 + cha_enable = <0>,"=1";
8219 + cha_cfg = <&channel_a>,"reg:0";
8220 + cha_gain = <&channel_a>,"ti,gain:0";
8221 + cha_datarate = <&channel_a>,"ti,datarate:0";
8222 + chb_enable = <0>,"=2";
8223 + chb_cfg = <&channel_b>,"reg:0";
8224 + chb_gain = <&channel_b>,"ti,gain:0";
8225 + chb_datarate = <&channel_b>,"ti,datarate:0";
8226 + chc_enable = <0>,"=3";
8227 + chc_cfg = <&channel_c>,"reg:0";
8228 + chc_gain = <&channel_c>,"ti,gain:0";
8229 + chc_datarate = <&channel_c>,"ti,datarate:0";
8230 + chd_enable = <0>,"=4";
8231 + chd_cfg = <&channel_d>,"reg:0";
8232 + chd_gain = <&channel_d>,"ti,gain:0";
8233 + chd_datarate = <&channel_d>,"ti,datarate:0";
8234 + };
8235 +};
8236 diff --git a/arch/arm/boot/dts/overlays/ads7846-overlay.dts b/arch/arm/boot/dts/overlays/ads7846-overlay.dts
8237 new file mode 100644
8238 index 000000000000..1c5c9b6bb6ff
8239 --- /dev/null
8240 +++ b/arch/arm/boot/dts/overlays/ads7846-overlay.dts
8241 @@ -0,0 +1,89 @@
8242 +/*
8243 + * Generic Device Tree overlay for the ADS7846 touch controller
8244 + *
8245 + */
8246 +
8247 +/dts-v1/;
8248 +/plugin/;
8249 +
8250 +/ {
8251 + compatible = "brcm,bcm2835";
8252 +
8253 + fragment@0 {
8254 + target = <&spi0>;
8255 + __overlay__ {
8256 + status = "okay";
8257 + };
8258 + };
8259 +
8260 + fragment@1 {
8261 + target = <&spidev0>;
8262 + __overlay__ {
8263 + status = "disabled";
8264 + };
8265 + };
8266 +
8267 + fragment@2 {
8268 + target = <&spidev1>;
8269 + __overlay__ {
8270 + status = "disabled";
8271 + };
8272 + };
8273 +
8274 + fragment@3 {
8275 + target = <&gpio>;
8276 + __overlay__ {
8277 + ads7846_pins: ads7846_pins {
8278 + brcm,pins = <255>; /* illegal default value */
8279 + brcm,function = <0>; /* in */
8280 + brcm,pull = <0>; /* none */
8281 + };
8282 + };
8283 + };
8284 +
8285 + fragment@4 {
8286 + target = <&spi0>;
8287 + __overlay__ {
8288 + /* needed to avoid dtc warning */
8289 + #address-cells = <1>;
8290 + #size-cells = <0>;
8291 +
8292 + ads7846: ads7846@1 {
8293 + compatible = "ti,ads7846";
8294 + reg = <1>;
8295 + pinctrl-names = "default";
8296 + pinctrl-0 = <&ads7846_pins>;
8297 +
8298 + spi-max-frequency = <2000000>;
8299 + interrupts = <255 2>; /* high-to-low edge triggered */
8300 + interrupt-parent = <&gpio>;
8301 + pendown-gpio = <&gpio 255 0>;
8302 +
8303 + /* driver defaults */
8304 + ti,x-min = /bits/ 16 <0>;
8305 + ti,y-min = /bits/ 16 <0>;
8306 + ti,x-max = /bits/ 16 <0x0FFF>;
8307 + ti,y-max = /bits/ 16 <0x0FFF>;
8308 + ti,pressure-min = /bits/ 16 <0>;
8309 + ti,pressure-max = /bits/ 16 <0xFFFF>;
8310 + ti,x-plate-ohms = /bits/ 16 <400>;
8311 + };
8312 + };
8313 + };
8314 + __overrides__ {
8315 + cs = <&ads7846>,"reg:0";
8316 + speed = <&ads7846>,"spi-max-frequency:0";
8317 + penirq = <&ads7846_pins>,"brcm,pins:0", /* REQUIRED */
8318 + <&ads7846>,"interrupts:0",
8319 + <&ads7846>,"pendown-gpio:4";
8320 + penirq_pull = <&ads7846_pins>,"brcm,pull:0";
8321 + swapxy = <&ads7846>,"ti,swap-xy?";
8322 + xmin = <&ads7846>,"ti,x-min;0";
8323 + ymin = <&ads7846>,"ti,y-min;0";
8324 + xmax = <&ads7846>,"ti,x-max;0";
8325 + ymax = <&ads7846>,"ti,y-max;0";
8326 + pmin = <&ads7846>,"ti,pressure-min;0";
8327 + pmax = <&ads7846>,"ti,pressure-max;0";
8328 + xohms = <&ads7846>,"ti,x-plate-ohms;0";
8329 + };
8330 +};
8331 diff --git a/arch/arm/boot/dts/overlays/adv7282m-overlay.dts b/arch/arm/boot/dts/overlays/adv7282m-overlay.dts
8332 new file mode 100644
8333 index 000000000000..5d85dfd0595c
8334 --- /dev/null
8335 +++ b/arch/arm/boot/dts/overlays/adv7282m-overlay.dts
8336 @@ -0,0 +1,65 @@
8337 +// SPDX-License-Identifier: GPL-2.0-only
8338 +// Definitions for Analog Devices ADV7282-M video to CSI2 bridge on VC I2C bus
8339 +/dts-v1/;
8340 +/plugin/;
8341 +
8342 +/{
8343 + compatible = "brcm,bcm2835";
8344 +
8345 + fragment@0 {
8346 + target = <&i2c_csi_dsi>;
8347 + __overlay__ {
8348 + #address-cells = <1>;
8349 + #size-cells = <0>;
8350 + status = "okay";
8351 +
8352 + adv728x: adv728x@21 {
8353 + compatible = "adi,adv7282-m";
8354 + reg = <0x21>;
8355 + status = "okay";
8356 + clock-frequency = <24000000>;
8357 + port {
8358 + adv728x_0: endpoint {
8359 + remote-endpoint = <&csi1_ep>;
8360 + clock-lanes = <0>;
8361 + data-lanes = <1>;
8362 + link-frequencies =
8363 + /bits/ 64 <297000000>;
8364 +
8365 + mclk-frequency = <12000000>;
8366 + };
8367 + };
8368 + };
8369 + };
8370 + };
8371 + fragment@1 {
8372 + target = <&csi1>;
8373 + __overlay__ {
8374 + status = "okay";
8375 +
8376 + port {
8377 + csi1_ep: endpoint {
8378 + remote-endpoint = <&adv728x_0>;
8379 + data-lanes = <1>;
8380 + };
8381 + };
8382 + };
8383 + };
8384 + fragment@2 {
8385 + target = <&i2c0if>;
8386 + __overlay__ {
8387 + status = "okay";
8388 + };
8389 + };
8390 +
8391 + fragment@3 {
8392 + target = <&i2c0mux>;
8393 + __overlay__ {
8394 + status = "okay";
8395 + };
8396 + };
8397 +
8398 + __overrides__ {
8399 + addr = <&adv728x>,"reg:0";
8400 + };
8401 +};
8402 diff --git a/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts b/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts
8403 new file mode 100644
8404 index 000000000000..ea392e886984
8405 --- /dev/null
8406 +++ b/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts
8407 @@ -0,0 +1,37 @@
8408 +// SPDX-License-Identifier: GPL-2.0-only
8409 +// Definitions for Analog Devices ADV728[0|1|2]-M video to CSI2 bridges on VC
8410 +// I2C bus
8411 +
8412 +#include "adv7282m-overlay.dts"
8413 +
8414 +/{
8415 + compatible = "brcm,bcm2835";
8416 +
8417 + // Fragment numbers deliberately high to avoid conflicts with the
8418 + // included adv7282m overlay file.
8419 +
8420 + fragment@101 {
8421 + target = <&adv728x>;
8422 + __dormant__ {
8423 + compatible = "adi,adv7280-m";
8424 + };
8425 + };
8426 + fragment@102 {
8427 + target = <&adv728x>;
8428 + __dormant__ {
8429 + compatible = "adi,adv7281-m";
8430 + };
8431 + };
8432 + fragment@103 {
8433 + target = <&adv728x>;
8434 + __dormant__ {
8435 + compatible = "adi,adv7281-ma";
8436 + };
8437 + };
8438 +
8439 + __overrides__ {
8440 + adv7280m = <0>, "+101";
8441 + adv7281m = <0>, "+102";
8442 + adv7281ma = <0>, "+103";
8443 + };
8444 +};
8445 diff --git a/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
8446 new file mode 100644
8447 index 000000000000..82f9b3734fb1
8448 --- /dev/null
8449 +++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
8450 @@ -0,0 +1,49 @@
8451 +// Definitions for Digital Dreamtime Akkordion using IQaudIO DAC+ or DACZero
8452 +/dts-v1/;
8453 +/plugin/;
8454 +
8455 +/ {
8456 + compatible = "brcm,bcm2835";
8457 +
8458 + fragment@0 {
8459 + target = <&i2s>;
8460 + __overlay__ {
8461 + status = "okay";
8462 + };
8463 + };
8464 +
8465 + fragment@1 {
8466 + target = <&i2c1>;
8467 + __overlay__ {
8468 + #address-cells = <1>;
8469 + #size-cells = <0>;
8470 + status = "okay";
8471 +
8472 + pcm5122@4c {
8473 + #sound-dai-cells = <0>;
8474 + compatible = "ti,pcm5122";
8475 + reg = <0x4c>;
8476 + AVDD-supply = <&vdd_3v3_reg>;
8477 + DVDD-supply = <&vdd_3v3_reg>;
8478 + CPVDD-supply = <&vdd_3v3_reg>;
8479 + status = "okay";
8480 + };
8481 + };
8482 + };
8483 +
8484 + fragment@2 {
8485 + target = <&sound>;
8486 + frag2: __overlay__ {
8487 + compatible = "iqaudio,iqaudio-dac";
8488 + card_name = "Akkordion";
8489 + dai_name = "IQaudIO DAC";
8490 + dai_stream_name = "IQaudIO DAC HiFi";
8491 + i2s-controller = <&i2s>;
8492 + status = "okay";
8493 + };
8494 + };
8495 +
8496 + __overrides__ {
8497 + 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
8498 + };
8499 +};
8500 diff --git a/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
8501 new file mode 100644
8502 index 000000000000..873cb2fab52b
8503 --- /dev/null
8504 +++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
8505 @@ -0,0 +1,59 @@
8506 +/*
8507 + * Definitions for Allo Boss DAC board
8508 + */
8509 +
8510 +/dts-v1/;
8511 +/plugin/;
8512 +
8513 +/ {
8514 + compatible = "brcm,bcm2835";
8515 +
8516 + fragment@0 {
8517 + target-path = "/";
8518 + __overlay__ {
8519 + boss_osc: boss_osc {
8520 + compatible = "allo,dac-clk";
8521 + #clock-cells = <0>;
8522 + };
8523 + };
8524 + };
8525 +
8526 + fragment@1 {
8527 + target = <&i2s>;
8528 + __overlay__ {
8529 + status = "okay";
8530 + };
8531 + };
8532 +
8533 + fragment@2 {
8534 + target = <&i2c1>;
8535 + __overlay__ {
8536 + #address-cells = <1>;
8537 + #size-cells = <0>;
8538 + status = "okay";
8539 +
8540 + pcm5122@4d {
8541 + #sound-dai-cells = <0>;
8542 + compatible = "ti,pcm5122";
8543 + clocks = <&boss_osc>;
8544 + reg = <0x4d>;
8545 + status = "okay";
8546 + };
8547 + };
8548 + };
8549 +
8550 + fragment@3 {
8551 + target = <&sound>;
8552 + boss_dac: __overlay__ {
8553 + compatible = "allo,boss-dac";
8554 + i2s-controller = <&i2s>;
8555 + mute-gpios = <&gpio 6 1>;
8556 + status = "okay";
8557 + };
8558 + };
8559 +
8560 + __overrides__ {
8561 + 24db_digital_gain = <&boss_dac>,"allo,24db_digital_gain?";
8562 + slave = <&boss_dac>,"allo,slave?";
8563 + };
8564 +};
8565 diff --git a/arch/arm/boot/dts/overlays/allo-digione-overlay.dts b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
8566 new file mode 100644
8567 index 000000000000..ea018ace34d4
8568 --- /dev/null
8569 +++ b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
8570 @@ -0,0 +1,44 @@
8571 +// Definitions for Allo DigiOne
8572 +/dts-v1/;
8573 +/plugin/;
8574 +
8575 +/ {
8576 + compatible = "brcm,bcm2835";
8577 +
8578 + fragment@0 {
8579 + target = <&i2s>;
8580 + __overlay__ {
8581 + status = "okay";
8582 + };
8583 + };
8584 +
8585 + fragment@1 {
8586 + target = <&i2c1>;
8587 + __overlay__ {
8588 + #address-cells = <1>;
8589 + #size-cells = <0>;
8590 + status = "okay";
8591 +
8592 + wm8804@3b {
8593 + #sound-dai-cells = <0>;
8594 + compatible = "wlf,wm8804";
8595 + reg = <0x3b>;
8596 + PVDD-supply = <&vdd_3v3_reg>;
8597 + DVDD-supply = <&vdd_3v3_reg>;
8598 + status = "okay";
8599 + wlf,reset-gpio = <&gpio 17 0>;
8600 + };
8601 + };
8602 + };
8603 +
8604 + fragment@2 {
8605 + target = <&sound>;
8606 + __overlay__ {
8607 + compatible = "allo,allo-digione";
8608 + i2s-controller = <&i2s>;
8609 + status = "okay";
8610 + clock44-gpio = <&gpio 5 0>;
8611 + clock48-gpio = <&gpio 6 0>;
8612 + };
8613 + };
8614 +};
8615 diff --git a/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
8616 new file mode 100644
8617 index 000000000000..b25fd681f09f
8618 --- /dev/null
8619 +++ b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
8620 @@ -0,0 +1,57 @@
8621 +/*
8622 + * Definitions for Allo Katana DAC boards
8623 + */
8624 +
8625 +/dts-v1/;
8626 +/plugin/;
8627 +
8628 +/ {
8629 + compatible = "brcm,bcm2835";
8630 +
8631 + fragment@0 {
8632 + target = <&i2s>;
8633 + __overlay__ {
8634 + #sound-dai-cells = <0>;
8635 + status = "okay";
8636 + cpu_port: port {
8637 + cpu_endpoint: endpoint {
8638 + remote-endpoint = <&codec_endpoint>;
8639 + bitclock-master = <&codec_endpoint>;
8640 + frame-master = <&codec_endpoint>;
8641 + dai-format = "i2s";
8642 + };
8643 + };
8644 + };
8645 + };
8646 +
8647 + fragment@1 {
8648 + target = <&i2c1>;
8649 + __overlay__ {
8650 + #address-cells = <1>;
8651 + #size-cells = <0>;
8652 + status = "okay";
8653 +
8654 + allo-katana-codec@30 {
8655 + #sound-dai-cells = <0>;
8656 + compatible = "allo,allo-katana-codec";
8657 + reg = <0x30>;
8658 + port {
8659 + codec_endpoint: endpoint {
8660 + remote-endpoint = <&cpu_endpoint>;
8661 + };
8662 + };
8663 + };
8664 + };
8665 + };
8666 +
8667 + fragment@2 {
8668 + target = <&sound>;
8669 + katana_dac: __overlay__ {
8670 + compatible = "audio-graph-card";
8671 + label = "Allo Katana";
8672 + dais = <&cpu_port>;
8673 + status = "okay";
8674 + };
8675 + };
8676 +};
8677 +
8678 diff --git a/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
8679 new file mode 100644
8680 index 000000000000..bfc66da6295a
8681 --- /dev/null
8682 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
8683 @@ -0,0 +1,54 @@
8684 +/*
8685 + * Definitions for Allo Piano DAC (2.0/2.1) boards
8686 + *
8687 + * NB. The Piano DAC 2.1 board contains 2x TI PCM5142 DAC's. One DAC is stereo
8688 + * (left/right) and the other provides a subwoofer output, using DSP on the
8689 + * chip for digital high/low pass crossover.
8690 + * The initial support for this hardware, that doesn't require any codec driver
8691 + * modifications, uses only one DAC chip for stereo (left/right) output, the
8692 + * chip with 0x4c slave address. The other chip at 0x4d is currently ignored!
8693 + */
8694 +
8695 +/dts-v1/;
8696 +/plugin/;
8697 +
8698 +/ {
8699 + compatible = "brcm,bcm2835";
8700 +
8701 + fragment@0 {
8702 + target = <&i2s>;
8703 + __overlay__ {
8704 + status = "okay";
8705 + };
8706 + };
8707 +
8708 + fragment@1 {
8709 + target = <&i2c1>;
8710 + __overlay__ {
8711 + #address-cells = <1>;
8712 + #size-cells = <0>;
8713 + status = "okay";
8714 +
8715 + pcm5142@4c {
8716 + #sound-dai-cells = <0>;
8717 + compatible = "ti,pcm5142";
8718 + reg = <0x4c>;
8719 + status = "okay";
8720 + };
8721 + };
8722 + };
8723 +
8724 + fragment@2 {
8725 + target = <&sound>;
8726 + piano_dac: __overlay__ {
8727 + compatible = "allo,piano-dac";
8728 + i2s-controller = <&i2s>;
8729 + status = "okay";
8730 + };
8731 + };
8732 +
8733 + __overrides__ {
8734 + 24db_digital_gain =
8735 + <&piano_dac>,"allo,24db_digital_gain?";
8736 + };
8737 +};
8738 diff --git a/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
8739 new file mode 100644
8740 index 000000000000..374c553db062
8741 --- /dev/null
8742 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
8743 @@ -0,0 +1,55 @@
8744 +// Definitions for Piano DAC
8745 +/dts-v1/;
8746 +/plugin/;
8747 +
8748 +/ {
8749 + compatible = "brcm,bcm2835";
8750 +
8751 + fragment@0 {
8752 + target = <&i2s>;
8753 + __overlay__ {
8754 + status = "okay";
8755 + };
8756 + };
8757 +
8758 + fragment@1 {
8759 + target = <&i2c1>;
8760 + __overlay__ {
8761 + #address-cells = <1>;
8762 + #size-cells = <0>;
8763 + status = "okay";
8764 +
8765 + allo_pcm5122_4c: pcm5122@4c {
8766 + #sound-dai-cells = <0>;
8767 + compatible = "ti,pcm5122";
8768 + reg = <0x4c>;
8769 + status = "okay";
8770 + };
8771 + allo_pcm5122_4d: pcm5122@4d {
8772 + #sound-dai-cells = <0>;
8773 + compatible = "ti,pcm5122";
8774 + reg = <0x4d>;
8775 + status = "okay";
8776 + };
8777 + };
8778 + };
8779 +
8780 + fragment@2 {
8781 + target = <&sound>;
8782 + piano_dac: __overlay__ {
8783 + compatible = "allo,piano-dac-plus";
8784 + audio-codec = <&allo_pcm5122_4c &allo_pcm5122_4d>;
8785 + i2s-controller = <&i2s>;
8786 + mute1-gpios = <&gpio 6 1>;
8787 + mute2-gpios = <&gpio 25 1>;
8788 + status = "okay";
8789 + };
8790 + };
8791 +
8792 + __overrides__ {
8793 + 24db_digital_gain =
8794 + <&piano_dac>,"allo,24db_digital_gain?";
8795 + glb_mclk =
8796 + <&piano_dac>,"allo,glb_mclk?";
8797 + };
8798 +};
8799 diff --git a/arch/arm/boot/dts/overlays/anyspi-overlay.dts b/arch/arm/boot/dts/overlays/anyspi-overlay.dts
8800 new file mode 100755
8801 index 000000000000..87523dcca318
8802 --- /dev/null
8803 +++ b/arch/arm/boot/dts/overlays/anyspi-overlay.dts
8804 @@ -0,0 +1,205 @@
8805 +/*
8806 + * Universal device tree overlay for SPI devices
8807 + */
8808 +
8809 +/dts-v1/;
8810 +/plugin/;
8811 +
8812 +/ {
8813 + compatible = "brcm,bcm2835";
8814 +
8815 + fragment@0 {
8816 + target = <&spidev0>;
8817 + __dormant__ {
8818 + status = "disabled";
8819 + };
8820 + };
8821 +
8822 + fragment@1 {
8823 + target = <&spidev1>;
8824 + __dormant__ {
8825 + status = "disabled";
8826 + };
8827 + };
8828 +
8829 + fragment@2 {
8830 + target-path = "spi1/spidev@0";
8831 + __dormant__ {
8832 + status = "disabled";
8833 + };
8834 + };
8835 +
8836 + fragment@3 {
8837 + target-path = "spi1/spidev@1";
8838 + __dormant__ {
8839 + status = "disabled";
8840 + };
8841 + };
8842 +
8843 + fragment@4 {
8844 + target-path = "spi1/spidev@2";
8845 + __dormant__ {
8846 + status = "disabled";
8847 + };
8848 + };
8849 +
8850 + fragment@5 {
8851 + target-path = "spi2/spidev@0";
8852 + __dormant__ {
8853 + status = "disabled";
8854 + };
8855 + };
8856 +
8857 + fragment@6 {
8858 + target-path = "spi2/spidev@1";
8859 + __dormant__ {
8860 + status = "disabled";
8861 + };
8862 + };
8863 +
8864 + fragment@7 {
8865 + target-path = "spi2/spidev@2";
8866 + __dormant__ {
8867 + status = "disabled";
8868 + };
8869 + };
8870 +
8871 + fragment@8 {
8872 + target = <&spi0>;
8873 + __dormant__ {
8874 + status = "okay";
8875 + #address-cells = <1>;
8876 + #size-cells = <0>;
8877 +
8878 + anyspi_00: anyspi@0 {
8879 + reg = <0>;
8880 + spi-max-frequency = <500000>;
8881 + };
8882 + };
8883 + };
8884 +
8885 + fragment@9 {
8886 + target = <&spi0>;
8887 + __dormant__ {
8888 + status = "okay";
8889 + #address-cells = <1>;
8890 + #size-cells = <0>;
8891 +
8892 + anyspi_01: anyspi@1 {
8893 + reg = <1>;
8894 + spi-max-frequency = <500000>;
8895 + };
8896 + };
8897 + };
8898 +
8899 + fragment@10 {
8900 + target = <&spi1>;
8901 + __dormant__ {
8902 + status = "okay";
8903 + #address-cells = <1>;
8904 + #size-cells = <0>;
8905 +
8906 + anyspi_10: anyspi@0 {
8907 + reg = <0>;
8908 + spi-max-frequency = <500000>;
8909 + };
8910 + };
8911 + };
8912 +
8913 + fragment@11 {
8914 + target = <&spi1>;
8915 + __dormant__ {
8916 + status = "okay";
8917 + #address-cells = <1>;
8918 + #size-cells = <0>;
8919 +
8920 + anyspi_11: anyspi@1 {
8921 + reg = <1>;
8922 + spi-max-frequency = <500000>;
8923 + };
8924 + };
8925 + };
8926 +
8927 + fragment@12 {
8928 + target = <&spi1>;
8929 + __dormant__ {
8930 + status = "okay";
8931 + #address-cells = <1>;
8932 + #size-cells = <0>;
8933 +
8934 + anyspi_12: anyspi@2 {
8935 + reg = <2>;
8936 + spi-max-frequency = <500000>;
8937 + };
8938 + };
8939 + };
8940 +
8941 + fragment@13 {
8942 + target = <&spi2>;
8943 + __dormant__ {
8944 + status = "okay";
8945 + #address-cells = <1>;
8946 + #size-cells = <0>;
8947 +
8948 + anyspi_20: anyspi@0 {
8949 + reg = <0>;
8950 + spi-max-frequency = <500000>;
8951 + };
8952 + };
8953 + };
8954 +
8955 + fragment@14 {
8956 + target = <&spi2>;
8957 + __dormant__ {
8958 + status = "okay";
8959 + #address-cells = <1>;
8960 + #size-cells = <0>;
8961 +
8962 + anyspi_21: anyspi@1 {
8963 + reg = <1>;
8964 + spi-max-frequency = <500000>;
8965 + };
8966 + };
8967 + };
8968 +
8969 + fragment@15 {
8970 + target = <&spi2>;
8971 + __dormant__ {
8972 + status = "okay";
8973 + #address-cells = <1>;
8974 + #size-cells = <0>;
8975 +
8976 + anyspi_22: anyspi@2 {
8977 + reg = <2>;
8978 + spi-max-frequency = <500000>;
8979 + };
8980 + };
8981 + };
8982 +
8983 + __overrides__ {
8984 + spi0-0 = <0>, "+0+8";
8985 + spi0-1 = <0>, "+1+9";
8986 + spi1-0 = <0>, "+2+10";
8987 + spi1-1 = <0>, "+3+11";
8988 + spi1-2 = <0>, "+4+12";
8989 + spi2-0 = <0>, "+5+13";
8990 + spi2-1 = <0>, "+6+14";
8991 + spi2-2 = <0>, "+7+15";
8992 + dev = <&anyspi_00>,"compatible",
8993 + <&anyspi_01>,"compatible",
8994 + <&anyspi_10>,"compatible",
8995 + <&anyspi_11>,"compatible",
8996 + <&anyspi_12>,"compatible",
8997 + <&anyspi_20>,"compatible",
8998 + <&anyspi_21>,"compatible",
8999 + <&anyspi_22>,"compatible";
9000 + speed = <&anyspi_00>, "spi-max-frequency:0",
9001 + <&anyspi_01>, "spi-max-frequency:0",
9002 + <&anyspi_10>, "spi-max-frequency:0",
9003 + <&anyspi_11>, "spi-max-frequency:0",
9004 + <&anyspi_12>, "spi-max-frequency:0",
9005 + <&anyspi_20>, "spi-max-frequency:0",
9006 + <&anyspi_21>, "spi-max-frequency:0",
9007 + <&anyspi_22>, "spi-max-frequency:0";
9008 + };
9009 +};
9010 diff --git a/arch/arm/boot/dts/overlays/apds9960-overlay.dts b/arch/arm/boot/dts/overlays/apds9960-overlay.dts
9011 new file mode 100644
9012 index 000000000000..c216932278ab
9013 --- /dev/null
9014 +++ b/arch/arm/boot/dts/overlays/apds9960-overlay.dts
9015 @@ -0,0 +1,57 @@
9016 +// Definitions for APDS-9960 ambient light and gesture sensor
9017 +
9018 +/dts-v1/;
9019 +/plugin/;
9020 +
9021 +/ {
9022 + compatible = "brcm,bcm2835";
9023 +
9024 + fragment@0 {
9025 + target = <&i2c1>;
9026 + __overlay__ {
9027 + status = "okay";
9028 + };
9029 + };
9030 +
9031 + fragment@1 {
9032 + target = <&gpio>;
9033 + __overlay__ {
9034 + apds9960_pins: apds9960_pins@39 {
9035 + brcm,pins = <4>;
9036 + brcm,function = <0>;
9037 + };
9038 + };
9039 + };
9040 +
9041 + fragment@2 {
9042 + target = <&i2c1>;
9043 + __overlay__ {
9044 + #address-cells = <1>;
9045 + #size-cells = <0>;
9046 +
9047 + apds9960: apds@39 {
9048 + compatible = "avago,apds9960";
9049 + reg = <0x39>;
9050 + status = "okay";
9051 + };
9052 + };
9053 + };
9054 +
9055 + fragment@3 {
9056 + target = <&i2c1>;
9057 + __overlay__ {
9058 + apds9960_irq: apds@39 {
9059 + #interrupt-cells=<2>;
9060 + interrupt-parent = <&gpio>;
9061 + interrupts = <4 1>;
9062 + };
9063 + };
9064 + };
9065 +
9066 + __overrides__ {
9067 + gpiopin = <&apds9960_pins>,"brcm,pins:0",
9068 + <&apds9960_irq>,"interrupts:0";
9069 + noints = <0>,"!1!3";
9070 + };
9071 +};
9072 +
9073 diff --git a/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
9074 new file mode 100644
9075 index 000000000000..4769296ec9d6
9076 --- /dev/null
9077 +++ b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
9078 @@ -0,0 +1,57 @@
9079 +/dts-v1/;
9080 +/plugin/;
9081 +
9082 +/ {
9083 + compatible = "brcm,bcm2835";
9084 +
9085 + fragment@0 {
9086 + target = <&sound>;
9087 + __overlay__ {
9088 + compatible = "simple-audio-card";
9089 + simple-audio-card,name = "ApplePi-DAC";
9090 +
9091 + status = "okay";
9092 +
9093 + playback_link: simple-audio-card,dai-link@1 {
9094 + format = "i2s";
9095 +
9096 + p_cpu_dai: cpu {
9097 + sound-dai = <&i2s>;
9098 + dai-tdm-slot-num = <2>;
9099 + dai-tdm-slot-width = <32>;
9100 + };
9101 +
9102 + p_codec_dai: codec {
9103 + sound-dai = <&codec_out>;
9104 + };
9105 + };
9106 + };
9107 + };
9108 +
9109 + fragment@1 {
9110 + target-path = "/";
9111 + __overlay__ {
9112 + codec_out: pcm1794a-codec {
9113 + #sound-dai-cells = <0>;
9114 + compatible = "ti,pcm1794a";
9115 + status = "okay";
9116 + };
9117 + };
9118 + };
9119 +
9120 + fragment@2 {
9121 + target = <&i2s>;
9122 + __overlay__ {
9123 + #sound-dai-cells = <0>;
9124 + status = "okay";
9125 + };
9126 + };
9127 +};
9128 +
9129 +/*
9130 + Written by: Leonid Ayzenshtat
9131 + Company: Orchard Audio (www.orchardaudio.com)
9132 +
9133 + compile with:
9134 + dtc -@ -H epapr -O dtb -o ApplePi-DAC.dtbo -W no-unit_address_vs_reg ApplePi-DAC.dts
9135 +*/
9136 diff --git a/arch/arm/boot/dts/overlays/at86rf233-overlay.dts b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts
9137 new file mode 100644
9138 index 000000000000..5a3f4571ee78
9139 --- /dev/null
9140 +++ b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts
9141 @@ -0,0 +1,57 @@
9142 +/dts-v1/;
9143 +/plugin/;
9144 +
9145 +/* Overlay for Atmel AT86RF233 IEEE 802.15.4 WPAN transceiver on spi0.0 */
9146 +
9147 +/ {
9148 + compatible = "brcm,bcm2835";
9149 +
9150 + fragment@0 {
9151 + target = <&spi0>;
9152 + __overlay__ {
9153 + #address-cells = <1>;
9154 + #size-cells = <0>;
9155 +
9156 + status = "okay";
9157 +
9158 + lowpan0: at86rf233@0 {
9159 + compatible = "atmel,at86rf233";
9160 + reg = <0>;
9161 + interrupt-parent = <&gpio>;
9162 + interrupts = <23 4>; /* active high */
9163 + reset-gpio = <&gpio 24 1>;
9164 + sleep-gpio = <&gpio 25 1>;
9165 + spi-max-frequency = <3000000>;
9166 + xtal-trim = /bits/ 8 <0xf>;
9167 + };
9168 + };
9169 + };
9170 +
9171 + fragment@1 {
9172 + target = <&spidev0>;
9173 + __overlay__ {
9174 + status = "disabled";
9175 + };
9176 + };
9177 +
9178 + fragment@2 {
9179 + target = <&gpio>;
9180 + __overlay__ {
9181 + lowpan0_pins: lowpan0_pins {
9182 + brcm,pins = <23 24 25>;
9183 + brcm,function = <0 1 1>; /* in out out */
9184 + };
9185 + };
9186 + };
9187 +
9188 + __overrides__ {
9189 + interrupt = <&lowpan0>, "interrupts:0",
9190 + <&lowpan0_pins>, "brcm,pins:0";
9191 + reset = <&lowpan0>, "reset-gpio:4",
9192 + <&lowpan0_pins>, "brcm,pins:4";
9193 + sleep = <&lowpan0>, "sleep-gpio:4",
9194 + <&lowpan0_pins>, "brcm,pins:8";
9195 + speed = <&lowpan0>, "spi-max-frequency:0";
9196 + trim = <&lowpan0>, "xtal-trim.0";
9197 + };
9198 +};
9199 diff --git a/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
9200 new file mode 100644
9201 index 000000000000..57a66eac8e9b
9202 --- /dev/null
9203 +++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
9204 @@ -0,0 +1,60 @@
9205 +// Definitions for audioinjector.net audio add on soundcard
9206 +/dts-v1/;
9207 +/plugin/;
9208 +
9209 +/ {
9210 + compatible = "brcm,bcm2835";
9211 +
9212 + fragment@0 {
9213 + target = <&i2s>;
9214 + __overlay__ {
9215 + status = "okay";
9216 + };
9217 + };
9218 +
9219 + fragment@1 {
9220 + target-path = "/";
9221 + __overlay__ {
9222 + cs42448_mclk: codec-mclk {
9223 + compatible = "fixed-clock";
9224 + #clock-cells = <0>;
9225 + clock-frequency = <49152000>;
9226 + };
9227 + };
9228 + };
9229 +
9230 + fragment@2 {
9231 + target = <&i2c1>;
9232 + __overlay__ {
9233 + #address-cells = <1>;
9234 + #size-cells = <0>;
9235 + status = "okay";
9236 +
9237 + cs42448: cs42448@48 {
9238 + #sound-dai-cells = <0>;
9239 + compatible = "cirrus,cs42448";
9240 + reg = <0x48>;
9241 + clocks = <&cs42448_mclk>;
9242 + clock-names = "mclk";
9243 + status = "okay";
9244 + };
9245 + };
9246 + };
9247 +
9248 + fragment@3 {
9249 + target = <&sound>;
9250 + snd: __overlay__ {
9251 + compatible = "ai,audioinjector-octo-soundcard";
9252 + mult-gpios = <&gpio 27 0>, <&gpio 22 0>, <&gpio 23 0>,
9253 + <&gpio 24 0>;
9254 + reset-gpios = <&gpio 5 0>;
9255 + i2s-controller = <&i2s>;
9256 + codec = <&cs42448>;
9257 + status = "okay";
9258 + };
9259 + };
9260 +
9261 + __overrides__ {
9262 + non-stop-clocks = <&snd>, "non-stop-clocks?";
9263 + };
9264 +};
9265 diff --git a/arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts
9266 new file mode 100644
9267 index 000000000000..63e05cf9665d
9268 --- /dev/null
9269 +++ b/arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts
9270 @@ -0,0 +1,55 @@
9271 +// Definitions for audioinjector.net audio isolated soundcard
9272 +/dts-v1/;
9273 +/plugin/;
9274 +
9275 +/ {
9276 + compatible = "brcm,bcm2835";
9277 +
9278 + fragment@0 {
9279 + target = <&i2s>;
9280 + __overlay__ {
9281 + status = "okay";
9282 + };
9283 + };
9284 +
9285 + fragment@1 {
9286 + target-path = "/";
9287 + __overlay__ {
9288 + cs4272_mclk: codec-mclk {
9289 + compatible = "fixed-clock";
9290 + #clock-cells = <0>;
9291 + clock-frequency = <24576000>;
9292 + };
9293 + };
9294 + };
9295 +
9296 + fragment@2 {
9297 + target = <&i2c1>;
9298 + __overlay__ {
9299 + #address-cells = <1>;
9300 + #size-cells = <0>;
9301 + status = "okay";
9302 +
9303 + cs4272: cs4271@10 {
9304 + #sound-dai-cells = <0>;
9305 + compatible = "cirrus,cs4271";
9306 + reg = <0x10>;
9307 + reset-gpio = <&gpio 5 0>;
9308 + clocks = <&cs4272_mclk>;
9309 + clock-names = "mclk";
9310 + status = "okay";
9311 + };
9312 + };
9313 + };
9314 +
9315 + fragment@3 {
9316 + target = <&sound>;
9317 + snd: __overlay__ {
9318 + compatible = "ai,audioinjector-isolated-soundcard";
9319 + mute-gpios = <&gpio 17 0>;
9320 + i2s-controller = <&i2s>;
9321 + codec = <&cs4272>;
9322 + status = "okay";
9323 + };
9324 + };
9325 +};
9326 diff --git a/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
9327 new file mode 100644
9328 index 000000000000..fb4a4678a17a
9329 --- /dev/null
9330 +++ b/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
9331 @@ -0,0 +1,71 @@
9332 +// Definitions for audioinjector.net audio add on soundcard
9333 +/dts-v1/;
9334 +/plugin/;
9335 +
9336 +/ {
9337 + compatible = "brcm,bcm2835";
9338 +
9339 + fragment@0 {
9340 + target = <&i2s>;
9341 + __overlay__ {
9342 + status = "okay";
9343 + };
9344 + };
9345 +
9346 + fragment@1 {
9347 + target = <&i2c1>;
9348 + __overlay__ {
9349 + #address-cells = <1>;
9350 + #size-cells = <0>;
9351 + status = "okay";
9352 +
9353 + cs4265: cs4265@4e {
9354 + #sound-dai-cells = <0>;
9355 + compatible = "cirrus,cs4265";
9356 + reg = <0x4e>;
9357 + reset-gpios = <&gpio 5 0>;
9358 + status = "okay";
9359 + };
9360 + };
9361 + };
9362 +
9363 + fragment@2 {
9364 + target = <&sound>;
9365 + __overlay__ {
9366 + compatible = "simple-audio-card";
9367 + i2s-controller = <&i2s>;
9368 + status = "okay";
9369 +
9370 + simple-audio-card,name = "audioinjector-ultra";
9371 +
9372 + simple-audio-card,widgets =
9373 + "Line", "OUTPUTS",
9374 + "Line", "INPUTS";
9375 +
9376 + simple-audio-card,routing =
9377 + "OUTPUTS","LINEOUTL",
9378 + "OUTPUTS","LINEOUTR",
9379 + "OUTPUTS","SPDIFOUT",
9380 + "LINEINL","INPUTS",
9381 + "LINEINR","INPUTS",
9382 + "MICL","INPUTS",
9383 + "MICR","INPUTS";
9384 +
9385 + simple-audio-card,format = "i2s";
9386 +
9387 + simple-audio-card,bitclock-master = <&sound_master>;
9388 + simple-audio-card,frame-master = <&sound_master>;
9389 +
9390 + simple-audio-card,cpu {
9391 + sound-dai = <&i2s>;
9392 + dai-tdm-slot-num = <2>;
9393 + dai-tdm-slot-width = <32>;
9394 + };
9395 +
9396 + sound_master: simple-audio-card,codec {
9397 + sound-dai = <&cs4265>;
9398 + system-clock-frequency = <12288000>;
9399 + };
9400 + };
9401 + };
9402 +};
9403 diff --git a/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
9404 new file mode 100644
9405 index 000000000000..68f4427d86c3
9406 --- /dev/null
9407 +++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
9408 @@ -0,0 +1,39 @@
9409 +// Definitions for audioinjector.net audio add on soundcard
9410 +/dts-v1/;
9411 +/plugin/;
9412 +
9413 +/ {
9414 + compatible = "brcm,bcm2835";
9415 +
9416 + fragment@0 {
9417 + target = <&i2s>;
9418 + __overlay__ {
9419 + status = "okay";
9420 + };
9421 + };
9422 +
9423 + fragment@1 {
9424 + target = <&i2c1>;
9425 + __overlay__ {
9426 + #address-cells = <1>;
9427 + #size-cells = <0>;
9428 + status = "okay";
9429 +
9430 + wm8731@1a {
9431 + #sound-dai-cells = <0>;
9432 + compatible = "wlf,wm8731";
9433 + reg = <0x1a>;
9434 + status = "okay";
9435 + };
9436 + };
9437 + };
9438 +
9439 + fragment@2 {
9440 + target = <&sound>;
9441 + __overlay__ {
9442 + compatible = "ai,audioinjector-pi-soundcard";
9443 + i2s-controller = <&i2s>;
9444 + status = "okay";
9445 + };
9446 + };
9447 +};
9448 diff --git a/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts b/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
9449 new file mode 100644
9450 index 000000000000..81af26374d92
9451 --- /dev/null
9452 +++ b/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
9453 @@ -0,0 +1,82 @@
9454 +// Definitions for audiosense add on soundcard
9455 +/dts-v1/;
9456 +/plugin/;
9457 +#include <dt-bindings/pinctrl/bcm2835.h>
9458 +#include <dt-bindings/gpio/gpio.h>
9459 +
9460 +/ {
9461 + compatible = "brcm,bcm2835";
9462 +
9463 + fragment@0 {
9464 + target = <&i2s>;
9465 + __overlay__ {
9466 + status = "okay";
9467 + };
9468 + };
9469 +
9470 + fragment@1 {
9471 + target-path = "/";
9472 + __overlay__ {
9473 + codec_reg_1v8: codec-reg-1v8 {
9474 + compatible = "regulator-fixed";
9475 + regulator-name = "tlv320aic3204_1v8";
9476 + regulator-min-microvolt = <1800000>;
9477 + regulator-max-microvolt = <1800000>;
9478 + regulator-always-on;
9479 + };
9480 +
9481 + /* audio external oscillator */
9482 + codec_osc: codec_osc {
9483 + compatible = "fixed-clock";
9484 + #clock-cells = <0>;
9485 + clock-frequency = <12000000>; /* 12 MHz */
9486 + };
9487 + };
9488 + };
9489 +
9490 + fragment@2 {
9491 + target = <&gpio>;
9492 + __overlay__ {
9493 + codec_rst: codec-rst {
9494 + brcm,pins = <26>;
9495 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
9496 + };
9497 + };
9498 + };
9499 +
9500 + fragment@3 {
9501 + target = <&i2c1>;
9502 + __overlay__ {
9503 + #address-cells = <1>;
9504 + #size-cells = <0>;
9505 + status = "okay";
9506 +
9507 + codec: tlv320aic32x4@18 {
9508 + #sound-dai-cells = <0>;
9509 + compatible = "ti,tlv320aic32x4";
9510 + reg = <0x18>;
9511 +
9512 + clocks = <&codec_osc>;
9513 + clock-names = "mclk";
9514 +
9515 + iov-supply = <&vdd_3v3_reg>;
9516 + ldoin-supply = <&vdd_3v3_reg>;
9517 +
9518 + gpio-controller;
9519 + #gpio-cells = <2>;
9520 + reset-gpios = <&gpio 26 GPIO_ACTIVE_HIGH>;
9521 +
9522 + status = "okay";
9523 + };
9524 + };
9525 + };
9526 +
9527 + fragment@4 {
9528 + target = <&sound>;
9529 + __overlay__ {
9530 + compatible = "as,audiosense-pi";
9531 + i2s-controller = <&i2s>;
9532 + status = "okay";
9533 + };
9534 + };
9535 +};
9536 diff --git a/arch/arm/boot/dts/overlays/audremap-overlay.dts b/arch/arm/boot/dts/overlays/audremap-overlay.dts
9537 new file mode 100644
9538 index 000000000000..d624bb3a3fea
9539 --- /dev/null
9540 +++ b/arch/arm/boot/dts/overlays/audremap-overlay.dts
9541 @@ -0,0 +1,35 @@
9542 +/dts-v1/;
9543 +/plugin/;
9544 +
9545 +/ {
9546 + compatible = "brcm,bcm2835";
9547 +
9548 + fragment@0 {
9549 + target = <&audio_pins>;
9550 + frag0: __overlay__ {
9551 + };
9552 + };
9553 +
9554 + fragment@1 {
9555 + target = <&audio_pins>;
9556 + __overlay__ {
9557 + brcm,pins = < 12 13 >;
9558 + brcm,function = < 4 >; /* alt0 alt0 */
9559 + };
9560 + };
9561 +
9562 + fragment@2 {
9563 + target = <&audio_pins>;
9564 + __dormant__ {
9565 + brcm,pins = < 18 19 >;
9566 + brcm,function = < 2 >; /* alt5 alt5 */
9567 + };
9568 + };
9569 +
9570 + __overrides__ {
9571 + swap_lr = <&frag0>, "swap_lr?";
9572 + enable_jack = <&frag0>, "enable_jack?";
9573 + pins_12_13 = <0>,"+1-2";
9574 + pins_18_19 = <0>,"-1+2";
9575 + };
9576 +};
9577 diff --git a/arch/arm/boot/dts/overlays/balena-fin-overlay.dts b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts
9578 new file mode 100644
9579 index 000000000000..e7ead7cdf5f5
9580 --- /dev/null
9581 +++ b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts
9582 @@ -0,0 +1,125 @@
9583 +/dts-v1/;
9584 +/plugin/;
9585 +
9586 +#include <dt-bindings/gpio/gpio.h>
9587 +
9588 +/{
9589 + compatible = "brcm,bcm2835";
9590 +
9591 + fragment@0 {
9592 + target = <&mmcnr>;
9593 + __overlay__ {
9594 + pinctrl-names = "default";
9595 + pinctrl-0 = <&sdio_pins>;
9596 + bus-width = <4>;
9597 + brcm,overclock-50 = <35>;
9598 + status = "okay";
9599 + };
9600 + };
9601 +
9602 + fragment@1 {
9603 + target = <&gpio>;
9604 + __overlay__ {
9605 + sdio_pins: sdio_pins {
9606 + brcm,pins = <34 35 36 37 38 39>;
9607 + brcm,function = <7>; /* ALT3 = SD1 */
9608 + brcm,pull = <0 2 2 2 2 2>;
9609 + };
9610 +
9611 + power_ctrl_pins: power_ctrl_pins {
9612 + brcm,pins = <40>;
9613 + brcm,function = <1>; // out
9614 + };
9615 + };
9616 + };
9617 +
9618 + fragment@2 {
9619 + target-path = "/";
9620 + __overlay__ {
9621 + // We should switch to mmc-pwrseq-sd8787 after making it
9622 + // compatible with sd8887
9623 + // Currently that module requires two GPIOs to function since it
9624 + // targets a slightly different chip
9625 + power_ctrl: power_ctrl {
9626 + compatible = "gpio-poweroff";
9627 + gpios = <&gpio 40 1>;
9628 + force;
9629 + pinctrl-names = "default";
9630 + pinctrl-0 = <&power_ctrl_pins>;
9631 + };
9632 +
9633 + i2c_soft: i2c@0 {
9634 + compatible = "i2c-gpio";
9635 + gpios = <&gpio 43 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* sda */
9636 + &gpio 42 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* scl */>;
9637 + i2c-gpio,delay-us = <5>;
9638 + i2c-gpio,scl-open-drain;
9639 + i2c-gpio,sda-open-drain;
9640 + #address-cells = <1>;
9641 + #size-cells = <0>;
9642 + };
9643 +
9644 + sd8xxx-wlan {
9645 + drvdbg = <0x6>;
9646 + drv_mode = <0x1>;
9647 + cfg80211_wext = <0xf>;
9648 + sta_name = "wlan";
9649 + wfd_name = "p2p";
9650 + cal_data_cfg = "none";
9651 + };
9652 + };
9653 + };
9654 +
9655 + fragment@3 {
9656 + target = <&i2c_soft>;
9657 + __overlay__ {
9658 + #address-cells = <1>;
9659 + #size-cells = <0>;
9660 + status = "okay";
9661 +
9662 + gpio_expander: gpio_expander@20 {
9663 + compatible = "nxp,pca9554";
9664 + gpio-controller;
9665 + #gpio-cells = <2>;
9666 + reg = <0x20>;
9667 + status = "okay";
9668 + };
9669 +
9670 + // rtc clock
9671 + ds1307: ds1307@68 {
9672 + compatible = "dallas,ds1307";
9673 + reg = <0x68>;
9674 + status = "okay";
9675 + };
9676 +
9677 + // RGB LEDs (>= v1.1.0)
9678 + pca9633: pca9633@62 {
9679 + compatible = "nxp,pca9633";
9680 + reg = <0x62>;
9681 + #address-cells = <1>;
9682 + #size-cells = <0>;
9683 +
9684 + red@0 {
9685 + label = "red";
9686 + reg = <0>;
9687 + linux,default-trigger = "none";
9688 + };
9689 + green@1 {
9690 + label = "green";
9691 + reg = <1>;
9692 + linux,default-trigger = "none";
9693 + };
9694 + blue@2 {
9695 + label = "blue";
9696 + reg = <2>;
9697 + linux,default-trigger = "none";
9698 + };
9699 + unused@3 {
9700 + label = "unused";
9701 + reg = <3>;
9702 + linux,default-trigger = "none";
9703 + };
9704 + };
9705 + };
9706 + };
9707 +};
9708 diff --git a/arch/arm/boot/dts/overlays/cma-overlay.dts b/arch/arm/boot/dts/overlays/cma-overlay.dts
9709 new file mode 100644
9710 index 000000000000..1d87c599f909
9711 --- /dev/null
9712 +++ b/arch/arm/boot/dts/overlays/cma-overlay.dts
9713 @@ -0,0 +1,36 @@
9714 +/*
9715 + * cma.dts
9716 + */
9717 +
9718 +/dts-v1/;
9719 +/plugin/;
9720 +
9721 +/ {
9722 + compatible = "brcm,bcm2835";
9723 +
9724 + fragment@0 {
9725 + target = <&cma>;
9726 + frag0: __overlay__ {
9727 + /*
9728 + * The default size when using this overlay is 256 MB
9729 + * and should be kept as is for backwards
9730 + * compatibility.
9731 + */
9732 + size = <0x10000000>;
9733 + };
9734 + };
9735 +
9736 + __overrides__ {
9737 + cma-512 = <&frag0>,"size:0=",<0x20000000>;
9738 + cma-448 = <&frag0>,"size:0=",<0x1c000000>;
9739 + cma-384 = <&frag0>,"size:0=",<0x18000000>;
9740 + cma-320 = <&frag0>,"size:0=",<0x14000000>;
9741 + cma-256 = <&frag0>,"size:0=",<0x10000000>;
9742 + cma-192 = <&frag0>,"size:0=",<0xC000000>;
9743 + cma-128 = <&frag0>,"size:0=",<0x8000000>;
9744 + cma-96 = <&frag0>,"size:0=",<0x6000000>;
9745 + cma-64 = <&frag0>,"size:0=",<0x4000000>;
9746 + cma-size = <&frag0>,"size:0"; /* in bytes, 4MB aligned */
9747 + cma-default = <0>,"-0";
9748 + };
9749 +};
9750 diff --git a/arch/arm/boot/dts/overlays/dht11-overlay.dts b/arch/arm/boot/dts/overlays/dht11-overlay.dts
9751 new file mode 100644
9752 index 000000000000..6feeeb402493
9753 --- /dev/null
9754 +++ b/arch/arm/boot/dts/overlays/dht11-overlay.dts
9755 @@ -0,0 +1,41 @@
9756 +/*
9757 + * Overlay for the DHT11/21/22 humidity/temperature sensor modules.
9758 + */
9759 +/dts-v1/;
9760 +/plugin/;
9761 +
9762 +/ {
9763 + compatible = "brcm,bcm2835";
9764 +
9765 + fragment@0 {
9766 + target-path = "/";
9767 + __overlay__ {
9768 +
9769 + dht11: dht11@0 {
9770 + compatible = "dht11";
9771 + pinctrl-names = "default";
9772 + pinctrl-0 = <&dht11_pins>;
9773 + gpios = <&gpio 4 0>;
9774 + status = "okay";
9775 + };
9776 + };
9777 + };
9778 +
9779 + fragment@1 {
9780 + target = <&gpio>;
9781 + __overlay__ {
9782 + dht11_pins: dht11_pins@0 {
9783 + brcm,pins = <4>;
9784 + brcm,function = <0>; // in
9785 + brcm,pull = <0>; // off
9786 + };
9787 + };
9788 + };
9789 +
9790 + __overrides__ {
9791 + gpiopin = <&dht11_pins>,"brcm,pins:0",
9792 + <&dht11_pins>, "reg:0",
9793 + <&dht11>,"gpios:4",
9794 + <&dht11>,"reg:0";
9795 + };
9796 +};
9797 diff --git a/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
9798 new file mode 100644
9799 index 000000000000..d863e5c167cc
9800 --- /dev/null
9801 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
9802 @@ -0,0 +1,39 @@
9803 +// Definitions for Dion Audio LOCO DAC-AMP
9804 +
9805 +/*
9806 + * PCM5242 DAC (in hardware mode) and TPA3118 AMP.
9807 + */
9808 +
9809 +/dts-v1/;
9810 +/plugin/;
9811 +
9812 +/ {
9813 + compatible = "brcm,bcm2835";
9814 +
9815 + fragment@0 {
9816 + target = <&i2s>;
9817 + __overlay__ {
9818 + status = "okay";
9819 + };
9820 + };
9821 +
9822 + fragment@1 {
9823 + target-path = "/";
9824 + __overlay__ {
9825 + pcm5102a-codec {
9826 + #sound-dai-cells = <0>;
9827 + compatible = "ti,pcm5102a";
9828 + status = "okay";
9829 + };
9830 + };
9831 + };
9832 +
9833 + fragment@2 {
9834 + target = <&sound>;
9835 + __overlay__ {
9836 + compatible = "dionaudio,loco-pcm5242-tpa3118";
9837 + i2s-controller = <&i2s>;
9838 + status = "okay";
9839 + };
9840 + };
9841 +};
9842 diff --git a/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
9843 new file mode 100644
9844 index 000000000000..dfb8922a654b
9845 --- /dev/null
9846 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
9847 @@ -0,0 +1,49 @@
9848 +/*
9849 + * Definitions for Dion Audio LOCO-V2 DAC-AMP
9850 + * eg. dtoverlay=dionaudio-loco-v2
9851 + *
9852 + * PCM5242 DAC (in software mode) and TPA3255 AMP.
9853 + */
9854 +
9855 +/dts-v1/;
9856 +/plugin/;
9857 +
9858 +/ {
9859 + compatible = "brcm,bcm2835";
9860 +
9861 + fragment@0 {
9862 + target = <&sound>;
9863 + frag0: __overlay__ {
9864 + compatible = "dionaudio,dionaudio-loco-v2";
9865 + i2s-controller = <&i2s>;
9866 + status = "okay";
9867 + };
9868 + };
9869 +
9870 + fragment@1 {
9871 + target = <&i2s>;
9872 + __overlay__ {
9873 + status = "okay";
9874 + };
9875 + };
9876 +
9877 + fragment@2 {
9878 + target = <&i2c1>;
9879 + __overlay__ {
9880 + #address-cells = <1>;
9881 + #size-cells = <0>;
9882 + status = "okay";
9883 +
9884 + pcm5122@4c {
9885 + #sound-dai-cells = <0>;
9886 + compatible = "ti,pcm5122";
9887 + reg = <0x4d>;
9888 + status = "okay";
9889 + };
9890 + };
9891 + };
9892 +
9893 + __overrides__ {
9894 + 24db_digital_gain = <&frag0>,"dionaudio,24db_digital_gain?";
9895 + };
9896 +};
9897 diff --git a/arch/arm/boot/dts/overlays/disable-bt-overlay.dts b/arch/arm/boot/dts/overlays/disable-bt-overlay.dts
9898 new file mode 100644
9899 index 000000000000..d5a66e5d76a9
9900 --- /dev/null
9901 +++ b/arch/arm/boot/dts/overlays/disable-bt-overlay.dts
9902 @@ -0,0 +1,64 @@
9903 +/dts-v1/;
9904 +/plugin/;
9905 +
9906 +/* Disable Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15.
9907 + To disable the systemd service that initialises the modem so it doesn't use
9908 + the UART:
9909 +
9910 + sudo systemctl disable hciuart
9911 +*/
9912 +
9913 +#include <dt-bindings/gpio/gpio.h>
9914 +
9915 +/{
9916 + compatible = "brcm,bcm2835";
9917 +
9918 + fragment@0 {
9919 + target = <&uart1>;
9920 + __overlay__ {
9921 + status = "disabled";
9922 + };
9923 + };
9924 +
9925 + fragment@1 {
9926 + target = <&uart0>;
9927 + __overlay__ {
9928 + pinctrl-names = "default";
9929 + pinctrl-0 = <&uart0_pins>;
9930 + status = "okay";
9931 + };
9932 + };
9933 +
9934 + fragment@2 {
9935 + target = <&bt>;
9936 + __overlay__ {
9937 + status = "disabled";
9938 + };
9939 + };
9940 +
9941 + fragment@3 {
9942 + target = <&uart0_pins>;
9943 + __overlay__ {
9944 + brcm,pins;
9945 + brcm,function;
9946 + brcm,pull;
9947 + };
9948 + };
9949 +
9950 + fragment@4 {
9951 + target = <&bt_pins>;
9952 + __overlay__ {
9953 + brcm,pins;
9954 + brcm,function;
9955 + brcm,pull;
9956 + };
9957 + };
9958 +
9959 + fragment@5 {
9960 + target-path = "/aliases";
9961 + __overlay__ {
9962 + serial0 = "/soc/serial@7e201000";
9963 + serial1 = "/soc/serial@7e215040";
9964 + };
9965 + };
9966 +};
9967 diff --git a/arch/arm/boot/dts/overlays/disable-wifi-overlay.dts b/arch/arm/boot/dts/overlays/disable-wifi-overlay.dts
9968 new file mode 100644
9969 index 000000000000..75e046463900
9970 --- /dev/null
9971 +++ b/arch/arm/boot/dts/overlays/disable-wifi-overlay.dts
9972 @@ -0,0 +1,20 @@
9973 +/dts-v1/;
9974 +/plugin/;
9975 +
9976 +/{
9977 + compatible = "brcm,bcm2835";
9978 +
9979 + fragment@0 {
9980 + target = <&mmc>;
9981 + __overlay__ {
9982 + status = "disabled";
9983 + };
9984 + };
9985 +
9986 + fragment@1 {
9987 + target = <&mmcnr>;
9988 + __overlay__ {
9989 + status = "disabled";
9990 + };
9991 + };
9992 +};
9993 diff --git a/arch/arm/boot/dts/overlays/dpi18-overlay.dts b/arch/arm/boot/dts/overlays/dpi18-overlay.dts
9994 new file mode 100644
9995 index 000000000000..4abe5be744db
9996 --- /dev/null
9997 +++ b/arch/arm/boot/dts/overlays/dpi18-overlay.dts
9998 @@ -0,0 +1,39 @@
9999 +/dts-v1/;
10000 +/plugin/;
10001 +
10002 +/{
10003 + compatible = "brcm,bcm2835";
10004 +
10005 + // There is no DPI driver module, but we need a platform device
10006 + // node (that doesn't already use pinctrl) to hang the pinctrl
10007 + // reference on - leds will do
10008 +
10009 + fragment@0 {
10010 + target = <&fb>;
10011 + __overlay__ {
10012 + pinctrl-names = "default";
10013 + pinctrl-0 = <&dpi18_pins>;
10014 + };
10015 + };
10016 +
10017 + fragment@1 {
10018 + target = <&vc4>;
10019 + __overlay__ {
10020 + pinctrl-names = "default";
10021 + pinctrl-0 = <&dpi18_pins>;
10022 + };
10023 + };
10024 +
10025 + fragment@2 {
10026 + target = <&gpio>;
10027 + __overlay__ {
10028 + dpi18_pins: dpi18_pins {
10029 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
10030 + 12 13 14 15 16 17 18 19 20
10031 + 21>;
10032 + brcm,function = <6>; /* alt2 */
10033 + brcm,pull = <0>; /* no pull */
10034 + };
10035 + };
10036 + };
10037 +};
10038 diff --git a/arch/arm/boot/dts/overlays/dpi24-overlay.dts b/arch/arm/boot/dts/overlays/dpi24-overlay.dts
10039 new file mode 100644
10040 index 000000000000..44335cc81277
10041 --- /dev/null
10042 +++ b/arch/arm/boot/dts/overlays/dpi24-overlay.dts
10043 @@ -0,0 +1,39 @@
10044 +/dts-v1/;
10045 +/plugin/;
10046 +
10047 +/{
10048 + compatible = "brcm,bcm2835";
10049 +
10050 + // There is no DPI driver module, but we need a platform device
10051 + // node (that doesn't already use pinctrl) to hang the pinctrl
10052 + // reference on - leds will do
10053 +
10054 + fragment@0 {
10055 + target = <&fb>;
10056 + __overlay__ {
10057 + pinctrl-names = "default";
10058 + pinctrl-0 = <&dpi24_pins>;
10059 + };
10060 + };
10061 +
10062 + fragment@1 {
10063 + target = <&vc4>;
10064 + __overlay__ {
10065 + pinctrl-names = "default";
10066 + pinctrl-0 = <&dpi24_pins>;
10067 + };
10068 + };
10069 +
10070 + fragment@2 {
10071 + target = <&gpio>;
10072 + __overlay__ {
10073 + dpi24_pins: dpi24_pins {
10074 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
10075 + 12 13 14 15 16 17 18 19 20
10076 + 21 22 23 24 25 26 27>;
10077 + brcm,function = <6>; /* alt2 */
10078 + brcm,pull = <0>; /* no pull */
10079 + };
10080 + };
10081 + };
10082 +};
10083 diff --git a/arch/arm/boot/dts/overlays/draws-overlay.dts b/arch/arm/boot/dts/overlays/draws-overlay.dts
10084 new file mode 100644
10085 index 000000000000..d18187d7f343
10086 --- /dev/null
10087 +++ b/arch/arm/boot/dts/overlays/draws-overlay.dts
10088 @@ -0,0 +1,208 @@
10089 +#include <dt-bindings/clock/bcm2835.h>
10090 +/*
10091 + * Device tree overlay for the DRAWS Hardware
10092 + */
10093 +
10094 +/dts-v1/;
10095 +/plugin/;
10096 +
10097 +/ {
10098 + compatible = "brcm,bcm2835";
10099 + fragment@0 {
10100 + target = <&i2s>;
10101 + __overlay__ {
10102 + status = "okay";
10103 + };
10104 + };
10105 +
10106 + fragment@1 {
10107 + target-path = "/";
10108 + __overlay__ {
10109 + regulators {
10110 + compatible = "simple-bus";
10111 + #address-cells = <1>;
10112 + #size-cells = <0>;
10113 +
10114 + udrc0_ldoin: udrc0_ldoin {
10115 + compatible = "regulator-fixed";
10116 + regulator-name = "ldoin";
10117 + regulator-min-microvolt = <3300000>;
10118 + regulator-max-microvolt = <3300000>;
10119 + regulator-always-on;
10120 + };
10121 +
10122 + sc16is752_clk: sc16is752_draws_clk {
10123 + compatible = "fixed-clock";
10124 + #clock-cells = <0>;
10125 + clock-frequency = <1843200>;
10126 + };
10127 + };
10128 +
10129 + pps: pps {
10130 + compatible = "pps-gpio";
10131 + pinctrl-names = "default";
10132 + pinctrl-0 = <&pps_pins>;
10133 + gpios = <&gpio 7 0>;
10134 + status = "okay";
10135 + };
10136 +
10137 + iio-hwmon {
10138 + compatible = "iio-hwmon";
10139 + status = "okay";
10140 + io-channels = <&tla2024 4>, <&tla2024 5>, <&tla2024 6>,
10141 + <&tla2024 7>;
10142 + };
10143 + };
10144 + };
10145 +
10146 + fragment@2 {
10147 + target = <&i2c_arm>;
10148 + __overlay__ {
10149 + #address-cells = <1>;
10150 + #size-cells = <0>;
10151 + status = "okay";
10152 +
10153 + tlv320aic32x4: tlv320aic32x4@18 {
10154 + compatible = "ti,tlv320aic32x4";
10155 + reg = <0x18>;
10156 + #sound-dai-cells = <0>;
10157 + status = "okay";
10158 +
10159 + clocks = <&clocks BCM2835_CLOCK_GP0>;
10160 + clock-names = "mclk";
10161 + assigned-clocks = <&clocks BCM2835_CLOCK_GP0>;
10162 + assigned-clock-rates = <25000000>;
10163 +
10164 + pinctrl-names = "default";
10165 + pinctrl-0 = <&gpclk0_pin &aic3204_reset>;
10166 +
10167 + reset-gpios = <&gpio 13 0>;
10168 +
10169 + iov-supply = <&udrc0_ldoin>;
10170 + ldoin-supply = <&udrc0_ldoin>;
10171 + };
10172 +
10173 + sc16is752: sc16is752@50 {
10174 + compatible = "nxp,sc16is752";
10175 + reg = <0x50>;
10176 + clocks = <&sc16is752_clk>;
10177 + interrupt-parent = <&gpio>;
10178 + interrupts = <17 2>; /* IRQ_TYPE_EDGE_FALLING */
10179 +
10180 + pinctrl-names = "default";
10181 + pinctrl-0 = <&sc16is752_irq>;
10182 + };
10183 +
10184 + tla2024: tla2024@48 {
10185 + compatible = "ti,ads1015";
10186 + reg = <0x48>;
10187 + #address-cells = <1>;
10188 + #size-cells = <0>;
10189 + #io-channel-cells = <1>;
10190 +
10191 + adc_ch4: channel@4 {
10192 + reg = <4>;
10193 + ti,gain = <1>;
10194 + ti,datarate = <4>;
10195 + };
10196 +
10197 + adc_ch5: channel@5 {
10198 + reg = <5>;
10199 + ti,gain = <1>;
10200 + ti,datarate = <4>;
10201 + };
10202 +
10203 + adc_ch6: channel@6 {
10204 + reg = <6>;
10205 + ti,gain = <2>;
10206 + ti,datarate = <4>;
10207 + };
10208 +
10209 + adc_ch7: channel@7 {
10210 + reg = <7>;
10211 + ti,gain = <2>;
10212 + ti,datarate = <4>;
10213 + };
10214 + };
10215 + };
10216 + };
10217 +
10218 + fragment@3 {
10219 + target = <&sound>;
10220 + snd: __overlay__ {
10221 + compatible = "simple-audio-card";
10222 + i2s-controller = <&i2s>;
10223 + status = "okay";
10224 +
10225 + simple-audio-card,name = "draws";
10226 + simple-audio-card,format = "i2s";
10227 +
10228 + simple-audio-card,bitclock-master = <&dailink0_master>;
10229 + simple-audio-card,frame-master = <&dailink0_master>;
10230 +
10231 + simple-audio-card,widgets =
10232 + "Line", "Line In",
10233 + "Line", "Line Out";
10234 +
10235 + simple-audio-card,routing =
10236 + "IN1_R", "Line In",
10237 + "IN1_L", "Line In",
10238 + "CM_L", "Line In",
10239 + "CM_R", "Line In",
10240 + "Line Out", "LOR",
10241 + "Line Out", "LOL";
10242 +
10243 + dailink0_master: simple-audio-card,cpu {
10244 + sound-dai = <&i2s>;
10245 + };
10246 +
10247 + simple-audio-card,codec {
10248 + sound-dai = <&tlv320aic32x4>;
10249 + };
10250 + };
10251 + };
10252 +
10253 + fragment@4 {
10254 + target = <&gpio>;
10255 + __overlay__ {
10256 + gpclk0_pin: gpclk0_pin {
10257 + brcm,pins = <4>;
10258 + brcm,function = <4>;
10259 + };
10260 +
10261 + aic3204_reset: aic3204_reset {
10262 + brcm,pins = <13>;
10263 + brcm,function = <1>;
10264 + brcm,pull = <1>;
10265 + };
10266 +
10267 + aic3204_gpio: aic3204_gpio {
10268 + brcm,pins = <26>;
10269 + };
10270 +
10271 + sc16is752_irq: sc16is752_irq {
10272 + brcm,pins = <17>;
10273 + brcm,function = <0>;
10274 + brcm,pull = <2>;
10275 + };
10276 +
10277 + pps_pins: pps_pins {
10278 + brcm,pins = <7>;
10279 + brcm,function = <0>;
10280 + brcm,pull = <0>;
10281 + };
10282 + };
10283 + };
10284 +
10285 + __overrides__ {
10286 + draws_adc_ch4_gain = <&adc_ch4>,"ti,gain:0";
10287 + draws_adc_ch4_datarate = <&adc_ch4>,"ti,datarate:0";
10288 + draws_adc_ch5_gain = <&adc_ch5>,"ti,gain:0";
10289 + draws_adc_ch5_datarate = <&adc_ch5>,"ti,datarate:0";
10290 + draws_adc_ch6_gain = <&adc_ch6>,"ti,gain:0";
10291 + draws_adc_ch6_datarate = <&adc_ch6>,"ti,datarate:0";
10292 + draws_adc_ch7_gain = <&adc_ch7>,"ti,gain:0";
10293 + draws_adc_ch7_datarate = <&adc_ch7>,"ti,datarate:0";
10294 + alsaname = <&snd>, "simple-audio-card,name";
10295 + };
10296 +};
10297 diff --git a/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
10298 new file mode 100644
10299 index 000000000000..78c5e9f85048
10300 --- /dev/null
10301 +++ b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
10302 @@ -0,0 +1,14 @@
10303 +/dts-v1/;
10304 +/plugin/;
10305 +
10306 +/{
10307 + compatible = "brcm,bcm2835";
10308 +
10309 + fragment@0 {
10310 + target = <&usb>;
10311 + __overlay__ {
10312 + compatible = "brcm,bcm2708-usb";
10313 + status = "okay";
10314 + };
10315 + };
10316 +};
10317 diff --git a/arch/arm/boot/dts/overlays/dwc2-overlay.dts b/arch/arm/boot/dts/overlays/dwc2-overlay.dts
10318 new file mode 100644
10319 index 000000000000..0d83e344ad97
10320 --- /dev/null
10321 +++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts
10322 @@ -0,0 +1,26 @@
10323 +/dts-v1/;
10324 +/plugin/;
10325 +
10326 +/{
10327 + compatible = "brcm,bcm2835";
10328 +
10329 + fragment@0 {
10330 + target = <&usb>;
10331 + #address-cells = <1>;
10332 + #size-cells = <1>;
10333 + dwc2_usb: __overlay__ {
10334 + compatible = "brcm,bcm2835-usb";
10335 + dr_mode = "otg";
10336 + g-np-tx-fifo-size = <32>;
10337 + g-rx-fifo-size = <558>;
10338 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
10339 + status = "okay";
10340 + };
10341 + };
10342 +
10343 + __overrides__ {
10344 + dr_mode = <&dwc2_usb>, "dr_mode";
10345 + g-np-tx-fifo-size = <&dwc2_usb>,"g-np-tx-fifo-size:0";
10346 + g-rx-fifo-size = <&dwc2_usb>,"g-rx-fifo-size:0";
10347 + };
10348 +};
10349 diff --git a/arch/arm/boot/dts/overlays/enc28j60-overlay.dts b/arch/arm/boot/dts/overlays/enc28j60-overlay.dts
10350 new file mode 100644
10351 index 000000000000..7af5c2e607ea
10352 --- /dev/null
10353 +++ b/arch/arm/boot/dts/overlays/enc28j60-overlay.dts
10354 @@ -0,0 +1,53 @@
10355 +// Overlay for the Microchip ENC28J60 Ethernet Controller
10356 +/dts-v1/;
10357 +/plugin/;
10358 +
10359 +/ {
10360 + compatible = "brcm,bcm2835";
10361 +
10362 + fragment@0 {
10363 + target = <&spi0>;
10364 + __overlay__ {
10365 + /* needed to avoid dtc warning */
10366 + #address-cells = <1>;
10367 + #size-cells = <0>;
10368 +
10369 + status = "okay";
10370 +
10371 + eth1: enc28j60@0{
10372 + compatible = "microchip,enc28j60";
10373 + reg = <0>; /* CE0 */
10374 + pinctrl-names = "default";
10375 + pinctrl-0 = <&eth1_pins>;
10376 + interrupt-parent = <&gpio>;
10377 + interrupts = <25 0x2>; /* falling edge */
10378 + spi-max-frequency = <12000000>;
10379 + status = "okay";
10380 + };
10381 + };
10382 + };
10383 +
10384 + fragment@1 {
10385 + target = <&spidev0>;
10386 + __overlay__ {
10387 + status = "disabled";
10388 + };
10389 + };
10390 +
10391 + fragment@2 {
10392 + target = <&gpio>;
10393 + __overlay__ {
10394 + eth1_pins: eth1_pins {
10395 + brcm,pins = <25>;
10396 + brcm,function = <0>; /* in */
10397 + brcm,pull = <0>; /* none */
10398 + };
10399 + };
10400 + };
10401 +
10402 + __overrides__ {
10403 + int_pin = <&eth1>, "interrupts:0",
10404 + <&eth1_pins>, "brcm,pins:0";
10405 + speed = <&eth1>, "spi-max-frequency:0";
10406 + };
10407 +};
10408 diff --git a/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
10409 new file mode 100644
10410 index 000000000000..17cb5b8fa485
10411 --- /dev/null
10412 +++ b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
10413 @@ -0,0 +1,47 @@
10414 +// Overlay for the Microchip ENC28J60 Ethernet Controller - SPI2 Compute Module
10415 +// Interrupt pin: 39
10416 +/dts-v1/;
10417 +/plugin/;
10418 +
10419 +/ {
10420 + compatible = "brcm,bcm2835";
10421 +
10422 + fragment@0 {
10423 + target = <&spi2>;
10424 + __overlay__ {
10425 + /* needed to avoid dtc warning */
10426 + #address-cells = <1>;
10427 + #size-cells = <0>;
10428 +
10429 + status = "okay";
10430 +
10431 + eth1: enc28j60@0{
10432 + compatible = "microchip,enc28j60";
10433 + reg = <0>; /* CE0 */
10434 + pinctrl-names = "default";
10435 + pinctrl-0 = <&eth1_pins>;
10436 + interrupt-parent = <&gpio>;
10437 + interrupts = <39 0x2>; /* falling edge */
10438 + spi-max-frequency = <12000000>;
10439 + status = "okay";
10440 + };
10441 + };
10442 + };
10443 +
10444 + fragment@1 {
10445 + target = <&gpio>;
10446 + __overlay__ {
10447 + eth1_pins: eth1_pins {
10448 + brcm,pins = <39>;
10449 + brcm,function = <0>; /* in */
10450 + brcm,pull = <0>; /* none */
10451 + };
10452 + };
10453 + };
10454 +
10455 + __overrides__ {
10456 + int_pin = <&eth1>, "interrupts:0",
10457 + <&eth1_pins>, "brcm,pins:0";
10458 + speed = <&eth1>, "spi-max-frequency:0";
10459 + };
10460 +};
10461 diff --git a/arch/arm/boot/dts/overlays/exc3000-overlay.dts b/arch/arm/boot/dts/overlays/exc3000-overlay.dts
10462 new file mode 100644
10463 index 000000000000..6f087fb20661
10464 --- /dev/null
10465 +++ b/arch/arm/boot/dts/overlays/exc3000-overlay.dts
10466 @@ -0,0 +1,48 @@
10467 +// Device tree overlay for I2C connected EETI EXC3000 multiple touch controller
10468 +/dts-v1/;
10469 +/plugin/;
10470 +
10471 +/ {
10472 + compatible = "brcm,bcm2835";
10473 +
10474 + fragment@0 {
10475 + target = <&gpio>;
10476 + __overlay__ {
10477 + exc3000_pins: exc3000_pins {
10478 + brcm,pins = <4>; // interrupt
10479 + brcm,function = <0>; // in
10480 + brcm,pull = <2>; // pull-up
10481 + };
10482 + };
10483 + };
10484 +
10485 + fragment@1 {
10486 + target = <&i2c1>;
10487 + __overlay__ {
10488 + #address-cells = <1>;
10489 + #size-cells = <0>;
10490 + status = "okay";
10491 +
10492 + exc3000: exc3000@2a {
10493 + compatible = "eeti,exc3000";
10494 + reg = <0x2a>;
10495 + pinctrl-names = "default";
10496 + pinctrl-0 = <&exc3000_pins>;
10497 + interrupt-parent = <&gpio>;
10498 + interrupts = <4 8>; // active low level-sensitive
10499 + touchscreen-size-x = <4096>;
10500 + touchscreen-size-y = <4096>;
10501 + };
10502 + };
10503 + };
10504 +
10505 + __overrides__ {
10506 + interrupt = <&exc3000_pins>,"brcm,pins:0",
10507 + <&exc3000>,"interrupts:0";
10508 + sizex = <&exc3000>,"touchscreen-size-x:0";
10509 + sizey = <&exc3000>,"touchscreen-size-y:0";
10510 + invx = <&exc3000>,"touchscreen-inverted-x?";
10511 + invy = <&exc3000>,"touchscreen-inverted-y?";
10512 + swapxy = <&exc3000>,"touchscreen-swapped-x-y?";
10513 + };
10514 +};
10515 diff --git a/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
10516 new file mode 100644
10517 index 000000000000..743f14ae5768
10518 --- /dev/null
10519 +++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
10520 @@ -0,0 +1,70 @@
10521 +// Definitions for Fe-Pi Audio
10522 +/dts-v1/;
10523 +/plugin/;
10524 +
10525 +/ {
10526 + compatible = "brcm,bcm2835";
10527 +
10528 + fragment@0 {
10529 + target-path = "/";
10530 + __overlay__ {
10531 + sgtl5000_mclk: sgtl5000_mclk {
10532 + compatible = "fixed-clock";
10533 + #clock-cells = <0>;
10534 + clock-frequency = <12288000>;
10535 + clock-output-names = "sgtl5000-mclk";
10536 + };
10537 + };
10538 + };
10539 +
10540 + fragment@1 {
10541 + target = <&soc>;
10542 + __overlay__ {
10543 + reg_1v8: reg_1v8@0 {
10544 + compatible = "regulator-fixed";
10545 + regulator-name = "1V8";
10546 + regulator-min-microvolt = <1800000>;
10547 + regulator-max-microvolt = <1800000>;
10548 + regulator-always-on;
10549 + };
10550 + };
10551 + };
10552 +
10553 + fragment@2 {
10554 + target = <&i2c1>;
10555 + __overlay__ {
10556 + #address-cells = <1>;
10557 + #size-cells = <0>;
10558 + status = "okay";
10559 +
10560 + sgtl5000@0a {
10561 + #sound-dai-cells = <0>;
10562 + compatible = "fsl,sgtl5000";
10563 + reg = <0x0a>;
10564 + clocks = <&sgtl5000_mclk>;
10565 + micbias-resistor-k-ohms = <2>;
10566 + micbias-voltage-m-volts = <3000>;
10567 + VDDA-supply = <&vdd_3v3_reg>;
10568 + VDDIO-supply = <&vdd_3v3_reg>;
10569 + VDDD-supply = <&reg_1v8>;
10570 + status = "okay";
10571 + };
10572 + };
10573 + };
10574 +
10575 + fragment@3 {
10576 + target = <&i2s>;
10577 + __overlay__ {
10578 + status = "okay";
10579 + };
10580 + };
10581 +
10582 + fragment@4 {
10583 + target = <&sound>;
10584 + __overlay__ {
10585 + compatible = "fe-pi,fe-pi-audio";
10586 + i2s-controller = <&i2s>;
10587 + status = "okay";
10588 + };
10589 + };
10590 +};
10591 diff --git a/arch/arm/boot/dts/overlays/fsm-demo-overlay.dts b/arch/arm/boot/dts/overlays/fsm-demo-overlay.dts
10592 new file mode 100644
10593 index 000000000000..9e06e388e4d3
10594 --- /dev/null
10595 +++ b/arch/arm/boot/dts/overlays/fsm-demo-overlay.dts
10596 @@ -0,0 +1,104 @@
10597 +// Demo overlay for the gpio-fsm driver
10598 +/dts-v1/;
10599 +/plugin/;
10600 +
10601 +#include <dt-bindings/gpio/gpio-fsm.h>
10602 +
10603 +#define BUTTON1 GF_IP(0)
10604 +#define BUTTON2 GF_SW(0)
10605 +#define RED GF_OP(0) // GPIO7
10606 +#define AMBER GF_OP(1) // GPIO8
10607 +#define GREEN GF_OP(2) // GPIO25
10608 +
10609 +/{
10610 + compatible = "brcm,bcm2835";
10611 +
10612 + fragment@0 {
10613 + target-path = "/";
10614 + __overlay__ {
10615 + fsm_demo: fsm-demo {
10616 + compatible = "rpi,gpio-fsm";
10617 +
10618 + debug = <0>;
10619 + gpio-controller;
10620 + #gpio-cells = <2>;
10621 + num-soft-gpios = <1>;
10622 + gpio-line-names = "button2";
10623 + input-gpios = <&gpio 6 1>; // BUTTON1 (active-low)
10624 + output-gpios = <&gpio 7 0>, // RED
10625 + <&gpio 8 0>, // AMBER
10626 + <&gpio 25 0>; // GREEN
10627 + shutdown-timeout-ms = <2000>;
10628 +
10629 + start {
10630 + start_state;
10631 + set = <RED 1>, <AMBER 0>, <GREEN 0>;
10632 + start2 = <GF_DELAY 250>;
10633 + };
10634 +
10635 + start2 {
10636 + set = <RED 0>, <AMBER 1>;
10637 + go = <GF_DELAY 250>;
10638 + };
10639 +
10640 + go {
10641 + set = <RED 0>, <AMBER 0>, <GREEN 1>;
10642 + ready_wait = <BUTTON1 0>;
10643 + shutdown1 = <GF_SHUTDOWN 0>;
10644 + };
10645 +
10646 + ready_wait {
10647 + // Clear the soft GPIO
10648 + set = <BUTTON2 0>;
10649 + ready = <GF_DELAY 1000>;
10650 + shutdown1 = <GF_SHUTDOWN 0>;
10651 + };
10652 +
10653 + ready {
10654 + stopping = <BUTTON1 1>, <BUTTON2 1>;
10655 + shutdown1 = <GF_SHUTDOWN 0>;
10656 + };
10657 +
10658 + stopping {
10659 + set = <GREEN 0>, <AMBER 1>;
10660 + stopped = <GF_DELAY 1000>;
10661 + };
10662 +
10663 + stopped {
10664 + set = <AMBER 0>, <RED 1>;
10665 + get_set = <GF_DELAY 3000>;
10666 + shutdown1 = <GF_SHUTDOWN 0>;
10667 + };
10668 +
10669 + get_set {
10670 + set = <AMBER 1>;
10671 + go = <GF_DELAY 1000>;
10672 + };
10673 +
10674 + shutdown1 {
10675 + set = <RED 0>, <AMBER 0>, <GREEN 1>;
10676 + shutdown2 = <GF_SHUTDOWN 250>;
10677 + };
10678 +
10679 + shutdown2 {
10680 + set = <AMBER 1>, <GREEN 0>;
10681 + shutdown3 = <GF_SHUTDOWN 250>;
10682 + };
10683 +
10684 + shutdown3 {
10685 + set = <RED 1>, <AMBER 0>;
10686 + shutdown4 = <GF_SHUTDOWN 250>;
10687 + };
10688 +
10689 + shutdown4 {
10690 + shutdown_state;
10691 + set = <RED 0>;
10692 + };
10693 + };
10694 + };
10695 + };
10696 +
10697 + __overrides__ {
10698 + fsm_debug = <&fsm_demo>,"debug:0";
10699 + };
10700 +};
10701 diff --git a/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts b/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts
10702 new file mode 100644
10703 index 000000000000..afc9f034b5fc
10704 --- /dev/null
10705 +++ b/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts
10706 @@ -0,0 +1,119 @@
10707 +// Overlay for the PCM5122-based Ghost amplifier using gpio-fsm
10708 +/dts-v1/;
10709 +/plugin/;
10710 +
10711 +#include <dt-bindings/gpio/gpio-fsm.h>
10712 +
10713 +#define ENABLE GF_SW(0)
10714 +#define FAULT GF_IP(0) // GPIO5
10715 +#define RELAY1 GF_OP(0) // GPIO22
10716 +#define RELAY2 GF_OP(1) // GPIO23
10717 +
10718 +/ {
10719 + compatible = "brcm,bcm2835";
10720 +
10721 + fragment@0 {
10722 + target = <&i2s>;
10723 + __overlay__ {
10724 + status = "okay";
10725 + };
10726 + };
10727 +
10728 + fragment@1 {
10729 + target = <&i2c1>;
10730 + __overlay__ {
10731 + #address-cells = <1>;
10732 + #size-cells = <0>;
10733 + status = "okay";
10734 +
10735 + pcm5122@4c {
10736 + #sound-dai-cells = <0>;
10737 + compatible = "ti,pcm5122";
10738 + reg = <0x4c>;
10739 + AVDD-supply = <&vdd_3v3_reg>;
10740 + DVDD-supply = <&vdd_3v3_reg>;
10741 + CPVDD-supply = <&vdd_3v3_reg>;
10742 + status = "okay";
10743 + };
10744 + };
10745 + };
10746 +
10747 + fragment@2 {
10748 + target = <&sound>;
10749 + iqaudio_dac: __overlay__ {
10750 + compatible = "iqaudio,iqaudio-dac";
10751 + i2s-controller = <&i2s>;
10752 + mute-gpios = <&amp 0 0>;
10753 + iqaudio-dac,auto-mute-amp;
10754 + status = "okay";
10755 + };
10756 + };
10757 +
10758 + fragment@3 {
10759 + target-path = "/";
10760 + __overlay__ {
10761 + amp: ghost-amp {
10762 + compatible = "rpi,gpio-fsm";
10763 +
10764 + debug = <0>;
10765 + gpio-controller;
10766 + #gpio-cells = <2>;
10767 + num-soft-gpios = <1>;
10768 + gpio-line-names = "enable";
10769 + input-gpios = <&gpio 5 1>; // FAULT (active low)
10770 + output-gpios = <&gpio 22 0>, // RELAY1
10771 + <&gpio 23 0>; // RELAY2
10772 + shutdown-timeout-ms = <1000>;
10773 +
10774 + amp_off {
10775 + start_state;
10776 + shutdown_state;
10777 +
10778 + set = <RELAY2 0>,
10779 + <RELAY1 0>;
10780 + amp_on_1 = <ENABLE 1>;
10781 + fault = <FAULT 1>;
10782 + };
10783 +
10784 + amp_on_1 {
10785 + set = <RELAY1 1>;
10786 + amp_on = <GF_DELAY 1500>;
10787 + amp_off = <ENABLE 0>;
10788 + fault = <FAULT 1>;
10789 + };
10790 +
10791 + amp_on {
10792 + set = <RELAY2 1>;
10793 + amp_off_wait = <ENABLE 0>;
10794 + fault = <FAULT 1>;
10795 + };
10796 +
10797 + amp_off_wait {
10798 + amp_off_1 = <GF_DELAY (30*60*1000)>,
10799 + <GF_SHUTDOWN 0>;
10800 + amp_on = <ENABLE 1>;
10801 + fault = <FAULT 1>;
10802 + };
10803 +
10804 + amp_off_1 {
10805 + set = <RELAY2 0>;
10806 + amp_on = <ENABLE 1>;
10807 + amp_off = <GF_DELAY 100>;
10808 + fault = <FAULT 1>;
10809 + };
10810 +
10811 + // Keep this a distinct state to prevent
10812 + // changes and for the diagnostic output
10813 + fault {
10814 + set = <RELAY2 0>,
10815 + <RELAY1 0>;
10816 + shutdown_state;
10817 + };
10818 + };
10819 + };
10820 + };
10821 +
10822 + __overrides__ {
10823 + fsm_debug = <&amp>,"debug:0";
10824 + };
10825 +};
10826 diff --git a/arch/arm/boot/dts/overlays/goodix-overlay.dts b/arch/arm/boot/dts/overlays/goodix-overlay.dts
10827 new file mode 100644
10828 index 000000000000..a11d65f81c5e
10829 --- /dev/null
10830 +++ b/arch/arm/boot/dts/overlays/goodix-overlay.dts
10831 @@ -0,0 +1,46 @@
10832 +// Device tree overlay for I2C connected Goodix gt9271 multiple touch controller
10833 +/dts-v1/;
10834 +/plugin/;
10835 +
10836 +/ {
10837 + compatible = "brcm,bcm2835";
10838 +
10839 + fragment@0 {
10840 + target = <&gpio>;
10841 + __overlay__ {
10842 + goodix_pins: goodix_pins {
10843 + brcm,pins = <4 17>; // interrupt and reset
10844 + brcm,function = <0 0>; // in
10845 + brcm,pull = <2 2>; // pull-up
10846 + };
10847 + };
10848 + };
10849 +
10850 + fragment@1 {
10851 + target = <&i2c1>;
10852 + __overlay__ {
10853 + #address-cells = <1>;
10854 + #size-cells = <0>;
10855 + status = "okay";
10856 +
10857 + gt9271: gt9271@14 {
10858 + compatible = "goodix,gt9271";
10859 + reg = <0x14>;
10860 + pinctrl-names = "default";
10861 + pinctrl-0 = <&goodix_pins>;
10862 + interrupt-parent = <&gpio>;
10863 + interrupts = <4 2>; // high-to-low edge triggered
10864 + irq-gpios = <&gpio 4 0>; // Pin7 on GPIO header
10865 + reset-gpios = <&gpio 17 1>; // Pin11 on GPIO header
10866 + };
10867 + };
10868 + };
10869 +
10870 + __overrides__ {
10871 + interrupt = <&goodix_pins>,"brcm,pins:0",
10872 + <&gt9271>,"interrupts:0",
10873 + <&gt9271>,"irq-gpios:4";
10874 + reset = <&goodix_pins>,"brcm,pins:4",
10875 + <&gt9271>,"reset-gpios:4";
10876 + };
10877 +};
10878 diff --git a/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
10879 new file mode 100644
10880 index 000000000000..e443be1f9a0e
10881 --- /dev/null
10882 +++ b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
10883 @@ -0,0 +1,49 @@
10884 +// Definitions for Google voiceHAT v1 soundcard overlay
10885 +/dts-v1/;
10886 +/plugin/;
10887 +
10888 +/ {
10889 + compatible = "brcm,bcm2835";
10890 +
10891 + fragment@0 {
10892 + target = <&i2s>;
10893 + __overlay__ {
10894 + status = "okay";
10895 + };
10896 + };
10897 +
10898 + fragment@1 {
10899 + target = <&gpio>;
10900 + __overlay__ {
10901 + googlevoicehat_pins: googlevoicehat_pins {
10902 + brcm,pins = <16>;
10903 + brcm,function = <1>; /* out */
10904 + brcm,pull = <0>; /* up */
10905 + };
10906 + };
10907 + };
10908 +
10909 +
10910 + fragment@2 {
10911 + target-path = "/";
10912 + __overlay__ {
10913 + voicehat-codec {
10914 + #sound-dai-cells = <0>;
10915 + compatible = "google,voicehat";
10916 + pinctrl-names = "default";
10917 + pinctrl-0 = <&googlevoicehat_pins>;
10918 + sdmode-gpios= <&gpio 16 0>;
10919 + status = "okay";
10920 + };
10921 + };
10922 + };
10923 +
10924 + fragment@3 {
10925 + target = <&sound>;
10926 + __overlay__ {
10927 + compatible = "googlevoicehat,googlevoicehat-soundcard";
10928 + i2s-controller = <&i2s>;
10929 + status = "okay";
10930 + };
10931 + };
10932 +};
10933 diff --git a/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts b/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts
10934 new file mode 100644
10935 index 000000000000..77a7bbb41e3b
10936 --- /dev/null
10937 +++ b/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts
10938 @@ -0,0 +1,79 @@
10939 +/*
10940 + * Overlay for the Raspberry Pi GPIO Fan @ BCM GPIO12.
10941 + * References:
10942 + * - https://www.raspberrypi.org/forums/viewtopic.php?f=107&p=1367135#p1365084
10943 + *
10944 + * Optional parameters:
10945 + * - "gpiopin" - BCM number of the pin driving the fan, default 12 (GPIO12);
10946 + * - "temp" - CPU temperature at which fan is started in millicelsius, default 55000;
10947 + *
10948 + * Requires:
10949 + * - kernel configurations: CONFIG_SENSORS_GPIO_FAN=m;
10950 + * - kernel rebuild;
10951 + * - N-MOSFET connected to gpiopin, 2N7002-[https://en.wikipedia.org/wiki/2N7000];
10952 + * - DC Fan connected to N-MOSFET Drain terminal, a 12V fan is working fine and quite silently;
10953 + * [https://www.tme.eu/en/details/ee40101s1-999-a/dc12v-fans/sunon/ee40101s1-1000u-999/]
10954 + *
10955 + * ┌─────────────────────┐
10956 + * │Fan negative terminal│
10957 + * └┬────────────────────┘
10958 + * │D
10959 + * G │──┘
10960 + * [GPIO12]──────┤ │<─┐ 2N7002
10961 + * │──┤
10962 + * │S
10963 + * ─┴─
10964 + * GND
10965 + *
10966 + * Build:
10967 + * - `sudo dtc -W no-unit_address_vs_reg -@ -I dts -O dtb -o /boot/overlays/gpio-fan.dtbo gpio-fan-overlay.dts`
10968 + * Activate:
10969 + * - sudo nano /boot/config.txt add "dtoverlay=gpio-fan" or "dtoverlay=gpio-fan,gpiopin=12,temp=45000"
10970 + * or
10971 + * - sudo sh -c 'printf "\n# Enable PI GPIO-Fan Default\ndtoverlay=gpio-fan\n" >> /boot/config.txt'
10972 + * - sudo sh -c 'printf "\n# Enable PI GPIO-Fan Custom\ndtoverlay=gpio-fan,gpiopin=12,temp=45000\n" >> /boot/config.txt'
10973 + *
10974 + */
10975 +/dts-v1/;
10976 +/plugin/;
10977 +
10978 +/ {
10979 + compatible = "brcm,bcm2835";
10980 +
10981 + fragment@0 {
10982 + target-path = "/";
10983 + __overlay__ {
10984 + fan0: gpio-fan@0 {
10985 + compatible = "gpio-fan";
10986 + gpios = <&gpio 12 0>;
10987 + gpio-fan,speed-map = <0 0>,
10988 + <5000 1>;
10989 + #cooling-cells = <2>;
10990 + };
10991 + };
10992 + };
10993 +
10994 + fragment@1 {
10995 + target = <&cpu_thermal>;
10996 + polling-delay = <2000>; /* milliseconds */
10997 + __overlay__ {
10998 + trips {
10999 + cpu_hot: trip-point@0 {
11000 + temperature = <55000>; /* (millicelsius) Fan started at 55°C */
11001 + hysteresis = <10000>; /* (millicelsius) Fan stopped at 45°C */
11002 + type = "active";
11003 + };
11004 + };
11005 + cooling-maps {
11006 + map0 {
11007 + trip = <&cpu_hot>;
11008 + cooling-device = <&fan0 1 1>;
11009 + };
11010 + };
11011 + };
11012 + };
11013 + __overrides__ {
11014 + gpiopin = <&fan0>,"gpios:4", <&fan0>,"brcm,pins:0";
11015 + temp = <&cpu_hot>,"temperature:0";
11016 + };
11017 +};
11018 diff --git a/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
11019 new file mode 100644
11020 index 000000000000..162b6ce07dc9
11021 --- /dev/null
11022 +++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
11023 @@ -0,0 +1,49 @@
11024 +// Definitions for ir-gpio module
11025 +/dts-v1/;
11026 +/plugin/;
11027 +
11028 +/ {
11029 + compatible = "brcm,bcm2835";
11030 +
11031 + fragment@0 {
11032 + target-path = "/";
11033 + __overlay__ {
11034 + gpio_ir: ir-receiver@12 {
11035 + compatible = "gpio-ir-receiver";
11036 + pinctrl-names = "default";
11037 + pinctrl-0 = <&gpio_ir_pins>;
11038 +
11039 + // pin number, high or low
11040 + gpios = <&gpio 18 1>;
11041 +
11042 + // parameter for keymap name
11043 + linux,rc-map-name = "rc-rc6-mce";
11044 +
11045 + status = "okay";
11046 + };
11047 + };
11048 + };
11049 +
11050 + fragment@1 {
11051 + target = <&gpio>;
11052 + __overlay__ {
11053 + gpio_ir_pins: gpio_ir_pins@12 {
11054 + brcm,pins = <18>; // pin 18
11055 + brcm,function = <0>; // in
11056 + brcm,pull = <2>; // up
11057 + };
11058 + };
11059 + };
11060 +
11061 + __overrides__ {
11062 + // parameters
11063 + gpio_pin = <&gpio_ir>,"gpios:4", // pin number
11064 + <&gpio_ir>,"reg:0",
11065 + <&gpio_ir_pins>,"brcm,pins:0",
11066 + <&gpio_ir_pins>,"reg:0";
11067 + gpio_pull = <&gpio_ir_pins>,"brcm,pull:0"; // pull-up/down state
11068 + invert = <&gpio_ir>,"gpios:8"; // 0 = active high input
11069 +
11070 + rc-map-name = <&gpio_ir>,"linux,rc-map-name"; // default rc map
11071 + };
11072 +};
11073 diff --git a/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
11074 new file mode 100644
11075 index 000000000000..3625431b7560
11076 --- /dev/null
11077 +++ b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
11078 @@ -0,0 +1,36 @@
11079 +/dts-v1/;
11080 +/plugin/;
11081 +
11082 +/ {
11083 + compatible = "brcm,bcm2835";
11084 +
11085 + fragment@0 {
11086 + target = <&gpio>;
11087 + __overlay__ {
11088 + gpio_ir_tx_pins: gpio_ir_tx_pins@12 {
11089 + brcm,pins = <18>;
11090 + brcm,function = <1>; // out
11091 + };
11092 + };
11093 + };
11094 +
11095 + fragment@1 {
11096 + target-path = "/";
11097 + __overlay__ {
11098 + gpio_ir_tx: gpio-ir-transmitter@12 {
11099 + compatible = "gpio-ir-tx";
11100 + pinctrl-names = "default";
11101 + pinctrl-0 = <&gpio_ir_tx_pins>;
11102 + gpios = <&gpio 18 0>;
11103 + };
11104 + };
11105 + };
11106 +
11107 + __overrides__ {
11108 + gpio_pin = <&gpio_ir_tx>, "gpios:4", // pin number
11109 + <&gpio_ir_tx>, "reg:0",
11110 + <&gpio_ir_tx_pins>, "brcm,pins:0",
11111 + <&gpio_ir_tx_pins>, "reg:0";
11112 + invert = <&gpio_ir_tx>, "gpios:8"; // 1 = active low
11113 + };
11114 +};
11115 diff --git a/arch/arm/boot/dts/overlays/gpio-key-overlay.dts b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts
11116 new file mode 100644
11117 index 000000000000..2e7253d1d0ab
11118 --- /dev/null
11119 +++ b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts
11120 @@ -0,0 +1,48 @@
11121 +// Definitions for gpio-key module
11122 +/dts-v1/;
11123 +/plugin/;
11124 +
11125 +/ {
11126 + compatible = "brcm,bcm2835";
11127 +
11128 + fragment@0 {
11129 + // Configure the gpio pin controller
11130 + target = <&gpio>;
11131 + __overlay__ {
11132 + pin_state: button_pins@0 {
11133 + brcm,pins = <3>; // gpio number
11134 + brcm,function = <0>; // 0 = input, 1 = output
11135 + brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
11136 + };
11137 + };
11138 + };
11139 + fragment@1 {
11140 + target-path = "/";
11141 + __overlay__ {
11142 + button: button@0 {
11143 + compatible = "gpio-keys";
11144 + pinctrl-names = "default";
11145 + pinctrl-0 = <&pin_state>;
11146 + status = "okay";
11147 +
11148 + key: key {
11149 + linux,code = <116>;
11150 + gpios = <&gpio 3 1>;
11151 + label = "KEY_POWER";
11152 + };
11153 + };
11154 + };
11155 + };
11156 +
11157 + __overrides__ {
11158 + gpio = <&key>,"gpios:4",
11159 + <&button>,"reg:0",
11160 + <&pin_state>,"brcm,pins:0",
11161 + <&pin_state>,"reg:0";
11162 + label = <&key>,"label";
11163 + keycode = <&key>,"linux,code:0";
11164 + gpio_pull = <&pin_state>,"brcm,pull:0";
11165 + active_low = <&key>,"gpios:8";
11166 + };
11167 +
11168 +};
11169 diff --git a/arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts b/arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts
11170 new file mode 100755
11171 index 000000000000..96cbe80820b7
11172 --- /dev/null
11173 +++ b/arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts
11174 @@ -0,0 +1,14 @@
11175 +/dts-v1/;
11176 +/plugin/;
11177 +
11178 +/ {
11179 + compatible = "brcm,bcm2835";
11180 +
11181 + fragment@0 {
11182 + // Configure the gpio pin controller
11183 + target = <&gpio>;
11184 + __overlay__ {
11185 + interrupts = <255 255>, <2 18>;
11186 + };
11187 + };
11188 +};
11189 diff --git a/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts b/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
11190 new file mode 100644
11191 index 000000000000..55f9bff3a8f6
11192 --- /dev/null
11193 +++ b/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
11194 @@ -0,0 +1,14 @@
11195 +/dts-v1/;
11196 +/plugin/;
11197 +
11198 +/ {
11199 + compatible = "brcm,bcm2835";
11200 +
11201 + fragment@0 {
11202 + // Configure the gpio pin controller
11203 + target = <&gpio>;
11204 + __overlay__ {
11205 + interrupts;
11206 + };
11207 + };
11208 +};
11209 diff --git a/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
11210 new file mode 100644
11211 index 000000000000..416aa2bc797a
11212 --- /dev/null
11213 +++ b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
11214 @@ -0,0 +1,37 @@
11215 +// Definitions for gpio-poweroff module
11216 +/dts-v1/;
11217 +/plugin/;
11218 +
11219 +/ {
11220 + compatible = "brcm,bcm2835";
11221 +
11222 + fragment@0 {
11223 + target-path = "/";
11224 + __overlay__ {
11225 + power_ctrl: power_ctrl {
11226 + compatible = "gpio-poweroff";
11227 + gpios = <&gpio 26 0>;
11228 + force;
11229 + };
11230 + };
11231 + };
11232 +
11233 + fragment@1 {
11234 + target = <&gpio>;
11235 + __overlay__ {
11236 + power_ctrl_pins: power_ctrl_pins {
11237 + brcm,pins = <26>;
11238 + brcm,function = <1>; // out
11239 + };
11240 + };
11241 + };
11242 +
11243 + __overrides__ {
11244 + gpiopin = <&power_ctrl>,"gpios:4",
11245 + <&power_ctrl_pins>,"brcm,pins:0";
11246 + active_low = <&power_ctrl>,"gpios:8";
11247 + input = <&power_ctrl>,"input?";
11248 + export = <&power_ctrl>,"export?";
11249 + timeout_ms = <&power_ctrl>,"timeout-ms:0";
11250 + };
11251 +};
11252 diff --git a/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
11253 new file mode 100644
11254 index 000000000000..0a27595143ec
11255 --- /dev/null
11256 +++ b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
11257 @@ -0,0 +1,84 @@
11258 +// Definitions for gpio-poweroff module
11259 +/dts-v1/;
11260 +/plugin/;
11261 +
11262 +// This overlay sets up an input device that generates KEY_POWER events
11263 +// when a given GPIO pin changes. It defaults to using GPIO3, which can
11264 +// also be used to wake up (start) the Rpi again after shutdown.
11265 +// Raspberry Pi 1 Model B rev 1 can be wake up only by GPIO1 pin, so for
11266 +// these boards change default GPIO pin to 1 via gpio_pin parameter. Since
11267 +// wakeup is active-low, this defaults to active-low with a pullup
11268 +// enabled, but all of this can be changed using overlay parameters (but
11269 +// note that GPIO3 has an external pullup on at least some boards).
11270 +
11271 +/ {
11272 + compatible = "brcm,bcm2835";
11273 +
11274 + fragment@0 {
11275 + // Configure the gpio pin controller
11276 + target = <&gpio>;
11277 + __overlay__ {
11278 + // Define a pinctrl state, that sets up the gpio
11279 + // as an input with a pullup enabled. This does
11280 + // not take effect by itself, only when referenced
11281 + // by a "pinctrl client", as is done below. See:
11282 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
11283 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
11284 + pin_state: shutdown_button_pins {
11285 + brcm,pins = <3>; // gpio number
11286 + brcm,function = <0>; // 0 = input, 1 = output
11287 + brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
11288 + };
11289 + };
11290 + };
11291 + fragment@1 {
11292 + // Add a new device to the /soc devicetree node
11293 + target-path = "/soc";
11294 + __overlay__ {
11295 + shutdown_button {
11296 + // Let the gpio-keys driver handle this device. See:
11297 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/input/gpio-keys.txt
11298 + compatible = "gpio-keys";
11299 +
11300 + // Declare a single pinctrl state (referencing the one declared above) and name it
11301 + // default, so it is activated automatically.
11302 + pinctrl-names = "default";
11303 + pinctrl-0 = <&pin_state>;
11304 +
11305 + // Enable this device
11306 + status = "okay";
11307 +
11308 + // Define a single key, called "shutdown" that monitors the gpio and sends KEY_POWER
11309 + // (keycode 116, see
11310 + // https://github.com/torvalds/linux/blob/v4.12/include/uapi/linux/input-event-codes.h#L190)
11311 + button: shutdown {
11312 + label = "shutdown";
11313 + linux,code = <116>; // KEY_POWER
11314 + gpios = <&gpio 3 1>;
11315 + debounce-interval = <100>; // ms
11316 + };
11317 + };
11318 + };
11319 + };
11320 +
11321 + // This defines parameters that can be specified when loading
11322 + // the overlay. Each foo = line specifies one parameter, named
11323 + // foo. The rest of the specification gives properties where the
11324 + // parameter value is inserted into (changing the values above
11325 + // or adding new ones).
11326 + __overrides__ {
11327 + // Allow overriding the GPIO number.
11328 + gpio_pin = <&button>,"gpios:4",
11329 + <&pin_state>,"brcm,pins:0";
11330 +
11331 + // Allow changing the internal pullup/down state. 0 = none, 1 = pulldown, 2 = pullup
11332 + // Note that GPIO3 and GPIO2 are the I2c pins and have an external pullup (at least
11333 + // on some boards). Same applies for GPIO1 on Raspberry Pi 1 Model B rev 1.
11334 + gpio_pull = <&pin_state>,"brcm,pull:0";
11335 +
11336 + // Allow setting the active_low flag. 0 = active high, 1 = active low
11337 + active_low = <&button>,"gpios:8";
11338 + debounce = <&button>,"debounce-interval:0";
11339 + };
11340 +
11341 +};
11342 diff --git a/arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts b/arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts
11343 new file mode 100644
11344 index 000000000000..ee726669ff51
11345 --- /dev/null
11346 +++ b/arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts
11347 @@ -0,0 +1,46 @@
11348 +/dts-v1/;
11349 +/plugin/;
11350 +
11351 +/ {
11352 + compatible = "brcm,bcm2835";
11353 +
11354 + fragment@0 {
11355 + target-path = "/";
11356 + __overlay__ {
11357 + lcd_screen: auxdisplay {
11358 + compatible = "hit,hd44780";
11359 +
11360 + data-gpios = <&gpio 6 0>,
11361 + <&gpio 13 0>,
11362 + <&gpio 19 0>,
11363 + <&gpio 26 0>;
11364 + enable-gpios = <&gpio 21 0>;
11365 + rs-gpios = <&gpio 20 0>;
11366 +
11367 + display-height-chars = <2>;
11368 + display-width-chars = <16>;
11369 + };
11370 +
11371 + };
11372 + };
11373 +
11374 + fragment@1 {
11375 + target = <&lcd_screen>;
11376 + __dormant__ {
11377 + backlight-gpios = <&gpio 12 0>;
11378 + };
11379 + };
11380 +
11381 + __overrides__ {
11382 + pin_d4 = <&lcd_screen>,"data-gpios:4";
11383 + pin_d5 = <&lcd_screen>,"data-gpios:16";
11384 + pin_d6 = <&lcd_screen>,"data-gpios:28";
11385 + pin_d7 = <&lcd_screen>,"data-gpios:40";
11386 + pin_en = <&lcd_screen>,"enable-gpios:4";
11387 + pin_rs = <&lcd_screen>,"rs-gpios:4";
11388 + pin_bl = <0>,"+1", <&lcd_screen>,"backlight-gpios:4";
11389 + display_height = <&lcd_screen>,"display-height-chars:0";
11390 + display_width = <&lcd_screen>,"display-width-chars:0";
11391 + };
11392 +
11393 +};
11394 diff --git a/arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts b/arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts
11395 new file mode 100644
11396 index 000000000000..50b9a2665c80
11397 --- /dev/null
11398 +++ b/arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts
11399 @@ -0,0 +1,47 @@
11400 +/*
11401 + * Devicetree overlay for GPIO based backlight on/off capability.
11402 + *
11403 + * Use this if you have one of those HDMI displays whose backlight cannot be
11404 + * controlled via DPMS over HDMI and plan to do a little soldering to use an
11405 + * RPi gpio pin for on/off switching.
11406 + *
11407 + * See: https://www.waveshare.com/wiki/7inch_HDMI_LCD_(C)#Backlight_Control
11408 + *
11409 + */
11410 +/dts-v1/;
11411 +/plugin/;
11412 +
11413 +/ {
11414 + compatible = "brcm,bcm2835";
11415 +
11416 + fragment@1 {
11417 + target = <&gpio>;
11418 + __overlay__ {
11419 + hdmi_backlight_hwhack_gpio_pins: hdmi_backlight_hwhack_gpio_pins {
11420 + brcm,pins = <17>;
11421 + brcm,function = <1>; /* out */
11422 + };
11423 + };
11424 + };
11425 +
11426 + fragment@2 {
11427 + target-path = "/";
11428 + __overlay__ {
11429 + hdmi_backlight_hwhack_gpio: hdmi_backlight_hwhack_gpio {
11430 + compatible = "gpio-backlight";
11431 +
11432 + pinctrl-names = "default";
11433 + pinctrl-0 = <&hdmi_backlight_hwhack_gpio_pins>;
11434 +
11435 + gpios = <&gpio 17 0>;
11436 + default-on;
11437 + };
11438 + };
11439 + };
11440 +
11441 + __overrides__ {
11442 + gpio_pin = <&hdmi_backlight_hwhack_gpio>,"gpios:4",
11443 + <&hdmi_backlight_hwhack_gpio_pins>,"brcm,pins:0";
11444 + active_low = <&hdmi_backlight_hwhack_gpio>,"gpios:8";
11445 + };
11446 +};
11447 diff --git a/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
11448 new file mode 100644
11449 index 000000000000..142518ab348b
11450 --- /dev/null
11451 +++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
11452 @@ -0,0 +1,39 @@
11453 +// Definitions for HiFiBerry Amp/Amp+
11454 +/dts-v1/;
11455 +/plugin/;
11456 +
11457 +/ {
11458 + compatible = "brcm,bcm2835";
11459 +
11460 + fragment@0 {
11461 + target = <&i2s>;
11462 + __overlay__ {
11463 + status = "okay";
11464 + };
11465 + };
11466 +
11467 + fragment@1 {
11468 + target = <&i2c1>;
11469 + __overlay__ {
11470 + #address-cells = <1>;
11471 + #size-cells = <0>;
11472 + status = "okay";
11473 +
11474 + tas5713@1b {
11475 + #sound-dai-cells = <0>;
11476 + compatible = "ti,tas5713";
11477 + reg = <0x1b>;
11478 + status = "okay";
11479 + };
11480 + };
11481 + };
11482 +
11483 + fragment@2 {
11484 + target = <&sound>;
11485 + __overlay__ {
11486 + compatible = "hifiberry,hifiberry-amp";
11487 + i2s-controller = <&i2s>;
11488 + status = "okay";
11489 + };
11490 + };
11491 +};
11492 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
11493 new file mode 100644
11494 index 000000000000..ea8a6c8f36c0
11495 --- /dev/null
11496 +++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
11497 @@ -0,0 +1,34 @@
11498 +// Definitions for HiFiBerry DAC
11499 +/dts-v1/;
11500 +/plugin/;
11501 +
11502 +/ {
11503 + compatible = "brcm,bcm2835";
11504 +
11505 + fragment@0 {
11506 + target = <&i2s>;
11507 + __overlay__ {
11508 + status = "okay";
11509 + };
11510 + };
11511 +
11512 + fragment@1 {
11513 + target-path = "/";
11514 + __overlay__ {
11515 + pcm5102a-codec {
11516 + #sound-dai-cells = <0>;
11517 + compatible = "ti,pcm5102a";
11518 + status = "okay";
11519 + };
11520 + };
11521 + };
11522 +
11523 + fragment@2 {
11524 + target = <&sound>;
11525 + __overlay__ {
11526 + compatible = "hifiberry,hifiberry-dac";
11527 + i2s-controller = <&i2s>;
11528 + status = "okay";
11529 + };
11530 + };
11531 +};
11532 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
11533 new file mode 100644
11534 index 000000000000..ff19015ba656
11535 --- /dev/null
11536 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
11537 @@ -0,0 +1,65 @@
11538 +// Definitions for HiFiBerry DAC+
11539 +/dts-v1/;
11540 +/plugin/;
11541 +
11542 +/ {
11543 + compatible = "brcm,bcm2835";
11544 +
11545 + fragment@0 {
11546 + target-path = "/";
11547 + __overlay__ {
11548 + dacpro_osc: dacpro_osc {
11549 + compatible = "hifiberry,dacpro-clk";
11550 + #clock-cells = <0>;
11551 + };
11552 + };
11553 + };
11554 +
11555 + fragment@1 {
11556 + target = <&i2s>;
11557 + __overlay__ {
11558 + status = "okay";
11559 + };
11560 + };
11561 +
11562 + fragment@2 {
11563 + target = <&i2c1>;
11564 + __overlay__ {
11565 + #address-cells = <1>;
11566 + #size-cells = <0>;
11567 + status = "okay";
11568 +
11569 + pcm5122@4d {
11570 + #sound-dai-cells = <0>;
11571 + compatible = "ti,pcm5122";
11572 + reg = <0x4d>;
11573 + clocks = <&dacpro_osc>;
11574 + AVDD-supply = <&vdd_3v3_reg>;
11575 + DVDD-supply = <&vdd_3v3_reg>;
11576 + CPVDD-supply = <&vdd_3v3_reg>;
11577 + status = "okay";
11578 + };
11579 + hpamp: hpamp@60 {
11580 + compatible = "ti,tpa6130a2";
11581 + reg = <0x60>;
11582 + status = "disabled";
11583 + };
11584 + };
11585 + };
11586 +
11587 + fragment@3 {
11588 + target = <&sound>;
11589 + hifiberry_dacplus: __overlay__ {
11590 + compatible = "hifiberry,hifiberry-dacplus";
11591 + i2s-controller = <&i2s>;
11592 + status = "okay";
11593 + };
11594 + };
11595 +
11596 + __overrides__ {
11597 + 24db_digital_gain =
11598 + <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
11599 + slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
11600 + leds_off = <&hifiberry_dacplus>,"hifiberry-dacplus,leds_off?";
11601 + };
11602 +};
11603 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
11604 new file mode 100644
11605 index 000000000000..540563dec10f
11606 --- /dev/null
11607 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
11608 @@ -0,0 +1,72 @@
11609 +// Definitions for HiFiBerry DAC+ADC
11610 +/dts-v1/;
11611 +/plugin/;
11612 +
11613 +/ {
11614 + compatible = "brcm,bcm2835";
11615 +
11616 + fragment@0 {
11617 + target-path = "/";
11618 + __overlay__ {
11619 + dacpro_osc: dacpro_osc {
11620 + compatible = "hifiberry,dacpro-clk";
11621 + #clock-cells = <0>;
11622 + };
11623 + };
11624 + };
11625 +
11626 + fragment@1 {
11627 + target = <&i2s>;
11628 + __overlay__ {
11629 + status = "okay";
11630 + };
11631 + };
11632 +
11633 + fragment@2 {
11634 + target = <&i2c1>;
11635 + __overlay__ {
11636 + #address-cells = <1>;
11637 + #size-cells = <0>;
11638 + status = "okay";
11639 +
11640 + pcm_codec: pcm5122@4d {
11641 + #sound-dai-cells = <0>;
11642 + compatible = "ti,pcm5122";
11643 + reg = <0x4d>;
11644 + clocks = <&dacpro_osc>;
11645 + AVDD-supply = <&vdd_3v3_reg>;
11646 + DVDD-supply = <&vdd_3v3_reg>;
11647 + CPVDD-supply = <&vdd_3v3_reg>;
11648 + status = "okay";
11649 + };
11650 + };
11651 + };
11652 +
11653 + fragment@3 {
11654 + target-path = "/";
11655 + __overlay__ {
11656 + dmic {
11657 + #sound-dai-cells = <0>;
11658 + compatible = "dmic-codec";
11659 + num-channels = <2>;
11660 + status = "okay";
11661 + };
11662 + };
11663 + };
11664 +
11665 + fragment@4 {
11666 + target = <&sound>;
11667 + hifiberry_dacplusadc: __overlay__ {
11668 + compatible = "hifiberry,hifiberry-dacplusadc";
11669 + i2s-controller = <&i2s>;
11670 + status = "okay";
11671 + };
11672 + };
11673 +
11674 + __overrides__ {
11675 + 24db_digital_gain =
11676 + <&hifiberry_dacplusadc>,"hifiberry,24db_digital_gain?";
11677 + slave = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,slave?";
11678 + leds_off = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,leds_off?";
11679 + };
11680 +};
11681 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
11682 new file mode 100644
11683 index 000000000000..cafa2ccd7ff7
11684 --- /dev/null
11685 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
11686 @@ -0,0 +1,65 @@
11687 +// Definitions for HiFiBerry DAC+ADC PRO
11688 +/dts-v1/;
11689 +/plugin/;
11690 +
11691 +/ {
11692 + compatible = "brcm,bcm2835";
11693 +
11694 + fragment@0 {
11695 + target-path = "/";
11696 + __overlay__ {
11697 + dacpro_osc: dacpro_osc {
11698 + compatible = "hifiberry,dacpro-clk";
11699 + #clock-cells = <0>;
11700 + };
11701 + };
11702 + };
11703 +
11704 + fragment@1 {
11705 + target = <&i2s>;
11706 + __overlay__ {
11707 + status = "okay";
11708 + };
11709 + };
11710 +
11711 + fragment@2 {
11712 + target = <&i2c1>;
11713 + __overlay__ {
11714 + #address-cells = <1>;
11715 + #size-cells = <0>;
11716 + status = "okay";
11717 +
11718 + hb_dac: pcm5122@4d {
11719 + #sound-dai-cells = <0>;
11720 + compatible = "ti,pcm5122";
11721 + reg = <0x4d>;
11722 + clocks = <&dacpro_osc>;
11723 + status = "okay";
11724 + };
11725 + hb_adc: pcm186x@4a {
11726 + #sound-dai-cells = <0>;
11727 + compatible = "ti,pcm1863";
11728 + reg = <0x4a>;
11729 + clocks = <&dacpro_osc>;
11730 + status = "okay";
11731 + };
11732 + };
11733 + };
11734 +
11735 + fragment@3 {
11736 + target = <&sound>;
11737 + hifiberry_dacplusadcpro: __overlay__ {
11738 + compatible = "hifiberry,hifiberry-dacplusadcpro";
11739 + audio-codec = <&hb_dac &hb_adc>;
11740 + i2s-controller = <&i2s>;
11741 + status = "okay";
11742 + };
11743 + };
11744 +
11745 + __overrides__ {
11746 + 24db_digital_gain =
11747 + <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,24db_digital_gain?";
11748 + slave = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,slave?";
11749 + leds_off = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,leds_off?";
11750 + };
11751 +};
11752 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
11753 new file mode 100644
11754 index 000000000000..63432e8b983f
11755 --- /dev/null
11756 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
11757 @@ -0,0 +1,34 @@
11758 +// Definitions for hifiberry DAC+DSP soundcard overlay
11759 +/dts-v1/;
11760 +/plugin/;
11761 +
11762 +/ {
11763 + compatible = "brcm,bcm2835";
11764 +
11765 + fragment@0 {
11766 + target = <&i2s>;
11767 + __overlay__ {
11768 + status = "okay";
11769 + };
11770 + };
11771 +
11772 + fragment@1 {
11773 + target-path = "/";
11774 + __overlay__ {
11775 + dacplusdsp-codec {
11776 + #sound-dai-cells = <0>;
11777 + compatible = "hifiberry,dacplusdsp";
11778 + status = "okay";
11779 + };
11780 + };
11781 + };
11782 +
11783 + fragment@2 {
11784 + target = <&sound>;
11785 + __overlay__ {
11786 + compatible = "hifiberrydacplusdsp,hifiberrydacplusdsp-soundcard";
11787 + i2s-controller = <&i2s>;
11788 + status = "okay";
11789 + };
11790 + };
11791 +};
11792 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
11793 new file mode 100644
11794 index 000000000000..c5583e010339
11795 --- /dev/null
11796 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
11797 @@ -0,0 +1,106 @@
11798 +// Definitions for HiFiBerry DAC+ HD
11799 +/dts-v1/;
11800 +/plugin/;
11801 +
11802 +#include <dt-bindings/gpio/gpio.h>
11803 +
11804 +/ {
11805 + compatible = "brcm,bcm2835";
11806 +
11807 + fragment@0 {
11808 + target-path = "/";
11809 + __overlay__ {
11810 + dachd_osc: pll_dachd_osc {
11811 + compatible = "hifiberry,dachd-clk";
11812 + #clock-cells = <0>;
11813 + };
11814 + };
11815 + };
11816 +
11817 + fragment@1 {
11818 + target = <&i2s>;
11819 + __overlay__ {
11820 + status = "okay";
11821 + };
11822 + };
11823 +
11824 + fragment@2 {
11825 + target = <&i2c1>;
11826 + __overlay__ {
11827 + #address-cells = <1>;
11828 + #size-cells = <0>;
11829 + status = "okay";
11830 +
11831 + pcm1792a@4c {
11832 + compatible = "ti,pcm1792a";
11833 + #sound-dai-cells = <0>;
11834 + #clock-cells = <0>;
11835 + clocks = <&dachd_osc>;
11836 + reg = <0x4c>;
11837 + status = "okay";
11838 + };
11839 + pll: pll@62 {
11840 + compatible = "hifiberry,dachd-clk";
11841 + #clock-cells = <0>;
11842 + reg = <0x62>;
11843 + clocks = <&dachd_osc>;
11844 + status = "okay";
11845 + common_pll_regs = [
11846 + 02 53 03 00 07 20 0F 00
11847 + 10 0D 11 1D 12 0D 13 8C
11848 + 14 8C 15 8C 16 8C 17 8C
11849 + 18 2A 1C 00 1D 0F 1F 00
11850 + 2A 00 2C 00 2F 00 30 00
11851 + 31 00 32 00 34 00 37 00
11852 + 38 00 39 00 3A 00 3B 01
11853 + 3E 00 3F 00 40 00 41 00
11854 + 5A 00 5B 00 95 00 96 00
11855 + 97 00 98 00 99 00 9A 00
11856 + 9B 00 A2 00 A3 00 A4 00
11857 + B7 92 ];
11858 + 192k_pll_regs = [
11859 + 1A 0C 1B 35 1E F0 20 09
11860 + 21 50 2B 02 2D 10 2E 40
11861 + 33 01 35 22 36 80 3C 22
11862 + 3D 46 ];
11863 + 96k_pll_regs = [
11864 + 1A 0C 1B 35 1E F0 20 09
11865 + 21 50 2B 02 2D 10 2E 40
11866 + 33 01 35 47 36 00 3C 32
11867 + 3D 46 ];
11868 + 48k_pll_regs = [
11869 + 1A 0C 1B 35 1E F0 20 09
11870 + 21 50 2B 02 2D 10 2E 40
11871 + 33 01 35 90 36 00 3C 42
11872 + 3D 46 ];
11873 + 176k4_pll_regs = [
11874 + 1A 3D 1B 09 1E F3 20 13
11875 + 21 75 2B 04 2D 11 2E E0
11876 + 33 02 35 25 36 C0 3C 22
11877 + 3D 7A ];
11878 + 88k2_pll_regs = [
11879 + 1A 3D 1B 09 1E F3 20 13
11880 + 21 75 2B 04 2D 11 2E E0
11881 + 33 01 35 4D 36 80 3C 32
11882 + 3D 7A ];
11883 + 44k1_pll_regs = [
11884 + 1A 3D 1B 09 1E F3 20 13
11885 + 21 75 2B 04 2D 11 2E E0
11886 + 33 01 35 9D 36 00 3C 42
11887 + 3D 7A ];
11888 + };
11889 + };
11890 + };
11891 +
11892 + fragment@3 {
11893 + target = <&sound>;
11894 + __overlay__ {
11895 + compatible = "hifiberry,hifiberry-dacplushd";
11896 + i2s-controller = <&i2s>;
11897 + clocks = <&pll 0>;
11898 + reset-gpio = <&gpio 16 GPIO_ACTIVE_LOW>;
11899 + status = "okay";
11900 + };
11901 + };
11902 +
11903 +};
11904 diff --git a/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
11905 new file mode 100644
11906 index 000000000000..a2309a50e8d8
11907 --- /dev/null
11908 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
11909 @@ -0,0 +1,41 @@
11910 +// Definitions for HiFiBerry Digi
11911 +/dts-v1/;
11912 +/plugin/;
11913 +
11914 +/ {
11915 + compatible = "brcm,bcm2835";
11916 +
11917 + fragment@0 {
11918 + target = <&i2s>;
11919 + __overlay__ {
11920 + status = "okay";
11921 + };
11922 + };
11923 +
11924 + fragment@1 {
11925 + target = <&i2c1>;
11926 + __overlay__ {
11927 + #address-cells = <1>;
11928 + #size-cells = <0>;
11929 + status = "okay";
11930 +
11931 + wm8804@3b {
11932 + #sound-dai-cells = <0>;
11933 + compatible = "wlf,wm8804";
11934 + reg = <0x3b>;
11935 + PVDD-supply = <&vdd_3v3_reg>;
11936 + DVDD-supply = <&vdd_3v3_reg>;
11937 + status = "okay";
11938 + };
11939 + };
11940 + };
11941 +
11942 + fragment@2 {
11943 + target = <&sound>;
11944 + __overlay__ {
11945 + compatible = "hifiberry,hifiberry-digi";
11946 + i2s-controller = <&i2s>;
11947 + status = "okay";
11948 + };
11949 + };
11950 +};
11951 diff --git a/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
11952 new file mode 100644
11953 index 000000000000..83de602e76ba
11954 --- /dev/null
11955 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
11956 @@ -0,0 +1,43 @@
11957 +// Definitions for HiFiBerry Digi Pro
11958 +/dts-v1/;
11959 +/plugin/;
11960 +
11961 +/ {
11962 + compatible = "brcm,bcm2835";
11963 +
11964 + fragment@0 {
11965 + target = <&i2s>;
11966 + __overlay__ {
11967 + status = "okay";
11968 + };
11969 + };
11970 +
11971 + fragment@1 {
11972 + target = <&i2c1>;
11973 + __overlay__ {
11974 + #address-cells = <1>;
11975 + #size-cells = <0>;
11976 + status = "okay";
11977 +
11978 + wm8804@3b {
11979 + #sound-dai-cells = <0>;
11980 + compatible = "wlf,wm8804";
11981 + reg = <0x3b>;
11982 + PVDD-supply = <&vdd_3v3_reg>;
11983 + DVDD-supply = <&vdd_3v3_reg>;
11984 + status = "okay";
11985 + };
11986 + };
11987 + };
11988 +
11989 + fragment@2 {
11990 + target = <&sound>;
11991 + __overlay__ {
11992 + compatible = "hifiberry,hifiberry-digi";
11993 + i2s-controller = <&i2s>;
11994 + status = "okay";
11995 + clock44-gpio = <&gpio 5 0>;
11996 + clock48-gpio = <&gpio 6 0>;
11997 + };
11998 + };
11999 +};
12000 diff --git a/arch/arm/boot/dts/overlays/highperi-overlay.dts b/arch/arm/boot/dts/overlays/highperi-overlay.dts
12001 new file mode 100644
12002 index 000000000000..46cb76c2d34f
12003 --- /dev/null
12004 +++ b/arch/arm/boot/dts/overlays/highperi-overlay.dts
12005 @@ -0,0 +1,63 @@
12006 +/*
12007 + * highperi.dts
12008 + */
12009 +
12010 +/dts-v1/;
12011 +/plugin/;
12012 +
12013 +/ {
12014 + compatible = "brcm,bcm2711";
12015 +
12016 + fragment@0 {
12017 + target = <&soc>;
12018 + #address-cells = <2>;
12019 + #size-cells = <1>;
12020 +
12021 + __overlay__ {
12022 + #address-cells = <1>;
12023 + #size-cells = <1>;
12024 + ranges = <0x7c000000 0x4 0x7c000000 0x04000000>,
12025 + <0x40000000 0x4 0xc0000000 0x00800000>;
12026 + };
12027 + };
12028 +
12029 + fragment@1 {
12030 + target = <&scb>;
12031 + #address-cells = <2>;
12032 + #size-cells = <1>;
12033 +
12034 + __overlay__ {
12035 + #address-cells = <2>;
12036 + #size-cells = <2>;
12037 + ranges = <0x0 0x7c000000 0x4 0x7c000000 0x0 0x04000000>,
12038 + <0x0 0x40000000 0x4 0xc0000000 0x0 0x00800000>,
12039 + <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>;
12040 + dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x2 0x00000000>;
12041 + };
12042 + };
12043 +
12044 + fragment@2 {
12045 + target = <&v3dbus>;
12046 + #address-cells = <2>;
12047 + #size-cells = <1>;
12048 +
12049 + __overlay__ {
12050 + #address-cells = <1>;
12051 + #size-cells = <2>;
12052 + ranges = <0x7c500000 0x4 0x7c500000 0x0 0x03300000>,
12053 + <0x40000000 0x4 0xc0000000 0x0 0x00800000>;
12054 + };
12055 + };
12056 +
12057 + fragment@3 {
12058 + target = <&emmc2bus>;
12059 + #address-cells = <2>;
12060 + #size-cells = <1>;
12061 +
12062 + __overlay__ {
12063 + #address-cells = <2>;
12064 + #size-cells = <1>;
12065 + ranges = <0x0 0x7e000000 0x4 0x7e000000 0x01800000>;
12066 + };
12067 + };
12068 +};
12069 diff --git a/arch/arm/boot/dts/overlays/hy28a-overlay.dts b/arch/arm/boot/dts/overlays/hy28a-overlay.dts
12070 new file mode 100644
12071 index 000000000000..5843a5e9c86a
12072 --- /dev/null
12073 +++ b/arch/arm/boot/dts/overlays/hy28a-overlay.dts
12074 @@ -0,0 +1,93 @@
12075 +/*
12076 + * Device Tree overlay for HY28A display
12077 + *
12078 + */
12079 +
12080 +/dts-v1/;
12081 +/plugin/;
12082 +
12083 +/ {
12084 + compatible = "brcm,bcm2835";
12085 +
12086 + fragment@0 {
12087 + target = <&spi0>;
12088 + __overlay__ {
12089 + status = "okay";
12090 + };
12091 + };
12092 +
12093 + fragment@1 {
12094 + target = <&spidev0>;
12095 + __overlay__ {
12096 + status = "disabled";
12097 + };
12098 + };
12099 +
12100 + fragment@2 {
12101 + target = <&spidev1>;
12102 + __overlay__ {
12103 + status = "disabled";
12104 + };
12105 + };
12106 +
12107 + fragment@3 {
12108 + target = <&gpio>;
12109 + __overlay__ {
12110 + hy28a_pins: hy28a_pins {
12111 + brcm,pins = <17 25 18>;
12112 + brcm,function = <0 1 1>; /* in out out */
12113 + };
12114 + };
12115 + };
12116 +
12117 + fragment@4 {
12118 + target = <&spi0>;
12119 + __overlay__ {
12120 + /* needed to avoid dtc warning */
12121 + #address-cells = <1>;
12122 + #size-cells = <0>;
12123 +
12124 + hy28a: hy28a@0{
12125 + compatible = "ilitek,ili9320";
12126 + reg = <0>;
12127 + pinctrl-names = "default";
12128 + pinctrl-0 = <&hy28a_pins>;
12129 +
12130 + spi-max-frequency = <32000000>;
12131 + spi-cpol;
12132 + spi-cpha;
12133 + rotate = <270>;
12134 + bgr;
12135 + fps = <50>;
12136 + buswidth = <8>;
12137 + startbyte = <0x70>;
12138 + reset-gpios = <&gpio 25 1>;
12139 + led-gpios = <&gpio 18 1>;
12140 + debug = <0>;
12141 + };
12142 +
12143 + hy28a_ts: hy28a-ts@1 {
12144 + compatible = "ti,ads7846";
12145 + reg = <1>;
12146 +
12147 + spi-max-frequency = <2000000>;
12148 + interrupts = <17 2>; /* high-to-low edge triggered */
12149 + interrupt-parent = <&gpio>;
12150 + pendown-gpio = <&gpio 17 0>;
12151 + ti,x-plate-ohms = /bits/ 16 <100>;
12152 + ti,pressure-max = /bits/ 16 <255>;
12153 + };
12154 + };
12155 + };
12156 + __overrides__ {
12157 + speed = <&hy28a>,"spi-max-frequency:0";
12158 + rotate = <&hy28a>,"rotate:0";
12159 + fps = <&hy28a>,"fps:0";
12160 + debug = <&hy28a>,"debug:0";
12161 + xohms = <&hy28a_ts>,"ti,x-plate-ohms;0";
12162 + resetgpio = <&hy28a>,"reset-gpios:4",
12163 + <&hy28a_pins>, "brcm,pins:4";
12164 + ledgpio = <&hy28a>,"led-gpios:4",
12165 + <&hy28a_pins>, "brcm,pins:8";
12166 + };
12167 +};
12168 diff --git a/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts b/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts
12169 new file mode 100644
12170 index 000000000000..95bfb1eadc20
12171 --- /dev/null
12172 +++ b/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts
12173 @@ -0,0 +1,152 @@
12174 +/*
12175 + * Device Tree overlay for HY28b display shield by Texy.
12176 + * Modified for 2017 version with ILI9325 D chip
12177 + */
12178 +
12179 +/dts-v1/;
12180 +/plugin/;
12181 +
12182 +/ {
12183 + compatible = "brcm,bcm2835";
12184 +
12185 + fragment@0 {
12186 + target = <&spi0>;
12187 + __overlay__ {
12188 + status = "okay";
12189 + };
12190 + };
12191 +
12192 + fragment@1 {
12193 + target = <&spidev0>;
12194 + __overlay__ {
12195 + status = "disabled";
12196 + };
12197 + };
12198 +
12199 + fragment@2 {
12200 + target = <&spidev1>;
12201 + __overlay__ {
12202 + status = "disabled";
12203 + };
12204 + };
12205 +
12206 + fragment@3 {
12207 + target = <&gpio>;
12208 + __overlay__ {
12209 + hy28b_pins: hy28b_pins {
12210 + brcm,pins = <17 25 18>;
12211 + brcm,function = <0 1 1>; /* in out out */
12212 + };
12213 + };
12214 + };
12215 +
12216 + fragment@4 {
12217 + target = <&spi0>;
12218 + __overlay__ {
12219 + /* needed to avoid dtc warning */
12220 + #address-cells = <1>;
12221 + #size-cells = <0>;
12222 +
12223 + hy28b: hy28b@0{
12224 + compatible = "ilitek,ili9325";
12225 + reg = <0>;
12226 + pinctrl-names = "default";
12227 + pinctrl-0 = <&hy28b_pins>;
12228 +
12229 + spi-max-frequency = <48000000>;
12230 + spi-cpol;
12231 + spi-cpha;
12232 + rotate = <270>;
12233 + bgr;
12234 + fps = <50>;
12235 + buswidth = <8>;
12236 + startbyte = <0x70>;
12237 + reset-gpios = <&gpio 25 1>;
12238 + led-gpios = <&gpio 18 1>;
12239 +
12240 + init = <0x10000e5 0x78F0
12241 + 0x1000001 0x0100
12242 + 0x1000002 0x0700
12243 + 0x1000003 0x1030
12244 + 0x1000004 0x0000
12245 + 0x1000008 0x0207
12246 + 0x1000009 0x0000
12247 + 0x100000a 0x0000
12248 + 0x100000c 0x0000
12249 + 0x100000d 0x0000
12250 + 0x100000f 0x0000
12251 + 0x1000010 0x0000
12252 + 0x1000011 0x0007
12253 + 0x1000012 0x0000
12254 + 0x1000013 0x0000
12255 + 0x1000007 0x0001
12256 + 0x2000032
12257 + 0x2000032
12258 + 0x2000032
12259 + 0x2000032
12260 + 0x1000010 0x1090
12261 + 0x1000011 0x0227
12262 + 0x2000032
12263 + 0x1000012 0x001f
12264 + 0x2000032
12265 + 0x1000013 0x1500
12266 + 0x1000029 0x0027
12267 + 0x100002b 0x000d
12268 + 0x2000032
12269 + 0x1000020 0x0000
12270 + 0x1000021 0x0000
12271 + 0x2000032
12272 + 0x1000030 0x0000
12273 + 0x1000031 0x0707
12274 + 0x1000032 0x0307
12275 + 0x1000035 0x0200
12276 + 0x1000036 0x0008
12277 + 0x1000037 0x0004
12278 + 0x1000038 0x0000
12279 + 0x1000039 0x0707
12280 + 0x100003c 0x0002
12281 + 0x100003d 0x1d04
12282 + 0x1000050 0x0000
12283 + 0x1000051 0x00ef
12284 + 0x1000052 0x0000
12285 + 0x1000053 0x013f
12286 + 0x1000060 0xa700
12287 + 0x1000061 0x0001
12288 + 0x100006a 0x0000
12289 + 0x1000080 0x0000
12290 + 0x1000081 0x0000
12291 + 0x1000082 0x0000
12292 + 0x1000083 0x0000
12293 + 0x1000084 0x0000
12294 + 0x1000085 0x0000
12295 + 0x1000090 0x0010
12296 + 0x1000092 0x0600
12297 + 0x1000007 0x0133>;
12298 + debug = <0>;
12299 + };
12300 +
12301 + hy28b_ts: hy28b-ts@1 {
12302 + compatible = "ti,ads7846";
12303 + reg = <1>;
12304 +
12305 + spi-max-frequency = <2000000>;
12306 + interrupts = <17 2>; /* high-to-low edge triggered */
12307 + interrupt-parent = <&gpio>;
12308 + pendown-gpio = <&gpio 17 0>;
12309 + ti,x-plate-ohms = /bits/ 16 <100>;
12310 + ti,pressure-max = /bits/ 16 <255>;
12311 + };
12312 + };
12313 + };
12314 + __overrides__ {
12315 + speed = <&hy28b>,"spi-max-frequency:0";
12316 + rotate = <&hy28b>,"rotate:0";
12317 + fps = <&hy28b>,"fps:0";
12318 + debug = <&hy28b>,"debug:0";
12319 + xohms = <&hy28b_ts>,"ti,x-plate-ohms;0";
12320 + resetgpio = <&hy28b>,"reset-gpios:4",
12321 + <&hy28b_pins>, "brcm,pins:4";
12322 + ledgpio = <&hy28b>,"led-gpios:4",
12323 + <&hy28b_pins>, "brcm,pins:8";
12324 + };
12325 +};
12326 diff --git a/arch/arm/boot/dts/overlays/hy28b-overlay.dts b/arch/arm/boot/dts/overlays/hy28b-overlay.dts
12327 new file mode 100644
12328 index 000000000000..9edd0848d555
12329 --- /dev/null
12330 +++ b/arch/arm/boot/dts/overlays/hy28b-overlay.dts
12331 @@ -0,0 +1,148 @@
12332 +/*
12333 + * Device Tree overlay for HY28b display shield by Texy
12334 + *
12335 + */
12336 +
12337 +/dts-v1/;
12338 +/plugin/;
12339 +
12340 +/ {
12341 + compatible = "brcm,bcm2835";
12342 +
12343 + fragment@0 {
12344 + target = <&spi0>;
12345 + __overlay__ {
12346 + status = "okay";
12347 + };
12348 + };
12349 +
12350 + fragment@1 {
12351 + target = <&spidev0>;
12352 + __overlay__ {
12353 + status = "disabled";
12354 + };
12355 + };
12356 +
12357 + fragment@2 {
12358 + target = <&spidev1>;
12359 + __overlay__ {
12360 + status = "disabled";
12361 + };
12362 + };
12363 +
12364 + fragment@3 {
12365 + target = <&gpio>;
12366 + __overlay__ {
12367 + hy28b_pins: hy28b_pins {
12368 + brcm,pins = <17 25 18>;
12369 + brcm,function = <0 1 1>; /* in out out */
12370 + };
12371 + };
12372 + };
12373 +
12374 + fragment@4 {
12375 + target = <&spi0>;
12376 + __overlay__ {
12377 + /* needed to avoid dtc warning */
12378 + #address-cells = <1>;
12379 + #size-cells = <0>;
12380 +
12381 + hy28b: hy28b@0{
12382 + compatible = "ilitek,ili9325";
12383 + reg = <0>;
12384 + pinctrl-names = "default";
12385 + pinctrl-0 = <&hy28b_pins>;
12386 +
12387 + spi-max-frequency = <48000000>;
12388 + spi-cpol;
12389 + spi-cpha;
12390 + rotate = <270>;
12391 + bgr;
12392 + fps = <50>;
12393 + buswidth = <8>;
12394 + startbyte = <0x70>;
12395 + reset-gpios = <&gpio 25 1>;
12396 + led-gpios = <&gpio 18 1>;
12397 +
12398 + gamma = "04 1F 4 7 7 0 7 7 6 0\n0F 00 1 7 4 0 0 0 6 7";
12399 +
12400 + init = <0x10000e7 0x0010
12401 + 0x1000000 0x0001
12402 + 0x1000001 0x0100
12403 + 0x1000002 0x0700
12404 + 0x1000003 0x1030
12405 + 0x1000004 0x0000
12406 + 0x1000008 0x0207
12407 + 0x1000009 0x0000
12408 + 0x100000a 0x0000
12409 + 0x100000c 0x0001
12410 + 0x100000d 0x0000
12411 + 0x100000f 0x0000
12412 + 0x1000010 0x0000
12413 + 0x1000011 0x0007
12414 + 0x1000012 0x0000
12415 + 0x1000013 0x0000
12416 + 0x2000032
12417 + 0x1000010 0x1590
12418 + 0x1000011 0x0227
12419 + 0x2000032
12420 + 0x1000012 0x009c
12421 + 0x2000032
12422 + 0x1000013 0x1900
12423 + 0x1000029 0x0023
12424 + 0x100002b 0x000e
12425 + 0x2000032
12426 + 0x1000020 0x0000
12427 + 0x1000021 0x0000
12428 + 0x2000032
12429 + 0x1000050 0x0000
12430 + 0x1000051 0x00ef
12431 + 0x1000052 0x0000
12432 + 0x1000053 0x013f
12433 + 0x1000060 0xa700
12434 + 0x1000061 0x0001
12435 + 0x100006a 0x0000
12436 + 0x1000080 0x0000
12437 + 0x1000081 0x0000
12438 + 0x1000082 0x0000
12439 + 0x1000083 0x0000
12440 + 0x1000084 0x0000
12441 + 0x1000085 0x0000
12442 + 0x1000090 0x0010
12443 + 0x1000092 0x0000
12444 + 0x1000093 0x0003
12445 + 0x1000095 0x0110
12446 + 0x1000097 0x0000
12447 + 0x1000098 0x0000
12448 + 0x1000007 0x0133
12449 + 0x1000020 0x0000
12450 + 0x1000021 0x0000
12451 + 0x2000064>;
12452 + debug = <0>;
12453 + };
12454 +
12455 + hy28b_ts: hy28b-ts@1 {
12456 + compatible = "ti,ads7846";
12457 + reg = <1>;
12458 +
12459 + spi-max-frequency = <2000000>;
12460 + interrupts = <17 2>; /* high-to-low edge triggered */
12461 + interrupt-parent = <&gpio>;
12462 + pendown-gpio = <&gpio 17 0>;
12463 + ti,x-plate-ohms = /bits/ 16 <100>;
12464 + ti,pressure-max = /bits/ 16 <255>;
12465 + };
12466 + };
12467 + };
12468 + __overrides__ {
12469 + speed = <&hy28b>,"spi-max-frequency:0";
12470 + rotate = <&hy28b>,"rotate:0";
12471 + fps = <&hy28b>,"fps:0";
12472 + debug = <&hy28b>,"debug:0";
12473 + xohms = <&hy28b_ts>,"ti,x-plate-ohms;0";
12474 + resetgpio = <&hy28b>,"reset-gpios:4",
12475 + <&hy28b_pins>, "brcm,pins:4";
12476 + ledgpio = <&hy28b>,"led-gpios:4",
12477 + <&hy28b_pins>, "brcm,pins:8";
12478 + };
12479 +};
12480 diff --git a/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts b/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
12481 new file mode 100644
12482 index 000000000000..0c4cff354674
12483 --- /dev/null
12484 +++ b/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
12485 @@ -0,0 +1,39 @@
12486 +// Definitions for I-Sabre Q2M
12487 +/dts-v1/;
12488 +/plugin/;
12489 +
12490 +/ {
12491 + compatible = "brcm,bcm2835";
12492 +
12493 + fragment@0 {
12494 + target = <&sound>;
12495 + frag0: __overlay__ {
12496 + compatible = "audiophonics,i-sabre-q2m";
12497 + i2s-controller = <&i2s>;
12498 + status = "okay";
12499 + };
12500 + };
12501 +
12502 + fragment@1 {
12503 + target = <&i2s>;
12504 + __overlay__ {
12505 + status = "okay";
12506 + };
12507 + };
12508 +
12509 + fragment@2 {
12510 + target = <&i2c1>;
12511 + __overlay__ {
12512 + #address-cells = <1>;
12513 + #size-cells = <0>;
12514 + status = "okay";
12515 +
12516 + i-sabre-codec@48 {
12517 + #sound-dai-cells = <0>;
12518 + compatible = "audiophonics,i-sabre-codec";
12519 + reg = <0x48>;
12520 + status = "okay";
12521 + };
12522 + };
12523 + };
12524 +};
12525 diff --git a/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts b/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
12526 new file mode 100644
12527 index 000000000000..8204b6b3aef8
12528 --- /dev/null
12529 +++ b/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
12530 @@ -0,0 +1,13 @@
12531 +/dts-v1/;
12532 +/plugin/;
12533 +
12534 +/{
12535 + compatible = "brcm,bcm2835";
12536 +
12537 + fragment@0 {
12538 + target = <&i2c_arm>;
12539 + __overlay__ {
12540 + compatible = "brcm,bcm2708-i2c";
12541 + };
12542 + };
12543 +};
12544 diff --git a/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
12545 new file mode 100644
12546 index 000000000000..63231b5d7c0c
12547 --- /dev/null
12548 +++ b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
12549 @@ -0,0 +1,47 @@
12550 +// Overlay for i2c_gpio bitbanging host bus.
12551 +/dts-v1/;
12552 +/plugin/;
12553 +
12554 +#include <dt-bindings/gpio/gpio.h>
12555 +
12556 +/ {
12557 + compatible = "brcm,bcm2835";
12558 +
12559 + fragment@0 {
12560 + target-path = "/";
12561 +
12562 + __overlay__ {
12563 + i2c_gpio: i2c@0 {
12564 + reg = <0xffffffff>;
12565 + compatible = "i2c-gpio";
12566 + gpios = <&gpio 23 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* sda */
12567 + &gpio 24 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* scl */
12568 + >;
12569 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
12570 + #address-cells = <1>;
12571 + #size-cells = <0>;
12572 + };
12573 + };
12574 + };
12575 +
12576 + fragment@1 {
12577 + target-path = "/aliases";
12578 + __overlay__ {
12579 + i2c_gpio = "/i2c@0";
12580 + };
12581 + };
12582 +
12583 + fragment@2 {
12584 + target-path = "/__symbols__";
12585 + __overlay__ {
12586 + i2c_gpio = "/i2c@0";
12587 + };
12588 + };
12589 +
12590 + __overrides__ {
12591 + i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
12592 + i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
12593 + i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
12594 + bus = <&i2c_gpio>, "reg:0";
12595 + };
12596 +};
12597 diff --git a/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
12598 new file mode 100644
12599 index 000000000000..112aed91ecb2
12600 --- /dev/null
12601 +++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
12602 @@ -0,0 +1,139 @@
12603 +// Umbrella I2C Mux overlay
12604 +
12605 +/dts-v1/;
12606 +/plugin/;
12607 +
12608 +/{
12609 + compatible = "brcm,bcm2835";
12610 +
12611 + fragment@0 {
12612 + target = <&i2c_arm>;
12613 + __dormant__ {
12614 + #address-cells = <1>;
12615 + #size-cells = <0>;
12616 + status = "okay";
12617 +
12618 + pca9542: mux@70 {
12619 + compatible = "nxp,pca9542";
12620 + reg = <0x70>;
12621 + #address-cells = <1>;
12622 + #size-cells = <0>;
12623 +
12624 + i2c@0 {
12625 + #address-cells = <1>;
12626 + #size-cells = <0>;
12627 + reg = <0>;
12628 + };
12629 + i2c@1 {
12630 + #address-cells = <1>;
12631 + #size-cells = <0>;
12632 + reg = <1>;
12633 + };
12634 + };
12635 + };
12636 + };
12637 +
12638 + fragment@1 {
12639 + target = <&i2c_arm>;
12640 + __dormant__ {
12641 + #address-cells = <1>;
12642 + #size-cells = <0>;
12643 + status = "okay";
12644 +
12645 + pca9545: mux@70 {
12646 + compatible = "nxp,pca9545";
12647 + reg = <0x70>;
12648 + #address-cells = <1>;
12649 + #size-cells = <0>;
12650 +
12651 + i2c@0 {
12652 + #address-cells = <1>;
12653 + #size-cells = <0>;
12654 + reg = <0>;
12655 + };
12656 + i2c@1 {
12657 + #address-cells = <1>;
12658 + #size-cells = <0>;
12659 + reg = <1>;
12660 + };
12661 + i2c@2 {
12662 + #address-cells = <1>;
12663 + #size-cells = <0>;
12664 + reg = <2>;
12665 + };
12666 + i2c@3 {
12667 + #address-cells = <1>;
12668 + #size-cells = <0>;
12669 + reg = <3>;
12670 + };
12671 + };
12672 + };
12673 + };
12674 +
12675 + fragment@2 {
12676 + target = <&i2c_arm>;
12677 + __dormant__ {
12678 + #address-cells = <1>;
12679 + #size-cells = <0>;
12680 + status = "okay";
12681 +
12682 + pca9548: mux@70 {
12683 + compatible = "nxp,pca9548";
12684 + reg = <0x70>;
12685 + #address-cells = <1>;
12686 + #size-cells = <0>;
12687 +
12688 + i2c@0 {
12689 + #address-cells = <1>;
12690 + #size-cells = <0>;
12691 + reg = <0>;
12692 + };
12693 + i2c@1 {
12694 + #address-cells = <1>;
12695 + #size-cells = <0>;
12696 + reg = <1>;
12697 + };
12698 + i2c@2 {
12699 + #address-cells = <1>;
12700 + #size-cells = <0>;
12701 + reg = <2>;
12702 + };
12703 + i2c@3 {
12704 + #address-cells = <1>;
12705 + #size-cells = <0>;
12706 + reg = <3>;
12707 + };
12708 + i2c@4 {
12709 + #address-cells = <1>;
12710 + #size-cells = <0>;
12711 + reg = <4>;
12712 + };
12713 + i2c@5 {
12714 + #address-cells = <1>;
12715 + #size-cells = <0>;
12716 + reg = <5>;
12717 + };
12718 + i2c@6 {
12719 + #address-cells = <1>;
12720 + #size-cells = <0>;
12721 + reg = <6>;
12722 + };
12723 + i2c@7 {
12724 + #address-cells = <1>;
12725 + #size-cells = <0>;
12726 + reg = <7>;
12727 + };
12728 + };
12729 + };
12730 + };
12731 +
12732 + __overrides__ {
12733 + pca9542 = <0>, "+0";
12734 + pca9545 = <0>, "+1";
12735 + pca9548 = <0>, "+2";
12736 +
12737 + addr = <&pca9542>,"reg:0",
12738 + <&pca9545>,"reg:0",
12739 + <&pca9548>,"reg:0";
12740 + };
12741 +};
12742 diff --git a/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
12743 new file mode 100644
12744 index 000000000000..9bb16465a50e
12745 --- /dev/null
12746 +++ b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
12747 @@ -0,0 +1,26 @@
12748 +// Definitions for NXP PCA9685A I2C PWM controller on ARM I2C bus.
12749 +/dts-v1/;
12750 +/plugin/;
12751 +
12752 +/{
12753 + compatible = "brcm,bcm2835";
12754 +
12755 + fragment@0 {
12756 + target = <&i2c_arm>;
12757 + __overlay__ {
12758 + #address-cells = <1>;
12759 + #size-cells = <0>;
12760 + status = "okay";
12761 +
12762 + pca: pca@40 {
12763 + compatible = "nxp,pca9685-pwm";
12764 + #pwm-cells = <2>;
12765 + reg = <0x40>;
12766 + status = "okay";
12767 + };
12768 + };
12769 + };
12770 + __overrides__ {
12771 + addr = <&pca>,"reg:0";
12772 + };
12773 +};
12774 diff --git a/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
12775 new file mode 100644
12776 index 000000000000..227e3c0fa1cd
12777 --- /dev/null
12778 +++ b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
12779 @@ -0,0 +1,266 @@
12780 +// Definitions for several I2C based Real Time Clocks
12781 +// Available through i2c-gpio
12782 +/dts-v1/;
12783 +/plugin/;
12784 +
12785 +#include <dt-bindings/gpio/gpio.h>
12786 +
12787 +/ {
12788 + compatible = "brcm,bcm2835";
12789 +
12790 + fragment@0 {
12791 + target-path = "/";
12792 + __overlay__ {
12793 + i2c_gpio: i2c-gpio-rtc@0 {
12794 + compatible = "i2c-gpio";
12795 + gpios = <&gpio 23 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* sda */
12796 + &gpio 24 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* scl */
12797 + >;
12798 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
12799 + #address-cells = <1>;
12800 + #size-cells = <0>;
12801 + };
12802 + };
12803 + };
12804 +
12805 + fragment@1 {
12806 + target = <&i2c_gpio>;
12807 + __dormant__ {
12808 + #address-cells = <1>;
12809 + #size-cells = <0>;
12810 + status = "okay";
12811 +
12812 + abx80x: abx80x@69 {
12813 + compatible = "abracon,abx80x";
12814 + reg = <0x69>;
12815 + abracon,tc-diode = "standard";
12816 + abracon,tc-resistor = <0>;
12817 + status = "okay";
12818 + };
12819 + };
12820 + };
12821 +
12822 + fragment@2 {
12823 + target = <&i2c_gpio>;
12824 + __dormant__ {
12825 + #address-cells = <1>;
12826 + #size-cells = <0>;
12827 + status = "okay";
12828 +
12829 + ds1307: ds1307@68 {
12830 + compatible = "dallas,ds1307";
12831 + reg = <0x68>;
12832 + status = "okay";
12833 + };
12834 + };
12835 + };
12836 +
12837 + fragment@3 {
12838 + target = <&i2c_gpio>;
12839 + __dormant__ {
12840 + #address-cells = <1>;
12841 + #size-cells = <0>;
12842 + status = "okay";
12843 +
12844 + ds1339: ds1339@68 {
12845 + compatible = "dallas,ds1339";
12846 + trickle-resistor-ohms = <0>;
12847 + reg = <0x68>;
12848 + status = "okay";
12849 + };
12850 + };
12851 + };
12852 +
12853 + fragment@4 {
12854 + target = <&i2c_gpio>;
12855 + __dormant__ {
12856 + #address-cells = <1>;
12857 + #size-cells = <0>;
12858 + status = "okay";
12859 +
12860 + ds3231: ds3231@68 {
12861 + compatible = "maxim,ds3231";
12862 + reg = <0x68>;
12863 + status = "okay";
12864 + };
12865 + };
12866 + };
12867 +
12868 + fragment@5 {
12869 + target = <&i2c_gpio>;
12870 + __dormant__ {
12871 + #address-cells = <1>;
12872 + #size-cells = <0>;
12873 + status = "okay";
12874 +
12875 + mcp7940x: mcp7940x@6f {
12876 + compatible = "microchip,mcp7940x";
12877 + reg = <0x6f>;
12878 + status = "okay";
12879 + };
12880 + };
12881 + };
12882 +
12883 + fragment@6 {
12884 + target = <&i2c_gpio>;
12885 + __dormant__ {
12886 + #address-cells = <1>;
12887 + #size-cells = <0>;
12888 + status = "okay";
12889 +
12890 + mcp7941x: mcp7941x@6f {
12891 + compatible = "microchip,mcp7941x";
12892 + reg = <0x6f>;
12893 + status = "okay";
12894 + };
12895 + };
12896 + };
12897 +
12898 + fragment@7 {
12899 + target = <&i2c_gpio>;
12900 + __dormant__ {
12901 + #address-cells = <1>;
12902 + #size-cells = <0>;
12903 + status = "okay";
12904 +
12905 + pcf2127@51 {
12906 + compatible = "nxp,pcf2127";
12907 + reg = <0x51>;
12908 + status = "okay";
12909 + };
12910 + };
12911 + };
12912 +
12913 + fragment@8 {
12914 + target = <&i2c_gpio>;
12915 + __dormant__ {
12916 + #address-cells = <1>;
12917 + #size-cells = <0>;
12918 + status = "okay";
12919 +
12920 + pcf8523: pcf8523@68 {
12921 + compatible = "nxp,pcf8523";
12922 + reg = <0x68>;
12923 + status = "okay";
12924 + };
12925 + };
12926 + };
12927 +
12928 + fragment@9 {
12929 + target = <&i2c_gpio>;
12930 + __dormant__ {
12931 + #address-cells = <1>;
12932 + #size-cells = <0>;
12933 + status = "okay";
12934 +
12935 + pcf8563: pcf8563@51 {
12936 + compatible = "nxp,pcf8563";
12937 + reg = <0x51>;
12938 + status = "okay";
12939 + };
12940 + };
12941 + };
12942 +
12943 + fragment@10 {
12944 + target = <&i2c_arm>;
12945 + __dormant__ {
12946 + #address-cells = <1>;
12947 + #size-cells = <0>;
12948 + status = "okay";
12949 +
12950 + m41t62: m41t62@68 {
12951 + compatible = "st,m41t62";
12952 + reg = <0x68>;
12953 + status = "okay";
12954 + };
12955 + };
12956 + };
12957 +
12958 + fragment@11 {
12959 + target = <&i2c_gpio>;
12960 + __dormant__ {
12961 + #address-cells = <1>;
12962 + #size-cells = <0>;
12963 + status = "okay";
12964 +
12965 + rv3028: rv3028@52 {
12966 + compatible = "microcrystal,rv3028";
12967 + reg = <0x52>;
12968 + status = "okay";
12969 + };
12970 + };
12971 + };
12972 +
12973 + fragment@12 {
12974 + target = <&i2c_gpio>;
12975 + __dormant__ {
12976 + #address-cells = <1>;
12977 + #size-cells = <0>;
12978 + status = "okay";
12979 +
12980 + pcf2129@51 {
12981 + compatible = "nxp,pcf2129";
12982 + reg = <0x51>;
12983 + status = "okay";
12984 + };
12985 + };
12986 + };
12987 +
12988 + fragment@13 {
12989 + target = <&i2c_gpio>;
12990 + __dormant__ {
12991 + #address-cells = <1>;
12992 + #size-cells = <0>;
12993 + status = "okay";
12994 +
12995 + rv1805: rv1805@69 {
12996 + compatible = "microcrystal,rv1805";
12997 + reg = <0x69>;
12998 + abracon,tc-diode = "standard";
12999 + abracon,tc-resistor = <0>;
13000 + status = "okay";
13001 + };
13002 + };
13003 + };
13004 +
13005 + __overrides__ {
13006 + abx80x = <0>,"+1";
13007 + ds1307 = <0>,"+2";
13008 + ds1339 = <0>,"+3";
13009 + ds3231 = <0>,"+4";
13010 + mcp7940x = <0>,"+5";
13011 + mcp7941x = <0>,"+6";
13012 + pcf2127 = <0>,"+7";
13013 + pcf8523 = <0>,"+8";
13014 + pcf8563 = <0>,"+9";
13015 + m41t62 = <0>,"+10";
13016 + rv3028 = <0>,"+11";
13017 + pcf2129 = <0>,"+12";
13018 + rv1805 = <0>,"+13";
13019 +
13020 + addr = <&abx80x>, "reg:0",
13021 + <&ds1307>, "reg:0",
13022 + <&ds1339>, "reg:0",
13023 + <&ds3231>, "reg:0",
13024 + <&mcp7940x>, "reg:0",
13025 + <&mcp7941x>, "reg:0",
13026 + <&pcf8523>, "reg:0",
13027 + <&pcf8563>, "reg:0",
13028 + <&m41t62>, "reg:0",
13029 + <&rv1805>, "reg:0";
13030 + trickle-diode-type = <&abx80x>,"abracon,tc-diode",
13031 + <&rv1805>,"abracon,tc-diode";
13032 + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
13033 + <&abx80x>,"abracon,tc-resistor:0",
13034 + <&rv3028>,"trickle-resistor-ohms:0",
13035 + <&rv1805>,"abracon,tc-resistor:0";
13036 + backup-switchover-mode = <&rv3028>,"backup-switchover-mode:0";
13037 + wakeup-source = <&ds1339>,"wakeup-source?",
13038 + <&ds3231>,"wakeup-source?",
13039 + <&mcp7940x>,"wakeup-source?",
13040 + <&mcp7941x>,"wakeup-source?";
13041 + i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
13042 + i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
13043 + i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
13044 + };
13045 +};
13046 diff --git a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
13047 new file mode 100644
13048 index 000000000000..735ca303e4fa
13049 --- /dev/null
13050 +++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
13051 @@ -0,0 +1,278 @@
13052 +// Definitions for several I2C based Real Time Clocks
13053 +/dts-v1/;
13054 +/plugin/;
13055 +
13056 +/ {
13057 + compatible = "brcm,bcm2835";
13058 +
13059 + fragment@0 {
13060 + target = <&i2c_arm>;
13061 + __dormant__ {
13062 + #address-cells = <1>;
13063 + #size-cells = <0>;
13064 + status = "okay";
13065 +
13066 + abx80x: abx80x@69 {
13067 + compatible = "abracon,abx80x";
13068 + reg = <0x69>;
13069 + abracon,tc-diode = "standard";
13070 + abracon,tc-resistor = <0>;
13071 + status = "okay";
13072 + };
13073 + };
13074 + };
13075 +
13076 + fragment@1 {
13077 + target = <&i2c_arm>;
13078 + __dormant__ {
13079 + #address-cells = <1>;
13080 + #size-cells = <0>;
13081 + status = "okay";
13082 +
13083 + ds1307: ds1307@68 {
13084 + compatible = "dallas,ds1307";
13085 + reg = <0x68>;
13086 + status = "okay";
13087 + };
13088 + };
13089 + };
13090 +
13091 + fragment@2 {
13092 + target = <&i2c_arm>;
13093 + __dormant__ {
13094 + #address-cells = <1>;
13095 + #size-cells = <0>;
13096 + status = "okay";
13097 +
13098 + ds1339: ds1339@68 {
13099 + compatible = "dallas,ds1339";
13100 + trickle-resistor-ohms = <0>;
13101 + reg = <0x68>;
13102 + status = "okay";
13103 + };
13104 + };
13105 + };
13106 +
13107 + fragment@3 {
13108 + target = <&i2c_arm>;
13109 + __dormant__ {
13110 + #address-cells = <1>;
13111 + #size-cells = <0>;
13112 + status = "okay";
13113 +
13114 + ds3231: ds3231@68 {
13115 + compatible = "maxim,ds3231";
13116 + reg = <0x68>;
13117 + status = "okay";
13118 + };
13119 + };
13120 + };
13121 +
13122 + fragment@4 {
13123 + target = <&i2c_arm>;
13124 + __dormant__ {
13125 + #address-cells = <1>;
13126 + #size-cells = <0>;
13127 + status = "okay";
13128 +
13129 + mcp7940x: mcp7940x@6f {
13130 + compatible = "microchip,mcp7940x";
13131 + reg = <0x6f>;
13132 + status = "okay";
13133 + };
13134 + };
13135 + };
13136 +
13137 + fragment@5 {
13138 + target = <&i2c_arm>;
13139 + __dormant__ {
13140 + #address-cells = <1>;
13141 + #size-cells = <0>;
13142 + status = "okay";
13143 +
13144 + mcp7941x: mcp7941x@6f {
13145 + compatible = "microchip,mcp7941x";
13146 + reg = <0x6f>;
13147 + status = "okay";
13148 + };
13149 + };
13150 + };
13151 +
13152 + fragment@6 {
13153 + target = <&i2c_arm>;
13154 + __dormant__ {
13155 + #address-cells = <1>;
13156 + #size-cells = <0>;
13157 + status = "okay";
13158 +
13159 + pcf2127@51 {
13160 + compatible = "nxp,pcf2127";
13161 + reg = <0x51>;
13162 + status = "okay";
13163 + };
13164 + };
13165 + };
13166 +
13167 + fragment@7 {
13168 + target = <&i2c_arm>;
13169 + __dormant__ {
13170 + #address-cells = <1>;
13171 + #size-cells = <0>;
13172 + status = "okay";
13173 +
13174 + pcf8523: pcf8523@68 {
13175 + compatible = "nxp,pcf8523";
13176 + reg = <0x68>;
13177 + status = "okay";
13178 + };
13179 + };
13180 + };
13181 +
13182 + fragment@8 {
13183 + target = <&i2c_arm>;
13184 + __dormant__ {
13185 + #address-cells = <1>;
13186 + #size-cells = <0>;
13187 + status = "okay";
13188 +
13189 + pcf8563: pcf8563@51 {
13190 + compatible = "nxp,pcf8563";
13191 + reg = <0x51>;
13192 + status = "okay";
13193 + };
13194 + };
13195 + };
13196 +
13197 + fragment@9 {
13198 + target = <&i2c_arm>;
13199 + __dormant__ {
13200 + #address-cells = <1>;
13201 + #size-cells = <0>;
13202 + status = "okay";
13203 +
13204 + m41t62: m41t62@68 {
13205 + compatible = "st,m41t62";
13206 + reg = <0x68>;
13207 + status = "okay";
13208 + };
13209 + };
13210 + };
13211 +
13212 + fragment@10 {
13213 + target = <&i2c_arm>;
13214 + __dormant__ {
13215 + #address-cells = <1>;
13216 + #size-cells = <0>;
13217 + status = "okay";
13218 +
13219 + rv3028: rv3028@52 {
13220 + compatible = "microcrystal,rv3028";
13221 + reg = <0x52>;
13222 + status = "okay";
13223 + };
13224 + };
13225 + };
13226 +
13227 + fragment@11 {
13228 + target = <&i2c_arm>;
13229 + __dormant__ {
13230 + #address-cells = <1>;
13231 + #size-cells = <0>;
13232 + status = "okay";
13233 +
13234 + pcf2129@51 {
13235 + compatible = "nxp,pcf2129";
13236 + reg = <0x51>;
13237 + status = "okay";
13238 + };
13239 + };
13240 + };
13241 +
13242 + fragment@12 {
13243 + target = <&i2c_arm>;
13244 + __dormant__ {
13245 + #address-cells = <1>;
13246 + #size-cells = <0>;
13247 + status = "okay";
13248 +
13249 + pcf85363@51 {
13250 + compatible = "nxp,pcf85363";
13251 + reg = <0x51>;
13252 + status = "okay";
13253 + };
13254 + };
13255 + };
13256 +
13257 + fragment@13 {
13258 + target = <&i2c_arm>;
13259 + __dormant__ {
13260 + #address-cells = <1>;
13261 + #size-cells = <0>;
13262 + status = "okay";
13263 +
13264 + rv1805: rv1805@69 {
13265 + compatible = "microcrystal,rv1805";
13266 + reg = <0x69>;
13267 + abracon,tc-diode = "standard";
13268 + abracon,tc-resistor = <0>;
13269 + status = "okay";
13270 + };
13271 + };
13272 + };
13273 +
13274 + fragment@14 {
13275 + target = <&i2c_arm>;
13276 + __dormant__ {
13277 + #address-cells = <1>;
13278 + #size-cells = <0>;
13279 + status = "okay";
13280 +
13281 + sd3078: sd3078@32 {
13282 + compatible = "whwave,sd3078";
13283 + reg = <0x32>;
13284 + status = "okay";
13285 + };
13286 + };
13287 + };
13288 +
13289 + __overrides__ {
13290 + abx80x = <0>,"+0";
13291 + ds1307 = <0>,"+1";
13292 + ds1339 = <0>,"+2";
13293 + ds3231 = <0>,"+3";
13294 + mcp7940x = <0>,"+4";
13295 + mcp7941x = <0>,"+5";
13296 + pcf2127 = <0>,"+6";
13297 + pcf8523 = <0>,"+7";
13298 + pcf8563 = <0>,"+8";
13299 + m41t62 = <0>,"+9";
13300 + rv3028 = <0>,"+10";
13301 + pcf2129 = <0>,"+11";
13302 + pcf85363 = <0>,"+12";
13303 + rv1805 = <0>,"+13";
13304 + sd3078 = <0>,"+14";
13305 +
13306 + addr = <&abx80x>, "reg:0",
13307 + <&ds1307>, "reg:0",
13308 + <&ds1339>, "reg:0",
13309 + <&ds3231>, "reg:0",
13310 + <&mcp7940x>, "reg:0",
13311 + <&mcp7941x>, "reg:0",
13312 + <&pcf8523>, "reg:0",
13313 + <&pcf8563>, "reg:0",
13314 + <&m41t62>, "reg:0",
13315 + <&rv1805>, "reg:0";
13316 + trickle-diode-type = <&abx80x>,"abracon,tc-diode",
13317 + <&rv1805>,"abracon,tc-diode";
13318 + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
13319 + <&abx80x>,"abracon,tc-resistor:0",
13320 + <&rv3028>,"trickle-resistor-ohms:0",
13321 + <&rv1805>,"abracon,tc-resistor:0";
13322 + backup-switchover-mode = <&rv3028>,"backup-switchover-mode:0";
13323 + wakeup-source = <&ds1339>,"wakeup-source?",
13324 + <&ds3231>,"wakeup-source?",
13325 + <&mcp7940x>,"wakeup-source?",
13326 + <&mcp7941x>,"wakeup-source?",
13327 + <&m41t62>,"wakeup-source?";
13328 + };
13329 +};
13330 diff --git a/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
13331 new file mode 100644
13332 index 000000000000..ce97837b0db5
13333 --- /dev/null
13334 +++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
13335 @@ -0,0 +1,271 @@
13336 +// Definitions for I2C based sensors using the Industrial IO or HWMON interface.
13337 +/dts-v1/;
13338 +/plugin/;
13339 +
13340 +/ {
13341 + compatible = "brcm,bcm2835";
13342 +
13343 + fragment@0 {
13344 + target = <&i2c_arm>;
13345 + __dormant__ {
13346 + #address-cells = <1>;
13347 + #size-cells = <0>;
13348 + status = "okay";
13349 +
13350 + bme280: bme280@76 {
13351 + compatible = "bosch,bme280";
13352 + reg = <0x76>;
13353 + status = "okay";
13354 + };
13355 + };
13356 + };
13357 +
13358 + fragment@1 {
13359 + target = <&i2c_arm>;
13360 + __dormant__ {
13361 + #address-cells = <1>;
13362 + #size-cells = <0>;
13363 + status = "okay";
13364 +
13365 + bmp085: bmp085@77 {
13366 + compatible = "bosch,bmp085";
13367 + reg = <0x77>;
13368 + default-oversampling = <3>;
13369 + status = "okay";
13370 + };
13371 + };
13372 + };
13373 +
13374 + fragment@2 {
13375 + target = <&i2c_arm>;
13376 + __dormant__ {
13377 + #address-cells = <1>;
13378 + #size-cells = <0>;
13379 + status = "okay";
13380 +
13381 + bmp180: bmp180@77 {
13382 + compatible = "bosch,bmp180";
13383 + reg = <0x77>;
13384 + status = "okay";
13385 + };
13386 + };
13387 + };
13388 +
13389 + fragment@3 {
13390 + target = <&i2c_arm>;
13391 + __dormant__ {
13392 + #address-cells = <1>;
13393 + #size-cells = <0>;
13394 + status = "okay";
13395 +
13396 + bmp280: bmp280@76 {
13397 + compatible = "bosch,bmp280";
13398 + reg = <0x76>;
13399 + status = "okay";
13400 + };
13401 + };
13402 + };
13403 +
13404 + fragment@4 {
13405 + target = <&i2c_arm>;
13406 + __dormant__ {
13407 + #address-cells = <1>;
13408 + #size-cells = <0>;
13409 + status = "okay";
13410 +
13411 + htu21: htu21@40 {
13412 + compatible = "htu21";
13413 + reg = <0x40>;
13414 + status = "okay";
13415 + };
13416 + };
13417 + };
13418 +
13419 + fragment@5 {
13420 + target = <&i2c_arm>;
13421 + __dormant__ {
13422 + #address-cells = <1>;
13423 + #size-cells = <0>;
13424 + status = "okay";
13425 +
13426 + lm75: lm75@4f {
13427 + compatible = "lm75";
13428 + reg = <0x4f>;
13429 + status = "okay";
13430 + };
13431 + };
13432 + };
13433 +
13434 + fragment@6 {
13435 + target = <&i2c_arm>;
13436 + __dormant__ {
13437 + #address-cells = <1>;
13438 + #size-cells = <0>;
13439 + status = "okay";
13440 +
13441 + si7020: si7020@40 {
13442 + compatible = "si7020";
13443 + reg = <0x40>;
13444 + status = "okay";
13445 + };
13446 + };
13447 + };
13448 +
13449 + fragment@7 {
13450 + target = <&i2c_arm>;
13451 + __dormant__ {
13452 + #address-cells = <1>;
13453 + #size-cells = <0>;
13454 + status = "okay";
13455 +
13456 + tmp102: tmp102@48 {
13457 + compatible = "ti,tmp102";
13458 + reg = <0x48>;
13459 + status = "okay";
13460 + };
13461 + };
13462 + };
13463 +
13464 + fragment@8 {
13465 + target = <&i2c_arm>;
13466 + __dormant__ {
13467 + #address-cells = <1>;
13468 + #size-cells = <0>;
13469 + status = "okay";
13470 +
13471 + hdc100x: hdc100x@40 {
13472 + compatible = "hdc100x";
13473 + reg = <0x40>;
13474 + status = "okay";
13475 + };
13476 + };
13477 + };
13478 +
13479 + fragment@9 {
13480 + target = <&i2c_arm>;
13481 + __dormant__ {
13482 + #address-cells = <1>;
13483 + #size-cells = <0>;
13484 + status = "okay";
13485 +
13486 + tsl4531: tsl4531@29 {
13487 + compatible = "tsl4531";
13488 + reg = <0x29>;
13489 + status = "okay";
13490 + };
13491 + };
13492 + };
13493 +
13494 + fragment@10 {
13495 + target = <&i2c_arm>;
13496 + __dormant__ {
13497 + #address-cells = <1>;
13498 + #size-cells = <0>;
13499 + status = "okay";
13500 +
13501 + veml6070: veml6070@38 {
13502 + compatible = "veml6070";
13503 + reg = <0x38>;
13504 + status = "okay";
13505 + };
13506 + };
13507 + };
13508 +
13509 + fragment@11 {
13510 + target = <&i2c_arm>;
13511 + __dormant__ {
13512 + #address-cells = <1>;
13513 + #size-cells = <0>;
13514 + status = "okay";
13515 +
13516 + sht3x: sht3x@44 {
13517 + compatible = "sht3x";
13518 + reg = <0x44>;
13519 + status = "okay";
13520 + };
13521 + };
13522 + };
13523 +
13524 + fragment@12 {
13525 + target = <&i2c_arm>;
13526 + __dormant__ {
13527 + #address-cells = <1>;
13528 + #size-cells = <0>;
13529 + status = "okay";
13530 +
13531 + ds1621: ds1621@48 {
13532 + compatible = "ds1621";
13533 + reg = <0x48>;
13534 + status = "okay";
13535 + };
13536 + };
13537 + };
13538 +
13539 + fragment@13 {
13540 + target = <&i2c_arm>;
13541 + __dormant__ {
13542 + #address-cells = <1>;
13543 + #size-cells = <0>;
13544 + status = "okay";
13545 +
13546 + max17040: max17040@36 {
13547 + compatible = "maxim,max17040";
13548 + reg = <0x36>;
13549 + status = "okay";
13550 + };
13551 + };
13552 + };
13553 +
13554 + fragment@14 {
13555 + target = <&i2c_arm>;
13556 + __dormant__ {
13557 + #address-cells = <1>;
13558 + #size-cells = <0>;
13559 + status = "okay";
13560 +
13561 + bme680: bme680@76 {
13562 + compatible = "bosch,bme680";
13563 + reg = <0x76>;
13564 + status = "okay";
13565 + };
13566 + };
13567 + };
13568 +
13569 + fragment@15 {
13570 + target = <&i2c_arm>;
13571 + __dormant__ {
13572 + #address-cells = <1>;
13573 + #size-cells = <0>;
13574 + status = "okay";
13575 +
13576 + sps30: sps30@69 {
13577 + compatible = "sensirion,sps30";
13578 + reg = <0x69>;
13579 + status = "okay";
13580 + };
13581 + };
13582 + };
13583 +
13584 + __overrides__ {
13585 + addr = <&bme280>,"reg:0", <&bmp280>,"reg:0", <&tmp102>,"reg:0",
13586 + <&lm75>,"reg:0", <&hdc100x>,"reg:0", <&sht3x>,"reg:0",
13587 + <&ds1621>,"reg:0", <&bme680>,"reg:0";
13588 + bme280 = <0>,"+0";
13589 + bmp085 = <0>,"+1";
13590 + bmp180 = <0>,"+2";
13591 + bmp280 = <0>,"+3";
13592 + htu21 = <0>,"+4";
13593 + lm75 = <0>,"+5";
13594 + lm75addr = <&lm75>,"reg:0";
13595 + si7020 = <0>,"+6";
13596 + tmp102 = <0>,"+7";
13597 + hdc100x = <0>,"+8";
13598 + tsl4531 = <0>,"+9";
13599 + veml6070 = <0>,"+10";
13600 + sht3x = <0>,"+11";
13601 + ds1621 = <0>,"+12";
13602 + max17040 = <0>,"+13";
13603 + bme680 = <0>,"+14";
13604 + sps30 = <0>,"+15";
13605 + };
13606 +};
13607 diff --git a/arch/arm/boot/dts/overlays/i2c0-overlay.dts b/arch/arm/boot/dts/overlays/i2c0-overlay.dts
13608 new file mode 100644
13609 index 000000000000..7c6771f84d8e
13610 --- /dev/null
13611 +++ b/arch/arm/boot/dts/overlays/i2c0-overlay.dts
13612 @@ -0,0 +1,74 @@
13613 +/dts-v1/;
13614 +/plugin/;
13615 +
13616 +/{
13617 + compatible = "brcm,bcm2835";
13618 +
13619 + fragment@0 {
13620 + target = <&i2c0if>;
13621 + __overlay__ {
13622 + status = "okay";
13623 + pinctrl-0 = <&i2c0_pins>;
13624 + };
13625 + };
13626 +
13627 + fragment@1 {
13628 + target = <&i2c0_pins>;
13629 + pins1: __overlay__ {
13630 + brcm,pins = <0 1>;
13631 + brcm,function = <4>; /* alt0 */
13632 + };
13633 + };
13634 +
13635 + fragment@2 {
13636 + target = <&i2c0_pins>;
13637 + pins2: __dormant__ {
13638 + brcm,pins = <28 29>;
13639 + brcm,function = <4>; /* alt0 */
13640 + };
13641 + };
13642 +
13643 + fragment@3 {
13644 + target = <&i2c0_pins>;
13645 + pins3: __dormant__ {
13646 + brcm,pins = <44 45>;
13647 + brcm,function = <5>; /* alt1 */
13648 + };
13649 + };
13650 +
13651 + fragment@4 {
13652 + target = <&i2c0_pins>;
13653 + pins4: __dormant__ {
13654 + brcm,pins = <46 47>;
13655 + brcm,function = <4>; /* alt0 */
13656 + };
13657 + };
13658 +
13659 + fragment@5 {
13660 + target = <&i2c0>;
13661 + __dormant__ {
13662 + compatible = "brcm,bcm2708-i2c";
13663 + };
13664 + };
13665 +
13666 + fragment@6 {
13667 + target = <&i2c0mux>;
13668 + __overlay__ {
13669 + status = "disabled";
13670 + };
13671 + };
13672 +
13673 + fragment@7 {
13674 + target-path = "/aliases";
13675 + __overlay__ {
13676 + i2c0 = "/soc/i2c@7e205000";
13677 + };
13678 + };
13679 + __overrides__ {
13680 + pins_0_1 = <0>,"+1-2-3-4";
13681 + pins_28_29 = <0>,"-1+2-3-4";
13682 + pins_44_45 = <0>,"-1-2+3-4";
13683 + pins_46_47 = <0>,"-1-2-3+4";
13684 + combine = <0>, "!5";
13685 + };
13686 +};
13687 diff --git a/arch/arm/boot/dts/overlays/i2c1-overlay.dts b/arch/arm/boot/dts/overlays/i2c1-overlay.dts
13688 new file mode 100644
13689 index 000000000000..addaed73e665
13690 --- /dev/null
13691 +++ b/arch/arm/boot/dts/overlays/i2c1-overlay.dts
13692 @@ -0,0 +1,44 @@
13693 +/dts-v1/;
13694 +/plugin/;
13695 +
13696 +/{
13697 + compatible = "brcm,bcm2835";
13698 +
13699 + fragment@0 {
13700 + target = <&i2c1>;
13701 + __overlay__ {
13702 + status = "okay";
13703 + pinctrl-names = "default";
13704 + pinctrl-0 = <&i2c1_pins>;
13705 + };
13706 + };
13707 +
13708 + fragment@1 {
13709 + target = <&i2c1_pins>;
13710 + pins1: __overlay__ {
13711 + brcm,pins = <2 3>;
13712 + brcm,function = <4>; /* alt 0 */
13713 + };
13714 + };
13715 +
13716 + fragment@2 {
13717 + target = <&i2c1_pins>;
13718 + pins2: __dormant__ {
13719 + brcm,pins = <44 45>;
13720 + brcm,function = <6>; /* alt 2 */
13721 + };
13722 + };
13723 +
13724 + fragment@3 {
13725 + target = <&i2c1>;
13726 + __dormant__ {
13727 + compatible = "brcm,bcm2708-i2c";
13728 + };
13729 + };
13730 +
13731 + __overrides__ {
13732 + pins_2_3 = <0>,"=1!2";
13733 + pins_44_45 = <0>,"!1=2";
13734 + combine = <0>, "!3";
13735 + };
13736 +};
13737 diff --git a/arch/arm/boot/dts/overlays/i2c3-overlay.dts b/arch/arm/boot/dts/overlays/i2c3-overlay.dts
13738 new file mode 100644
13739 index 000000000000..e24a1df21f99
13740 --- /dev/null
13741 +++ b/arch/arm/boot/dts/overlays/i2c3-overlay.dts
13742 @@ -0,0 +1,36 @@
13743 +/dts-v1/;
13744 +/plugin/;
13745 +
13746 +/{
13747 + compatible = "brcm,bcm2711";
13748 +
13749 + fragment@0 {
13750 + target = <&i2c3>;
13751 + frag0: __overlay__ {
13752 + status = "okay";
13753 + pinctrl-names = "default";
13754 + pinctrl-0 = <&i2c3_pins>;
13755 + clock-frequency = <100000>;
13756 + };
13757 + };
13758 +
13759 + fragment@1 {
13760 + target = <&i2c3_pins>;
13761 + __dormant__ {
13762 + brcm,pins = <2 3>;
13763 + };
13764 + };
13765 +
13766 + fragment@2 {
13767 + target = <&i2c3_pins>;
13768 + __overlay__ {
13769 + brcm,pins = <4 5>;
13770 + };
13771 + };
13772 +
13773 + __overrides__ {
13774 + pins_2_3 = <0>,"=1!2";
13775 + pins_4_5 = <0>,"!1=2";
13776 + baudrate = <&frag0>, "clock-frequency:0";
13777 + };
13778 +};
13779 diff --git a/arch/arm/boot/dts/overlays/i2c4-overlay.dts b/arch/arm/boot/dts/overlays/i2c4-overlay.dts
13780 new file mode 100644
13781 index 000000000000..14c7f4d1da4c
13782 --- /dev/null
13783 +++ b/arch/arm/boot/dts/overlays/i2c4-overlay.dts
13784 @@ -0,0 +1,36 @@
13785 +/dts-v1/;
13786 +/plugin/;
13787 +
13788 +/{
13789 + compatible = "brcm,bcm2711";
13790 +
13791 + fragment@0 {
13792 + target = <&i2c4>;
13793 + frag0: __overlay__ {
13794 + status = "okay";
13795 + pinctrl-names = "default";
13796 + pinctrl-0 = <&i2c4_pins>;
13797 + clock-frequency = <100000>;
13798 + };
13799 + };
13800 +
13801 + fragment@1 {
13802 + target = <&i2c4_pins>;
13803 + __dormant__ {
13804 + brcm,pins = <6 7>;
13805 + };
13806 + };
13807 +
13808 + fragment@2 {
13809 + target = <&i2c4_pins>;
13810 + __overlay__ {
13811 + brcm,pins = <8 9>;
13812 + };
13813 + };
13814 +
13815 + __overrides__ {
13816 + pins_6_7 = <0>,"=1!2";
13817 + pins_8_9 = <0>,"!1=2";
13818 + baudrate = <&frag0>, "clock-frequency:0";
13819 + };
13820 +};
13821 diff --git a/arch/arm/boot/dts/overlays/i2c5-overlay.dts b/arch/arm/boot/dts/overlays/i2c5-overlay.dts
13822 new file mode 100644
13823 index 000000000000..7953621112de
13824 --- /dev/null
13825 +++ b/arch/arm/boot/dts/overlays/i2c5-overlay.dts
13826 @@ -0,0 +1,36 @@
13827 +/dts-v1/;
13828 +/plugin/;
13829 +
13830 +/{
13831 + compatible = "brcm,bcm2711";
13832 +
13833 + fragment@0 {
13834 + target = <&i2c5>;
13835 + frag0: __overlay__ {
13836 + status = "okay";
13837 + pinctrl-names = "default";
13838 + pinctrl-0 = <&i2c5_pins>;
13839 + clock-frequency = <100000>;
13840 + };
13841 + };
13842 +
13843 + fragment@1 {
13844 + target = <&i2c5_pins>;
13845 + __dormant__ {
13846 + brcm,pins = <10 11>;
13847 + };
13848 + };
13849 +
13850 + fragment@2 {
13851 + target = <&i2c5_pins>;
13852 + __overlay__ {
13853 + brcm,pins = <12 13>;
13854 + };
13855 + };
13856 +
13857 + __overrides__ {
13858 + pins_10_11 = <0>,"=1!2";
13859 + pins_12_13 = <0>,"!1=2";
13860 + baudrate = <&frag0>, "clock-frequency:0";
13861 + };
13862 +};
13863 diff --git a/arch/arm/boot/dts/overlays/i2c6-overlay.dts b/arch/arm/boot/dts/overlays/i2c6-overlay.dts
13864 new file mode 100644
13865 index 000000000000..555305a7ee1f
13866 --- /dev/null
13867 +++ b/arch/arm/boot/dts/overlays/i2c6-overlay.dts
13868 @@ -0,0 +1,36 @@
13869 +/dts-v1/;
13870 +/plugin/;
13871 +
13872 +/{
13873 + compatible = "brcm,bcm2711";
13874 +
13875 + fragment@0 {
13876 + target = <&i2c6>;
13877 + frag0: __overlay__ {
13878 + status = "okay";
13879 + pinctrl-names = "default";
13880 + pinctrl-0 = <&i2c6_pins>;
13881 + clock-frequency = <100000>;
13882 + };
13883 + };
13884 +
13885 + fragment@1 {
13886 + target = <&i2c6_pins>;
13887 + __dormant__ {
13888 + brcm,pins = <0 1>;
13889 + };
13890 + };
13891 +
13892 + fragment@2 {
13893 + target = <&i2c6_pins>;
13894 + __overlay__ {
13895 + brcm,pins = <22 23>;
13896 + };
13897 + };
13898 +
13899 + __overrides__ {
13900 + pins_0_1 = <0>,"=1!2";
13901 + pins_22_23 = <0>,"!1=2";
13902 + baudrate = <&frag0>, "clock-frequency:0";
13903 + };
13904 +};
13905 diff --git a/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
13906 new file mode 100644
13907 index 000000000000..cf43094c6ff4
13908 --- /dev/null
13909 +++ b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
13910 @@ -0,0 +1,18 @@
13911 +/*
13912 + * Device tree overlay to move i2s to gpio 28 to 31 on CM
13913 + */
13914 +
13915 +/dts-v1/;
13916 +/plugin/;
13917 +
13918 +/ {
13919 + compatible = "brcm,bcm2835";
13920 +
13921 + fragment@0 {
13922 + target = <&i2s_pins>;
13923 + __overlay__ {
13924 + brcm,pins = <28 29 30 31>;
13925 + brcm,function = <6>; /* alt2 */
13926 + };
13927 + };
13928 +};
13929 diff --git a/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts b/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts
13930 new file mode 100644
13931 index 000000000000..551aba591d26
13932 --- /dev/null
13933 +++ b/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts
13934 @@ -0,0 +1,45 @@
13935 +// Device tree overlay for I2C connected Ilitek multiple touch controller
13936 +/dts-v1/;
13937 +/plugin/;
13938 +
13939 + / {
13940 + compatible = "brcm,bcm2835";
13941 +
13942 + fragment@0 {
13943 + target = <&gpio>;
13944 + __overlay__ {
13945 + ili251x_pins: ili251x_pins {
13946 + brcm,pins = <4>; // interrupt
13947 + brcm,function = <0>; // in
13948 + brcm,pull = <2>; // pull-up //
13949 + };
13950 + };
13951 + };
13952 +
13953 + fragment@1 {
13954 + target = <&i2c1>;
13955 + __overlay__ {
13956 + #address-cells = <1>;
13957 + #size-cells = <0>;
13958 + status = "okay";
13959 +
13960 + ili251x: ili251x@41 {
13961 + compatible = "ilitek,ili251x";
13962 + reg = <0x41>;
13963 + pinctrl-names = "default";
13964 + pinctrl-0 = <&ili251x_pins>;
13965 + interrupt-parent = <&gpio>;
13966 + interrupts = <4 8>; // high-to-low edge triggered
13967 + touchscreen-size-x = <16384>;
13968 + touchscreen-size-y = <9600>;
13969 + };
13970 + };
13971 + };
13972 +
13973 + __overrides__ {
13974 + interrupt = <&ili251x_pins>,"brcm,pins:0",
13975 + <&ili251x>,"interrupts:0";
13976 + sizex = <&ili251x>,"touchscreen-size-x:0";
13977 + sizey = <&ili251x>,"touchscreen-size-y:0";
13978 + };
13979 +};
13980 diff --git a/arch/arm/boot/dts/overlays/imx219-overlay.dts b/arch/arm/boot/dts/overlays/imx219-overlay.dts
13981 new file mode 100644
13982 index 000000000000..3484bde5a9e8
13983 --- /dev/null
13984 +++ b/arch/arm/boot/dts/overlays/imx219-overlay.dts
13985 @@ -0,0 +1,119 @@
13986 +// SPDX-License-Identifier: GPL-2.0-only
13987 +// Definitions for IMX219 camera module on VC I2C bus
13988 +/dts-v1/;
13989 +/plugin/;
13990 +
13991 +#include <dt-bindings/gpio/gpio.h>
13992 +
13993 +/{
13994 + compatible = "brcm,bcm2835";
13995 +
13996 + fragment@0 {
13997 + target = <&i2c_csi_dsi>;
13998 + __overlay__ {
13999 + #address-cells = <1>;
14000 + #size-cells = <0>;
14001 + status = "okay";
14002 +
14003 + imx219: imx219@10 {
14004 + compatible = "sony,imx219";
14005 + reg = <0x10>;
14006 + status = "okay";
14007 +
14008 + clocks = <&imx219_clk>;
14009 + clock-names = "xclk";
14010 +
14011 + VANA-supply = <&imx219_vana>; /* 2.8v */
14012 + VDIG-supply = <&imx219_vdig>; /* 1.8v */
14013 + VDDL-supply = <&imx219_vddl>; /* 1.2v */
14014 +
14015 + rotation = <180>;
14016 +
14017 + port {
14018 + imx219_0: endpoint {
14019 + remote-endpoint = <&csi1_ep>;
14020 + clock-lanes = <0>;
14021 + data-lanes = <1 2>;
14022 + clock-noncontinuous;
14023 + link-frequencies =
14024 + /bits/ 64 <297000000>;
14025 + };
14026 + };
14027 + };
14028 + };
14029 + };
14030 +
14031 + fragment@1 {
14032 + target = <&csi1>;
14033 + __overlay__ {
14034 + status = "okay";
14035 +
14036 + port {
14037 + csi1_ep: endpoint {
14038 + remote-endpoint = <&imx219_0>;
14039 + clock-lanes = <0>;
14040 + data-lanes = <1 2>;
14041 + clock-noncontinuous;
14042 + };
14043 + };
14044 + };
14045 + };
14046 +
14047 + fragment@2 {
14048 + target = <&i2c0if>;
14049 + __overlay__ {
14050 + status = "okay";
14051 + };
14052 + };
14053 +
14054 + fragment@3 {
14055 + target-path="/";
14056 + __overlay__ {
14057 + imx219_vana: fixedregulator@0 {
14058 + compatible = "regulator-fixed";
14059 + regulator-name = "imx219_vana";
14060 + regulator-min-microvolt = <2800000>;
14061 + regulator-max-microvolt = <2800000>;
14062 + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
14063 + enable-active-high;
14064 + };
14065 + imx219_vdig: fixedregulator@1 {
14066 + compatible = "regulator-fixed";
14067 + regulator-name = "imx219_vdig";
14068 + regulator-min-microvolt = <1800000>;
14069 + regulator-max-microvolt = <1800000>;
14070 + };
14071 + imx219_vddl: fixedregulator@2 {
14072 + compatible = "regulator-fixed";
14073 + regulator-name = "imx219_vddl";
14074 + regulator-min-microvolt = <1200000>;
14075 + regulator-max-microvolt = <1200000>;
14076 + };
14077 +
14078 + imx219_clk: camera-clk {
14079 + compatible = "fixed-clock";
14080 + #clock-cells = <0>;
14081 + clock-frequency = <24000000>;
14082 + };
14083 + };
14084 + };
14085 +
14086 + fragment@4 {
14087 + target = <&i2c0mux>;
14088 + __overlay__ {
14089 + status = "okay";
14090 + };
14091 + };
14092 +
14093 + fragment@5 {
14094 + target-path="/__overrides__";
14095 + __overlay__ {
14096 + cam0-pwdn-ctrl = <&imx219_vana>,"gpio:0";
14097 + cam0-pwdn = <&imx219_vana>,"gpio:4";
14098 + };
14099 + };
14100 +
14101 + __overrides__ {
14102 + rotation = <&imx219>,"rotation:0";
14103 + };
14104 +};
14105 diff --git a/arch/arm/boot/dts/overlays/imx290-overlay.dts b/arch/arm/boot/dts/overlays/imx290-overlay.dts
14106 new file mode 100644
14107 index 000000000000..e536aa7f9e33
14108 --- /dev/null
14109 +++ b/arch/arm/boot/dts/overlays/imx290-overlay.dts
14110 @@ -0,0 +1,32 @@
14111 +// SPDX-License-Identifier: GPL-2.0-only
14112 +// Definitions for IMX290 camera module on VC I2C bus
14113 +/dts-v1/;
14114 +/plugin/;
14115 +
14116 +#include <dt-bindings/gpio/gpio.h>
14117 +#include "imx290_327-overlay.dtsi"
14118 +
14119 +/{
14120 + compatible = "brcm,bcm2835";
14121 +
14122 + // Fragment numbers deliberately high to avoid conflicts with the
14123 + // included imx290_327 overlay file.
14124 +
14125 + fragment@101 {
14126 + target = <&imx290>;
14127 + __overlay__ {
14128 + compatible = "sony,imx290";
14129 + };
14130 + };
14131 +
14132 + fragment@102 {
14133 + target = <&imx290>;
14134 + __dormant__ {
14135 + compatible = "sony,imx290-mono";
14136 + };
14137 + };
14138 +
14139 + __overrides__ {
14140 + mono = <0>, "-101+102";
14141 + };
14142 +};
14143 diff --git a/arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi b/arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi
14144 new file mode 100644
14145 index 000000000000..8f1dadb13f6a
14146 --- /dev/null
14147 +++ b/arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi
14148 @@ -0,0 +1,145 @@
14149 +// SPDX-License-Identifier: GPL-2.0-only
14150 +// Partial definitions for IMX290 or IMX327 camera module on VC I2C bus
14151 +// The compatible string should be set in an overlay that then includes this one
14152 +/dts-v1/;
14153 +/plugin/;
14154 +
14155 +#include <dt-bindings/gpio/gpio.h>
14156 +
14157 +/{
14158 + compatible = "brcm,bcm2835";
14159 +
14160 + fragment@0 {
14161 + target = <&i2c_csi_dsi>;
14162 + __overlay__ {
14163 + #address-cells = <1>;
14164 + #size-cells = <0>;
14165 + status = "okay";
14166 +
14167 + imx290: imx290@1a {
14168 + reg = <0x1a>;
14169 + status = "okay";
14170 +
14171 + clocks = <&imx290_clk>;
14172 + clock-names = "xclk";
14173 + clock-frequency = <37125000>;
14174 +
14175 + vdda-supply = <&imx290_vdda>; /* 2.8v */
14176 + vdddo-supply = <&imx290_vdddo>; /* 1.8v */
14177 + vddd-supply = <&imx290_vddd>; /* 1.5v */
14178 +
14179 + port {
14180 + imx290_0: endpoint {
14181 + remote-endpoint = <&csi1_ep>;
14182 + clock-lanes = <0>;
14183 + };
14184 + };
14185 + };
14186 + };
14187 + };
14188 +
14189 + fragment@1 {
14190 + target = <&csi1>;
14191 + __overlay__ {
14192 + status = "okay";
14193 +
14194 + port {
14195 + csi1_ep: endpoint {
14196 + remote-endpoint = <&imx290_0>;
14197 + };
14198 + };
14199 + };
14200 + };
14201 +
14202 + fragment@2 {
14203 + target = <&i2c0if>;
14204 + __overlay__ {
14205 + status = "okay";
14206 + };
14207 + };
14208 +
14209 + fragment@3 {
14210 + target-path="/";
14211 + __overlay__ {
14212 + imx290_vdda: fixedregulator@0 {
14213 + compatible = "regulator-fixed";
14214 + regulator-name = "imx290_vdda";
14215 + regulator-min-microvolt = <2800000>;
14216 + regulator-max-microvolt = <2800000>;
14217 + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
14218 + enable-active-high;
14219 + };
14220 + imx290_vdddo: fixedregulator@1 {
14221 + compatible = "regulator-fixed";
14222 + regulator-name = "imx290_vdddo";
14223 + regulator-min-microvolt = <1800000>;
14224 + regulator-max-microvolt = <1800000>;
14225 + };
14226 + imx290_vddd: fixedregulator@2 {
14227 + compatible = "regulator-fixed";
14228 + regulator-name = "imx290_vddd";
14229 + regulator-min-microvolt = <1500000>;
14230 + regulator-max-microvolt = <1500000>;
14231 + };
14232 +
14233 + imx290_clk: camera-clk {
14234 + compatible = "fixed-clock";
14235 + #clock-cells = <0>;
14236 + clock-frequency = <37125000>;
14237 + };
14238 + };
14239 + };
14240 +
14241 + fragment@4 {
14242 + target = <&i2c0mux>;
14243 + __overlay__ {
14244 + status = "okay";
14245 + };
14246 + };
14247 +
14248 + fragment@5 {
14249 + target-path="/__overrides__";
14250 + __overlay__ {
14251 + cam0-pwdn-ctrl = <&imx290_vdda>,"gpio:0";
14252 + cam0-pwdn = <&imx290_vdda>,"gpio:4";
14253 + };
14254 + };
14255 +
14256 + fragment@6 {
14257 + target = <&imx290_0>;
14258 + __overlay__ {
14259 + data-lanes = <1 2>;
14260 + link-frequencies =
14261 + /bits/ 64 <445500000 297000000>;
14262 + };
14263 + };
14264 +
14265 + fragment@7 {
14266 + target = <&imx290_0>;
14267 + __dormant__ {
14268 + data-lanes = <1 2 3 4>;
14269 + link-frequencies =
14270 + /bits/ 64 <222750000 148500000>;
14271 + };
14272 + };
14273 +
14274 + fragment@8 {
14275 + target = <&csi1_ep>;
14276 + __overlay__ {
14277 + data-lanes = <1 2>;
14278 + };
14279 + };
14280 +
14281 + fragment@9 {
14282 + target = <&csi1_ep>;
14283 + __dormant__ {
14284 + data-lanes = <1 2 3 4>;
14285 + };
14286 + };
14287 +
14288 + __overrides__ {
14289 + 4lane = <0>, "-6+7-8+9";
14290 + clock-frequency = <&imx290_clk>,"clock-frequency:0",
14291 + <&imx290>,"clock-frequency:0";
14292 + };
14293 +};
14294 diff --git a/arch/arm/boot/dts/overlays/imx477-overlay.dts b/arch/arm/boot/dts/overlays/imx477-overlay.dts
14295 new file mode 100644
14296 index 000000000000..1a97eaaf4c82
14297 --- /dev/null
14298 +++ b/arch/arm/boot/dts/overlays/imx477-overlay.dts
14299 @@ -0,0 +1,119 @@
14300 +// SPDX-License-Identifier: GPL-2.0-only
14301 +// Definitions for IMX477 camera module on VC I2C bus
14302 +/dts-v1/;
14303 +/plugin/;
14304 +
14305 +#include <dt-bindings/gpio/gpio.h>
14306 +
14307 +/{
14308 + compatible = "brcm,bcm2835";
14309 +
14310 + fragment@0 {
14311 + target = <&i2c_csi_dsi>;
14312 + __overlay__ {
14313 + #address-cells = <1>;
14314 + #size-cells = <0>;
14315 + status = "okay";
14316 +
14317 + imx477: imx477@1a {
14318 + compatible = "sony,imx477";
14319 + reg = <0x1a>;
14320 + status = "okay";
14321 +
14322 + clocks = <&imx477_clk>;
14323 + clock-names = "xclk";
14324 +
14325 + VANA-supply = <&imx477_vana>; /* 2.8v */
14326 + VDIG-supply = <&imx477_vdig>; /* 1.05v */
14327 + VDDL-supply = <&imx477_vddl>; /* 1.8v */
14328 +
14329 + rotation = <180>;
14330 +
14331 + port {
14332 + imx477_0: endpoint {
14333 + remote-endpoint = <&csi1_ep>;
14334 + clock-lanes = <0>;
14335 + data-lanes = <1 2>;
14336 + clock-noncontinuous;
14337 + link-frequencies =
14338 + /bits/ 64 <450000000>;
14339 + };
14340 + };
14341 + };
14342 + };
14343 + };
14344 +
14345 + fragment@1 {
14346 + target = <&csi1>;
14347 + __overlay__ {
14348 + status = "okay";
14349 +
14350 + port {
14351 + csi1_ep: endpoint {
14352 + remote-endpoint = <&imx477_0>;
14353 + clock-lanes = <0>;
14354 + data-lanes = <1 2>;
14355 + clock-noncontinuous;
14356 + };
14357 + };
14358 + };
14359 + };
14360 +
14361 + fragment@2 {
14362 + target = <&i2c0if>;
14363 + __overlay__ {
14364 + status = "okay";
14365 + };
14366 + };
14367 +
14368 + fragment@3 {
14369 + target-path="/";
14370 + __overlay__ {
14371 + imx477_vana: fixedregulator@0 {
14372 + compatible = "regulator-fixed";
14373 + regulator-name = "imx477_vana";
14374 + regulator-min-microvolt = <2800000>;
14375 + regulator-max-microvolt = <2800000>;
14376 + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
14377 + enable-active-high;
14378 + startup-delay-us = <300000>;
14379 + };
14380 + imx477_vdig: fixedregulator@1 {
14381 + compatible = "regulator-fixed";
14382 + regulator-name = "imx477_vdig";
14383 + regulator-min-microvolt = <1050000>;
14384 + regulator-max-microvolt = <1050000>;
14385 + };
14386 + imx477_vddl: fixedregulator@2 {
14387 + compatible = "regulator-fixed";
14388 + regulator-name = "imx477_vddl";
14389 + regulator-min-microvolt = <1800000>;
14390 + regulator-max-microvolt = <1800000>;
14391 + };
14392 + imx477_clk: camera-clk {
14393 + compatible = "fixed-clock";
14394 + #clock-cells = <0>;
14395 + clock-frequency = <24000000>;
14396 + };
14397 + };
14398 + };
14399 +
14400 + fragment@4 {
14401 + target = <&i2c0mux>;
14402 + __overlay__ {
14403 + status = "okay";
14404 + };
14405 + };
14406 +
14407 + fragment@5 {
14408 + target-path="/__overrides__";
14409 + __overlay__ {
14410 + cam0-pwdn-ctrl = <&imx477_vana>,"gpio:0";
14411 + cam0-pwdn = <&imx477_vana>,"gpio:4";
14412 + };
14413 + };
14414 +
14415 + __overrides__ {
14416 + rotation = <&imx477>,"rotation:0";
14417 + };
14418 +};
14419 diff --git a/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
14420 new file mode 100644
14421 index 000000000000..9110f5d34298
14422 --- /dev/null
14423 +++ b/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
14424 @@ -0,0 +1,42 @@
14425 +// Definitions for IQaudIO CODEC
14426 +/dts-v1/;
14427 +/plugin/;
14428 +
14429 +/ {
14430 + compatible = "brcm,bcm2835";
14431 +
14432 + fragment@0 {
14433 + target = <&i2s>;
14434 + __overlay__ {
14435 + status = "okay";
14436 + };
14437 + };
14438 +
14439 + fragment@1 {
14440 + target = <&i2c1>;
14441 + __overlay__ {
14442 + #address-cells = <1>;
14443 + #size-cells = <0>;
14444 + status = "okay";
14445 +
14446 + da2713@1a {
14447 + #sound-dai-cells = <0>;
14448 + compatible = "dlg,da7213";
14449 + reg = <0x1a>;
14450 + status = "okay";
14451 + };
14452 + };
14453 + };
14454 +
14455 + fragment@2 {
14456 + target = <&sound>;
14457 + iqaudio_dac: __overlay__ {
14458 + compatible = "iqaudio,iqaudio-codec";
14459 + i2s-controller = <&i2s>;
14460 + status = "okay";
14461 + };
14462 + };
14463 +
14464 + __overrides__ {
14465 + };
14466 +};
14467 diff --git a/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
14468 new file mode 100644
14469 index 000000000000..24073cadd0ef
14470 --- /dev/null
14471 +++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
14472 @@ -0,0 +1,46 @@
14473 +// Definitions for IQaudIO DAC
14474 +/dts-v1/;
14475 +/plugin/;
14476 +
14477 +/ {
14478 + compatible = "brcm,bcm2835";
14479 +
14480 + fragment@0 {
14481 + target = <&i2s>;
14482 + __overlay__ {
14483 + status = "okay";
14484 + };
14485 + };
14486 +
14487 + fragment@1 {
14488 + target = <&i2c1>;
14489 + __overlay__ {
14490 + #address-cells = <1>;
14491 + #size-cells = <0>;
14492 + status = "okay";
14493 +
14494 + pcm5122@4c {
14495 + #sound-dai-cells = <0>;
14496 + compatible = "ti,pcm5122";
14497 + reg = <0x4c>;
14498 + AVDD-supply = <&vdd_3v3_reg>;
14499 + DVDD-supply = <&vdd_3v3_reg>;
14500 + CPVDD-supply = <&vdd_3v3_reg>;
14501 + status = "okay";
14502 + };
14503 + };
14504 + };
14505 +
14506 + fragment@2 {
14507 + target = <&sound>;
14508 + frag2: __overlay__ {
14509 + compatible = "iqaudio,iqaudio-dac";
14510 + i2s-controller = <&i2s>;
14511 + status = "okay";
14512 + };
14513 + };
14514 +
14515 + __overrides__ {
14516 + 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
14517 + };
14518 +};
14519 diff --git a/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
14520 new file mode 100644
14521 index 000000000000..7c70b25e58d7
14522 --- /dev/null
14523 +++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
14524 @@ -0,0 +1,49 @@
14525 +// Definitions for IQaudIO DAC+
14526 +/dts-v1/;
14527 +/plugin/;
14528 +
14529 +/ {
14530 + compatible = "brcm,bcm2835";
14531 +
14532 + fragment@0 {
14533 + target = <&i2s>;
14534 + __overlay__ {
14535 + status = "okay";
14536 + };
14537 + };
14538 +
14539 + fragment@1 {
14540 + target = <&i2c1>;
14541 + __overlay__ {
14542 + #address-cells = <1>;
14543 + #size-cells = <0>;
14544 + status = "okay";
14545 +
14546 + pcm5122@4c {
14547 + #sound-dai-cells = <0>;
14548 + compatible = "ti,pcm5122";
14549 + reg = <0x4c>;
14550 + AVDD-supply = <&vdd_3v3_reg>;
14551 + DVDD-supply = <&vdd_3v3_reg>;
14552 + CPVDD-supply = <&vdd_3v3_reg>;
14553 + status = "okay";
14554 + };
14555 + };
14556 + };
14557 +
14558 + fragment@2 {
14559 + target = <&sound>;
14560 + iqaudio_dac: __overlay__ {
14561 + compatible = "iqaudio,iqaudio-dac";
14562 + i2s-controller = <&i2s>;
14563 + mute-gpios = <&gpio 22 0>;
14564 + status = "okay";
14565 + };
14566 + };
14567 +
14568 + __overrides__ {
14569 + 24db_digital_gain = <&iqaudio_dac>,"iqaudio,24db_digital_gain?";
14570 + auto_mute_amp = <&iqaudio_dac>,"iqaudio-dac,auto-mute-amp?";
14571 + unmute_amp = <&iqaudio_dac>,"iqaudio-dac,unmute-amp?";
14572 + };
14573 +};
14574 diff --git a/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
14575 new file mode 100644
14576 index 000000000000..ee54095c869b
14577 --- /dev/null
14578 +++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
14579 @@ -0,0 +1,47 @@
14580 +// Definitions for IQAudIO Digi WM8804 audio board
14581 +/dts-v1/;
14582 +/plugin/;
14583 +
14584 +/ {
14585 + compatible = "brcm,bcm2835";
14586 +
14587 + fragment@0 {
14588 + target = <&i2s>;
14589 + __overlay__ {
14590 + status = "okay";
14591 + };
14592 + };
14593 +
14594 + fragment@1 {
14595 + target = <&i2c1>;
14596 + __overlay__ {
14597 + #address-cells = <1>;
14598 + #size-cells = <0>;
14599 + status = "okay";
14600 +
14601 + wm8804@3b {
14602 + #sound-dai-cells = <0>;
14603 + compatible = "wlf,wm8804";
14604 + reg = <0x3b>;
14605 + status = "okay";
14606 + DVDD-supply = <&vdd_3v3_reg>;
14607 + PVDD-supply = <&vdd_3v3_reg>;
14608 + };
14609 + };
14610 + };
14611 +
14612 + fragment@2 {
14613 + target = <&sound>;
14614 + wm8804_digi: __overlay__ {
14615 + compatible = "iqaudio,wm8804-digi";
14616 + i2s-controller = <&i2s>;
14617 + status = "okay";
14618 + };
14619 + };
14620 +
14621 + __overrides__ {
14622 + card_name = <&wm8804_digi>,"wm8804-digi,card-name";
14623 + dai_name = <&wm8804_digi>,"wm8804-digi,dai-name";
14624 + dai_stream_name = <&wm8804_digi>,"wm8804-digi,dai-stream-name";
14625 + };
14626 +};
14627 diff --git a/arch/arm/boot/dts/overlays/irs1125-overlay.dts b/arch/arm/boot/dts/overlays/irs1125-overlay.dts
14628 new file mode 100644
14629 index 000000000000..e926e18e71fc
14630 --- /dev/null
14631 +++ b/arch/arm/boot/dts/overlays/irs1125-overlay.dts
14632 @@ -0,0 +1,85 @@
14633 +// SPDX-License-Identifier: GPL-2.0-only
14634 +// Definitions for IRS1125 camera module on VC I2C bus
14635 +/dts-v1/;
14636 +/plugin/;
14637 +
14638 +/{
14639 + compatible = "brcm,bcm2835";
14640 +
14641 + fragment@0 {
14642 + target = <&i2c_csi_dsi>;
14643 + __overlay__ {
14644 + #address-cells = <1>;
14645 + #size-cells = <0>;
14646 + status = "okay";
14647 +
14648 + irs1125: irs1125@3D {
14649 + compatible = "infineon,irs1125";
14650 + reg = <0x3D>;
14651 + status = "okay";
14652 +
14653 + pwdn-gpios = <&gpio 5 0>;
14654 + clocks = <&irs1125_clk>;
14655 +
14656 + port {
14657 + irs1125_0: endpoint {
14658 + remote-endpoint = <&csi1_ep>;
14659 + clock-lanes = <0>;
14660 + data-lanes = <1 2>;
14661 + clock-noncontinuous;
14662 + link-frequencies =
14663 + /bits/ 64 <297000000>;
14664 + };
14665 + };
14666 + };
14667 + };
14668 + };
14669 +
14670 + fragment@1 {
14671 + target = <&csi1>;
14672 + __overlay__ {
14673 + status = "okay";
14674 +
14675 + port {
14676 + csi1_ep: endpoint {
14677 + remote-endpoint = <&irs1125_0>;
14678 + data-lanes = <1 2>;
14679 + clock-noncontinuous;
14680 + };
14681 + };
14682 + };
14683 + };
14684 +
14685 + fragment@2 {
14686 + target = <&i2c0if>;
14687 + __overlay__ {
14688 + status = "okay";
14689 + };
14690 + };
14691 +
14692 + fragment@3 {
14693 + target = <&i2c0mux>;
14694 + __overlay__ {
14695 + status = "okay";
14696 + };
14697 + };
14698 +
14699 + fragment@4 {
14700 + target-path="/__overrides__";
14701 + __overlay__ {
14702 + cam0-pwdn-ctrl = <&irs1125>,"pwdn-gpios:0";
14703 + cam0-pwdn = <&irs1125>,"pwdn-gpios:4";
14704 + };
14705 + };
14706 +
14707 + fragment@5 {
14708 + target-path = "/";
14709 + __overlay__ {
14710 + irs1125_clk: camera-clk {
14711 + compatible = "fixed-clock";
14712 + #clock-cells = <0>;
14713 + clock-frequency = <26000000>;
14714 + };
14715 + };
14716 + };
14717 +};
14718 diff --git a/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
14719 new file mode 100644
14720 index 000000000000..585c7dbcdf7f
14721 --- /dev/null
14722 +++ b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
14723 @@ -0,0 +1,309 @@
14724 +// Overlay for JEDEC SPI-NOR Flash Devices (aka m25p80)
14725 +
14726 +// dtparams:
14727 +// flash-spi<n>-<m> - Enables flash device on SPI<n>, CS#<m>.
14728 +// flash-fastr-spi<n>-<m> - Enables flash device with fast read capability on SPI<n>, CS#<m>.
14729 +//
14730 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
14731 +//
14732 +// Example: A single flash device with fast read capability on SPI0, CS#0:
14733 +// dtoverlay=jedec-spi-nor:flash-fastr-spi0-0
14734 +
14735 +/dts-v1/;
14736 +/plugin/;
14737 +
14738 +/ {
14739 + compatible = "brcm,bcm2835";
14740 +
14741 + // disable spi-dev on spi0.0
14742 + fragment@0 {
14743 + target = <&spidev0>;
14744 + __dormant__ {
14745 + status = "disabled";
14746 + };
14747 + };
14748 +
14749 + // disable spi-dev on spi0.1
14750 + fragment@1 {
14751 + target = <&spidev1>;
14752 + __dormant__ {
14753 + status = "disabled";
14754 + };
14755 + };
14756 +
14757 + // disable spi-dev on spi1.0
14758 + fragment@2 {
14759 + target-path = "spi1/spidev@0";
14760 + __dormant__ {
14761 + status = "disabled";
14762 + };
14763 + };
14764 +
14765 + // disable spi-dev on spi1.1
14766 + fragment@3 {
14767 + target-path = "spi1/spidev@1";
14768 + __dormant__ {
14769 + status = "disabled";
14770 + };
14771 + };
14772 +
14773 + // disable spi-dev on spi1.2
14774 + fragment@4 {
14775 + target-path = "spi1/spidev@2";
14776 + __dormant__ {
14777 + status = "disabled";
14778 + };
14779 + };
14780 +
14781 + // disable spi-dev on spi2.0
14782 + fragment@5 {
14783 + target-path = "spi2/spidev@0";
14784 + __dormant__ {
14785 + status = "disabled";
14786 + };
14787 + };
14788 +
14789 + // disable spi-dev on spi2.1
14790 + fragment@6 {
14791 + target-path = "spi2/spidev@1";
14792 + __dormant__ {
14793 + status = "disabled";
14794 + };
14795 + };
14796 +
14797 + // disable spi-dev on spi2.2
14798 + fragment@7 {
14799 + target-path = "spi2/spidev@2";
14800 + __dormant__ {
14801 + status = "disabled";
14802 + };
14803 + };
14804 +
14805 + // enable flash on spi0.0
14806 + fragment@8 {
14807 + target = <&spi0>;
14808 + __dormant__ {
14809 + status = "okay";
14810 + #address-cells = <1>;
14811 + #size-cells = <0>;
14812 + spi_nor_00: spi_nor@0 {
14813 + #address-cells = <1>;
14814 + #size-cells = <1>;
14815 + compatible = "jedec,spi-nor";
14816 + reg = <0>;
14817 + spi-max-frequency = <500000>;
14818 + };
14819 + };
14820 + };
14821 +
14822 + // enable flash on spi0.1
14823 + fragment@9 {
14824 + target = <&spi0>;
14825 + __dormant__ {
14826 + status = "okay";
14827 + #address-cells = <1>;
14828 + #size-cells = <0>;
14829 + spi_nor_01: spi_nor@1 {
14830 + #address-cells = <1>;
14831 + #size-cells = <1>;
14832 + compatible = "jedec,spi-nor";
14833 + reg = <1>;
14834 + spi-max-frequency = <500000>;
14835 + };
14836 + };
14837 + };
14838 +
14839 + // enable flash on spi1.0
14840 + fragment@10 {
14841 + target = <&spi1>;
14842 + __dormant__ {
14843 + status = "okay";
14844 + #address-cells = <1>;
14845 + #size-cells = <0>;
14846 + spi_nor_10: spi_nor@0 {
14847 + #address-cells = <1>;
14848 + #size-cells = <1>;
14849 + compatible = "jedec,spi-nor";
14850 + reg = <0>;
14851 + spi-max-frequency = <500000>;
14852 + };
14853 + };
14854 + };
14855 +
14856 + // enable flash on spi1.1
14857 + fragment@11 {
14858 + target = <&spi1>;
14859 + __dormant__ {
14860 + status = "okay";
14861 + #address-cells = <1>;
14862 + #size-cells = <0>;
14863 + spi_nor_11: spi_nor@1 {
14864 + #address-cells = <1>;
14865 + #size-cells = <1>;
14866 + compatible = "jedec,spi-nor";
14867 + reg = <1>;
14868 + spi-max-frequency = <500000>;
14869 + };
14870 + };
14871 + };
14872 +
14873 + // enable flash on spi1.2
14874 + fragment@12 {
14875 + target = <&spi1>;
14876 + __dormant__ {
14877 + status = "okay";
14878 + #address-cells = <1>;
14879 + #size-cells = <0>;
14880 + spi_nor_12: spi_nor@2 {
14881 + #address-cells = <1>;
14882 + #size-cells = <1>;
14883 + compatible = "jedec,spi-nor";
14884 + reg = <2>;
14885 + spi-max-frequency = <500000>;
14886 + };
14887 + };
14888 + };
14889 +
14890 + // enable flash on spi2.0
14891 + fragment@13 {
14892 + target = <&spi2>;
14893 + __dormant__ {
14894 + status = "okay";
14895 + #address-cells = <1>;
14896 + #size-cells = <0>;
14897 + spi_nor_20: spi_nor@0 {
14898 + #address-cells = <1>;
14899 + #size-cells = <1>;
14900 + compatible = "jedec,spi-nor";
14901 + reg = <0>;
14902 + spi-max-frequency = <500000>;
14903 + };
14904 + };
14905 + };
14906 +
14907 + // enable flash on spi2.1
14908 + fragment@14 {
14909 + target = <&spi2>;
14910 + __dormant__ {
14911 + status = "okay";
14912 + #address-cells = <1>;
14913 + #size-cells = <0>;
14914 + spi_nor_21: spi_nor@1 {
14915 + #address-cells = <1>;
14916 + #size-cells = <1>;
14917 + compatible = "jedec,spi-nor";
14918 + reg = <1>;
14919 + spi-max-frequency = <500000>;
14920 + };
14921 + };
14922 + };
14923 +
14924 + // enable flash on spi2.2
14925 + fragment@15 {
14926 + target = <&spi2>;
14927 + __dormant__ {
14928 + status = "okay";
14929 + #address-cells = <1>;
14930 + #size-cells = <0>;
14931 + spi_nor_22: spi_nor@2 {
14932 + #address-cells = <1>;
14933 + #size-cells = <1>;
14934 + compatible = "jedec,spi-nor";
14935 + reg = <2>;
14936 + spi-max-frequency = <500000>;
14937 + };
14938 + };
14939 + };
14940 +
14941 + // Enable fast read for device on spi0.0.
14942 + // Use default active low interrupt signalling.
14943 + fragment@16 {
14944 + target = <&spi_nor_00>;
14945 + __dormant__ {
14946 + m25p,fast-read;
14947 + };
14948 + };
14949 +
14950 + // Enable fast read for device on spi0.1.
14951 + // Use default active low interrupt signalling.
14952 + fragment@17 {
14953 + target = <&spi_nor_01>;
14954 + __dormant__ {
14955 + m25p,fast-read;
14956 + };
14957 + };
14958 +
14959 + // Enable fast read for device on spi1.0.
14960 + // Use default active low interrupt signalling.
14961 + fragment@18 {
14962 + target = <&spi_nor_10>;
14963 + __dormant__ {
14964 + m25p,fast-read;
14965 + };
14966 + };
14967 +
14968 + // Enable fast read for device on spi1.1.
14969 + // Use default active low interrupt signalling.
14970 + fragment@19 {
14971 + target = <&spi_nor_11>;
14972 + __dormant__ {
14973 + m25p,fast-read;
14974 + };
14975 + };
14976 +
14977 + // Enable fast read for device on spi1.2.
14978 + // Use default active low interrupt signalling.
14979 + fragment@20 {
14980 + target = <&spi_nor_12>;
14981 + __dormant__ {
14982 + m25p,fast-read;
14983 + };
14984 + };
14985 +
14986 + // Enable fast read for device on spi2.0.
14987 + // Use default active low interrupt signalling.
14988 + fragment@21 {
14989 + target = <&spi_nor_20>;
14990 + __dormant__ {
14991 + m25p,fast-read;
14992 + };
14993 + };
14994 +
14995 + // Enable fast read for device on spi2.1.
14996 + // Use default active low interrupt signalling.
14997 + fragment@22 {
14998 + target = <&spi_nor_21>;
14999 + __dormant__ {
15000 + m25p,fast-read;
15001 + };
15002 + };
15003 +
15004 + // Enable fast read for device on spi2.2.
15005 + // Use default active low interrupt signalling.
15006 + fragment@23 {
15007 + target = <&spi_nor_22>;
15008 + __dormant__ {
15009 + m25p,fast-read;
15010 + };
15011 + };
15012 +
15013 + __overrides__ {
15014 + flash-spi0-0 = <0>,"+0+8";
15015 + flash-spi0-1 = <0>,"+1+9";
15016 + flash-spi1-0 = <0>,"+2+10";
15017 + flash-spi1-1 = <0>,"+3+11";
15018 + flash-spi1-2 = <0>,"+4+12";
15019 + flash-spi2-0 = <0>,"+5+13";
15020 + flash-spi2-1 = <0>,"+6+14";
15021 + flash-spi2-2 = <0>,"+7+15";
15022 + flash-fastr-spi0-0 = <0>,"+0+8+16";
15023 + flash-fastr-spi0-1 = <0>,"+1+9+17";
15024 + flash-fastr-spi1-0 = <0>,"+2+10+18";
15025 + flash-fastr-spi1-1 = <0>,"+3+11+19";
15026 + flash-fastr-spi1-2 = <0>,"+4+12+20";
15027 + flash-fastr-spi2-0 = <0>,"+5+13+21";
15028 + flash-fastr-spi2-1 = <0>,"+6+14+22";
15029 + flash-fastr-spi2-2 = <0>,"+7+15+23";
15030 + };
15031 +};
15032 +
15033 diff --git a/arch/arm/boot/dts/overlays/justboom-both-overlay.dts b/arch/arm/boot/dts/overlays/justboom-both-overlay.dts
15034 new file mode 100644
15035 index 000000000000..9c42670631c0
15036 --- /dev/null
15037 +++ b/arch/arm/boot/dts/overlays/justboom-both-overlay.dts
15038 @@ -0,0 +1,65 @@
15039 +// SPDX-License-Identifier: GPL-2.0
15040 +// Definitions for JustBoom Both (Digi+DAC)
15041 +/dts-v1/;
15042 +/plugin/;
15043 +
15044 +/ {
15045 + compatible = "brcm,bcm2835";
15046 +
15047 + fragment@0 {
15048 + target = <&i2s>;
15049 + __overlay__ {
15050 + status = "okay";
15051 + };
15052 + };
15053 +
15054 + fragment@1 {
15055 + target = <&i2c1>;
15056 + __overlay__ {
15057 + #address-cells = <1>;
15058 + #size-cells = <0>;
15059 + status = "okay";
15060 +
15061 + wm8804@3b {
15062 + #sound-dai-cells = <0>;
15063 + compatible = "wlf,wm8804";
15064 + reg = <0x3b>;
15065 + PVDD-supply = <&vdd_3v3_reg>;
15066 + DVDD-supply = <&vdd_3v3_reg>;
15067 + status = "okay";
15068 + };
15069 + };
15070 + };
15071 +
15072 + fragment@2 {
15073 + target = <&i2c1>;
15074 + __overlay__ {
15075 + #address-cells = <1>;
15076 + #size-cells = <0>;
15077 + status = "okay";
15078 +
15079 + pcm5122@4d {
15080 + #sound-dai-cells = <0>;
15081 + compatible = "ti,pcm5122";
15082 + reg = <0x4d>;
15083 + AVDD-supply = <&vdd_3v3_reg>;
15084 + DVDD-supply = <&vdd_3v3_reg>;
15085 + CPVDD-supply = <&vdd_3v3_reg>;
15086 + status = "okay";
15087 + };
15088 + };
15089 + };
15090 +
15091 + fragment@3 {
15092 + target = <&sound>;
15093 + frag3: __overlay__ {
15094 + compatible = "justboom,justboom-both";
15095 + i2s-controller = <&i2s>;
15096 + status = "okay";
15097 + };
15098 + };
15099 +
15100 + __overrides__ {
15101 + 24db_digital_gain = <&frag3>,"justboom,24db_digital_gain?";
15102 + };
15103 +};
15104 diff --git a/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
15105 new file mode 100644
15106 index 000000000000..d00515dca419
15107 --- /dev/null
15108 +++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
15109 @@ -0,0 +1,46 @@
15110 +// Definitions for JustBoom DAC
15111 +/dts-v1/;
15112 +/plugin/;
15113 +
15114 +/ {
15115 + compatible = "brcm,bcm2835";
15116 +
15117 + fragment@0 {
15118 + target = <&i2s>;
15119 + __overlay__ {
15120 + status = "okay";
15121 + };
15122 + };
15123 +
15124 + fragment@1 {
15125 + target = <&i2c1>;
15126 + __overlay__ {
15127 + #address-cells = <1>;
15128 + #size-cells = <0>;
15129 + status = "okay";
15130 +
15131 + pcm5122@4d {
15132 + #sound-dai-cells = <0>;
15133 + compatible = "ti,pcm5122";
15134 + reg = <0x4d>;
15135 + AVDD-supply = <&vdd_3v3_reg>;
15136 + DVDD-supply = <&vdd_3v3_reg>;
15137 + CPVDD-supply = <&vdd_3v3_reg>;
15138 + status = "okay";
15139 + };
15140 + };
15141 + };
15142 +
15143 + fragment@2 {
15144 + target = <&sound>;
15145 + frag2: __overlay__ {
15146 + compatible = "justboom,justboom-dac";
15147 + i2s-controller = <&i2s>;
15148 + status = "okay";
15149 + };
15150 + };
15151 +
15152 + __overrides__ {
15153 + 24db_digital_gain = <&frag2>,"justboom,24db_digital_gain?";
15154 + };
15155 +};
15156 diff --git a/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
15157 new file mode 100644
15158 index 000000000000..e73336029c54
15159 --- /dev/null
15160 +++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
15161 @@ -0,0 +1,41 @@
15162 +// Definitions for JustBoom Digi
15163 +/dts-v1/;
15164 +/plugin/;
15165 +
15166 +/ {
15167 + compatible = "brcm,bcm2835";
15168 +
15169 + fragment@0 {
15170 + target = <&i2s>;
15171 + __overlay__ {
15172 + status = "okay";
15173 + };
15174 + };
15175 +
15176 + fragment@1 {
15177 + target = <&i2c1>;
15178 + __overlay__ {
15179 + #address-cells = <1>;
15180 + #size-cells = <0>;
15181 + status = "okay";
15182 +
15183 + wm8804@3b {
15184 + #sound-dai-cells = <0>;
15185 + compatible = "wlf,wm8804";
15186 + reg = <0x3b>;
15187 + PVDD-supply = <&vdd_3v3_reg>;
15188 + DVDD-supply = <&vdd_3v3_reg>;
15189 + status = "okay";
15190 + };
15191 + };
15192 + };
15193 +
15194 + fragment@2 {
15195 + target = <&sound>;
15196 + __overlay__ {
15197 + compatible = "justboom,justboom-digi";
15198 + i2s-controller = <&i2s>;
15199 + status = "okay";
15200 + };
15201 + };
15202 +};
15203 diff --git a/arch/arm/boot/dts/overlays/ltc294x-overlay.dts b/arch/arm/boot/dts/overlays/ltc294x-overlay.dts
15204 new file mode 100644
15205 index 000000000000..6d971f3649ca
15206 --- /dev/null
15207 +++ b/arch/arm/boot/dts/overlays/ltc294x-overlay.dts
15208 @@ -0,0 +1,86 @@
15209 +/dts-v1/;
15210 +/plugin/;
15211 +
15212 +
15213 +/ {
15214 + compatible = "brcm,bcm2835";
15215 +
15216 + fragment@0 {
15217 + target = <&i2c_arm>;
15218 + __dormant__ {
15219 + #address-cells = <1>;
15220 + #size-cells = <0>;
15221 + status = "okay";
15222 +
15223 + ltc2941: ltc2941@64 {
15224 + compatible = "lltc,ltc2941";
15225 + reg = <0x64>;
15226 + lltc,resistor-sense = <50>;
15227 + lltc,prescaler-exponent = <7>;
15228 + };
15229 + };
15230 + };
15231 +
15232 + fragment@1 {
15233 + target = <&i2c_arm>;
15234 + __dormant__ {
15235 + #address-cells = <1>;
15236 + #size-cells = <0>;
15237 + status = "okay";
15238 +
15239 + ltc2942: ltc2942@64 {
15240 + compatible = "lltc,ltc2942";
15241 + reg = <0x64>;
15242 + lltc,resistor-sense = <50>;
15243 + lltc,prescaler-exponent = <7>;
15244 + };
15245 + };
15246 + };
15247 +
15248 + fragment@2 {
15249 + target = <&i2c_arm>;
15250 + __dormant__ {
15251 + #address-cells = <1>;
15252 + #size-cells = <0>;
15253 + status = "okay";
15254 +
15255 + ltc2943: ltc2943@64 {
15256 + compatible = "lltc,ltc2943";
15257 + reg = <0x64>;
15258 + lltc,resistor-sense = <50>;
15259 + lltc,prescaler-exponent = <7>;
15260 + };
15261 + };
15262 + };
15263 +
15264 + fragment@3 {
15265 + target = <&i2c_arm>;
15266 + __dormant__ {
15267 + #address-cells = <1>;
15268 + #size-cells = <0>;
15269 + status = "okay";
15270 +
15271 + ltc2944: ltc2944@64 {
15272 + compatible = "lltc,ltc2944";
15273 + reg = <0x64>;
15274 + lltc,resistor-sense = <50>;
15275 + lltc,prescaler-exponent = <7>;
15276 + };
15277 + };
15278 + };
15279 +
15280 + __overrides__ {
15281 + ltc2941 = <0>,"+0";
15282 + ltc2942 = <0>,"+1";
15283 + ltc2943 = <0>,"+2";
15284 + ltc2944 = <0>,"+3";
15285 + resistor-sense = <&ltc2941>, "lltc,resistor-sense:0",
15286 + <&ltc2942>, "lltc,resistor-sense:0",
15287 + <&ltc2943>, "lltc,resistor-sense:0",
15288 + <&ltc2944>, "lltc,resistor-sense:0";
15289 + prescaler-exponent = <&ltc2941>, "lltc,prescaler-exponent:0",
15290 + <&ltc2942>, "lltc,prescaler-exponent:0",
15291 + <&ltc2943>, "lltc,prescaler-exponent:0",
15292 + <&ltc2944>, "lltc,prescaler-exponent:0";
15293 + };
15294 +};
15295 diff --git a/arch/arm/boot/dts/overlays/max98357a-overlay.dts b/arch/arm/boot/dts/overlays/max98357a-overlay.dts
15296 new file mode 100644
15297 index 000000000000..9e2afb05b7cb
15298 --- /dev/null
15299 +++ b/arch/arm/boot/dts/overlays/max98357a-overlay.dts
15300 @@ -0,0 +1,84 @@
15301 +// Overlay for Maxim MAX98357A audio DAC
15302 +
15303 +// dtparams:
15304 +// no-sdmode - SD_MODE pin not managed by driver.
15305 +// sdmode-pin - Specify GPIO pin to which SD_MODE is connected (default 4).
15306 +
15307 +/dts-v1/;
15308 +/plugin/;
15309 +
15310 +/ {
15311 + compatible = "brcm,bcm2835";
15312 +
15313 + /* Enable I2S */
15314 + fragment@0 {
15315 + target = <&i2s>;
15316 + __overlay__ {
15317 + status = "okay";
15318 + };
15319 + };
15320 +
15321 + /* DAC whose SD_MODE pin is managed by driver (via GPIO pin) */
15322 + fragment@1 {
15323 + target-path = "/";
15324 + __overlay__ {
15325 + max98357a_dac: max98357a {
15326 + compatible = "maxim,max98357a";
15327 + #sound-dai-cells = <0>;
15328 + sdmode-gpios = <&gpio 4 0>; /* 2nd word overwritten by sdmode-pin parameter */
15329 + status = "okay";
15330 + };
15331 + };
15332 + };
15333 +
15334 + /* DAC whose SD_MODE pin is not managed by driver */
15335 + fragment@2 {
15336 + target-path = "/";
15337 + __dormant__ {
15338 + max98357a_nsd: max98357a {
15339 + compatible = "maxim,max98357a";
15340 + #sound-dai-cells = <0>;
15341 + status = "okay";
15342 + };
15343 + };
15344 + };
15345 +
15346 + /* Soundcard connecting I2S to DAC with SD_MODE */
15347 + fragment@3 {
15348 + target = <&sound>;
15349 + __overlay__ {
15350 + compatible = "simple-audio-card";
15351 + simple-audio-card,format = "i2s";
15352 + simple-audio-card,name = "MAX98357A";
15353 + status = "okay";
15354 + simple-audio-card,cpu {
15355 + sound-dai = <&i2s>;
15356 + };
15357 + simple-audio-card,codec {
15358 + sound-dai = <&max98357a_dac>;
15359 + };
15360 + };
15361 + };
15362 +
15363 + /* Soundcard connecting I2S to DAC without SD_MODE */
15364 + fragment@4 {
15365 + target = <&sound>;
15366 + __dormant__ {
15367 + compatible = "simple-audio-card";
15368 + simple-audio-card,format = "i2s";
15369 + simple-audio-card,name = "MAX98357A";
15370 + status = "okay";
15371 + simple-audio-card,cpu {
15372 + sound-dai = <&i2s>;
15373 + };
15374 + simple-audio-card,codec {
15375 + sound-dai = <&max98357a_nsd>;
15376 + };
15377 + };
15378 + };
15379 +
15380 + __overrides__ {
15381 + no-sdmode = <0>,"-1+2-3+4";
15382 + sdmode-pin = <&max98357a_dac>,"sdmode-gpios:4";
15383 + };
15384 +};
15385 diff --git a/arch/arm/boot/dts/overlays/maxtherm-overlay.dts b/arch/arm/boot/dts/overlays/maxtherm-overlay.dts
15386 new file mode 100644
15387 index 000000000000..34d5727069ec
15388 --- /dev/null
15389 +++ b/arch/arm/boot/dts/overlays/maxtherm-overlay.dts
15390 @@ -0,0 +1,166 @@
15391 +/*
15392 + * Universal device tree overlay for SPI devices
15393 + */
15394 +
15395 +/dts-v1/;
15396 +/plugin/;
15397 +
15398 +/ {
15399 + compatible = "brcm,bcm2835";
15400 +
15401 + fragment@0 {
15402 + target = <&spidev0>;
15403 + __dormant__ {
15404 + status = "disabled";
15405 + };
15406 + };
15407 +
15408 + fragment@1 {
15409 + target = <&spidev1>;
15410 + __dormant__ {
15411 + status = "disabled";
15412 + };
15413 + };
15414 +
15415 + fragment@2 {
15416 + target-path = "spi1/spidev@0";
15417 + __dormant__ {
15418 + status = "disabled";
15419 + };
15420 + };
15421 +
15422 + fragment@3 {
15423 + target-path = "spi1/spidev@1";
15424 + __dormant__ {
15425 + status = "disabled";
15426 + };
15427 + };
15428 +
15429 + fragment@4 {
15430 + target-path = "spi1/spidev@2";
15431 + __dormant__ {
15432 + status = "disabled";
15433 + };
15434 + };
15435 +
15436 + fragment@5 {
15437 + target-path = "spi2/spidev@0";
15438 + __dormant__ {
15439 + status = "disabled";
15440 + };
15441 + };
15442 +
15443 + fragment@6 {
15444 + target-path = "spi2/spidev@1";
15445 + __dormant__ {
15446 + status = "disabled";
15447 + };
15448 + };
15449 +
15450 + fragment@7 {
15451 + target-path = "spi2/spidev@2";
15452 + __dormant__ {
15453 + status = "disabled";
15454 + };
15455 + };
15456 +
15457 + maxfrag: fragment@8 {
15458 + target = <&spi0>;
15459 + __overlay__ {
15460 + status = "okay";
15461 + #address-cells = <1>;
15462 + #size-cells = <0>;
15463 +
15464 + max: maxtherm@0 {
15465 + compatible = "maxim,max6675";
15466 + reg = <0>;
15467 + spi-max-frequency = <500000>;
15468 + };
15469 + };
15470 + };
15471 +
15472 + fragment@9 {
15473 + target = <&max>;
15474 + __dormant__ {
15475 + compatible = "maxim,max31855e", "maxim,max31855";
15476 + };
15477 + };
15478 +
15479 + fragment@10 {
15480 + target = <&max>;
15481 + __dormant__ {
15482 + compatible = "maxim,max31855j", "maxim,max31855";
15483 + };
15484 + };
15485 +
15486 + fragment@11 {
15487 + target = <&max>;
15488 + __dormant__ {
15489 + compatible = "maxim,max31855k", "maxim,max31855";
15490 + };
15491 + };
15492 +
15493 + fragment@12 {
15494 + target = <&max>;
15495 + __dormant__ {
15496 + compatible = "maxim,max31855n", "maxim,max31855";
15497 + };
15498 + };
15499 +
15500 + fragment@13 {
15501 + target = <&max>;
15502 + __dormant__ {
15503 + compatible = "maxim,max31855r", "maxim,max31855";
15504 + };
15505 + };
15506 +
15507 + fragment@14 {
15508 + target = <&max>;
15509 + __dormant__ {
15510 + compatible = "maxim,max31855s", "maxim,max31855";
15511 + };
15512 + };
15513 +
15514 + fragment@15 {
15515 + target = <&max>;
15516 + __dormant__ {
15517 + compatible = "maxim,max31855t", "maxim,max31855";
15518 + };
15519 + };
15520 +
15521 + __overrides__ {
15522 + spi0-0 = <0>, "+0",
15523 + <&maxfrag>,"target:0=",<&spi0>,
15524 + <&max>,"reg:0=0";
15525 + spi0-1 = <0>, "+1",
15526 + <&maxfrag>,"target:0=",<&spi0>,
15527 + <&max>,"reg:0=1";
15528 + spi1-0 = <0>, "+2",
15529 + <&maxfrag>,"target:0=",<&spi1>,
15530 + <&max>,"reg:0=0";
15531 + spi1-1 = <0>, "+3",
15532 + <&maxfrag>,"target:0=",<&spi1>,
15533 + <&max>,"reg:0=1";
15534 + spi1-2 = <0>, "+4",
15535 + <&maxfrag>,"target:0=",<&spi1>,
15536 + <&max>,"reg:0=2";
15537 + spi2-0 = <0>, "+5",
15538 + <&maxfrag>,"target:0=",<&spi2>,
15539 + <&max>,"reg:0=0";
15540 + spi2-1 = <0>, "+6",
15541 + <&maxfrag>,"target:0=",<&spi2>,
15542 + <&max>,"reg:0=1";
15543 + spi2-2 = <0>, "+7",
15544 + <&maxfrag>,"target:0=",<&spi2>,
15545 + <&max>,"reg:0=2";
15546 + max6675 = <&max>,"compatible=maxim,max6675";
15547 + max31855 = <&max>,"compatible=maxim,max31855";
15548 + max31855e = <0>,"+9";
15549 + max31855j = <0>,"+10";
15550 + max31855k = <0>,"+11";
15551 + max31855n = <0>,"+12";
15552 + max31855r = <0>,"+13";
15553 + max31855s = <0>,"+14";
15554 + max31855t = <0>,"+15";
15555 + };
15556 +};
15557 diff --git a/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
15558 new file mode 100644
15559 index 000000000000..840dd9b31db4
15560 --- /dev/null
15561 +++ b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
15562 @@ -0,0 +1,64 @@
15563 +// Definitions for mbed DAC
15564 +/dts-v1/;
15565 +/plugin/;
15566 +
15567 +/ {
15568 + compatible = "brcm,bcm2835";
15569 +
15570 + fragment@0 {
15571 + target = <&i2s>;
15572 + __overlay__ {
15573 + status = "okay";
15574 + };
15575 + };
15576 +
15577 + fragment@1 {
15578 + target = <&i2c1>;
15579 + __overlay__ {
15580 + #address-cells = <1>;
15581 + #size-cells = <0>;
15582 + status = "okay";
15583 +
15584 + tlv320aic23: codec@1a {
15585 + #sound-dai-cells = <0>;
15586 + reg = <0x1a>;
15587 + compatible = "ti,tlv320aic23";
15588 + status = "okay";
15589 + };
15590 + };
15591 + };
15592 +
15593 + fragment@2 {
15594 + target = <&sound>;
15595 + __overlay__ {
15596 + compatible = "simple-audio-card";
15597 + i2s-controller = <&i2s>;
15598 + status = "okay";
15599 +
15600 + simple-audio-card,name = "mbed-DAC";
15601 +
15602 + simple-audio-card,widgets =
15603 + "Microphone", "Mic Jack",
15604 + "Line", "Line In",
15605 + "Headphone", "Headphone Jack";
15606 +
15607 + simple-audio-card,routing =
15608 + "Headphone Jack", "LHPOUT",
15609 + "Headphone Jack", "RHPOUT",
15610 + "LLINEIN", "Line In",
15611 + "RLINEIN", "Line In",
15612 + "MICIN", "Mic Jack";
15613 +
15614 + simple-audio-card,format = "i2s";
15615 +
15616 + simple-audio-card,cpu {
15617 + sound-dai = <&i2s>;
15618 + };
15619 +
15620 + sound_master: simple-audio-card,codec {
15621 + sound-dai = <&tlv320aic23>;
15622 + system-clock-frequency = <12288000>;
15623 + };
15624 + };
15625 + };
15626 +};
15627 diff --git a/arch/arm/boot/dts/overlays/mcp23017-overlay.dts b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
15628 new file mode 100644
15629 index 000000000000..c546d8ba7e6d
15630 --- /dev/null
15631 +++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
15632 @@ -0,0 +1,69 @@
15633 +// Definitions for MCP23017 Gpio Extender from Microchip Semiconductor
15634 +
15635 +/dts-v1/;
15636 +/plugin/;
15637 +
15638 +/ {
15639 + compatible = "brcm,bcm2835";
15640 +
15641 + fragment@0 {
15642 + target = <&i2c1>;
15643 + __overlay__ {
15644 + status = "okay";
15645 + };
15646 + };
15647 +
15648 + fragment@1 {
15649 + target = <&gpio>;
15650 + __overlay__ {
15651 + mcp23017_pins: mcp23017_pins@20 {
15652 + brcm,pins = <4>;
15653 + brcm,function = <0>;
15654 + };
15655 + };
15656 + };
15657 +
15658 + fragment@2 {
15659 + target = <&i2c1>;
15660 + __overlay__ {
15661 + #address-cells = <1>;
15662 + #size-cells = <0>;
15663 +
15664 + mcp23017: mcp@20 {
15665 + compatible = "microchip,mcp23017";
15666 + reg = <0x20>;
15667 + gpio-controller;
15668 + #gpio-cells = <2>;
15669 +
15670 + status = "okay";
15671 + };
15672 + };
15673 + };
15674 +
15675 + fragment@3 {
15676 + target = <&mcp23017>;
15677 + __dormant__ {
15678 + compatible = "microchip,mcp23008";
15679 + };
15680 + };
15681 +
15682 + fragment@4 {
15683 + target = <&mcp23017>;
15684 + mcp23017_irq: __overlay__ {
15685 + #interrupt-cells=<2>;
15686 + interrupt-parent = <&gpio>;
15687 + interrupts = <4 2>;
15688 + interrupt-controller;
15689 + microchip,irq-mirror;
15690 + };
15691 + };
15692 +
15693 + __overrides__ {
15694 + gpiopin = <&mcp23017_pins>,"brcm,pins:0",
15695 + <&mcp23017_irq>,"interrupts:0";
15696 + addr = <&mcp23017>,"reg:0", <&mcp23017_pins>,"reg:0";
15697 + mcp23008 = <0>,"=3";
15698 + noints = <0>,"!1!4";
15699 + };
15700 +};
15701 +
15702 diff --git a/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
15703 new file mode 100644
15704 index 000000000000..484d64b225fb
15705 --- /dev/null
15706 +++ b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
15707 @@ -0,0 +1,732 @@
15708 +// Overlay for MCP23S08/17 GPIO Extenders from Microchip Semiconductor
15709 +
15710 +// dtparams:
15711 +// s08-spi<n>-<m>-present - 4-bit integer, bitmap indicating MCP23S08 devices present on SPI<n>, CS#<m>.
15712 +// s17-spi<n>-<m>-present - 8-bit integer, bitmap indicating MCP23S17 devices present on SPI<n>, CS#<m>.
15713 +// s08-spi<n>-<m>-int-gpio - integer, enables interrupts on a single MCP23S08 device on SPI<n>, CS#<m>, specifies the GPIO pin to which INT output is connected.
15714 +// s17-spi<n>-<m>-int-gpio - integer, enables mirrored interrupts on a single MCP23S17 device on SPI<n>, CS#<m>, specifies the GPIO pin to which either INTA or INTB output is connected.
15715 +//
15716 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
15717 +// If interrupts are enabled for a device on a given CS# on a SPI bus, that device must be the only one present on that SPI bus/CS#.
15718 +//
15719 +// Example 1: A single MCP23S17 device on SPI0, CS#0 with its SPI addr set to 0 and INTA output connected to GPIO25:
15720 +// dtoverlay=mcp23s17:s17-spi0-0-present=1,s17-spi0-0-int-gpio=25
15721 +//
15722 +// Example 2: Two MCP23S08 devices on SPI1, CS#0 with their addrs set to 2 and 3. Three MCP23S17 devices on SPI1, CS#1 with their addrs set to 0, 1 and 7:
15723 +// dtoverlay=spi1-2cs
15724 +// dtoverlay=mcp23s17:s08-spi1-0-present=12,s17-spi1-1-present=131
15725 +
15726 +/dts-v1/;
15727 +/plugin/;
15728 +
15729 +/ {
15730 + compatible = "brcm,bcm2835";
15731 +
15732 + // disable spi-dev on spi0.0
15733 + fragment@0 {
15734 + target = <&spidev0>;
15735 + __dormant__ {
15736 + status = "disabled";
15737 + };
15738 + };
15739 +
15740 + // disable spi-dev on spi0.1
15741 + fragment@1 {
15742 + target = <&spidev1>;
15743 + __dormant__ {
15744 + status = "disabled";
15745 + };
15746 + };
15747 +
15748 + // disable spi-dev on spi1.0
15749 + fragment@2 {
15750 + target-path = "spi1/spidev@0";
15751 + __dormant__ {
15752 + status = "disabled";
15753 + };
15754 + };
15755 +
15756 + // disable spi-dev on spi1.1
15757 + fragment@3 {
15758 + target-path = "spi1/spidev@1";
15759 + __dormant__ {
15760 + status = "disabled";
15761 + };
15762 + };
15763 +
15764 + // disable spi-dev on spi1.2
15765 + fragment@4 {
15766 + target-path = "spi1/spidev@2";
15767 + __dormant__ {
15768 + status = "disabled";
15769 + };
15770 + };
15771 +
15772 + // disable spi-dev on spi2.0
15773 + fragment@5 {
15774 + target-path = "spi2/spidev@0";
15775 + __dormant__ {
15776 + status = "disabled";
15777 + };
15778 + };
15779 +
15780 + // disable spi-dev on spi2.1
15781 + fragment@6 {
15782 + target-path = "spi2/spidev@1";
15783 + __dormant__ {
15784 + status = "disabled";
15785 + };
15786 + };
15787 +
15788 + // disable spi-dev on spi2.2
15789 + fragment@7 {
15790 + target-path = "spi2/spidev@2";
15791 + __dormant__ {
15792 + status = "disabled";
15793 + };
15794 + };
15795 +
15796 + // enable one or more mcp23s08s on spi0.0
15797 + fragment@8 {
15798 + target = <&spi0>;
15799 + __dormant__ {
15800 + status = "okay";
15801 + #address-cells = <1>;
15802 + #size-cells = <0>;
15803 + mcp23s08_00: mcp23s08@0 {
15804 + compatible = "microchip,mcp23s08";
15805 + gpio-controller;
15806 + #gpio-cells = <2>;
15807 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-0-present parameter */
15808 + reg = <0>;
15809 + spi-max-frequency = <500000>;
15810 + status = "okay";
15811 + #interrupt-cells=<2>;
15812 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-0-int-gpio parameter */
15813 + };
15814 + };
15815 + };
15816 +
15817 + // enable one or more mcp23s08s on spi0.1
15818 + fragment@9 {
15819 + target = <&spi0>;
15820 + __dormant__ {
15821 + status = "okay";
15822 + #address-cells = <1>;
15823 + #size-cells = <0>;
15824 + mcp23s08_01: mcp23s08@1 {
15825 + compatible = "microchip,mcp23s08";
15826 + gpio-controller;
15827 + #gpio-cells = <2>;
15828 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-1-present parameter */
15829 + reg = <1>;
15830 + spi-max-frequency = <500000>;
15831 + status = "okay";
15832 + #interrupt-cells=<2>;
15833 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-1-int-gpio parameter */
15834 + };
15835 + };
15836 + };
15837 +
15838 + // enable one or more mcp23s08s on spi1.0
15839 + fragment@10 {
15840 + target = <&spi1>;
15841 + __dormant__ {
15842 + status = "okay";
15843 + #address-cells = <1>;
15844 + #size-cells = <0>;
15845 + mcp23s08_10: mcp23s08@0 {
15846 + compatible = "microchip,mcp23s08";
15847 + gpio-controller;
15848 + #gpio-cells = <2>;
15849 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-0-present parameter */
15850 + reg = <0>;
15851 + spi-max-frequency = <500000>;
15852 + status = "okay";
15853 + #interrupt-cells=<2>;
15854 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-0-int-gpio parameter */
15855 + };
15856 + };
15857 + };
15858 +
15859 + // enable one or more mcp23s08s on spi1.1
15860 + fragment@11 {
15861 + target = <&spi1>;
15862 + __dormant__ {
15863 + status = "okay";
15864 + #address-cells = <1>;
15865 + #size-cells = <0>;
15866 + mcp23s08_11: mcp23s08@1 {
15867 + compatible = "microchip,mcp23s08";
15868 + gpio-controller;
15869 + #gpio-cells = <2>;
15870 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-1-present parameter */
15871 + reg = <1>;
15872 + spi-max-frequency = <500000>;
15873 + status = "okay";
15874 + #interrupt-cells=<2>;
15875 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-1-int-gpio parameter */
15876 + };
15877 + };
15878 + };
15879 +
15880 + // enable one or more mcp23s08s on spi1.2
15881 + fragment@12 {
15882 + target = <&spi1>;
15883 + __dormant__ {
15884 + status = "okay";
15885 + #address-cells = <1>;
15886 + #size-cells = <0>;
15887 + mcp23s08_12: mcp23s08@2 {
15888 + compatible = "microchip,mcp23s08";
15889 + gpio-controller;
15890 + #gpio-cells = <2>;
15891 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-2-present parameter */
15892 + reg = <2>;
15893 + spi-max-frequency = <500000>;
15894 + status = "okay";
15895 + #interrupt-cells=<2>;
15896 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-2-int-gpio parameter */
15897 + };
15898 + };
15899 + };
15900 +
15901 + // enable one or more mcp23s08s on spi2.0
15902 + fragment@13 {
15903 + target = <&spi2>;
15904 + __dormant__ {
15905 + status = "okay";
15906 + #address-cells = <1>;
15907 + #size-cells = <0>;
15908 + mcp23s08_20: mcp23s08@0 {
15909 + compatible = "microchip,mcp23s08";
15910 + gpio-controller;
15911 + #gpio-cells = <2>;
15912 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-0-present parameter */
15913 + reg = <0>;
15914 + spi-max-frequency = <500000>;
15915 + status = "okay";
15916 + #interrupt-cells=<2>;
15917 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-0-int-gpio parameter */
15918 + };
15919 + };
15920 + };
15921 +
15922 + // enable one or more mcp23s08s on spi2.1
15923 + fragment@14 {
15924 + target = <&spi2>;
15925 + __dormant__ {
15926 + status = "okay";
15927 + #address-cells = <1>;
15928 + #size-cells = <0>;
15929 + mcp23s08_21: mcp23s08@1 {
15930 + compatible = "microchip,mcp23s08";
15931 + gpio-controller;
15932 + #gpio-cells = <2>;
15933 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-1-present parameter */
15934 + reg = <1>;
15935 + spi-max-frequency = <500000>;
15936 + status = "okay";
15937 + #interrupt-cells=<2>;
15938 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-1-int-gpio parameter */
15939 + };
15940 + };
15941 + };
15942 +
15943 + // enable one or more mcp23s08s on spi2.2
15944 + fragment@15 {
15945 + target = <&spi2>;
15946 + __dormant__ {
15947 + status = "okay";
15948 + #address-cells = <1>;
15949 + #size-cells = <0>;
15950 + mcp23s08_22: mcp23s08@2 {
15951 + compatible = "microchip,mcp23s08";
15952 + gpio-controller;
15953 + #gpio-cells = <2>;
15954 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-2-present parameter */
15955 + reg = <2>;
15956 + spi-max-frequency = <500000>;
15957 + status = "okay";
15958 + #interrupt-cells=<2>;
15959 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-2-int-gpio parameter */
15960 + };
15961 + };
15962 + };
15963 +
15964 + // enable one or more mcp23s17s on spi0.0
15965 + fragment@16 {
15966 + target = <&spi0>;
15967 + __dormant__ {
15968 + status = "okay";
15969 + #address-cells = <1>;
15970 + #size-cells = <0>;
15971 + mcp23s17_00: mcp23s17@0 {
15972 + compatible = "microchip,mcp23s17";
15973 + gpio-controller;
15974 + #gpio-cells = <2>;
15975 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-0-present parameter */
15976 + reg = <0>;
15977 + spi-max-frequency = <500000>;
15978 + status = "okay";
15979 + #interrupt-cells=<2>;
15980 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-0-int-gpio parameter */
15981 + };
15982 + };
15983 + };
15984 +
15985 + // enable one or more mcp23s17s on spi0.1
15986 + fragment@17 {
15987 + target = <&spi0>;
15988 + __dormant__ {
15989 + status = "okay";
15990 + #address-cells = <1>;
15991 + #size-cells = <0>;
15992 + mcp23s17_01: mcp23s17@1 {
15993 + compatible = "microchip,mcp23s17";
15994 + gpio-controller;
15995 + #gpio-cells = <2>;
15996 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-1-present parameter */
15997 + reg = <1>;
15998 + spi-max-frequency = <500000>;
15999 + status = "okay";
16000 + #interrupt-cells=<2>;
16001 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-1-int-gpio parameter */
16002 + };
16003 + };
16004 + };
16005 +
16006 + // enable one or more mcp23s17s on spi1.0
16007 + fragment@18 {
16008 + target = <&spi1>;
16009 + __dormant__ {
16010 + status = "okay";
16011 + #address-cells = <1>;
16012 + #size-cells = <0>;
16013 + mcp23s17_10: mcp23s17@0 {
16014 + compatible = "microchip,mcp23s17";
16015 + gpio-controller;
16016 + #gpio-cells = <2>;
16017 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-0-present parameter */
16018 + reg = <0>;
16019 + spi-max-frequency = <500000>;
16020 + status = "okay";
16021 + #interrupt-cells=<2>;
16022 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-0-int-gpio parameter */
16023 + };
16024 + };
16025 + };
16026 +
16027 + // enable one or more mcp23s17s on spi1.1
16028 + fragment@19 {
16029 + target = <&spi1>;
16030 + __dormant__ {
16031 + status = "okay";
16032 + #address-cells = <1>;
16033 + #size-cells = <0>;
16034 + mcp23s17_11: mcp23s17@1 {
16035 + compatible = "microchip,mcp23s17";
16036 + gpio-controller;
16037 + #gpio-cells = <2>;
16038 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-1-present parameter */
16039 + reg = <1>;
16040 + spi-max-frequency = <500000>;
16041 + status = "okay";
16042 + #interrupt-cells=<2>;
16043 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-1-int-gpio parameter */
16044 + };
16045 + };
16046 + };
16047 +
16048 + // enable one or more mcp23s17s on spi1.2
16049 + fragment@20 {
16050 + target = <&spi1>;
16051 + __dormant__ {
16052 + status = "okay";
16053 + #address-cells = <1>;
16054 + #size-cells = <0>;
16055 + mcp23s17_12: mcp23s17@2 {
16056 + compatible = "microchip,mcp23s17";
16057 + gpio-controller;
16058 + #gpio-cells = <2>;
16059 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-2-present parameter */
16060 + reg = <2>;
16061 + spi-max-frequency = <500000>;
16062 + status = "okay";
16063 + #interrupt-cells=<2>;
16064 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-2-int-gpio parameter */
16065 + };
16066 + };
16067 + };
16068 +
16069 + // enable one or more mcp23s17s on spi2.0
16070 + fragment@21 {
16071 + target = <&spi2>;
16072 + __dormant__ {
16073 + status = "okay";
16074 + #address-cells = <1>;
16075 + #size-cells = <0>;
16076 + mcp23s17_20: mcp23s17@0 {
16077 + compatible = "microchip,mcp23s17";
16078 + gpio-controller;
16079 + #gpio-cells = <2>;
16080 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-0-present parameter */
16081 + reg = <0>;
16082 + spi-max-frequency = <500000>;
16083 + status = "okay";
16084 + #interrupt-cells=<2>;
16085 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-0-int-gpio parameter */
16086 + };
16087 + };
16088 + };
16089 +
16090 + // enable one or more mcp23s17s on spi2.1
16091 + fragment@22 {
16092 + target = <&spi2>;
16093 + __dormant__ {
16094 + status = "okay";
16095 + #address-cells = <1>;
16096 + #size-cells = <0>;
16097 + mcp23s17_21: mcp23s17@1 {
16098 + compatible = "microchip,mcp23s17";
16099 + gpio-controller;
16100 + #gpio-cells = <2>;
16101 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-1-present parameter */
16102 + reg = <1>;
16103 + spi-max-frequency = <500000>;
16104 + status = "okay";
16105 + #interrupt-cells=<2>;
16106 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-1-int-gpio parameter */
16107 + };
16108 + };
16109 + };
16110 +
16111 + // enable one or more mcp23s17s on spi2.2
16112 + fragment@23 {
16113 + target = <&spi2>;
16114 + __dormant__ {
16115 + status = "okay";
16116 + #address-cells = <1>;
16117 + #size-cells = <0>;
16118 + mcp23s17_22: mcp23s17@2 {
16119 + compatible = "microchip,mcp23s17";
16120 + gpio-controller;
16121 + #gpio-cells = <2>;
16122 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-2-present parameter */
16123 + reg = <2>;
16124 + spi-max-frequency = <500000>;
16125 + status = "okay";
16126 + #interrupt-cells=<2>;
16127 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-2-int-gpio parameter */
16128 + };
16129 + };
16130 + };
16131 +
16132 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.0 as a input with no pull-up/down
16133 + fragment@24 {
16134 + target = <&gpio>;
16135 + __dormant__ {
16136 + spi0_0_int_pins: spi0_0_int_pins {
16137 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-0-int-gpio parameter */
16138 + brcm,function = <0>;
16139 + brcm,pull = <0>;
16140 + };
16141 + };
16142 + };
16143 +
16144 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.1 as a input with no pull-up/down
16145 + fragment@25 {
16146 + target = <&gpio>;
16147 + __dormant__ {
16148 + spi0_1_int_pins: spi0_1_int_pins {
16149 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-1-int-gpio parameter */
16150 + brcm,function = <0>;
16151 + brcm,pull = <0>;
16152 + };
16153 + };
16154 + };
16155 +
16156 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.0 as a input with no pull-up/down
16157 + fragment@26 {
16158 + target = <&gpio>;
16159 + __dormant__ {
16160 + spi1_0_int_pins: spi1_0_int_pins {
16161 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-0-int-gpio parameter */
16162 + brcm,function = <0>;
16163 + brcm,pull = <0>;
16164 + };
16165 + };
16166 + };
16167 +
16168 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.1 as a input with no pull-up/down
16169 + fragment@27 {
16170 + target = <&gpio>;
16171 + __dormant__ {
16172 + spi1_1_int_pins: spi1_1_int_pins {
16173 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-1-int-gpio parameter */
16174 + brcm,function = <0>;
16175 + brcm,pull = <0>;
16176 + };
16177 + };
16178 + };
16179 +
16180 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.2 as a input with no pull-up/down
16181 + fragment@28 {
16182 + target = <&gpio>;
16183 + __dormant__ {
16184 + spi1_2_int_pins: spi1_2_int_pins {
16185 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-2-int-gpio parameter */
16186 + brcm,function = <0>;
16187 + brcm,pull = <0>;
16188 + };
16189 + };
16190 + };
16191 +
16192 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.0 as a input with no pull-up/down
16193 + fragment@29 {
16194 + target = <&gpio>;
16195 + __dormant__ {
16196 + spi2_0_int_pins: spi2_0_int_pins {
16197 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-0-int-gpio parameter */
16198 + brcm,function = <0>;
16199 + brcm,pull = <0>;
16200 + };
16201 + };
16202 + };
16203 +
16204 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.1 as a input with no pull-up/down
16205 + fragment@30 {
16206 + target = <&gpio>;
16207 + __dormant__ {
16208 + spi2_1_int_pins: spi2_1_int_pins {
16209 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-1-int-gpio parameter */
16210 + brcm,function = <0>;
16211 + brcm,pull = <0>;
16212 + };
16213 + };
16214 + };
16215 +
16216 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.2 as a input with no pull-up/down
16217 + fragment@31 {
16218 + target = <&gpio>;
16219 + __dormant__ {
16220 + spi2_2_int_pins: spi2_2_int_pins {
16221 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-2-int-gpio parameter */
16222 + brcm,function = <0>;
16223 + brcm,pull = <0>;
16224 + };
16225 + };
16226 + };
16227 +
16228 + // Enable interrupts for a mcp23s08 on spi0.0.
16229 + // Use default active low interrupt signalling.
16230 + fragment@32 {
16231 + target = <&mcp23s08_00>;
16232 + __dormant__ {
16233 + interrupt-parent = <&gpio>;
16234 + interrupt-controller;
16235 + };
16236 + };
16237 +
16238 + // Enable interrupts for a mcp23s08 on spi0.1.
16239 + // Use default active low interrupt signalling.
16240 + fragment@33 {
16241 + target = <&mcp23s08_01>;
16242 + __dormant__ {
16243 + interrupt-parent = <&gpio>;
16244 + interrupt-controller;
16245 + };
16246 + };
16247 +
16248 + // Enable interrupts for a mcp23s08 on spi1.0.
16249 + // Use default active low interrupt signalling.
16250 + fragment@34 {
16251 + target = <&mcp23s08_10>;
16252 + __dormant__ {
16253 + interrupt-parent = <&gpio>;
16254 + interrupt-controller;
16255 + };
16256 + };
16257 +
16258 + // Enable interrupts for a mcp23s08 on spi1.1.
16259 + // Use default active low interrupt signalling.
16260 + fragment@35 {
16261 + target = <&mcp23s08_11>;
16262 + __dormant__ {
16263 + interrupt-parent = <&gpio>;
16264 + interrupt-controller;
16265 + };
16266 + };
16267 +
16268 + // Enable interrupts for a mcp23s08 on spi1.2.
16269 + // Use default active low interrupt signalling.
16270 + fragment@36 {
16271 + target = <&mcp23s08_12>;
16272 + __dormant__ {
16273 + interrupt-parent = <&gpio>;
16274 + interrupt-controller;
16275 + };
16276 + };
16277 +
16278 + // Enable interrupts for a mcp23s08 on spi2.0.
16279 + // Use default active low interrupt signalling.
16280 + fragment@37 {
16281 + target = <&mcp23s08_20>;
16282 + __dormant__ {
16283 + interrupt-parent = <&gpio>;
16284 + interrupt-controller;
16285 + };
16286 + };
16287 +
16288 + // Enable interrupts for a mcp23s08 on spi2.1.
16289 + // Use default active low interrupt signalling.
16290 + fragment@38 {
16291 + target = <&mcp23s08_21>;
16292 + __dormant__ {
16293 + interrupt-parent = <&gpio>;
16294 + interrupt-controller;
16295 + };
16296 + };
16297 +
16298 + // Enable interrupts for a mcp23s08 on spi2.2.
16299 + // Use default active low interrupt signalling.
16300 + fragment@39 {
16301 + target = <&mcp23s08_22>;
16302 + __dormant__ {
16303 + interrupt-parent = <&gpio>;
16304 + interrupt-controller;
16305 + };
16306 + };
16307 +
16308 + // Enable interrupts for a mcp23s17 on spi0.0.
16309 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
16310 + // Use default active low interrupt signalling.
16311 + fragment@40 {
16312 + target = <&mcp23s17_00>;
16313 + __dormant__ {
16314 + interrupt-parent = <&gpio>;
16315 + interrupt-controller;
16316 + microchip,irq-mirror;
16317 + };
16318 + };
16319 +
16320 + // Enable interrupts for a mcp23s17 on spi0.1.
16321 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
16322 + // Configure INTA/B outputs of mcp23s08/17 as active low.
16323 + fragment@41 {
16324 + target = <&mcp23s17_01>;
16325 + __dormant__ {
16326 + interrupt-parent = <&gpio>;
16327 + interrupt-controller;
16328 + microchip,irq-mirror;
16329 + };
16330 + };
16331 +
16332 + // Enable interrupts for a mcp23s17 on spi1.0.
16333 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
16334 + // Configure INTA/B outputs of mcp23s08/17 as active low.
16335 + fragment@42 {
16336 + target = <&mcp23s17_10>;
16337 + __dormant__ {
16338 + interrupt-parent = <&gpio>;
16339 + interrupt-controller;
16340 + microchip,irq-mirror;
16341 + };
16342 + };
16343 +
16344 + // Enable interrupts for a mcp23s17 on spi1.1.
16345 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
16346 + // Configure INTA/B outputs of mcp23s08/17 as active low.
16347 + fragment@43 {
16348 + target = <&mcp23s17_11>;
16349 + __dormant__ {
16350 + interrupt-parent = <&gpio>;
16351 + interrupt-controller;
16352 + microchip,irq-mirror;
16353 + };
16354 + };
16355 +
16356 + // Enable interrupts for a mcp23s17 on spi1.2.
16357 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
16358 + // Configure INTA/B outputs of mcp23s08/17 as active low.
16359 + fragment@44 {
16360 + target = <&mcp23s17_12>;
16361 + __dormant__ {
16362 + interrupt-parent = <&gpio>;
16363 + interrupt-controller;
16364 + microchip,irq-mirror;
16365 + };
16366 + };
16367 +
16368 + // Enable interrupts for a mcp23s17 on spi2.0.
16369 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
16370 + // Configure INTA/B outputs of mcp23s08/17 as active low.
16371 + fragment@45 {
16372 + target = <&mcp23s17_20>;
16373 + __dormant__ {
16374 + interrupt-parent = <&gpio>;
16375 + interrupt-controller;
16376 + microchip,irq-mirror;
16377 + };
16378 + };
16379 +
16380 + // Enable interrupts for a mcp23s17 on spi2.1.
16381 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
16382 + // Configure INTA/B outputs of mcp23s08/17 as active low.
16383 + fragment@46 {
16384 + target = <&mcp23s17_21>;
16385 + __dormant__ {
16386 + interrupt-parent = <&gpio>;
16387 + interrupt-controller;
16388 + microchip,irq-mirror;
16389 + };
16390 + };
16391 +
16392 + // Enable interrupts for a mcp23s17 on spi2.2.
16393 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
16394 + // Configure INTA/B outputs of mcp23s08/17 as active low.
16395 + fragment@47 {
16396 + target = <&mcp23s17_22>;
16397 + __dormant__ {
16398 + interrupt-parent = <&gpio>;
16399 + interrupt-controller;
16400 + microchip,irq-mirror;
16401 + };
16402 + };
16403 +
16404 + __overrides__ {
16405 + s08-spi0-0-present = <0>,"+0+8", <&mcp23s08_00>,"microchip,spi-present-mask:0";
16406 + s08-spi0-1-present = <0>,"+1+9", <&mcp23s08_01>,"microchip,spi-present-mask:0";
16407 + s08-spi1-0-present = <0>,"+2+10", <&mcp23s08_10>,"microchip,spi-present-mask:0";
16408 + s08-spi1-1-present = <0>,"+3+11", <&mcp23s08_11>,"microchip,spi-present-mask:0";
16409 + s08-spi1-2-present = <0>,"+4+12", <&mcp23s08_12>,"microchip,spi-present-mask:0";
16410 + s08-spi2-0-present = <0>,"+5+13", <&mcp23s08_20>,"microchip,spi-present-mask:0";
16411 + s08-spi2-1-present = <0>,"+6+14", <&mcp23s08_21>,"microchip,spi-present-mask:0";
16412 + s08-spi2-2-present = <0>,"+7+15", <&mcp23s08_22>,"microchip,spi-present-mask:0";
16413 + s17-spi0-0-present = <0>,"+0+16", <&mcp23s17_00>,"microchip,spi-present-mask:0";
16414 + s17-spi0-1-present = <0>,"+1+17", <&mcp23s17_01>,"microchip,spi-present-mask:0";
16415 + s17-spi1-0-present = <0>,"+2+18", <&mcp23s17_10>,"microchip,spi-present-mask:0";
16416 + s17-spi1-1-present = <0>,"+3+19", <&mcp23s17_11>,"microchip,spi-present-mask:0";
16417 + s17-spi1-2-present = <0>,"+4+20", <&mcp23s17_12>,"microchip,spi-present-mask:0";
16418 + s17-spi2-0-present = <0>,"+5+21", <&mcp23s17_20>,"microchip,spi-present-mask:0";
16419 + s17-spi2-1-present = <0>,"+6+22", <&mcp23s17_21>,"microchip,spi-present-mask:0";
16420 + s17-spi2-2-present = <0>,"+7+23", <&mcp23s17_22>,"microchip,spi-present-mask:0";
16421 + s08-spi0-0-int-gpio = <0>,"+24+32", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s08_00>,"interrupts:0";
16422 + s08-spi0-1-int-gpio = <0>,"+25+33", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s08_01>,"interrupts:0";
16423 + s08-spi1-0-int-gpio = <0>,"+26+34", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s08_10>,"interrupts:0";
16424 + s08-spi1-1-int-gpio = <0>,"+27+35", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s08_11>,"interrupts:0";
16425 + s08-spi1-2-int-gpio = <0>,"+28+36", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s08_12>,"interrupts:0";
16426 + s08-spi2-0-int-gpio = <0>,"+29+37", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s08_20>,"interrupts:0";
16427 + s08-spi2-1-int-gpio = <0>,"+30+38", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s08_21>,"interrupts:0";
16428 + s08-spi2-2-int-gpio = <0>,"+31+39", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s08_22>,"interrupts:0";
16429 + s17-spi0-0-int-gpio = <0>,"+24+40", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s17_00>,"interrupts:0";
16430 + s17-spi0-1-int-gpio = <0>,"+25+41", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s17_01>,"interrupts:0";
16431 + s17-spi1-0-int-gpio = <0>,"+26+42", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s17_10>,"interrupts:0";
16432 + s17-spi1-1-int-gpio = <0>,"+27+43", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s17_11>,"interrupts:0";
16433 + s17-spi1-2-int-gpio = <0>,"+28+44", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s17_12>,"interrupts:0";
16434 + s17-spi2-0-int-gpio = <0>,"+29+45", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s17_20>,"interrupts:0";
16435 + s17-spi2-1-int-gpio = <0>,"+30+46", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s17_21>,"interrupts:0";
16436 + s17-spi2-2-int-gpio = <0>,"+31+47", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s17_22>,"interrupts:0";
16437 + };
16438 +};
16439 +
16440 diff --git a/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts b/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
16441 new file mode 100755
16442 index 000000000000..46f143d809cc
16443 --- /dev/null
16444 +++ b/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
16445 @@ -0,0 +1,73 @@
16446 +/*
16447 + * Device tree overlay for mcp251x/can0 on spi0.0
16448 + */
16449 +
16450 +/dts-v1/;
16451 +/plugin/;
16452 +
16453 +/ {
16454 + compatible = "brcm,bcm2835";
16455 + /* disable spi-dev for spi0.0 */
16456 + fragment@0 {
16457 + target = <&spi0>;
16458 + __overlay__ {
16459 + status = "okay";
16460 + };
16461 + };
16462 +
16463 + fragment@1 {
16464 + target = <&spidev0>;
16465 + __overlay__ {
16466 + status = "disabled";
16467 + };
16468 + };
16469 +
16470 + /* the interrupt pin of the can-controller */
16471 + fragment@2 {
16472 + target = <&gpio>;
16473 + __overlay__ {
16474 + can0_pins: can0_pins {
16475 + brcm,pins = <25>;
16476 + brcm,function = <0>; /* input */
16477 + };
16478 + };
16479 + };
16480 +
16481 + /* the clock/oscillator of the can-controller */
16482 + fragment@3 {
16483 + target-path = "/";
16484 + __overlay__ {
16485 + /* external oscillator of mcp2515 on SPI0.0 */
16486 + can0_osc: can0_osc {
16487 + compatible = "fixed-clock";
16488 + #clock-cells = <0>;
16489 + clock-frequency = <16000000>;
16490 + };
16491 + };
16492 + };
16493 +
16494 + /* the spi config of the can-controller itself binding everything together */
16495 + fragment@4 {
16496 + target = <&spi0>;
16497 + __overlay__ {
16498 + /* needed to avoid dtc warning */
16499 + #address-cells = <1>;
16500 + #size-cells = <0>;
16501 + can0: mcp2515@0 {
16502 + reg = <0>;
16503 + compatible = "microchip,mcp2515";
16504 + pinctrl-names = "default";
16505 + pinctrl-0 = <&can0_pins>;
16506 + spi-max-frequency = <10000000>;
16507 + interrupt-parent = <&gpio>;
16508 + interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
16509 + clocks = <&can0_osc>;
16510 + };
16511 + };
16512 + };
16513 + __overrides__ {
16514 + oscillator = <&can0_osc>,"clock-frequency:0";
16515 + spimaxfrequency = <&can0>,"spi-max-frequency:0";
16516 + interrupt = <&can0_pins>,"brcm,pins:0",<&can0>,"interrupts:0";
16517 + };
16518 +};
16519 diff --git a/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts b/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
16520 new file mode 100644
16521 index 000000000000..0a8dd576818e
16522 --- /dev/null
16523 +++ b/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
16524 @@ -0,0 +1,73 @@
16525 +/*
16526 + * Device tree overlay for mcp251x/can1 on spi0.1 edited by petit_miner
16527 + */
16528 +
16529 +/dts-v1/;
16530 +/plugin/;
16531 +
16532 +/ {
16533 + compatible = "brcm,bcm2835";
16534 + /* disable spi-dev for spi0.1 */
16535 + fragment@0 {
16536 + target = <&spi0>;
16537 + __overlay__ {
16538 + status = "okay";
16539 + };
16540 + };
16541 +
16542 + fragment@1 {
16543 + target = <&spidev1>;
16544 + __overlay__ {
16545 + status = "disabled";
16546 + };
16547 + };
16548 +
16549 + /* the interrupt pin of the can-controller */
16550 + fragment@2 {
16551 + target = <&gpio>;
16552 + __overlay__ {
16553 + can1_pins: can1_pins {
16554 + brcm,pins = <25>;
16555 + brcm,function = <0>; /* input */
16556 + };
16557 + };
16558 + };
16559 +
16560 + /* the clock/oscillator of the can-controller */
16561 + fragment@3 {
16562 + target-path = "/";
16563 + __overlay__ {
16564 + /* external oscillator of mcp2515 on spi0.1 */
16565 + can1_osc: can1_osc {
16566 + compatible = "fixed-clock";
16567 + #clock-cells = <0>;
16568 + clock-frequency = <16000000>;
16569 + };
16570 + };
16571 + };
16572 +
16573 + /* the spi config of the can-controller itself binding everything together */
16574 + fragment@4 {
16575 + target = <&spi0>;
16576 + __overlay__ {
16577 + /* needed to avoid dtc warning */
16578 + #address-cells = <1>;
16579 + #size-cells = <0>;
16580 + can1: mcp2515@1 {
16581 + reg = <1>;
16582 + compatible = "microchip,mcp2515";
16583 + pinctrl-names = "default";
16584 + pinctrl-0 = <&can1_pins>;
16585 + spi-max-frequency = <10000000>;
16586 + interrupt-parent = <&gpio>;
16587 + interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
16588 + clocks = <&can1_osc>;
16589 + };
16590 + };
16591 + };
16592 + __overrides__ {
16593 + oscillator = <&can1_osc>,"clock-frequency:0";
16594 + spimaxfrequency = <&can1>,"spi-max-frequency:0";
16595 + interrupt = <&can1_pins>,"brcm,pins:0",<&can1>,"interrupts:0";
16596 + };
16597 +};
16598 diff --git a/arch/arm/boot/dts/overlays/mcp3008-overlay.dts b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts
16599 new file mode 100755
16600 index 000000000000..957fdb9310af
16601 --- /dev/null
16602 +++ b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts
16603 @@ -0,0 +1,205 @@
16604 +/*
16605 + * Device tree overlay for Microchip mcp3008 10-Bit A/D Converters
16606 + */
16607 +
16608 +/dts-v1/;
16609 +/plugin/;
16610 +
16611 +/ {
16612 + compatible = "brcm,bcm2835";
16613 +
16614 + fragment@0 {
16615 + target = <&spidev0>;
16616 + __dormant__ {
16617 + status = "disabled";
16618 + };
16619 + };
16620 +
16621 + fragment@1 {
16622 + target = <&spidev1>;
16623 + __dormant__ {
16624 + status = "disabled";
16625 + };
16626 + };
16627 +
16628 + fragment@2 {
16629 + target-path = "spi1/spidev@0";
16630 + __dormant__ {
16631 + status = "disabled";
16632 + };
16633 + };
16634 +
16635 + fragment@3 {
16636 + target-path = "spi1/spidev@1";
16637 + __dormant__ {
16638 + status = "disabled";
16639 + };
16640 + };
16641 +
16642 + fragment@4 {
16643 + target-path = "spi1/spidev@2";
16644 + __dormant__ {
16645 + status = "disabled";
16646 + };
16647 + };
16648 +
16649 + fragment@5 {
16650 + target-path = "spi2/spidev@0";
16651 + __dormant__ {
16652 + status = "disabled";
16653 + };
16654 + };
16655 +
16656 + fragment@6 {
16657 + target-path = "spi2/spidev@1";
16658 + __dormant__ {
16659 + status = "disabled";
16660 + };
16661 + };
16662 +
16663 + fragment@7 {
16664 + target-path = "spi2/spidev@2";
16665 + __dormant__ {
16666 + status = "disabled";
16667 + };
16668 + };
16669 +
16670 + fragment@8 {
16671 + target = <&spi0>;
16672 + __dormant__ {
16673 + status = "okay";
16674 + #address-cells = <1>;
16675 + #size-cells = <0>;
16676 +
16677 + mcp3008_00: mcp3008@0 {
16678 + compatible = "microchip,mcp3008";
16679 + reg = <0>;
16680 + spi-max-frequency = <1600000>;
16681 + };
16682 + };
16683 + };
16684 +
16685 + fragment@9 {
16686 + target = <&spi0>;
16687 + __dormant__ {
16688 + status = "okay";
16689 + #address-cells = <1>;
16690 + #size-cells = <0>;
16691 +
16692 + mcp3008_01: mcp3008@1 {
16693 + compatible = "microchip,mcp3008";
16694 + reg = <1>;
16695 + spi-max-frequency = <1600000>;
16696 + };
16697 + };
16698 + };
16699 +
16700 + fragment@10 {
16701 + target = <&spi1>;
16702 + __dormant__ {
16703 + status = "okay";
16704 + #address-cells = <1>;
16705 + #size-cells = <0>;
16706 +
16707 + mcp3008_10: mcp3008@0 {
16708 + compatible = "microchip,mcp3008";
16709 + reg = <0>;
16710 + spi-max-frequency = <1600000>;
16711 + };
16712 + };
16713 + };
16714 +
16715 + fragment@11 {
16716 + target = <&spi1>;
16717 + __dormant__ {
16718 + status = "okay";
16719 + #address-cells = <1>;
16720 + #size-cells = <0>;
16721 +
16722 + mcp3008_11: mcp3008@1 {
16723 + compatible = "microchip,mcp3008";
16724 + reg = <1>;
16725 + spi-max-frequency = <1600000>;
16726 + };
16727 + };
16728 + };
16729 +
16730 + fragment@12 {
16731 + target = <&spi1>;
16732 + __dormant__ {
16733 + status = "okay";
16734 + #address-cells = <1>;
16735 + #size-cells = <0>;
16736 +
16737 + mcp3008_12: mcp3008@2 {
16738 + compatible = "microchip,mcp3008";
16739 + reg = <2>;
16740 + spi-max-frequency = <1600000>;
16741 + };
16742 + };
16743 + };
16744 +
16745 + fragment@13 {
16746 + target = <&spi2>;
16747 + __dormant__ {
16748 + status = "okay";
16749 + #address-cells = <1>;
16750 + #size-cells = <0>;
16751 +
16752 + mcp3008_20: mcp3008@0 {
16753 + compatible = "microchip,mcp3008";
16754 + reg = <0>;
16755 + spi-max-frequency = <1600000>;
16756 + };
16757 + };
16758 + };
16759 +
16760 + fragment@14 {
16761 + target = <&spi2>;
16762 + __dormant__ {
16763 + status = "okay";
16764 + #address-cells = <1>;
16765 + #size-cells = <0>;
16766 +
16767 + mcp3008_21: mcp3008@1 {
16768 + compatible = "microchip,mcp3008";
16769 + reg = <1>;
16770 + spi-max-frequency = <1600000>;
16771 + };
16772 + };
16773 + };
16774 +
16775 + fragment@15 {
16776 + target = <&spi2>;
16777 + __dormant__ {
16778 + status = "okay";
16779 + #address-cells = <1>;
16780 + #size-cells = <0>;
16781 +
16782 + mcp3008_22: mcp3008@2 {
16783 + compatible = "microchip,mcp3008";
16784 + reg = <2>;
16785 + spi-max-frequency = <1600000>;
16786 + };
16787 + };
16788 + };
16789 +
16790 + __overrides__ {
16791 + spi0-0-present = <0>, "+0+8";
16792 + spi0-1-present = <0>, "+1+9";
16793 + spi1-0-present = <0>, "+2+10";
16794 + spi1-1-present = <0>, "+3+11";
16795 + spi1-2-present = <0>, "+4+12";
16796 + spi2-0-present = <0>, "+5+13";
16797 + spi2-1-present = <0>, "+6+14";
16798 + spi2-2-present = <0>, "+7+15";
16799 + spi0-0-speed = <&mcp3008_00>, "spi-max-frequency:0";
16800 + spi0-1-speed = <&mcp3008_01>, "spi-max-frequency:0";
16801 + spi1-0-speed = <&mcp3008_10>, "spi-max-frequency:0";
16802 + spi1-1-speed = <&mcp3008_11>, "spi-max-frequency:0";
16803 + spi1-2-speed = <&mcp3008_12>, "spi-max-frequency:0";
16804 + spi2-0-speed = <&mcp3008_20>, "spi-max-frequency:0";
16805 + spi2-1-speed = <&mcp3008_21>, "spi-max-frequency:0";
16806 + spi2-2-speed = <&mcp3008_22>, "spi-max-frequency:0";
16807 + };
16808 +};
16809 diff --git a/arch/arm/boot/dts/overlays/mcp3202-overlay.dts b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts
16810 new file mode 100755
16811 index 000000000000..8e4e9f60f285
16812 --- /dev/null
16813 +++ b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts
16814 @@ -0,0 +1,205 @@
16815 +/*
16816 + * Device tree overlay for Microchip mcp3202 12-Bit A/D Converters
16817 + */
16818 +
16819 +/dts-v1/;
16820 +/plugin/;
16821 +
16822 +/ {
16823 + compatible = "brcm,bcm2835";
16824 +
16825 + fragment@0 {
16826 + target = <&spidev0>;
16827 + __dormant__ {
16828 + status = "disabled";
16829 + };
16830 + };
16831 +
16832 + fragment@1 {
16833 + target = <&spidev1>;
16834 + __dormant__ {
16835 + status = "disabled";
16836 + };
16837 + };
16838 +
16839 + fragment@2 {
16840 + target-path = "spi1/spidev@0";
16841 + __dormant__ {
16842 + status = "disabled";
16843 + };
16844 + };
16845 +
16846 + fragment@3 {
16847 + target-path = "spi1/spidev@1";
16848 + __dormant__ {
16849 + status = "disabled";
16850 + };
16851 + };
16852 +
16853 + fragment@4 {
16854 + target-path = "spi1/spidev@2";
16855 + __dormant__ {
16856 + status = "disabled";
16857 + };
16858 + };
16859 +
16860 + fragment@5 {
16861 + target-path = "spi2/spidev@0";
16862 + __dormant__ {
16863 + status = "disabled";
16864 + };
16865 + };
16866 +
16867 + fragment@6 {
16868 + target-path = "spi2/spidev@1";
16869 + __dormant__ {
16870 + status = "disabled";
16871 + };
16872 + };
16873 +
16874 + fragment@7 {
16875 + target-path = "spi2/spidev@2";
16876 + __dormant__ {
16877 + status = "disabled";
16878 + };
16879 + };
16880 +
16881 + fragment@8 {
16882 + target = <&spi0>;
16883 + __dormant__ {
16884 + status = "okay";
16885 + #address-cells = <1>;
16886 + #size-cells = <0>;
16887 +
16888 + mcp3202_00: mcp3202@0 {
16889 + compatible = "mcp3202";
16890 + reg = <0>;
16891 + spi-max-frequency = <1600000>;
16892 + };
16893 + };
16894 + };
16895 +
16896 + fragment@9 {
16897 + target = <&spi0>;
16898 + __dormant__ {
16899 + status = "okay";
16900 + #address-cells = <1>;
16901 + #size-cells = <0>;
16902 +
16903 + mcp3202_01: mcp3202@1 {
16904 + compatible = "mcp3202";
16905 + reg = <1>;
16906 + spi-max-frequency = <1600000>;
16907 + };
16908 + };
16909 + };
16910 +
16911 + fragment@10 {
16912 + target = <&spi1>;
16913 + __dormant__ {
16914 + status = "okay";
16915 + #address-cells = <1>;
16916 + #size-cells = <0>;
16917 +
16918 + mcp3202_10: mcp3202@0 {
16919 + compatible = "mcp3202";
16920 + reg = <0>;
16921 + spi-max-frequency = <1600000>;
16922 + };
16923 + };
16924 + };
16925 +
16926 + fragment@11 {
16927 + target = <&spi1>;
16928 + __dormant__ {
16929 + status = "okay";
16930 + #address-cells = <1>;
16931 + #size-cells = <0>;
16932 +
16933 + mcp3202_11: mcp3202@1 {
16934 + compatible = "mcp3202";
16935 + reg = <1>;
16936 + spi-max-frequency = <1600000>;
16937 + };
16938 + };
16939 + };
16940 +
16941 + fragment@12 {
16942 + target = <&spi1>;
16943 + __dormant__ {
16944 + status = "okay";
16945 + #address-cells = <1>;
16946 + #size-cells = <0>;
16947 +
16948 + mcp3202_12: mcp3202@2 {
16949 + compatible = "mcp3202";
16950 + reg = <2>;
16951 + spi-max-frequency = <1600000>;
16952 + };
16953 + };
16954 + };
16955 +
16956 + fragment@13 {
16957 + target = <&spi2>;
16958 + __dormant__ {
16959 + status = "okay";
16960 + #address-cells = <1>;
16961 + #size-cells = <0>;
16962 +
16963 + mcp3202_20: mcp3202@0 {
16964 + compatible = "mcp3202";
16965 + reg = <0>;
16966 + spi-max-frequency = <1600000>;
16967 + };
16968 + };
16969 + };
16970 +
16971 + fragment@14 {
16972 + target = <&spi2>;
16973 + __dormant__ {
16974 + status = "okay";
16975 + #address-cells = <1>;
16976 + #size-cells = <0>;
16977 +
16978 + mcp3202_21: mcp3202@1 {
16979 + compatible = "mcp3202";
16980 + reg = <1>;
16981 + spi-max-frequency = <1600000>;
16982 + };
16983 + };
16984 + };
16985 +
16986 + fragment@15 {
16987 + target = <&spi2>;
16988 + __dormant__ {
16989 + status = "okay";
16990 + #address-cells = <1>;
16991 + #size-cells = <0>;
16992 +
16993 + mcp3202_22: mcp3202@2 {
16994 + compatible = "mcp3202";
16995 + reg = <2>;
16996 + spi-max-frequency = <1600000>;
16997 + };
16998 + };
16999 + };
17000 +
17001 + __overrides__ {
17002 + spi0-0-present = <0>, "+0+8";
17003 + spi0-1-present = <0>, "+1+9";
17004 + spi1-0-present = <0>, "+2+10";
17005 + spi1-1-present = <0>, "+3+11";
17006 + spi1-2-present = <0>, "+4+12";
17007 + spi2-0-present = <0>, "+5+13";
17008 + spi2-1-present = <0>, "+6+14";
17009 + spi2-2-present = <0>, "+7+15";
17010 + spi0-0-speed = <&mcp3202_00>, "spi-max-frequency:0";
17011 + spi0-1-speed = <&mcp3202_01>, "spi-max-frequency:0";
17012 + spi1-0-speed = <&mcp3202_10>, "spi-max-frequency:0";
17013 + spi1-1-speed = <&mcp3202_11>, "spi-max-frequency:0";
17014 + spi1-2-speed = <&mcp3202_12>, "spi-max-frequency:0";
17015 + spi2-0-speed = <&mcp3202_20>, "spi-max-frequency:0";
17016 + spi2-1-speed = <&mcp3202_21>, "spi-max-frequency:0";
17017 + spi2-2-speed = <&mcp3202_22>, "spi-max-frequency:0";
17018 + };
17019 +};
17020 diff --git a/arch/arm/boot/dts/overlays/mcp342x-overlay.dts b/arch/arm/boot/dts/overlays/mcp342x-overlay.dts
17021 new file mode 100644
17022 index 000000000000..714eca5a4b5e
17023 --- /dev/null
17024 +++ b/arch/arm/boot/dts/overlays/mcp342x-overlay.dts
17025 @@ -0,0 +1,164 @@
17026 +// Overlay for MCP3421-8 ADCs from Microchip Semiconductor
17027 +
17028 +/dts-v1/;
17029 +/plugin/;
17030 +
17031 +/ {
17032 + compatible = "brcm,bcm2835";
17033 +
17034 + fragment@0 {
17035 + target = <&i2c1>;
17036 + __dormant__ {
17037 + #address-cells = <1>;
17038 + #size-cells = <0>;
17039 +
17040 + status = "okay";
17041 +
17042 + mcp3421: mcp@68 {
17043 + reg = <0x68>;
17044 + compatible = "microchip,mcp3421";
17045 +
17046 + status = "okay";
17047 + };
17048 + };
17049 + };
17050 +
17051 + fragment@1 {
17052 + target = <&i2c1>;
17053 + __dormant__ {
17054 + #address-cells = <1>;
17055 + #size-cells = <0>;
17056 +
17057 + status = "okay";
17058 +
17059 + mcp3422: mcp@68 {
17060 + reg = <0x68>;
17061 + compatible = "microchip,mcp3422";
17062 +
17063 + status = "okay";
17064 + };
17065 + };
17066 + };
17067 +
17068 + fragment@2 {
17069 + target = <&i2c1>;
17070 + __dormant__ {
17071 + #address-cells = <1>;
17072 + #size-cells = <0>;
17073 +
17074 + status = "okay";
17075 +
17076 + mcp3423: mcp@68 {
17077 + reg = <0x68>;
17078 + compatible = "microchip,mcp3423";
17079 +
17080 + status = "okay";
17081 + };
17082 + };
17083 + };
17084 +
17085 + fragment@3 {
17086 + target = <&i2c1>;
17087 + __dormant__ {
17088 + #address-cells = <1>;
17089 + #size-cells = <0>;
17090 +
17091 + status = "okay";
17092 +
17093 + mcp3424: mcp@68 {
17094 + reg = <0x68>;
17095 + compatible = "microchip,mcp3424";
17096 +
17097 + status = "okay";
17098 + };
17099 + };
17100 + };
17101 +
17102 + fragment@4 {
17103 + target = <&i2c1>;
17104 + __dormant__ {
17105 + #address-cells = <1>;
17106 + #size-cells = <0>;
17107 +
17108 + status = "okay";
17109 +
17110 + mcp3425: mcp@68 {
17111 + reg = <0x68>;
17112 + compatible = "microchip,mcp3425","mcp3425";
17113 +
17114 + status = "okay";
17115 + };
17116 + };
17117 + };
17118 +
17119 + fragment@5 {
17120 + target = <&i2c1>;
17121 + __dormant__ {
17122 + #address-cells = <1>;
17123 + #size-cells = <0>;
17124 +
17125 + status = "okay";
17126 +
17127 + mcp3426: mcp@68 {
17128 + reg = <0x68>;
17129 + compatible = "microchip,mcp3426";
17130 +
17131 + status = "okay";
17132 + };
17133 + };
17134 + };
17135 +
17136 + fragment@6 {
17137 + target = <&i2c1>;
17138 + __dormant__ {
17139 + #address-cells = <1>;
17140 + #size-cells = <0>;
17141 +
17142 + status = "okay";
17143 +
17144 + mcp3427: mcp@68 {
17145 + reg = <0x68>;
17146 + compatible = "microchip,mcp3427";
17147 +
17148 + status = "okay";
17149 + };
17150 + };
17151 + };
17152 +
17153 + fragment@7 {
17154 + target = <&i2c1>;
17155 + __dormant__ {
17156 + #address-cells = <1>;
17157 + #size-cells = <0>;
17158 +
17159 + status = "okay";
17160 +
17161 + mcp3428: mcp@68 {
17162 + reg = <0x68>;
17163 + compatible = "microchip,mcp3428";
17164 +
17165 + status = "okay";
17166 + };
17167 + };
17168 + };
17169 +
17170 + __overrides__ {
17171 + addr = <&mcp3421>,"reg:0",
17172 + <&mcp3422>,"reg:0",
17173 + <&mcp3423>,"reg:0",
17174 + <&mcp3424>,"reg:0",
17175 + <&mcp3425>,"reg:0",
17176 + <&mcp3426>,"reg:0",
17177 + <&mcp3427>,"reg:0",
17178 + <&mcp3428>,"reg:0";
17179 + mcp3421 = <0>,"=0";
17180 + mcp3422 = <0>,"=1";
17181 + mcp3423 = <0>,"=2";
17182 + mcp3424 = <0>,"=3";
17183 + mcp3425 = <0>,"=4";
17184 + mcp3426 = <0>,"=5";
17185 + mcp3427 = <0>,"=6";
17186 + mcp3428 = <0>,"=7";
17187 + };
17188 +};
17189 +
17190 diff --git a/arch/arm/boot/dts/overlays/media-center-overlay.dts b/arch/arm/boot/dts/overlays/media-center-overlay.dts
17191 new file mode 100644
17192 index 000000000000..1b56963f4f16
17193 --- /dev/null
17194 +++ b/arch/arm/boot/dts/overlays/media-center-overlay.dts
17195 @@ -0,0 +1,134 @@
17196 +/*
17197 + * Device Tree overlay for Media Center HAT by Pi Supply
17198 + *
17199 + */
17200 +
17201 +/dts-v1/;
17202 +/plugin/;
17203 +
17204 +/ {
17205 + compatible = "brcm,bcm2835";
17206 +
17207 + fragment@0 {
17208 + target = <&spi0>;
17209 + __overlay__ {
17210 + status = "okay";
17211 +
17212 + spidev@0{
17213 + status = "disabled";
17214 + };
17215 +
17216 + spidev@1{
17217 + status = "disabled";
17218 + };
17219 + };
17220 + };
17221 +
17222 + fragment@1 {
17223 + target = <&gpio>;
17224 + __overlay__ {
17225 + rpi_display_pins: rpi_display_pins {
17226 + brcm,pins = <12 23 24 25>;
17227 + brcm,function = <1 1 1 0>; /* out out out in */
17228 + brcm,pull = <0 0 0 2>; /* - - - up */
17229 + };
17230 + };
17231 + };
17232 +
17233 + fragment@2 {
17234 + target = <&spi0>;
17235 + __overlay__ {
17236 + /* needed to avoid dtc warning */
17237 + #address-cells = <1>;
17238 + #size-cells = <0>;
17239 +
17240 + rpidisplay: rpi-display@0{
17241 + compatible = "ilitek,ili9341";
17242 + reg = <0>;
17243 + pinctrl-names = "default";
17244 + pinctrl-0 = <&rpi_display_pins>;
17245 +
17246 + spi-max-frequency = <32000000>;
17247 + rotate = <90>;
17248 + bgr;
17249 + fps = <30>;
17250 + buswidth = <8>;
17251 + reset-gpios = <&gpio 23 1>;
17252 + dc-gpios = <&gpio 24 0>;
17253 + led-gpios = <&gpio 12 0>;
17254 + debug = <0>;
17255 + };
17256 +
17257 + rpidisplay_ts: rpi-display-ts@1 {
17258 + compatible = "ti,ads7846";
17259 + reg = <1>;
17260 +
17261 + spi-max-frequency = <2000000>;
17262 + interrupts = <25 2>; /* high-to-low edge triggered */
17263 + interrupt-parent = <&gpio>;
17264 + pendown-gpio = <&gpio 25 1>;
17265 + ti,x-plate-ohms = /bits/ 16 <60>;
17266 + ti,pressure-max = /bits/ 16 <255>;
17267 + };
17268 + };
17269 + };
17270 +
17271 + fragment@3 {
17272 + target-path = "/";
17273 + __overlay__ {
17274 + lirc_rpi: lirc_rpi {
17275 + compatible = "rpi,lirc-rpi";
17276 + pinctrl-names = "default";
17277 + pinctrl-0 = <&lirc_pins>;
17278 + status = "okay";
17279 +
17280 + // Override autodetection of IR receiver circuit
17281 + // (0 = active high, 1 = active low, -1 = no override )
17282 + rpi,sense = <0xffffffff>;
17283 +
17284 + // Software carrier
17285 + // (0 = off, 1 = on)
17286 + rpi,softcarrier = <1>;
17287 +
17288 + // Invert output
17289 + // (0 = off, 1 = on)
17290 + rpi,invert = <0>;
17291 +
17292 + // Enable debugging messages
17293 + // (0 = off, 1 = on)
17294 + rpi,debug = <0>;
17295 + };
17296 + };
17297 + };
17298 +
17299 + fragment@4 {
17300 + target = <&gpio>;
17301 + __overlay__ {
17302 + lirc_pins: lirc_pins {
17303 + brcm,pins = <6 5>;
17304 + brcm,function = <1 0>; // out in
17305 + brcm,pull = <0 1>; // off down
17306 + };
17307 + };
17308 + };
17309 +
17310 + __overrides__ {
17311 + speed = <&rpidisplay>,"spi-max-frequency:0";
17312 + rotate = <&rpidisplay>,"rotate:0";
17313 + fps = <&rpidisplay>,"fps:0";
17314 + debug = <&rpidisplay>,"debug:0",
17315 + <&lirc_rpi>,"rpi,debug:0";
17316 + xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
17317 + swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
17318 + backlight = <&rpidisplay>,"led-gpios:4",
17319 + <&rpi_display_pins>,"brcm,pins:0";
17320 +
17321 + gpio_out_pin = <&lirc_pins>,"brcm,pins:0";
17322 + gpio_in_pin = <&lirc_pins>,"brcm,pins:4";
17323 + gpio_in_pull = <&lirc_pins>,"brcm,pull:4";
17324 +
17325 + sense = <&lirc_rpi>,"rpi,sense:0";
17326 + softcarrier = <&lirc_rpi>,"rpi,softcarrier:0";
17327 + invert = <&lirc_rpi>,"rpi,invert:0";
17328 + };
17329 +};
17330 diff --git a/arch/arm/boot/dts/overlays/merus-amp-overlay.dts b/arch/arm/boot/dts/overlays/merus-amp-overlay.dts
17331 new file mode 100644
17332 index 000000000000..4501fbdc253d
17333 --- /dev/null
17334 +++ b/arch/arm/boot/dts/overlays/merus-amp-overlay.dts
17335 @@ -0,0 +1,60 @@
17336 +// SPDX-License-Identifier: GPL-2.0-only
17337 +// Definitions for Infineon Merus-Amp
17338 +/dts-v1/;
17339 +/plugin/;
17340 +#include <dt-bindings/pinctrl/bcm2835.h>
17341 +#include <dt-bindings/gpio/gpio.h>
17342 +
17343 +
17344 +/ {
17345 + compatible = "brcm,bcm2835";
17346 +
17347 + fragment@0 {
17348 + target = <&i2s>;
17349 + __overlay__ {
17350 + status = "okay";
17351 + };
17352 + };
17353 +
17354 + fragment@1 {
17355 + target = <&gpio>;
17356 + __overlay__ {
17357 + merus_amp_pins: merus_amp_pins {
17358 + brcm,pins = <23>;
17359 + brcm,function = <0>; /* in */
17360 + brcm,pull = <2>; /* up */
17361 + };
17362 + };
17363 + };
17364 +
17365 + fragment@2 {
17366 + target = <&i2c1>;
17367 + __overlay__ {
17368 + #address-cells = <1>;
17369 + #size-cells = <0>;
17370 + status = "okay";
17371 +
17372 + merus_amp: ma120x0p@20 {
17373 + #sound-dai-cells = <0>;
17374 + compatible = "ma,ma120x0p";
17375 + reg = <0x20>;
17376 + status = "okay";
17377 + pinctrl-names = "default";
17378 + pinctrl-0 = <&merus_amp_pins>;
17379 + enable_gp-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
17380 + mute_gp-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
17381 + booster_gp-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
17382 + error_gp-gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
17383 + };
17384 + };
17385 + };
17386 +
17387 + fragment@3 {
17388 + target = <&sound>;
17389 + __overlay__ {
17390 + compatible = "merus,merus-amp";
17391 + i2s-controller = <&i2s>;
17392 + status = "okay";
17393 + };
17394 + };
17395 +};
17396 diff --git a/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
17397 new file mode 100644
17398 index 000000000000..f7e44d29e101
17399 --- /dev/null
17400 +++ b/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
17401 @@ -0,0 +1,36 @@
17402 +/dts-v1/;
17403 +/plugin/;
17404 +
17405 +#include <dt-bindings/clock/bcm2835.h>
17406 +
17407 +/*
17408 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
17409 + * baudrate. The real clock is 48MHz, which we scale so that requesting
17410 + * 38.4kHz results in an actual 31.25kHz.
17411 + *
17412 + * 48000000*38400/31250 = 58982400
17413 + */
17414 +
17415 +/{
17416 + compatible = "brcm,bcm2835";
17417 +
17418 + fragment@0 {
17419 + target-path = "/";
17420 + __overlay__ {
17421 + midi_clk: midi_clk {
17422 + compatible = "fixed-clock";
17423 + #clock-cells = <0>;
17424 + clock-output-names = "uart0_pclk";
17425 + clock-frequency = <58982400>;
17426 + };
17427 + };
17428 + };
17429 +
17430 + fragment@1 {
17431 + target = <&uart0>;
17432 + __overlay__ {
17433 + clocks = <&midi_clk>,
17434 + <&clocks BCM2835_CLOCK_VPU>;
17435 + };
17436 + };
17437 +};
17438 diff --git a/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
17439 new file mode 100644
17440 index 000000000000..e0bc410acbff
17441 --- /dev/null
17442 +++ b/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
17443 @@ -0,0 +1,43 @@
17444 +/dts-v1/;
17445 +/plugin/;
17446 +
17447 +#include <dt-bindings/clock/bcm2835-aux.h>
17448 +
17449 +/*
17450 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
17451 + * baudrate. The real clock is 48MHz, which we scale so that requesting
17452 + * 38.4kHz results in an actual 31.25kHz.
17453 + *
17454 + * 48000000*38400/31250 = 58982400
17455 + */
17456 +
17457 +/{
17458 + compatible = "brcm,bcm2835";
17459 +
17460 + fragment@0 {
17461 + target-path = "/clocks";
17462 + __overlay__ {
17463 + midi_clk: clock@5 {
17464 + compatible = "fixed-factor-clock";
17465 + #clock-cells = <0>;
17466 + clocks = <&aux BCM2835_AUX_CLOCK_UART>;
17467 + clock-mult = <38400>;
17468 + clock-div = <31250>;
17469 + };
17470 + };
17471 + };
17472 +
17473 + fragment@1 {
17474 + target = <&uart1>;
17475 + __overlay__ {
17476 + clocks = <&midi_clk>;
17477 + };
17478 + };
17479 +
17480 + fragment@2 {
17481 + target = <&aux>;
17482 + __overlay__ {
17483 + clock-output-names = "aux_uart", "aux_spi1", "aux_spi2";
17484 + };
17485 + };
17486 +};
17487 diff --git a/arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts b/arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts
17488 new file mode 100644
17489 index 000000000000..da49f14a0940
17490 --- /dev/null
17491 +++ b/arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts
17492 @@ -0,0 +1,93 @@
17493 +/dts-v1/;
17494 +/plugin/;
17495 +
17496 +/* Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore
17497 + UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum
17498 + usable baudrate.
17499 +
17500 + It is also necessary to edit /lib/systemd/system/hciuart.service and
17501 + replace ttyAMA0 with ttyS0, unless you have a system with udev rules
17502 + that create /dev/serial0 and /dev/serial1, in which case use /dev/serial1
17503 + instead because it will always be correct.
17504 +
17505 + If cmdline.txt uses the alias serial0 to refer to the user-accessable port
17506 + then the firmware will replace with the appropriate port whether or not
17507 + this overlay is used.
17508 +*/
17509 +
17510 +#include <dt-bindings/gpio/gpio.h>
17511 +
17512 +/{
17513 + compatible = "brcm,bcm2835";
17514 +
17515 + fragment@0 {
17516 + target = <&uart0>;
17517 + __overlay__ {
17518 + pinctrl-names = "default";
17519 + pinctrl-0 = <&uart0_pins>;
17520 + status = "okay";
17521 + };
17522 + };
17523 +
17524 + fragment@1 {
17525 + target = <&bt>;
17526 + __overlay__ {
17527 + status = "disabled";
17528 + };
17529 + };
17530 +
17531 + fragment@2 {
17532 + target = <&uart1>;
17533 + __overlay__ {
17534 + pinctrl-names = "default";
17535 + pinctrl-0 = <&uart1_pins &bt_pins &fake_bt_cts>;
17536 + status = "okay";
17537 + };
17538 + };
17539 +
17540 + fragment@3 {
17541 + target = <&uart0_pins>;
17542 + __overlay__ {
17543 + brcm,pins;
17544 + brcm,function;
17545 + brcm,pull;
17546 + };
17547 + };
17548 +
17549 + fragment@4 {
17550 + target = <&uart1_pins>;
17551 + __overlay__ {
17552 + brcm,pins = <32 33>;
17553 + brcm,function = <2>; /* alt5=UART1 */
17554 + brcm,pull = <0 2>;
17555 + };
17556 + };
17557 +
17558 + fragment@5 {
17559 + target = <&gpio>;
17560 + __overlay__ {
17561 + fake_bt_cts: fake_bt_cts {
17562 + brcm,pins = <31>;
17563 + brcm,function = <1>; /* output */
17564 + };
17565 + };
17566 + };
17567 +
17568 + fragment@6 {
17569 + target-path = "/aliases";
17570 + __overlay__ {
17571 + serial0 = "/soc/serial@7e201000";
17572 + serial1 = "/soc/serial@7e215040";
17573 + };
17574 + };
17575 +
17576 + fragment@7 {
17577 + target = <&minibt>;
17578 + minibt_frag: __overlay__ {
17579 + };
17580 + };
17581 +
17582 + __overrides__ {
17583 + krnbt = <&minibt_frag>,"status";
17584 + };
17585 +};
17586 diff --git a/arch/arm/boot/dts/overlays/mmc-overlay.dts b/arch/arm/boot/dts/overlays/mmc-overlay.dts
17587 new file mode 100644
17588 index 000000000000..c1a2f691aa1e
17589 --- /dev/null
17590 +++ b/arch/arm/boot/dts/overlays/mmc-overlay.dts
17591 @@ -0,0 +1,46 @@
17592 +/dts-v1/;
17593 +/plugin/;
17594 +
17595 +/{
17596 + compatible = "brcm,bcm2835";
17597 +
17598 + fragment@0 {
17599 + target = <&mmc>;
17600 + frag0: __overlay__ {
17601 + pinctrl-names = "default";
17602 + pinctrl-0 = <&mmc_pins>;
17603 + bus-width = <4>;
17604 + brcm,overclock-50 = <0>;
17605 + status = "okay";
17606 + };
17607 + };
17608 +
17609 + fragment@1 {
17610 + target = <&gpio>;
17611 + __overlay__ {
17612 + mmc_pins: mmc_pins {
17613 + brcm,pins = <48 49 50 51 52 53>;
17614 + brcm,function = <7>; /* alt3 */
17615 + brcm,pull = <0 2 2 2 2 2>;
17616 + };
17617 + };
17618 + };
17619 +
17620 + fragment@2 {
17621 + target = <&sdhost>;
17622 + __overlay__ {
17623 + status = "disabled";
17624 + };
17625 + };
17626 +
17627 + fragment@3 {
17628 + target = <&mmcnr>;
17629 + __overlay__ {
17630 + status = "disabled";
17631 + };
17632 + };
17633 +
17634 + __overrides__ {
17635 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
17636 + };
17637 +};
17638 diff --git a/arch/arm/boot/dts/overlays/mpu6050-overlay.dts b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts
17639 new file mode 100644
17640 index 000000000000..3109d90562ae
17641 --- /dev/null
17642 +++ b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts
17643 @@ -0,0 +1,28 @@
17644 +// Definitions for MPU6050
17645 +/dts-v1/;
17646 +/plugin/;
17647 +
17648 +/ {
17649 + compatible = "brcm,bcm2835";
17650 +
17651 + fragment@0 {
17652 + target = <&i2c1>;
17653 + __overlay__ {
17654 + #address-cells = <1>;
17655 + #size-cells = <0>;
17656 + status = "okay";
17657 + clock-frequency = <400000>;
17658 +
17659 + mpu6050: mpu6050@68 {
17660 + compatible = "invensense,mpu6050";
17661 + reg = <0x68>;
17662 + interrupt-parent = <&gpio>;
17663 + interrupts = <4 1>;
17664 + };
17665 + };
17666 + };
17667 +
17668 + __overrides__ {
17669 + interrupt = <&mpu6050>,"interrupts:0";
17670 + };
17671 +};
17672 diff --git a/arch/arm/boot/dts/overlays/mz61581-overlay.dts b/arch/arm/boot/dts/overlays/mz61581-overlay.dts
17673 new file mode 100644
17674 index 000000000000..6e00e8b2ddf2
17675 --- /dev/null
17676 +++ b/arch/arm/boot/dts/overlays/mz61581-overlay.dts
17677 @@ -0,0 +1,117 @@
17678 +/*
17679 + * Device Tree overlay for MZ61581-PI-EXT 2014.12.28 by Tontec
17680 + *
17681 + */
17682 +
17683 +/dts-v1/;
17684 +/plugin/;
17685 +
17686 +/ {
17687 + compatible = "brcm,bcm2835";
17688 +
17689 + fragment@0 {
17690 + target = <&spi0>;
17691 + __overlay__ {
17692 + status = "okay";
17693 + };
17694 + };
17695 +
17696 + fragment@1 {
17697 + target = <&spidev0>;
17698 + __overlay__ {
17699 + status = "disabled";
17700 + };
17701 + };
17702 +
17703 + fragment@2 {
17704 + target = <&spidev1>;
17705 + __overlay__ {
17706 + status = "disabled";
17707 + };
17708 + };
17709 +
17710 + fragment@3 {
17711 + target = <&gpio>;
17712 + __overlay__ {
17713 + mz61581_pins: mz61581_pins {
17714 + brcm,pins = <4 15 18 25>;
17715 + brcm,function = <0 1 1 1>; /* in out out out */
17716 + };
17717 + };
17718 + };
17719 +
17720 + fragment@4 {
17721 + target = <&spi0>;
17722 + __overlay__ {
17723 + /* needed to avoid dtc warning */
17724 + #address-cells = <1>;
17725 + #size-cells = <0>;
17726 +
17727 + mz61581: mz61581@0{
17728 + compatible = "samsung,s6d02a1";
17729 + reg = <0>;
17730 + pinctrl-names = "default";
17731 + pinctrl-0 = <&mz61581_pins>;
17732 +
17733 + spi-max-frequency = <128000000>;
17734 + spi-cpol;
17735 + spi-cpha;
17736 +
17737 + width = <320>;
17738 + height = <480>;
17739 + rotate = <270>;
17740 + bgr;
17741 + fps = <30>;
17742 + buswidth = <8>;
17743 + txbuflen = <32768>;
17744 +
17745 + reset-gpios = <&gpio 15 1>;
17746 + dc-gpios = <&gpio 25 0>;
17747 + led-gpios = <&gpio 18 0>;
17748 +
17749 + init = <0x10000b0 00
17750 + 0x1000011
17751 + 0x20000ff
17752 + 0x10000b3 0x02 0x00 0x00 0x00
17753 + 0x10000c0 0x13 0x3b 0x00 0x02 0x00 0x01 0x00 0x43
17754 + 0x10000c1 0x08 0x16 0x08 0x08
17755 + 0x10000c4 0x11 0x07 0x03 0x03
17756 + 0x10000c6 0x00
17757 + 0x10000c8 0x03 0x03 0x13 0x5c 0x03 0x07 0x14 0x08 0x00 0x21 0x08 0x14 0x07 0x53 0x0c 0x13 0x03 0x03 0x21 0x00
17758 + 0x1000035 0x00
17759 + 0x1000036 0xa0
17760 + 0x100003a 0x55
17761 + 0x1000044 0x00 0x01
17762 + 0x10000d0 0x07 0x07 0x1d 0x03
17763 + 0x10000d1 0x03 0x30 0x10
17764 + 0x10000d2 0x03 0x14 0x04
17765 + 0x1000029
17766 + 0x100002c>;
17767 +
17768 + /* This is a workaround to make sure the init sequence slows down and doesn't fail */
17769 + debug = <3>;
17770 + };
17771 +
17772 + mz61581_ts: mz61581_ts@1 {
17773 + compatible = "ti,ads7846";
17774 + reg = <1>;
17775 +
17776 + spi-max-frequency = <2000000>;
17777 + interrupts = <4 2>; /* high-to-low edge triggered */
17778 + interrupt-parent = <&gpio>;
17779 + pendown-gpio = <&gpio 4 0>;
17780 +
17781 + ti,x-plate-ohms = /bits/ 16 <60>;
17782 + ti,pressure-max = /bits/ 16 <255>;
17783 + };
17784 + };
17785 + };
17786 + __overrides__ {
17787 + speed = <&mz61581>, "spi-max-frequency:0";
17788 + rotate = <&mz61581>, "rotate:0";
17789 + fps = <&mz61581>, "fps:0";
17790 + txbuflen = <&mz61581>, "txbuflen:0";
17791 + debug = <&mz61581>, "debug:0";
17792 + xohms = <&mz61581_ts>,"ti,x-plate-ohms;0";
17793 + };
17794 +};
17795 diff --git a/arch/arm/boot/dts/overlays/ov5647-overlay.dts b/arch/arm/boot/dts/overlays/ov5647-overlay.dts
17796 new file mode 100644
17797 index 000000000000..fd1e7a457f69
17798 --- /dev/null
17799 +++ b/arch/arm/boot/dts/overlays/ov5647-overlay.dts
17800 @@ -0,0 +1,92 @@
17801 +// SPDX-License-Identifier: GPL-2.0-only
17802 +// Definitions for OV5647 camera module on VC I2C bus
17803 +/dts-v1/;
17804 +/plugin/;
17805 +
17806 +/{
17807 + compatible = "brcm,bcm2835";
17808 +
17809 + fragment@0 {
17810 + target = <&i2c_csi_dsi>;
17811 + __overlay__ {
17812 + #address-cells = <1>;
17813 + #size-cells = <0>;
17814 + status = "okay";
17815 +
17816 + ov5647: ov5647@36 {
17817 + compatible = "ovti,ov5647";
17818 + reg = <0x36>;
17819 + status = "okay";
17820 +
17821 + pwdn-gpios = <&gpio 41 1>, <&gpio 32 1>;
17822 + clocks = <&ov5647_clk>;
17823 +
17824 + rotation = <0>;
17825 +
17826 + port {
17827 + ov5647_0: endpoint {
17828 + remote-endpoint = <&csi1_ep>;
17829 + clock-lanes = <0>;
17830 + data-lanes = <1 2>;
17831 + clock-noncontinuous;
17832 + link-frequencies =
17833 + /bits/ 64 <297000000>;
17834 + };
17835 + };
17836 + };
17837 + };
17838 + };
17839 +
17840 + fragment@1 {
17841 + target = <&csi1>;
17842 + __overlay__ {
17843 + status = "okay";
17844 +
17845 + port {
17846 + csi1_ep: endpoint {
17847 + remote-endpoint = <&ov5647_0>;
17848 + data-lanes = <1 2>;
17849 + };
17850 + };
17851 + };
17852 + };
17853 +
17854 + fragment@2 {
17855 + target = <&i2c0if>;
17856 + __overlay__ {
17857 + status = "okay";
17858 + };
17859 + };
17860 +
17861 + fragment@3 {
17862 + target = <&i2c0mux>;
17863 + __overlay__ {
17864 + status = "okay";
17865 + };
17866 + };
17867 +
17868 + fragment@4 {
17869 + target-path="/__overrides__";
17870 + __overlay__ {
17871 + cam0-pwdn-ctrl = <&ov5647>,"pwdn-gpios:0";
17872 + cam0-pwdn = <&ov5647>,"pwdn-gpios:4";
17873 + cam0-led-ctrl = <&ov5647>,"pwdn-gpios:12";
17874 + cam0-led = <&ov5647>,"pwdn-gpios:16";
17875 + };
17876 + };
17877 +
17878 + fragment@5 {
17879 + target-path = "/";
17880 + __overlay__ {
17881 + ov5647_clk: camera-clk {
17882 + compatible = "fixed-clock";
17883 + #clock-cells = <0>;
17884 + clock-frequency = <25000000>;
17885 + };
17886 + };
17887 + };
17888 +
17889 + __overrides__ {
17890 + rotation = <&ov5647>,"rotation:0";
17891 + };
17892 +};
17893 diff --git a/arch/arm/boot/dts/overlays/ov7251-overlay.dts b/arch/arm/boot/dts/overlays/ov7251-overlay.dts
17894 new file mode 100644
17895 index 000000000000..f04eafd4adf9
17896 --- /dev/null
17897 +++ b/arch/arm/boot/dts/overlays/ov7251-overlay.dts
17898 @@ -0,0 +1,111 @@
17899 +// SPDX-License-Identifier: GPL-2.0-only
17900 +// Definitions for OV7251 camera module on VC I2C bus
17901 +/dts-v1/;
17902 +/plugin/;
17903 +
17904 +#include <dt-bindings/gpio/gpio.h>
17905 +
17906 +/{
17907 + compatible = "brcm,bcm2835";
17908 +
17909 + fragment@0 {
17910 + target = <&i2c_csi_dsi>;
17911 + __overlay__ {
17912 + #address-cells = <1>;
17913 + #size-cells = <0>;
17914 + status = "okay";
17915 +
17916 + ov7251: ov7251@60 {
17917 + compatible = "ovti,ov7251";
17918 + reg = <0x60>;
17919 + status = "okay";
17920 +
17921 + clocks = <&ov7251_clk>;
17922 + clock-names = "xclk";
17923 + clock-frequency = <24000000>;
17924 +
17925 + vdddo-supply = <&ov7251_dovdd>;
17926 + vdda-supply = <&ov7251_avdd>;
17927 + vddd-supply = <&ov7251_dvdd>;
17928 +
17929 + enable-gpios = <&gpio 41 GPIO_ACTIVE_HIGH>;
17930 +
17931 + port {
17932 + ov7251_0: endpoint {
17933 + remote-endpoint = <&csi1_ep>;
17934 + clock-lanes = <0>;
17935 + data-lanes = <1>;
17936 + clock-noncontinuous;
17937 + link-frequencies =
17938 + /bits/ 64 <456000000>;
17939 + };
17940 + };
17941 + };
17942 + };
17943 + };
17944 +
17945 + fragment@1 {
17946 + target = <&csi1>;
17947 + __overlay__ {
17948 + status = "okay";
17949 +
17950 + port {
17951 + csi1_ep: endpoint {
17952 + remote-endpoint = <&ov7251_0>;
17953 + data-lanes = <1>;
17954 + };
17955 + };
17956 + };
17957 + };
17958 +
17959 + fragment@2 {
17960 + target = <&i2c0if>;
17961 + __overlay__ {
17962 + status = "okay";
17963 + };
17964 + };
17965 +
17966 + fragment@3 {
17967 + target-path="/";
17968 + __overlay__ {
17969 + ov7251_avdd: fixedregulator@0 {
17970 + compatible = "regulator-fixed";
17971 + regulator-name = "ov7251_avdd";
17972 + regulator-min-microvolt = <2800000>;
17973 + regulator-max-microvolt = <2800000>;
17974 + };
17975 + ov7251_dovdd: fixedregulator@1 {
17976 + compatible = "regulator-fixed";
17977 + regulator-name = "ov7251_dovdd";
17978 + regulator-min-microvolt = <1800000>;
17979 + regulator-max-microvolt = <1800000>;
17980 + };
17981 + ov7251_dvdd: fixedregulator@2 {
17982 + compatible = "regulator-fixed";
17983 + regulator-name = "ov7251_dvdd";
17984 + regulator-min-microvolt = <1200000>;
17985 + regulator-max-microvolt = <1200000>;
17986 + };
17987 + ov7251_clk: ov7251-clk {
17988 + compatible = "fixed-clock";
17989 + #clock-cells = <0>;
17990 + clock-frequency = <24000000>;
17991 + };
17992 + };
17993 + };
17994 +
17995 + fragment@4 {
17996 + target = <&i2c0mux>;
17997 + __overlay__ {
17998 + status = "okay";
17999 + };
18000 + };
18001 +
18002 + fragment@5 {
18003 + target-path="/__overrides__";
18004 + __overlay__ {
18005 + cam0-pwdn-ctrl = <&ov7251>,"enable-gpios:0";
18006 + cam0-pwdn = <&ov7251>,"enable-gpios:4";
18007 + };
18008 + };
18009 +};
18010 diff --git a/arch/arm/boot/dts/overlays/ov9281-overlay.dts b/arch/arm/boot/dts/overlays/ov9281-overlay.dts
18011 new file mode 100644
18012 index 000000000000..40b298d3dd86
18013 --- /dev/null
18014 +++ b/arch/arm/boot/dts/overlays/ov9281-overlay.dts
18015 @@ -0,0 +1,111 @@
18016 +// SPDX-License-Identifier: GPL-2.0-only
18017 +// Definitions for OV9281 camera module on VC I2C bus
18018 +/dts-v1/;
18019 +/plugin/;
18020 +
18021 +#include <dt-bindings/gpio/gpio.h>
18022 +
18023 +/{
18024 + compatible = "brcm,bcm2835";
18025 +
18026 + fragment@0 {
18027 + target = <&i2c_csi_dsi>;
18028 + __overlay__ {
18029 + #address-cells = <1>;
18030 + #size-cells = <0>;
18031 + status = "okay";
18032 +
18033 + ov9281: ov9281@60 {
18034 + compatible = "ovti,ov9281";
18035 + reg = <0x60>;
18036 + status = "okay";
18037 +
18038 + clocks = <&ov9281_clk>;
18039 + clock-names = "xvclk";
18040 +
18041 + avdd-supply = <&ov9281_avdd>;
18042 + dovdd-supply = <&ov9281_dovdd>;
18043 + dvdd-supply = <&ov9281_dvdd>;
18044 +
18045 + port {
18046 + ov9281_0: endpoint {
18047 + remote-endpoint = <&csi1_ep>;
18048 + clock-lanes = <0>;
18049 + data-lanes = <1 2>;
18050 + clock-noncontinuous;
18051 + link-frequencies =
18052 + /bits/ 64 <400000000>;
18053 + };
18054 + };
18055 + };
18056 + };
18057 + };
18058 +
18059 + fragment@1 {
18060 + target = <&csi1>;
18061 + __overlay__ {
18062 + status = "okay";
18063 +
18064 + port {
18065 + csi1_ep: endpoint {
18066 + remote-endpoint = <&ov9281_0>;
18067 + data-lanes = <1 2>;
18068 + clock-noncontinuous;
18069 + };
18070 + };
18071 + };
18072 + };
18073 +
18074 + fragment@2 {
18075 + target = <&i2c0if>;
18076 + __overlay__ {
18077 + status = "okay";
18078 + };
18079 + };
18080 +
18081 + fragment@3 {
18082 + target-path="/";
18083 + __overlay__ {
18084 + ov9281_avdd: fixedregulator@0 {
18085 + compatible = "regulator-fixed";
18086 + regulator-name = "ov9281_avdd";
18087 + regulator-min-microvolt = <2800000>;
18088 + regulator-max-microvolt = <2800000>;
18089 + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
18090 + enable-active-high;
18091 + };
18092 + ov9281_dovdd: fixedregulator@1 {
18093 + compatible = "regulator-fixed";
18094 + regulator-name = "ov9281_dovdd";
18095 + regulator-min-microvolt = <1800000>;
18096 + regulator-max-microvolt = <1800000>;
18097 + };
18098 + ov9281_dvdd: fixedregulator@2 {
18099 + compatible = "regulator-fixed";
18100 + regulator-name = "ov9281_dvdd";
18101 + regulator-min-microvolt = <1200000>;
18102 + regulator-max-microvolt = <1200000>;
18103 + };
18104 + ov9281_clk: ov9281-clk {
18105 + compatible = "fixed-clock";
18106 + #clock-cells = <0>;
18107 + clock-frequency = <24000000>;
18108 + };
18109 + };
18110 + };
18111 +
18112 + fragment@4 {
18113 + target = <&i2c0mux>;
18114 + __overlay__ {
18115 + status = "okay";
18116 + };
18117 + };
18118 +
18119 + fragment@5 {
18120 + target-path="/__overrides__";
18121 + __overlay__ {
18122 + cam0-pwdn-ctrl = <&ov9281_avdd>,"gpio:0";
18123 + cam0-pwdn = <&ov9281_avdd>,"gpio:4";
18124 + };
18125 + };
18126 +};
18127 diff --git a/arch/arm/boot/dts/overlays/overlay_map.dts b/arch/arm/boot/dts/overlays/overlay_map.dts
18128 new file mode 100644
18129 index 000000000000..22b0ad1738ec
18130 --- /dev/null
18131 +++ b/arch/arm/boot/dts/overlays/overlay_map.dts
18132 @@ -0,0 +1,141 @@
18133 +/dts-v1/;
18134 +
18135 +/ {
18136 + bmp085_i2c-sensor {
18137 + deprecated = "use i2c-sensor,bmp085";
18138 + };
18139 +
18140 + highperi {
18141 + bcm2711;
18142 + };
18143 +
18144 + i2c0-bcm2708 {
18145 + deprecated = "use i2c0";
18146 + };
18147 +
18148 + i2c1-bcm2708 {
18149 + deprecated = "use i2c1";
18150 + };
18151 +
18152 + i2c3 {
18153 + bcm2711;
18154 + };
18155 +
18156 + i2c4 {
18157 + bcm2711;
18158 + };
18159 +
18160 + i2c5 {
18161 + bcm2711;
18162 + };
18163 +
18164 + i2c6 {
18165 + bcm2711;
18166 + };
18167 +
18168 + lirc-rpi {
18169 + deprecated = "use gpio-ir";
18170 + };
18171 +
18172 + pi3-act-led {
18173 + renamed = "act-led";
18174 + };
18175 +
18176 + pi3-disable-bt {
18177 + renamed = "disable-bt";
18178 + };
18179 +
18180 + pi3-disable-wifi {
18181 + renamed = "disable-wifi";
18182 + };
18183 +
18184 + pi3-miniuart-bt {
18185 + renamed = "miniuart-bt";
18186 + };
18187 +
18188 + rpivid-v4l2 {
18189 + bcm2711;
18190 + };
18191 +
18192 + sdio-1bit {
18193 + deprecated = "use sdio,bus_width=1,gpios_22_25";
18194 + };
18195 +
18196 + spi0-cs {
18197 + renamed = "spi0-2cs";
18198 + };
18199 +
18200 + spi0-hw-cs {
18201 + deprecated = "no longer necessary";
18202 + };
18203 +
18204 + spi3-1cs {
18205 + bcm2711;
18206 + };
18207 +
18208 + spi3-2cs {
18209 + bcm2711;
18210 + };
18211 +
18212 + spi4-1cs {
18213 + bcm2711;
18214 + };
18215 +
18216 + spi4-2cs {
18217 + bcm2711;
18218 + };
18219 +
18220 + spi5-1cs {
18221 + bcm2711;
18222 + };
18223 +
18224 + spi5-2cs {
18225 + bcm2711;
18226 + };
18227 +
18228 + spi6-1cs {
18229 + bcm2711;
18230 + };
18231 +
18232 + spi6-2cs {
18233 + bcm2711;
18234 + };
18235 +
18236 + uart2 {
18237 + bcm2711;
18238 + };
18239 +
18240 + uart3 {
18241 + bcm2711;
18242 + };
18243 +
18244 + uart4 {
18245 + bcm2711;
18246 + };
18247 +
18248 + uart5 {
18249 + bcm2711;
18250 + };
18251 +
18252 + upstream {
18253 + bcm2835;
18254 + bcm2711 = "upstream-pi4";
18255 + };
18256 +
18257 + upstream-aux-interrupt {
18258 + deprecated = "no longer necessary";
18259 + };
18260 +
18261 + upstream-pi4 {
18262 + bcm2711;
18263 + };
18264 +
18265 + vc4-kms-v3d {
18266 + bcm2835;
18267 + bcm2711 = "vc4-kms-v3d-pi4";
18268 + };
18269 +
18270 + vc4-kms-v3d-pi4 {
18271 + bcm2711;
18272 + };
18273 +};
18274 diff --git a/arch/arm/boot/dts/overlays/papirus-overlay.dts b/arch/arm/boot/dts/overlays/papirus-overlay.dts
18275 new file mode 100644
18276 index 000000000000..7b6bcfd49c86
18277 --- /dev/null
18278 +++ b/arch/arm/boot/dts/overlays/papirus-overlay.dts
18279 @@ -0,0 +1,89 @@
18280 +/* PaPiRus ePaper Screen by Pi Supply */
18281 +
18282 +/dts-v1/;
18283 +/plugin/;
18284 +
18285 +/ {
18286 + compatible = "brcm,bcm2835";
18287 +
18288 + fragment@0 {
18289 + target = <&i2c_arm>;
18290 + __overlay__ {
18291 + #address-cells = <1>;
18292 + #size-cells = <0>;
18293 + status = "okay";
18294 +
18295 + display_temp: lm75@48 {
18296 + compatible = "lm75b";
18297 + reg = <0x48>;
18298 + status = "okay";
18299 + #thermal-sensor-cells = <0>;
18300 + };
18301 + };
18302 + };
18303 +
18304 + fragment@1 {
18305 + target-path = "/";
18306 + __overlay__ {
18307 + thermal-zones {
18308 + display {
18309 + polling-delay-passive = <0>;
18310 + polling-delay = <0>;
18311 + thermal-sensors = <&display_temp>;
18312 + };
18313 + };
18314 + };
18315 + };
18316 +
18317 + fragment@2 {
18318 + target = <&spi0>;
18319 + __overlay__ {
18320 + status = "okay";
18321 +
18322 + spidev@0{
18323 + status = "disabled";
18324 + };
18325 + };
18326 + };
18327 +
18328 + fragment@3 {
18329 + target = <&gpio>;
18330 + __overlay__ {
18331 + repaper_pins: repaper_pins {
18332 + brcm,pins = <14 15 23 24 25>;
18333 + brcm,function = <1 1 1 1 0>; /* out out out out in */
18334 + };
18335 + };
18336 + };
18337 +
18338 + fragment@4 {
18339 + target = <&spi0>;
18340 + __overlay__ {
18341 + /* needed to avoid dtc warning */
18342 + #address-cells = <1>;
18343 + #size-cells = <0>;
18344 +
18345 + repaper: repaper@0{
18346 + compatible = "not_set";
18347 + reg = <0>;
18348 + pinctrl-names = "default";
18349 + pinctrl-0 = <&repaper_pins>;
18350 +
18351 + spi-max-frequency = <8000000>;
18352 +
18353 + panel-on-gpios = <&gpio 23 0>;
18354 + border-gpios = <&gpio 14 0>;
18355 + discharge-gpios = <&gpio 15 0>;
18356 + reset-gpios = <&gpio 24 0>;
18357 + busy-gpios = <&gpio 25 0>;
18358 +
18359 + repaper-thermal-zone = "display";
18360 + };
18361 + };
18362 + };
18363 +
18364 + __overrides__ {
18365 + panel = <&repaper>, "compatible";
18366 + speed = <&repaper>, "spi-max-frequency:0";
18367 + };
18368 +};
18369 diff --git a/arch/arm/boot/dts/overlays/pca953x-overlay.dts b/arch/arm/boot/dts/overlays/pca953x-overlay.dts
18370 new file mode 100644
18371 index 000000000000..8b6ee44665ce
18372 --- /dev/null
18373 +++ b/arch/arm/boot/dts/overlays/pca953x-overlay.dts
18374 @@ -0,0 +1,240 @@
18375 +// Definitions for NXP PCA953x family of I2C GPIO controllers on ARM I2C bus.
18376 +/dts-v1/;
18377 +/plugin/;
18378 +
18379 +/{
18380 + compatible = "brcm,bcm2835";
18381 +
18382 + fragment@0 {
18383 + target = <&i2c_arm>;
18384 + __overlay__ {
18385 + #address-cells = <1>;
18386 + #size-cells = <0>;
18387 + status = "okay";
18388 +
18389 + pca: pca@20 {
18390 + compatible = "nxp,pca9534";
18391 + reg = <0x20>;
18392 + gpio-controller;
18393 + #gpio-cells = <2>;
18394 +
18395 + status = "okay";
18396 + };
18397 + };
18398 + };
18399 +
18400 + fragment@1 {
18401 + target = <&pca>;
18402 + __dormant__ {
18403 + compatible = "nxp,pca6416";
18404 + };
18405 + };
18406 + fragment@2 {
18407 + target = <&pca>;
18408 + __dormant__ {
18409 + compatible = "nxp,pca9505";
18410 + };
18411 + };
18412 + fragment@3 {
18413 + target = <&pca>;
18414 + __dormant__ {
18415 + compatible = "nxp,pca9535";
18416 + };
18417 + };
18418 + fragment@4 {
18419 + target = <&pca>;
18420 + __dormant__ {
18421 + compatible = "nxp,pca9536";
18422 + };
18423 + };
18424 + fragment@5 {
18425 + target = <&pca>;
18426 + __dormant__ {
18427 + compatible = "nxp,pca9537";
18428 + };
18429 + };
18430 + fragment@6 {
18431 + target = <&pca>;
18432 + __dormant__ {
18433 + compatible = "nxp,pca9538";
18434 + };
18435 + };
18436 + fragment@7 {
18437 + target = <&pca>;
18438 + __dormant__ {
18439 + compatible = "nxp,pca9539";
18440 + };
18441 + };
18442 + fragment@8 {
18443 + target = <&pca>;
18444 + __dormant__ {
18445 + compatible = "nxp,pca9554";
18446 + };
18447 + };
18448 + fragment@9 {
18449 + target = <&pca>;
18450 + __dormant__ {
18451 + compatible = "nxp,pca9555";
18452 + };
18453 + };
18454 + fragment@10 {
18455 + target = <&pca>;
18456 + __dormant__ {
18457 + compatible = "nxp,pca9556";
18458 + };
18459 + };
18460 + fragment@11 {
18461 + target = <&pca>;
18462 + __dormant__ {
18463 + compatible = "nxp,pca9557";
18464 + };
18465 + };
18466 + fragment@12 {
18467 + target = <&pca>;
18468 + __dormant__ {
18469 + compatible = "nxp,pca9574";
18470 + };
18471 + };
18472 + fragment@13 {
18473 + target = <&pca>;
18474 + __dormant__ {
18475 + compatible = "nxp,pca9575";
18476 + };
18477 + };
18478 + fragment@14 {
18479 + target = <&pca>;
18480 + __dormant__ {
18481 + compatible = "nxp,pca9698";
18482 + };
18483 + };
18484 + fragment@15 {
18485 + target = <&pca>;
18486 + __dormant__ {
18487 + compatible = "nxp,pca16416";
18488 + };
18489 + };
18490 + fragment@16 {
18491 + target = <&pca>;
18492 + __dormant__ {
18493 + compatible = "nxp,pca16524";
18494 + };
18495 + };
18496 + fragment@17 {
18497 + target = <&pca>;
18498 + __dormant__ {
18499 + compatible = "nxp,pca19555a";
18500 + };
18501 + };
18502 + fragment@18 {
18503 + target = <&pca>;
18504 + __dormant__ {
18505 + compatible = "maxim,max7310";
18506 + };
18507 + };
18508 + fragment@19 {
18509 + target = <&pca>;
18510 + __dormant__ {
18511 + compatible = "maxim,max7312";
18512 + };
18513 + };
18514 + fragment@20 {
18515 + target = <&pca>;
18516 + __dormant__ {
18517 + compatible = "maxim,max7313";
18518 + };
18519 + };
18520 + fragment@21 {
18521 + target = <&pca>;
18522 + __dormant__ {
18523 + compatible = "maxim,max7315";
18524 + };
18525 + };
18526 + fragment@22 {
18527 + target = <&pca>;
18528 + __dormant__ {
18529 + compatible = "ti,pca6107";
18530 + };
18531 + };
18532 + fragment@23 {
18533 + target = <&pca>;
18534 + __dormant__ {
18535 + compatible = "ti,tca6408";
18536 + };
18537 + };
18538 + fragment@24 {
18539 + target = <&pca>;
18540 + __dormant__ {
18541 + compatible = "ti,tca6416";
18542 + };
18543 + };
18544 + fragment@25 {
18545 + target = <&pca>;
18546 + __dormant__ {
18547 + compatible = "ti,tca6424";
18548 + };
18549 + };
18550 + fragment@26 {
18551 + target = <&pca>;
18552 + __dormant__ {
18553 + compatible = "ti,tca9539";
18554 + };
18555 + };
18556 + fragment@27 {
18557 + target = <&pca>;
18558 + __dormant__ {
18559 + compatible = "ti,tca9554";
18560 + };
18561 + };
18562 + fragment@28 {
18563 + target = <&pca>;
18564 + __dormant__ {
18565 + compatible = "onnn,cat9554";
18566 + };
18567 + };
18568 + fragment@29 {
18569 + target = <&pca>;
18570 + __dormant__ {
18571 + compatible = "onnn,pca9654";
18572 + };
18573 + };
18574 + fragment@30 {
18575 + target = <&pca>;
18576 + __dormant__ {
18577 + compatible = "exar,xra1202";
18578 + };
18579 + };
18580 +
18581 + __overrides__ {
18582 + addr = <&pca>,"reg:0";
18583 + pca6416 = <0>, "+1";
18584 + pca9505 = <0>, "+2";
18585 + pca9535 = <0>, "+3";
18586 + pca9536 = <0>, "+4";
18587 + pca9537 = <0>, "+5";
18588 + pca9538 = <0>, "+6";
18589 + pca9539 = <0>, "+7";
18590 + pca9554 = <0>, "+8";
18591 + pca9555 = <0>, "+9";
18592 + pca9556 = <0>, "+10";
18593 + pca9557 = <0>, "+11";
18594 + pca9574 = <0>, "+12";
18595 + pca9575 = <0>, "+13";
18596 + pca9698 = <0>, "+14";
18597 + pca16416 = <0>, "+15";
18598 + pca16524 = <0>, "+16";
18599 + pca19555a = <0>, "+17";
18600 + max7310 = <0>, "+18";
18601 + max7312 = <0>, "+19";
18602 + max7313 = <0>, "+20";
18603 + max7315 = <0>, "+21";
18604 + pca6107 = <0>, "+22";
18605 + tca6408 = <0>, "+23";
18606 + tca6416 = <0>, "+24";
18607 + tca6424 = <0>, "+25";
18608 + tca9539 = <0>, "+26";
18609 + tca9554 = <0>, "+27";
18610 + cat9554 = <0>, "+28";
18611 + pca9654 = <0>, "+29";
18612 + xra1202 = <0>, "+30";
18613 + };
18614 +};
18615 diff --git a/arch/arm/boot/dts/overlays/pibell-overlay.dts b/arch/arm/boot/dts/overlays/pibell-overlay.dts
18616 new file mode 100644
18617 index 000000000000..9333a9b09772
18618 --- /dev/null
18619 +++ b/arch/arm/boot/dts/overlays/pibell-overlay.dts
18620 @@ -0,0 +1,81 @@
18621 +/dts-v1/;
18622 +/plugin/;
18623 +
18624 +/ {
18625 + compatible = "brcm,bcm2835";
18626 +
18627 + fragment@0 {
18628 + target-path = "/";
18629 + __overlay__ {
18630 + codec_out: spdif-transmitter {
18631 + #address-cells = <0>;
18632 + #size-cells = <0>;
18633 + #sound-dai-cells = <0>;
18634 + compatible = "linux,spdif-dit";
18635 + status = "okay";
18636 + };
18637 +
18638 + codec_in: card-codec {
18639 + #sound-dai-cells = <0>;
18640 + compatible = "invensense,ics43432";
18641 + status = "okay";
18642 + };
18643 + };
18644 + };
18645 +
18646 + fragment@1 {
18647 + target = <&i2s>;
18648 + __overlay__ {
18649 + #sound-dai-cells = <0>;
18650 + status = "okay";
18651 + };
18652 + };
18653 +
18654 + fragment@2 {
18655 + target = <&sound>;
18656 + snd: __overlay__ {
18657 + compatible = "simple-audio-card";
18658 + simple-audio-card,name = "PiBell";
18659 +
18660 + status="okay";
18661 +
18662 + capture_link: simple-audio-card,dai-link@0 {
18663 + format = "i2s";
18664 +
18665 + r_cpu_dai: cpu {
18666 + sound-dai = <&i2s>;
18667 +
18668 +/* example TDM slot configuration
18669 + dai-tdm-slot-num = <2>;
18670 + dai-tdm-slot-width = <32>;
18671 +*/
18672 + };
18673 +
18674 + r_codec_dai: codec {
18675 + sound-dai = <&codec_in>;
18676 + };
18677 + };
18678 +
18679 + playback_link: simple-audio-card,dai-link@1 {
18680 + format = "i2s";
18681 +
18682 + p_cpu_dai: cpu {
18683 + sound-dai = <&i2s>;
18684 +
18685 +/* example TDM slot configuration
18686 + dai-tdm-slot-num = <2>;
18687 + dai-tdm-slot-width = <32>;
18688 +*/
18689 + };
18690 +
18691 + p_codec_dai: codec {
18692 + sound-dai = <&codec_out>;
18693 + };
18694 + };
18695 + };
18696 + };
18697 +
18698 + __overrides__ {
18699 + alsaname = <&snd>, "simple-audio-card,name";
18700 + };
18701 +};
18702 diff --git a/arch/arm/boot/dts/overlays/pifacedigital-overlay.dts b/arch/arm/boot/dts/overlays/pifacedigital-overlay.dts
18703 new file mode 100644
18704 index 000000000000..532a858683d6
18705 --- /dev/null
18706 +++ b/arch/arm/boot/dts/overlays/pifacedigital-overlay.dts
18707 @@ -0,0 +1,144 @@
18708 +// SPDX-License-Identifier: GPL-2.0-only
18709 +/*
18710 + * PiFace Digital, Device Tree Overlay.
18711 + * Copyright (C) 2020 Thomas Preston <thomas.preston@codethink.co.uk>
18712 + *
18713 + * The PiFace Digital is a convenient breakout board for the Microchip mcp23s17
18714 + * SPI GPIO port expander.
18715 + *
18716 + * The first eight GPIOs 0..7 (bank A) are connected to eight output terminals
18717 + * and LEDs, plus two relays on the first two outputs. These output loads are
18718 + * active-high.
18719 + *
18720 + * The next eight GPIOs 8..15 (bank B) are connected to eight input terminals
18721 + * with four on-board switches connecting them to ground. Inputs devices are
18722 + * therefore expected to bridge terminals to ground, so the mcp23s17 pullups are
18723 + * activated for GPIO bank B.
18724 + *
18725 + * On PiFace Digital, the mcp23s17 is connected to the Raspberry Pi's SPI0 CS0
18726 + * bus. Each SPI bus supports up to eight addressable child devices. The PiFace
18727 + * Digital only supports addresses 0-4, which can be configured by jumpers JP1
18728 + * and JP2.
18729 + *
18730 + * You can tell the driver about these jumper configurations with the
18731 + * spi-present-mask bitmask:
18732 + *
18733 + * | JP1 | JP2 | dtoverlay line in /boot/config.txt |
18734 + * | --- | --- | ------------------------------------------ |
18735 + * | 0 | 0 | dtoverlay=pifacedigital |
18736 + * | 0 | 0 | dtoverlay=pifacedigital:spi-present-mask=1 |
18737 + * | 0 | 1 | dtoverlay=pifacedigital:spi-present-mask=2 |
18738 + * | 1 | 0 | dtoverlay=pifacedigital:spi-present-mask=4 |
18739 + * | 1 | 1 | dtoverlay=pifacedigital:spi-present-mask=8 |
18740 + *
18741 + * # Example
18742 + * Set the dtoverlay config in /boot/config.txt and power off the Raspberry Pi:
18743 + *
18744 + * $ grep pifacedigital /boot/config.txt
18745 + * dtoverlay=pifacedigital
18746 + * $ sudo systemctl poweroff
18747 + *
18748 + * Attach the PiFace Digital and power on the Raspberry Pi.
18749 + * Then use the libgpiod tools to query the device:
18750 + *
18751 + * $ sudo apt install gpiod
18752 + * $ gpiodetect | grep mcp23s17
18753 + * gpiochip2 [mcp23s17.0] (16 lines)
18754 + *
18755 + * Set GPIO outputs 0, 2 and 5:
18756 + *
18757 + * $ gpioset gpiochip2 0=1 2=1 5=1
18758 + *
18759 + * Get GPIO status (input GPIO 8..15 are high, because they are active-low):
18760 + *
18761 + * $ gpioget gpiochip2 {8..15}
18762 + * 1 1 1 1 1 1 1 1
18763 + *
18764 + * And even monitor interrupts:
18765 + *
18766 + * $ gpiomon gpiochip2 {8..15}
18767 + * event: FALLING EDGE offset: 11 timestamp: [1597361662.926741667]
18768 + * event: RISING EDGE offset: 11 timestamp: [1597361663.062555051]
18769 + *
18770 + */
18771 +
18772 +/dts-v1/;
18773 +/plugin/;
18774 +
18775 +/ {
18776 + compatible = "brcm,bcm2835";
18777 +
18778 + /* Disable exposing /dev/spidev0.0 */
18779 + fragment@0 {
18780 + target = <&spidev0>;
18781 + __overlay__ {
18782 + status = "disabled";
18783 + };
18784 + };
18785 +
18786 + /* Add the PiFace Digital device node to the spi0.0 device. */
18787 + fragment@1 {
18788 + target = <&spi0>;
18789 + __overlay__ {
18790 + status = "okay";
18791 + #address-cells = <1>;
18792 + #size-cells = <0>;
18793 +
18794 + pfdigital: pifacedigital@0 {
18795 + compatible = "microchip,mcp23s17";
18796 + reg = <0>;
18797 +
18798 + /* Set devices present with 8-bit mask. */
18799 + microchip,spi-present-mask = <0x01>;
18800 + spi-max-frequency = <500000>;
18801 +
18802 + gpio-controller;
18803 + #gpio-cells = <2>;
18804 +
18805 + /* This device can pass through interrupts. */
18806 + interrupt-controller;
18807 + #interrupt-cells = <2>;
18808 +
18809 + /* INTB is connected to GPIO 25.
18810 + * 0x8 active-low level-sensitive
18811 + */
18812 + interrupts = <25 0x8>;
18813 + interrupt-parent = <&gpio>;
18814 +
18815 + /* Configure pull-ups on bank B GPIOs */
18816 + pinctrl-0 = <&pfdigital_irq &pfdigital_pullups>;
18817 + pinctrl-names = "default";
18818 + pfdigital_pullups: pinmux {
18819 + pins =
18820 + "gpio8",
18821 + "gpio9",
18822 + "gpio10",
18823 + "gpio11",
18824 + "gpio12",
18825 + "gpio13",
18826 + "gpio14",
18827 + "gpio15";
18828 + bias-pull-up;
18829 + };
18830 + };
18831 + };
18832 + };
18833 +
18834 + /* PiFace Digital mcp23s17 INTB pin is connected to GPIO 25. The INTB
18835 + * pin is configured active-low (0 on interrupt), so expect to see
18836 + * FALLING_EDGE when inputs are bridged to ground (switch is pressed).
18837 + */
18838 + fragment@3 {
18839 + target = <&gpio>;
18840 + __overlay__ {
18841 + pfdigital_irq: pifacedigital_irq {
18842 + brcm,pins = <25>;
18843 + brcm,function = <0>; /* input */
18844 + };
18845 + };
18846 + };
18847 +
18848 + __overrides__ {
18849 + spi-present-mask = <&pfdigital>, "microchip,spi-present-mask:0";
18850 + };
18851 +};
18852 diff --git a/arch/arm/boot/dts/overlays/piglow-overlay.dts b/arch/arm/boot/dts/overlays/piglow-overlay.dts
18853 new file mode 100644
18854 index 000000000000..075bceef158c
18855 --- /dev/null
18856 +++ b/arch/arm/boot/dts/overlays/piglow-overlay.dts
18857 @@ -0,0 +1,97 @@
18858 +// Definitions for SN3218 LED driver from Si-En Technology on PiGlow
18859 +/dts-v1/;
18860 +/plugin/;
18861 +
18862 +/ {
18863 + compatible = "brcm,bcm2835";
18864 +
18865 + fragment@0 {
18866 + target = <&i2c_arm>;
18867 + __overlay__ {
18868 + #address-cells = <1>;
18869 + #size-cells = <0>;
18870 + status = "okay";
18871 +
18872 + sn3218@54 {
18873 + compatible = "si-en,sn3218";
18874 + reg = <0x54>;
18875 + #address-cells = <1>;
18876 + #size-cells = <0>;
18877 + status = "okay";
18878 +
18879 + led@1 {
18880 + reg = <1>;
18881 + label = "piglow:red:led1";
18882 + };
18883 + led@2 {
18884 + reg = <2>;
18885 + label = "piglow:orange:led2";
18886 + };
18887 + led@3 {
18888 + reg = <3>;
18889 + label = "piglow:yellow:led3";
18890 + };
18891 + led@4 {
18892 + reg = <4>;
18893 + label = "piglow:green:led4";
18894 + };
18895 + led@5 {
18896 + reg = <5>;
18897 + label = "piglow:blue:led5";
18898 + };
18899 + led@6 {
18900 + reg = <6>;
18901 + label = "piglow:green:led6";
18902 + };
18903 + led@7 {
18904 + reg = <7>;
18905 + label = "piglow:red:led7";
18906 + };
18907 + led@8 {
18908 + reg = <8>;
18909 + label = "piglow:orange:led8";
18910 + };
18911 + led@9 {
18912 + reg = <9>;
18913 + label = "piglow:yellow:led9";
18914 + };
18915 + led@10 {
18916 + reg = <10>;
18917 + label = "piglow:white:led10";
18918 + };
18919 + led@11 {
18920 + reg = <11>;
18921 + label = "piglow:white:led11";
18922 + };
18923 + led@12 {
18924 + reg = <12>;
18925 + label = "piglow:blue:led12";
18926 + };
18927 + led@13 {
18928 + reg = <13>;
18929 + label = "piglow:white:led13";
18930 + };
18931 + led@14 {
18932 + reg = <14>;
18933 + label = "piglow:green:led14";
18934 + };
18935 + led@15 {
18936 + reg = <15>;
18937 + label = "piglow:blue:led15";
18938 + };
18939 + led@16 {
18940 + reg = <16>;
18941 + label = "piglow:yellow:led16";
18942 + };
18943 + led@17 {
18944 + reg = <17>;
18945 + label = "piglow:orange:led17";
18946 + };
18947 + led@18 {
18948 + reg = <18>;
18949 + label = "piglow:red:led18";
18950 + };
18951 + };
18952 + };
18953 + };
18954 +};
18955 diff --git a/arch/arm/boot/dts/overlays/piscreen-overlay.dts b/arch/arm/boot/dts/overlays/piscreen-overlay.dts
18956 new file mode 100644
18957 index 000000000000..1ac75a248fab
18958 --- /dev/null
18959 +++ b/arch/arm/boot/dts/overlays/piscreen-overlay.dts
18960 @@ -0,0 +1,102 @@
18961 +/*
18962 + * Device Tree overlay for PiScreen 3.5" display shield by Ozzmaker
18963 + *
18964 + */
18965 +
18966 +/dts-v1/;
18967 +/plugin/;
18968 +
18969 +/ {
18970 + compatible = "brcm,bcm2835";
18971 +
18972 + fragment@0 {
18973 + target = <&spi0>;
18974 + __overlay__ {
18975 + status = "okay";
18976 + };
18977 + };
18978 +
18979 + fragment@1 {
18980 + target = <&spidev0>;
18981 + __overlay__ {
18982 + status = "disabled";
18983 + };
18984 + };
18985 +
18986 + fragment@2 {
18987 + target = <&spidev1>;
18988 + __overlay__ {
18989 + status = "disabled";
18990 + };
18991 + };
18992 +
18993 + fragment@3 {
18994 + target = <&gpio>;
18995 + __overlay__ {
18996 + piscreen_pins: piscreen_pins {
18997 + brcm,pins = <17 25 24 22>;
18998 + brcm,function = <0 1 1 1>; /* in out out out */
18999 + };
19000 + };
19001 + };
19002 +
19003 + fragment@4 {
19004 + target = <&spi0>;
19005 + __overlay__ {
19006 + /* needed to avoid dtc warning */
19007 + #address-cells = <1>;
19008 + #size-cells = <0>;
19009 +
19010 + piscreen: piscreen@0{
19011 + compatible = "ilitek,ili9486";
19012 + reg = <0>;
19013 + pinctrl-names = "default";
19014 + pinctrl-0 = <&piscreen_pins>;
19015 +
19016 + spi-max-frequency = <24000000>;
19017 + rotate = <270>;
19018 + bgr;
19019 + fps = <30>;
19020 + buswidth = <8>;
19021 + regwidth = <16>;
19022 + reset-gpios = <&gpio 25 1>;
19023 + dc-gpios = <&gpio 24 0>;
19024 + led-gpios = <&gpio 22 0>;
19025 + debug = <0>;
19026 +
19027 + init = <0x10000b0 0x00
19028 + 0x1000011
19029 + 0x20000ff
19030 + 0x100003a 0x55
19031 + 0x1000036 0x28
19032 + 0x10000c2 0x44
19033 + 0x10000c5 0x00 0x00 0x00 0x00
19034 + 0x10000e0 0x0f 0x1f 0x1c 0x0c 0x0f 0x08 0x48 0x98 0x37 0x0a 0x13 0x04 0x11 0x0d 0x00
19035 + 0x10000e1 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
19036 + 0x10000e2 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
19037 + 0x1000011
19038 + 0x1000029>;
19039 + };
19040 +
19041 + piscreen_ts: piscreen-ts@1 {
19042 + compatible = "ti,ads7846";
19043 + reg = <1>;
19044 +
19045 + spi-max-frequency = <2000000>;
19046 + interrupts = <17 2>; /* high-to-low edge triggered */
19047 + interrupt-parent = <&gpio>;
19048 + pendown-gpio = <&gpio 17 0>;
19049 + ti,swap-xy;
19050 + ti,x-plate-ohms = /bits/ 16 <100>;
19051 + ti,pressure-max = /bits/ 16 <255>;
19052 + };
19053 + };
19054 + };
19055 + __overrides__ {
19056 + speed = <&piscreen>,"spi-max-frequency:0";
19057 + rotate = <&piscreen>,"rotate:0";
19058 + fps = <&piscreen>,"fps:0";
19059 + debug = <&piscreen>,"debug:0";
19060 + xohms = <&piscreen_ts>,"ti,x-plate-ohms;0";
19061 + };
19062 +};
19063 diff --git a/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts b/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
19064 new file mode 100644
19065 index 000000000000..9d2b51101969
19066 --- /dev/null
19067 +++ b/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
19068 @@ -0,0 +1,106 @@
19069 + /*
19070 + * Device Tree overlay for PiScreen2 3.5" TFT with resistive touch by Ozzmaker.com
19071 + *
19072 + */
19073 +
19074 +/dts-v1/;
19075 +/plugin/;
19076 +
19077 +/ {
19078 + compatible = "brcm,bcm2835";
19079 +
19080 + fragment@0 {
19081 + target = <&spi0>;
19082 + __overlay__ {
19083 + status = "okay";
19084 + };
19085 + };
19086 +
19087 + fragment@1 {
19088 + target = <&spidev0>;
19089 + __overlay__ {
19090 + status = "disabled";
19091 + };
19092 + };
19093 +
19094 + fragment@2 {
19095 + target = <&spidev1>;
19096 + __overlay__ {
19097 + status = "disabled";
19098 + };
19099 + };
19100 +
19101 + fragment@3 {
19102 + target = <&gpio>;
19103 + __overlay__ {
19104 + piscreen2_pins: piscreen2_pins {
19105 + brcm,pins = <17 25 24 22>;
19106 + brcm,function = <0 1 1 1>; /* in out out out */
19107 + };
19108 + };
19109 + };
19110 +
19111 + fragment@4 {
19112 + target = <&spi0>;
19113 + __overlay__ {
19114 + /* needed to avoid dtc warning */
19115 + #address-cells = <1>;
19116 + #size-cells = <0>;
19117 +
19118 + piscreen2: piscreen2@0{
19119 + compatible = "ilitek,ili9486";
19120 + reg = <0>;
19121 + pinctrl-names = "default";
19122 + pinctrl-0 = <&piscreen2_pins>;
19123 + bgr;
19124 + spi-max-frequency = <64000000>;
19125 + rotate = <90>;
19126 + fps = <30>;
19127 + buswidth = <8>;
19128 + regwidth = <16>;
19129 + txbuflen = <32768>;
19130 + reset-gpios = <&gpio 25 1>;
19131 + dc-gpios = <&gpio 24 0>;
19132 + led-gpios = <&gpio 22 0>;
19133 + debug = <0>;
19134 +
19135 + init = <0x10000b0 0x00
19136 + 0x1000011
19137 + 0x20000ff
19138 + 0x100003a 0x55
19139 + 0x1000036 0x28
19140 + 0x10000c0 0x11 0x09
19141 + 0x10000c1 0x41
19142 + 0x10000c5 0x00 0x00 0x00 0x00
19143 + 0x10000b6 0x00 0x02
19144 + 0x10000f7 0xa9 0x51 0x2c 0x2
19145 + 0x10000be 0x00 0x04
19146 + 0x10000e9 0x00
19147 + 0x1000011
19148 + 0x1000029>;
19149 +
19150 + };
19151 +
19152 + piscreen2_ts: piscreen2-ts@1 {
19153 + compatible = "ti,ads7846";
19154 + reg = <1>;
19155 +
19156 + spi-max-frequency = <2000000>;
19157 + interrupts = <17 2>; /* high-to-low edge triggered */
19158 + interrupt-parent = <&gpio>;
19159 + pendown-gpio = <&gpio 17 0>;
19160 + ti,swap-xy;
19161 + ti,x-plate-ohms = /bits/ 16 <100>;
19162 + ti,pressure-max = /bits/ 16 <255>;
19163 + };
19164 + };
19165 + };
19166 + __overrides__ {
19167 + speed = <&piscreen2>,"spi-max-frequency:0";
19168 + rotate = <&piscreen2>,"rotate:0";
19169 + fps = <&piscreen2>,"fps:0";
19170 + debug = <&piscreen2>,"debug:0";
19171 + xohms = <&piscreen2_ts>,"ti,x-plate-ohms;0";
19172 + };
19173 +};
19174 +
19175 diff --git a/arch/arm/boot/dts/overlays/pisound-overlay.dts b/arch/arm/boot/dts/overlays/pisound-overlay.dts
19176 new file mode 100644
19177 index 000000000000..49efb2b768fb
19178 --- /dev/null
19179 +++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts
19180 @@ -0,0 +1,120 @@
19181 +/*
19182 + * Pisound Linux kernel module.
19183 + * Copyright (C) 2016-2017 Vilniaus Blokas UAB, https://blokas.io/pisound
19184 + *
19185 + * This program is free software; you can redistribute it and/or
19186 + * modify it under the terms of the GNU General Public License
19187 + * as published by the Free Software Foundation; version 2 of the
19188 + * License.
19189 + *
19190 + * This program is distributed in the hope that it will be useful,
19191 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
19192 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19193 + * GNU General Public License for more details.
19194 + *
19195 + * You should have received a copy of the GNU General Public License
19196 + * along with this program; if not, write to the Free Software
19197 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19198 + */
19199 +
19200 +/dts-v1/;
19201 +/plugin/;
19202 +
19203 +#include <dt-bindings/gpio/gpio.h>
19204 +
19205 +/ {
19206 + compatible = "brcm,bcm2835";
19207 +
19208 + fragment@0 {
19209 + target = <&spi0>;
19210 + __overlay__ {
19211 + status = "okay";
19212 + };
19213 + };
19214 +
19215 + fragment@1 {
19216 + target = <&spidev0>;
19217 + __overlay__ {
19218 + status = "disabled";
19219 + };
19220 + };
19221 +
19222 + fragment@2 {
19223 + target = <&spidev1>;
19224 + __overlay__ {
19225 + status = "okay";
19226 + };
19227 + };
19228 +
19229 + fragment@3 {
19230 + target = <&spi0>;
19231 + __overlay__ {
19232 + #address-cells = <1>;
19233 + #size-cells = <0>;
19234 +
19235 + pisound_spi: pisound_spi@0{
19236 + compatible = "blokaslabs,pisound-spi";
19237 + reg = <0>;
19238 + pinctrl-names = "default";
19239 + pinctrl-0 = <&spi0_pins>;
19240 + spi-max-frequency = <1000000>;
19241 + };
19242 + };
19243 + };
19244 +
19245 + fragment@4 {
19246 + target-path = "/";
19247 + __overlay__ {
19248 + pcm5102a-codec {
19249 + #sound-dai-cells = <0>;
19250 + compatible = "ti,pcm5102a";
19251 + status = "okay";
19252 + };
19253 + };
19254 + };
19255 +
19256 + fragment@5 {
19257 + target = <&sound>;
19258 + __overlay__ {
19259 + compatible = "blokaslabs,pisound";
19260 + i2s-controller = <&i2s>;
19261 + status = "okay";
19262 +
19263 + pinctrl-0 = <&pisound_button_pins>;
19264 +
19265 + osr-gpios =
19266 + <&gpio 13 GPIO_ACTIVE_HIGH>,
19267 + <&gpio 26 GPIO_ACTIVE_HIGH>,
19268 + <&gpio 16 GPIO_ACTIVE_HIGH>;
19269 +
19270 + reset-gpios =
19271 + <&gpio 12 GPIO_ACTIVE_HIGH>,
19272 + <&gpio 24 GPIO_ACTIVE_HIGH>;
19273 +
19274 + data_available-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
19275 +
19276 + button-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
19277 + };
19278 + };
19279 +
19280 + fragment@6 {
19281 + target = <&gpio>;
19282 + __overlay__ {
19283 + pinctrl-names = "default";
19284 + pinctrl-0 = <&pisound_button_pins>;
19285 +
19286 + pisound_button_pins: pisound_button_pins {
19287 + brcm,pins = <17>;
19288 + brcm,function = <0>; // Input
19289 + brcm,pull = <2>; // Pull-Up
19290 + };
19291 + };
19292 + };
19293 +
19294 + fragment@7 {
19295 + target = <&i2s>;
19296 + __overlay__ {
19297 + status = "okay";
19298 + };
19299 + };
19300 +};
19301 diff --git a/arch/arm/boot/dts/overlays/pitft22-overlay.dts b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
19302 new file mode 100644
19303 index 000000000000..589ad13795b1
19304 --- /dev/null
19305 +++ b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
19306 @@ -0,0 +1,69 @@
19307 +/*
19308 + * Device Tree overlay for pitft by Adafruit
19309 + *
19310 + */
19311 +
19312 +/dts-v1/;
19313 +/plugin/;
19314 +
19315 +/ {
19316 + compatible = "brcm,bcm2835";
19317 +
19318 + fragment@0 {
19319 + target = <&spi0>;
19320 + __overlay__ {
19321 + status = "okay";
19322 +
19323 + spidev@0{
19324 + status = "disabled";
19325 + };
19326 +
19327 + spidev@1{
19328 + status = "disabled";
19329 + };
19330 + };
19331 + };
19332 +
19333 + fragment@1 {
19334 + target = <&gpio>;
19335 + __overlay__ {
19336 + pitft_pins: pitft_pins {
19337 + brcm,pins = <25>;
19338 + brcm,function = <1>; /* out */
19339 + brcm,pull = <0>; /* none */
19340 + };
19341 + };
19342 + };
19343 +
19344 + fragment@2 {
19345 + target = <&spi0>;
19346 + __overlay__ {
19347 + /* needed to avoid dtc warning */
19348 + #address-cells = <1>;
19349 + #size-cells = <0>;
19350 +
19351 + pitft: pitft@0{
19352 + compatible = "ilitek,ili9340";
19353 + reg = <0>;
19354 + pinctrl-names = "default";
19355 + pinctrl-0 = <&pitft_pins>;
19356 +
19357 + spi-max-frequency = <32000000>;
19358 + rotate = <90>;
19359 + fps = <25>;
19360 + bgr;
19361 + buswidth = <8>;
19362 + dc-gpios = <&gpio 25 0>;
19363 + debug = <0>;
19364 + };
19365 +
19366 + };
19367 + };
19368 +
19369 + __overrides__ {
19370 + speed = <&pitft>,"spi-max-frequency:0";
19371 + rotate = <&pitft>,"rotate:0";
19372 + fps = <&pitft>,"fps:0";
19373 + debug = <&pitft>,"debug:0";
19374 + };
19375 +};
19376 diff --git a/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts b/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
19377 new file mode 100644
19378 index 000000000000..33901ee1db7a
19379 --- /dev/null
19380 +++ b/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
19381 @@ -0,0 +1,91 @@
19382 +/*
19383 + * Device Tree overlay for Adafruit PiTFT 2.8" capacitive touch screen
19384 + *
19385 + */
19386 +
19387 +/dts-v1/;
19388 +/plugin/;
19389 +
19390 +/ {
19391 + compatible = "brcm,bcm2835";
19392 +
19393 + fragment@0 {
19394 + target = <&spi0>;
19395 + __overlay__ {
19396 + status = "okay";
19397 + };
19398 + };
19399 +
19400 + fragment@1 {
19401 + target = <&spidev0>;
19402 + __overlay__ {
19403 + status = "disabled";
19404 + };
19405 + };
19406 +
19407 + fragment@2 {
19408 + target = <&gpio>;
19409 + __overlay__ {
19410 + pitft_pins: pitft_pins {
19411 + brcm,pins = <24 25>;
19412 + brcm,function = <0 1>; /* in out */
19413 + brcm,pull = <2 0>; /* pullup none */
19414 + };
19415 + };
19416 + };
19417 +
19418 + fragment@3 {
19419 + target = <&spi0>;
19420 + __overlay__ {
19421 + /* needed to avoid dtc warning */
19422 + #address-cells = <1>;
19423 + #size-cells = <0>;
19424 +
19425 + pitft: pitft@0{
19426 + compatible = "ilitek,ili9340";
19427 + reg = <0>;
19428 + pinctrl-names = "default";
19429 + pinctrl-0 = <&pitft_pins>;
19430 +
19431 + spi-max-frequency = <32000000>;
19432 + rotate = <90>;
19433 + fps = <25>;
19434 + bgr;
19435 + buswidth = <8>;
19436 + dc-gpios = <&gpio 25 0>;
19437 + debug = <0>;
19438 + };
19439 + };
19440 + };
19441 +
19442 + fragment@4 {
19443 + target = <&i2c1>;
19444 + __overlay__ {
19445 + /* needed to avoid dtc warning */
19446 + #address-cells = <1>;
19447 + #size-cells = <0>;
19448 +
19449 + ft6236: ft6236@38 {
19450 + compatible = "focaltech,ft6236";
19451 + reg = <0x38>;
19452 +
19453 + interrupt-parent = <&gpio>;
19454 + interrupts = <24 2>;
19455 + touchscreen-size-x = <240>;
19456 + touchscreen-size-y = <320>;
19457 + };
19458 + };
19459 + };
19460 +
19461 + __overrides__ {
19462 + speed = <&pitft>,"spi-max-frequency:0";
19463 + rotate = <&pitft>,"rotate:0";
19464 + fps = <&pitft>,"fps:0";
19465 + debug = <&pitft>,"debug:0";
19466 + touch-sizex = <&ft6236>,"touchscreen-size-x?";
19467 + touch-sizey = <&ft6236>,"touchscreen-size-y?";
19468 + touch-invx = <&ft6236>,"touchscreen-inverted-x?";
19469 + touch-invy = <&ft6236>,"touchscreen-inverted-y?";
19470 + touch-swapxy = <&ft6236>,"touchscreen-swapped-x-y?";
19471 + };
19472 +};
19473 diff --git a/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
19474 new file mode 100644
19475 index 000000000000..4a4a3f44c29d
19476 --- /dev/null
19477 +++ b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
19478 @@ -0,0 +1,119 @@
19479 +/*
19480 + * Device Tree overlay for Adafruit PiTFT 2.8" resistive touch screen
19481 + *
19482 + */
19483 +
19484 +/dts-v1/;
19485 +/plugin/;
19486 +
19487 +/ {
19488 + compatible = "brcm,bcm2835";
19489 +
19490 + fragment@0 {
19491 + target = <&spi0>;
19492 + __overlay__ {
19493 + status = "okay";
19494 + };
19495 + };
19496 +
19497 + fragment@1 {
19498 + target = <&spidev0>;
19499 + __overlay__ {
19500 + status = "disabled";
19501 + };
19502 + };
19503 +
19504 + fragment@2 {
19505 + target = <&spidev1>;
19506 + __overlay__ {
19507 + status = "disabled";
19508 + };
19509 + };
19510 +
19511 + fragment@3 {
19512 + target = <&gpio>;
19513 + __overlay__ {
19514 + pitft_pins: pitft_pins {
19515 + brcm,pins = <24 25>;
19516 + brcm,function = <0 1>; /* in out */
19517 + brcm,pull = <2 0>; /* pullup none */
19518 + };
19519 + };
19520 + };
19521 +
19522 + fragment@4 {
19523 + target = <&spi0>;
19524 + __overlay__ {
19525 + /* needed to avoid dtc warning */
19526 + #address-cells = <1>;
19527 + #size-cells = <0>;
19528 +
19529 + pitft: pitft@0{
19530 + compatible = "ilitek,ili9340";
19531 + reg = <0>;
19532 + pinctrl-names = "default";
19533 + pinctrl-0 = <&pitft_pins>;
19534 +
19535 + spi-max-frequency = <32000000>;
19536 + rotate = <90>;
19537 + fps = <25>;
19538 + bgr;
19539 + buswidth = <8>;
19540 + dc-gpios = <&gpio 25 0>;
19541 + debug = <0>;
19542 + };
19543 +
19544 + pitft_ts@1 {
19545 + compatible = "st,stmpe610";
19546 + reg = <1>;
19547 +
19548 + spi-max-frequency = <500000>;
19549 + irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
19550 + interrupts = <24 2>; /* high-to-low edge triggered */
19551 + interrupt-parent = <&gpio>;
19552 + interrupt-controller;
19553 +
19554 + stmpe_touchscreen {
19555 + compatible = "st,stmpe-ts";
19556 + st,sample-time = <4>;
19557 + st,mod-12b = <1>;
19558 + st,ref-sel = <0>;
19559 + st,adc-freq = <2>;
19560 + st,ave-ctrl = <3>;
19561 + st,touch-det-delay = <4>;
19562 + st,settling = <2>;
19563 + st,fraction-z = <7>;
19564 + st,i-drive = <0>;
19565 + };
19566 +
19567 + stmpe_gpio: stmpe_gpio {
19568 + #gpio-cells = <2>;
19569 + compatible = "st,stmpe-gpio";
19570 + /*
19571 + * only GPIO2 is wired/available
19572 + * and it is wired to the backlight
19573 + */
19574 + st,norequest-mask = <0x7b>;
19575 + };
19576 + };
19577 + };
19578 + };
19579 +
19580 + fragment@5 {
19581 + target-path = "/soc";
19582 + __overlay__ {
19583 + backlight {
19584 + compatible = "gpio-backlight";
19585 + gpios = <&stmpe_gpio 2 0>;
19586 + default-on;
19587 + };
19588 + };
19589 + };
19590 +
19591 + __overrides__ {
19592 + speed = <&pitft>,"spi-max-frequency:0";
19593 + rotate = <&pitft>,"rotate:0";
19594 + fps = <&pitft>,"fps:0";
19595 + debug = <&pitft>,"debug:0";
19596 + };
19597 +};
19598 diff --git a/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
19599 new file mode 100644
19600 index 000000000000..37629f18a740
19601 --- /dev/null
19602 +++ b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
19603 @@ -0,0 +1,119 @@
19604 +/*
19605 + * Device Tree overlay for Adafruit PiTFT 3.5" resistive touch screen
19606 + *
19607 + */
19608 +
19609 +/dts-v1/;
19610 +/plugin/;
19611 +
19612 +/ {
19613 + compatible = "brcm,bcm2835";
19614 +
19615 + fragment@0 {
19616 + target = <&spi0>;
19617 + __overlay__ {
19618 + status = "okay";
19619 + };
19620 + };
19621 +
19622 + fragment@1 {
19623 + target = <&spidev0>;
19624 + __overlay__ {
19625 + status = "disabled";
19626 + };
19627 + };
19628 +
19629 + fragment@2 {
19630 + target = <&spidev1>;
19631 + __overlay__ {
19632 + status = "disabled";
19633 + };
19634 + };
19635 +
19636 + fragment@3 {
19637 + target = <&gpio>;
19638 + __overlay__ {
19639 + pitft_pins: pitft_pins {
19640 + brcm,pins = <24 25>;
19641 + brcm,function = <0 1>; /* in out */
19642 + brcm,pull = <2 0>; /* pullup none */
19643 + };
19644 + };
19645 + };
19646 +
19647 + fragment@4 {
19648 + target = <&spi0>;
19649 + __overlay__ {
19650 + /* needed to avoid dtc warning */
19651 + #address-cells = <1>;
19652 + #size-cells = <0>;
19653 +
19654 + pitft: pitft@0{
19655 + compatible = "himax,hx8357d", "adafruit,yx350hv15";
19656 + reg = <0>;
19657 + pinctrl-names = "default";
19658 + pinctrl-0 = <&pitft_pins>;
19659 +
19660 + spi-max-frequency = <32000000>;
19661 + rotate = <90>;
19662 + fps = <25>;
19663 + bgr;
19664 + buswidth = <8>;
19665 + dc-gpios = <&gpio 25 0>;
19666 + debug = <0>;
19667 + };
19668 +
19669 + pitft_ts@1 {
19670 + compatible = "st,stmpe610";
19671 + reg = <1>;
19672 +
19673 + spi-max-frequency = <500000>;
19674 + irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
19675 + interrupts = <24 2>; /* high-to-low edge triggered */
19676 + interrupt-parent = <&gpio>;
19677 + interrupt-controller;
19678 +
19679 + stmpe_touchscreen {
19680 + compatible = "st,stmpe-ts";
19681 + st,sample-time = <4>;
19682 + st,mod-12b = <1>;
19683 + st,ref-sel = <0>;
19684 + st,adc-freq = <2>;
19685 + st,ave-ctrl = <3>;
19686 + st,touch-det-delay = <4>;
19687 + st,settling = <2>;
19688 + st,fraction-z = <7>;
19689 + st,i-drive = <0>;
19690 + };
19691 +
19692 + stmpe_gpio: stmpe_gpio {
19693 + #gpio-cells = <2>;
19694 + compatible = "st,stmpe-gpio";
19695 + /*
19696 + * only GPIO2 is wired/available
19697 + * and it is wired to the backlight
19698 + */
19699 + st,norequest-mask = <0x7b>;
19700 + };
19701 + };
19702 + };
19703 + };
19704 +
19705 + fragment@5 {
19706 + target-path = "/soc";
19707 + __overlay__ {
19708 + backlight {
19709 + compatible = "gpio-backlight";
19710 + gpios = <&stmpe_gpio 2 0>;
19711 + default-on;
19712 + };
19713 + };
19714 + };
19715 +
19716 + __overrides__ {
19717 + speed = <&pitft>,"spi-max-frequency:0";
19718 + rotate = <&pitft>,"rotate:0";
19719 + fps = <&pitft>,"fps:0";
19720 + debug = <&pitft>,"debug:0";
19721 + };
19722 +};
19723 diff --git a/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
19724 new file mode 100644
19725 index 000000000000..524a1c1d3670
19726 --- /dev/null
19727 +++ b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
19728 @@ -0,0 +1,38 @@
19729 +/dts-v1/;
19730 +/plugin/;
19731 +
19732 +/ {
19733 + compatible = "brcm,bcm2835";
19734 + fragment@0 {
19735 + target-path = "/";
19736 + __overlay__ {
19737 + pps: pps@12 {
19738 + compatible = "pps-gpio";
19739 + pinctrl-names = "default";
19740 + pinctrl-0 = <&pps_pins>;
19741 + gpios = <&gpio 18 0>;
19742 + status = "okay";
19743 + };
19744 + };
19745 + };
19746 +
19747 + fragment@1 {
19748 + target = <&gpio>;
19749 + __overlay__ {
19750 + pps_pins: pps_pins@12 {
19751 + brcm,pins = <18>;
19752 + brcm,function = <0>; // in
19753 + brcm,pull = <0>; // off
19754 + };
19755 + };
19756 + };
19757 +
19758 + __overrides__ {
19759 + gpiopin = <&pps>,"gpios:4",
19760 + <&pps>,"reg:0",
19761 + <&pps_pins>,"brcm,pins:0",
19762 + <&pps_pins>,"reg:0";
19763 + assert_falling_edge = <&pps>,"assert-falling-edge?";
19764 + capture_clear = <&pps>,"capture-clear?";
19765 + };
19766 +};
19767 diff --git a/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
19768 new file mode 100644
19769 index 000000000000..4ddbbfa04065
19770 --- /dev/null
19771 +++ b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
19772 @@ -0,0 +1,49 @@
19773 +/dts-v1/;
19774 +/plugin/;
19775 +
19776 +/*
19777 +This is the 2-channel overlay - only use it if you need both channels.
19778 +
19779 +Legal pin,function combinations for each channel:
19780 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
19781 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
19782 +
19783 +N.B.:
19784 + 1) Pin 18 is the only one available on all platforms, and
19785 + it is the one used by the I2S audio interface.
19786 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
19787 + 2) The onboard analogue audio output uses both PWM channels.
19788 + 3) So be careful mixing audio and PWM.
19789 +*/
19790 +
19791 +/ {
19792 + compatible = "brcm,bcm2835";
19793 +
19794 + fragment@0 {
19795 + target = <&gpio>;
19796 + __overlay__ {
19797 + pwm_pins: pwm_pins {
19798 + brcm,pins = <18 19>;
19799 + brcm,function = <2 2>; /* Alt5 */
19800 + };
19801 + };
19802 + };
19803 +
19804 + fragment@1 {
19805 + target = <&pwm>;
19806 + frag1: __overlay__ {
19807 + pinctrl-names = "default";
19808 + pinctrl-0 = <&pwm_pins>;
19809 + assigned-clock-rates = <100000000>;
19810 + status = "okay";
19811 + };
19812 + };
19813 +
19814 + __overrides__ {
19815 + pin = <&pwm_pins>,"brcm,pins:0";
19816 + pin2 = <&pwm_pins>,"brcm,pins:4";
19817 + func = <&pwm_pins>,"brcm,function:0";
19818 + func2 = <&pwm_pins>,"brcm,function:4";
19819 + clock = <&frag1>,"assigned-clock-rates:0";
19820 + };
19821 +};
19822 diff --git a/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
19823 new file mode 100644
19824 index 000000000000..119caf746b3b
19825 --- /dev/null
19826 +++ b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
19827 @@ -0,0 +1,40 @@
19828 +/dts-v1/;
19829 +/plugin/;
19830 +
19831 +/ {
19832 + compatible = "brcm,bcm2835";
19833 +
19834 + fragment@0 {
19835 + target = <&gpio>;
19836 + __overlay__ {
19837 + pwm0_pins: pwm0_pins {
19838 + brcm,pins = <18>;
19839 + brcm,function = <2>; /* Alt5 */
19840 + };
19841 + };
19842 + };
19843 +
19844 + fragment@1 {
19845 + target = <&pwm>;
19846 + __overlay__ {
19847 + pinctrl-names = "default";
19848 + pinctrl-0 = <&pwm0_pins>;
19849 + status = "okay";
19850 + };
19851 + };
19852 +
19853 + fragment@2 {
19854 + target-path = "/";
19855 + __overlay__ {
19856 + pwm-ir-transmitter {
19857 + compatible = "pwm-ir-tx";
19858 + pwms = <&pwm 0 100>;
19859 + };
19860 + };
19861 + };
19862 +
19863 + __overrides__ {
19864 + gpio_pin = <&pwm0_pins>, "brcm,pins:0";
19865 + func = <&pwm0_pins>,"brcm,function:0";
19866 + };
19867 +};
19868 diff --git a/arch/arm/boot/dts/overlays/pwm-overlay.dts b/arch/arm/boot/dts/overlays/pwm-overlay.dts
19869 new file mode 100644
19870 index 000000000000..92876ab3bc8c
19871 --- /dev/null
19872 +++ b/arch/arm/boot/dts/overlays/pwm-overlay.dts
19873 @@ -0,0 +1,45 @@
19874 +/dts-v1/;
19875 +/plugin/;
19876 +
19877 +/*
19878 +Legal pin,function combinations for each channel:
19879 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
19880 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
19881 +
19882 +N.B.:
19883 + 1) Pin 18 is the only one available on all platforms, and
19884 + it is the one used by the I2S audio interface.
19885 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
19886 + 2) The onboard analogue audio output uses both PWM channels.
19887 + 3) So be careful mixing audio and PWM.
19888 +*/
19889 +
19890 +/ {
19891 + compatible = "brcm,bcm2835";
19892 +
19893 + fragment@0 {
19894 + target = <&gpio>;
19895 + __overlay__ {
19896 + pwm_pins: pwm_pins {
19897 + brcm,pins = <18>;
19898 + brcm,function = <2>; /* Alt5 */
19899 + };
19900 + };
19901 + };
19902 +
19903 + fragment@1 {
19904 + target = <&pwm>;
19905 + frag1: __overlay__ {
19906 + pinctrl-names = "default";
19907 + pinctrl-0 = <&pwm_pins>;
19908 + assigned-clock-rates = <100000000>;
19909 + status = "okay";
19910 + };
19911 + };
19912 +
19913 + __overrides__ {
19914 + pin = <&pwm_pins>,"brcm,pins:0";
19915 + func = <&pwm_pins>,"brcm,function:0";
19916 + clock = <&frag1>,"assigned-clock-rates:0";
19917 + };
19918 +};
19919 diff --git a/arch/arm/boot/dts/overlays/qca7000-overlay.dts b/arch/arm/boot/dts/overlays/qca7000-overlay.dts
19920 new file mode 100644
19921 index 000000000000..9a451202a2eb
19922 --- /dev/null
19923 +++ b/arch/arm/boot/dts/overlays/qca7000-overlay.dts
19924 @@ -0,0 +1,55 @@
19925 +// Overlay for the Qualcomm Atheros QCA7000 on I2SE's PLC Stamp micro EVK
19926 +// Visit: https://www.i2se.com/product/plc-stamp-micro-evk for details
19927 +
19928 +/dts-v1/;
19929 +/plugin/;
19930 +
19931 +/ {
19932 + compatible = "brcm,bcm2835";
19933 +
19934 + fragment@0 {
19935 + target = <&spidev0>;
19936 + __overlay__ {
19937 + status = "disabled";
19938 + };
19939 + };
19940 +
19941 + fragment@1 {
19942 + target = <&spi0>;
19943 + __overlay__ {
19944 + /* needed to avoid dtc warning */
19945 + #address-cells = <1>;
19946 + #size-cells = <0>;
19947 +
19948 + status = "okay";
19949 +
19950 + eth1: qca7000@0 {
19951 + compatible = "qca,qca7000";
19952 + reg = <0>; /* CE0 */
19953 + pinctrl-names = "default";
19954 + pinctrl-0 = <&eth1_pins>;
19955 + interrupt-parent = <&gpio>;
19956 + interrupts = <23 0x1>; /* rising edge */
19957 + spi-max-frequency = <12000000>;
19958 + status = "okay";
19959 + };
19960 + };
19961 + };
19962 +
19963 + fragment@2 {
19964 + target = <&gpio>;
19965 + __overlay__ {
19966 + eth1_pins: eth1_pins {
19967 + brcm,pins = <23>;
19968 + brcm,function = <0>; /* in */
19969 + brcm,pull = <0>; /* none */
19970 + };
19971 + };
19972 + };
19973 +
19974 + __overrides__ {
19975 + int_pin = <&eth1>, "interrupts:0",
19976 + <&eth1_pins>, "brcm,pins:0";
19977 + speed = <&eth1>, "spi-max-frequency:0";
19978 + };
19979 +};
19980 diff --git a/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
19981 new file mode 100644
19982 index 000000000000..ea1d952734e9
19983 --- /dev/null
19984 +++ b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
19985 @@ -0,0 +1,59 @@
19986 +// Device tree overlay for GPIO connected rotary encoder.
19987 +/dts-v1/;
19988 +/plugin/;
19989 +
19990 +/ {
19991 + compatible = "brcm,bcm2835";
19992 +
19993 + fragment@0 {
19994 + target = <&gpio>;
19995 + __overlay__ {
19996 + rotary_pins: rotary_pins@4 {
19997 + brcm,pins = <4 17>; /* gpio 4 17 */
19998 + brcm,function = <0 0>; /* input */
19999 + brcm,pull = <2 2>; /* pull-up */
20000 + };
20001 +
20002 + };
20003 + };
20004 +
20005 + fragment@1 {
20006 + target-path = "/";
20007 + __overlay__ {
20008 + rotary: rotary@4 {
20009 + compatible = "rotary-encoder";
20010 + status = "okay";
20011 + pinctrl-names = "default";
20012 + pinctrl-0 = <&rotary_pins>;
20013 + gpios = <&gpio 4 0>, <&gpio 17 0>;
20014 + linux,axis = <0>; /* REL_X */
20015 + rotary-encoder,encoding = "gray";
20016 + rotary-encoder,steps = <24>; /* 24 default */
20017 + rotary-encoder,steps-per-period = <1>; /* corresponds to full period mode. See README */
20018 + };
20019 + };
20020 +
20021 + };
20022 +
20023 + __overrides__ {
20024 + pin_a = <&rotary>,"gpios:4",
20025 + <&rotary_pins>,"brcm,pins:0",
20026 + /* modify reg values to allow multiple instantiation */
20027 + <&rotary>,"reg:0",
20028 + <&rotary_pins>,"reg:0";
20029 + pin_b = <&rotary>,"gpios:16",
20030 + <&rotary_pins>,"brcm,pins:4";
20031 + relative_axis = <&rotary>,"rotary-encoder,relative-axis?";
20032 + linux_axis = <&rotary>,"linux,axis:0";
20033 + rollover = <&rotary>,"rotary-encoder,rollover?";
20034 + steps-per-period = <&rotary>,"rotary-encoder,steps-per-period:0";
20035 + steps = <&rotary>,"rotary-encoder,steps:0";
20036 + wakeup = <&rotary>,"wakeup-source?";
20037 + encoding = <&rotary>,"rotary-encoder,encoding";
20038 + /* legacy parameters*/
20039 + rotary0_pin_a = <&rotary>,"gpios:4",
20040 + <&rotary_pins>,"brcm,pins:0";
20041 + rotary0_pin_b = <&rotary>,"gpios:16",
20042 + <&rotary_pins>,"brcm,pins:4";
20043 + };
20044 +};
20045 diff --git a/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts b/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
20046 new file mode 100644
20047 index 000000000000..cac5e44c6ec5
20048 --- /dev/null
20049 +++ b/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
20050 @@ -0,0 +1,21 @@
20051 +/*
20052 + * Devicetree overlay for mailbox-driven Raspberry Pi DSI Display
20053 + * backlight controller
20054 + */
20055 +/dts-v1/;
20056 +/plugin/;
20057 +
20058 +/ {
20059 + compatible = "brcm,bcm2835";
20060 +
20061 + fragment@0 {
20062 + target-path = "/";
20063 + __overlay__ {
20064 + rpi_backlight: rpi_backlight {
20065 + compatible = "raspberrypi,rpi-backlight";
20066 + firmware = <&firmware>;
20067 + status = "okay";
20068 + };
20069 + };
20070 + };
20071 +};
20072 diff --git a/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
20073 new file mode 100644
20074 index 000000000000..ed0c2745399f
20075 --- /dev/null
20076 +++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
20077 @@ -0,0 +1,172 @@
20078 +// Definitions for the Cirrus Logic Audio Card
20079 +/dts-v1/;
20080 +/plugin/;
20081 +#include <dt-bindings/pinctrl/bcm2835.h>
20082 +#include <dt-bindings/gpio/gpio.h>
20083 +#include <dt-bindings/mfd/arizona.h>
20084 +
20085 +/ {
20086 + compatible = "brcm,bcm2835";
20087 +
20088 + fragment@0 {
20089 + target = <&i2s>;
20090 + __overlay__ {
20091 + status = "okay";
20092 + };
20093 + };
20094 +
20095 + fragment@1 {
20096 + target = <&gpio>;
20097 + __overlay__ {
20098 + wlf_5102_pins: wlf_5102_pins {
20099 + brcm,pins = <17 22 27>;
20100 + brcm,function = <
20101 + BCM2835_FSEL_GPIO_OUT
20102 + BCM2835_FSEL_GPIO_OUT
20103 + BCM2835_FSEL_GPIO_IN
20104 + >;
20105 + };
20106 + wlf_8804_pins: wlf_8804_pins {
20107 + brcm,pins = <8>;
20108 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
20109 + };
20110 + };
20111 + };
20112 +
20113 + fragment@2 {
20114 + target = <&spi0_cs_pins>;
20115 + __overlay__ {
20116 + brcm,pins = <7>;
20117 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
20118 + };
20119 + };
20120 +
20121 +
20122 + fragment@3 {
20123 + target-path = "/";
20124 + __overlay__ {
20125 + rpi_cirrus_reg_1v8: rpi_cirrus_reg_1v8 {
20126 + compatible = "regulator-fixed";
20127 + regulator-name = "RPi-Cirrus 1v8";
20128 + regulator-min-microvolt = <1800000>;
20129 + regulator-max-microvolt = <1800000>;
20130 + regulator-always-on;
20131 + };
20132 + };
20133 + };
20134 +
20135 + fragment@4 {
20136 + target = <&spidev0>;
20137 + __overlay__ {
20138 + status = "disabled";
20139 + };
20140 + };
20141 +
20142 + fragment@5 {
20143 + target = <&spidev1>;
20144 + __overlay__ {
20145 + status = "disabled";
20146 + };
20147 + };
20148 +
20149 + fragment@6 {
20150 + target = <&spi0>;
20151 + __overlay__ {
20152 + #address-cells = <1>;
20153 + #size-cells = <0>;
20154 + status = "okay";
20155 + cs-gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
20156 +
20157 + wm5102@0{
20158 + compatible = "wlf,wm5102";
20159 + reg = <0>;
20160 +
20161 + pinctrl-names = "default";
20162 + pinctrl-0 = <&wlf_5102_pins>;
20163 +
20164 + spi-max-frequency = <500000>;
20165 +
20166 + interrupt-parent = <&gpio>;
20167 + interrupts = <27 8>;
20168 + interrupt-controller;
20169 + #interrupt-cells = <2>;
20170 +
20171 + gpio-controller;
20172 + #gpio-cells = <2>;
20173 +
20174 + LDOVDD-supply = <&rpi_cirrus_reg_1v8>;
20175 + AVDD-supply = <&rpi_cirrus_reg_1v8>;
20176 + DBVDD1-supply = <&rpi_cirrus_reg_1v8>;
20177 + DBVDD2-supply = <&vdd_3v3_reg>;
20178 + DBVDD3-supply = <&vdd_3v3_reg>;
20179 + CPVDD-supply = <&rpi_cirrus_reg_1v8>;
20180 + SPKVDDL-supply = <&vdd_5v0_reg>;
20181 + SPKVDDR-supply = <&vdd_5v0_reg>;
20182 + DCVDD-supply = <&arizona_ldo1>;
20183 +
20184 + reset-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
20185 + wlf,ldoena = <&gpio 22 GPIO_ACTIVE_HIGH>;
20186 + wlf,gpio-defaults = <
20187 + ARIZONA_GP_DEFAULT
20188 + ARIZONA_GP_DEFAULT
20189 + ARIZONA_GP_DEFAULT
20190 + ARIZONA_GP_DEFAULT
20191 + ARIZONA_GP_DEFAULT
20192 + >;
20193 + wlf,micd-configs = <0 1 0>;
20194 + wlf,dmic-ref = <
20195 + ARIZONA_DMIC_MICVDD
20196 + ARIZONA_DMIC_MICBIAS2
20197 + ARIZONA_DMIC_MICVDD
20198 + ARIZONA_DMIC_MICVDD
20199 + >;
20200 + wlf,inmode = <
20201 + ARIZONA_INMODE_DIFF
20202 + ARIZONA_INMODE_DMIC
20203 + ARIZONA_INMODE_SE
20204 + ARIZONA_INMODE_DIFF
20205 + >;
20206 + status = "okay";
20207 +
20208 + arizona_ldo1: ldo1 {
20209 + regulator-name = "LDO1";
20210 + // default constraints as in
20211 + // arizona-ldo1.c
20212 + regulator-min-microvolt = <1200000>;
20213 + regulator-max-microvolt = <1800000>;
20214 + };
20215 + };
20216 + };
20217 + };
20218 +
20219 + fragment@7 {
20220 + target = <&i2c1>;
20221 + __overlay__ {
20222 + status = "okay";
20223 + #address-cells = <1>;
20224 + #size-cells = <0>;
20225 +
20226 + wm8804@3b {
20227 + compatible = "wlf,wm8804";
20228 + reg = <0x3b>;
20229 + status = "okay";
20230 +
20231 + pinctrl-names = "default";
20232 + pinctrl-0 = <&wlf_8804_pins>;
20233 +
20234 + PVDD-supply = <&vdd_3v3_reg>;
20235 + DVDD-supply = <&vdd_3v3_reg>;
20236 + wlf,reset-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>;
20237 + };
20238 + };
20239 + };
20240 +
20241 + fragment@8 {
20242 + target = <&sound>;
20243 + __overlay__ {
20244 + compatible = "wlf,rpi-cirrus";
20245 + i2s-controller = <&i2s>;
20246 + status = "okay";
20247 + };
20248 + };
20249 +};
20250 diff --git a/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
20251 new file mode 100644
20252 index 000000000000..07a915342702
20253 --- /dev/null
20254 +++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
20255 @@ -0,0 +1,34 @@
20256 +// Definitions for RPi DAC
20257 +/dts-v1/;
20258 +/plugin/;
20259 +
20260 +/ {
20261 + compatible = "brcm,bcm2835";
20262 +
20263 + fragment@0 {
20264 + target = <&i2s>;
20265 + __overlay__ {
20266 + status = "okay";
20267 + };
20268 + };
20269 +
20270 + fragment@1 {
20271 + target-path = "/";
20272 + __overlay__ {
20273 + pcm1794a-codec {
20274 + #sound-dai-cells = <0>;
20275 + compatible = "ti,pcm1794a";
20276 + status = "okay";
20277 + };
20278 + };
20279 + };
20280 +
20281 + fragment@2 {
20282 + target = <&sound>;
20283 + __overlay__ {
20284 + compatible = "rpi,rpi-dac";
20285 + i2s-controller = <&i2s>;
20286 + status = "okay";
20287 + };
20288 + };
20289 +};
20290 diff --git a/arch/arm/boot/dts/overlays/rpi-display-overlay.dts b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts
20291 new file mode 100644
20292 index 000000000000..de87432ff2be
20293 --- /dev/null
20294 +++ b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts
20295 @@ -0,0 +1,91 @@
20296 +/*
20297 + * Device Tree overlay for rpi-display by Watterott
20298 + *
20299 + */
20300 +
20301 +/dts-v1/;
20302 +/plugin/;
20303 +
20304 +/ {
20305 + compatible = "brcm,bcm2835";
20306 +
20307 + fragment@0 {
20308 + target = <&spi0>;
20309 + __overlay__ {
20310 + status = "okay";
20311 + };
20312 + };
20313 +
20314 + fragment@1 {
20315 + target = <&spidev0>;
20316 + __overlay__ {
20317 + status = "disabled";
20318 + };
20319 + };
20320 +
20321 + fragment@2 {
20322 + target = <&spidev1>;
20323 + __overlay__ {
20324 + status = "disabled";
20325 + };
20326 + };
20327 +
20328 + fragment@3 {
20329 + target = <&gpio>;
20330 + __overlay__ {
20331 + rpi_display_pins: rpi_display_pins {
20332 + brcm,pins = <18 23 24 25>;
20333 + brcm,function = <1 1 1 0>; /* out out out in */
20334 + brcm,pull = <0 0 0 2>; /* - - - up */
20335 + };
20336 + };
20337 + };
20338 +
20339 + fragment@4 {
20340 + target = <&spi0>;
20341 + __overlay__ {
20342 + /* needed to avoid dtc warning */
20343 + #address-cells = <1>;
20344 + #size-cells = <0>;
20345 +
20346 + rpidisplay: rpi-display@0{
20347 + compatible = "ilitek,ili9341";
20348 + reg = <0>;
20349 + pinctrl-names = "default";
20350 + pinctrl-0 = <&rpi_display_pins>;
20351 +
20352 + spi-max-frequency = <32000000>;
20353 + rotate = <270>;
20354 + bgr;
20355 + fps = <30>;
20356 + buswidth = <8>;
20357 + reset-gpios = <&gpio 23 1>;
20358 + dc-gpios = <&gpio 24 0>;
20359 + led-gpios = <&gpio 18 0>;
20360 + debug = <0>;
20361 + };
20362 +
20363 + rpidisplay_ts: rpi-display-ts@1 {
20364 + compatible = "ti,ads7846";
20365 + reg = <1>;
20366 +
20367 + spi-max-frequency = <2000000>;
20368 + interrupts = <25 2>; /* high-to-low edge triggered */
20369 + interrupt-parent = <&gpio>;
20370 + pendown-gpio = <&gpio 25 1>;
20371 + ti,x-plate-ohms = /bits/ 16 <60>;
20372 + ti,pressure-max = /bits/ 16 <255>;
20373 + };
20374 + };
20375 + };
20376 + __overrides__ {
20377 + speed = <&rpidisplay>,"spi-max-frequency:0";
20378 + rotate = <&rpidisplay>,"rotate:0";
20379 + fps = <&rpidisplay>,"fps:0";
20380 + debug = <&rpidisplay>,"debug:0";
20381 + xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
20382 + swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
20383 + backlight = <&rpidisplay>,"led-gpios:4",
20384 + <&rpi_display_pins>,"brcm,pins:0";
20385 + };
20386 +};
20387 diff --git a/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
20388 new file mode 100644
20389 index 000000000000..8483c4f4b2eb
20390 --- /dev/null
20391 +++ b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
20392 @@ -0,0 +1,25 @@
20393 +/dts-v1/;
20394 +/plugin/;
20395 +
20396 +/ {
20397 + compatible = "brcm,bcm2835";
20398 +
20399 + fragment@0 {
20400 + target-path = "/soc/firmware";
20401 + __overlay__ {
20402 + ts: touchscreen {
20403 + compatible = "raspberrypi,firmware-ts";
20404 + touchscreen-size-x = <800>;
20405 + touchscreen-size-y = <480>;
20406 + };
20407 + };
20408 + };
20409 +
20410 + __overrides__ {
20411 + touchscreen-size-x = <&ts>,"touchscreen-size-x:0";
20412 + touchscreen-size-y = <&ts>,"touchscreen-size-y:0";
20413 + touchscreen-inverted-x = <&ts>,"touchscreen-inverted-x?";
20414 + touchscreen-inverted-y = <&ts>,"touchscreen-inverted-y?";
20415 + touchscreen-swapped-x-y = <&ts>,"touchscreen-swapped-x-y?";
20416 + };
20417 +};
20418 diff --git a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
20419 new file mode 100644
20420 index 000000000000..544038b614e1
20421 --- /dev/null
20422 +++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
20423 @@ -0,0 +1,95 @@
20424 +/*
20425 + * Overlay for the Raspberry Pi POE HAT.
20426 + */
20427 +/dts-v1/;
20428 +/plugin/;
20429 +
20430 +/ {
20431 + compatible = "brcm,bcm2835";
20432 +
20433 + fragment@0 {
20434 + target-path = "/";
20435 + __overlay__ {
20436 + fan0: rpi-poe-fan@0 {
20437 + compatible = "raspberrypi,rpi-poe-fan";
20438 + firmware = <&firmware>;
20439 + cooling-min-state = <0>;
20440 + cooling-max-state = <4>;
20441 + #cooling-cells = <2>;
20442 + cooling-levels = <0 31 63 150 255>;
20443 + status = "okay";
20444 + };
20445 + };
20446 + };
20447 +
20448 + fragment@1 {
20449 + target = <&cpu_thermal>;
20450 + __overlay__ {
20451 + trips {
20452 + trip0: trip0 {
20453 + temperature = <40000>;
20454 + hysteresis = <2000>;
20455 + type = "active";
20456 + };
20457 + trip1: trip1 {
20458 + temperature = <45000>;
20459 + hysteresis = <2000>;
20460 + type = "active";
20461 + };
20462 + trip2: trip2 {
20463 + temperature = <50000>;
20464 + hysteresis = <2000>;
20465 + type = "active";
20466 + };
20467 + trip3: trip3 {
20468 + temperature = <55000>;
20469 + hysteresis = <5000>;
20470 + type = "active";
20471 + };
20472 + };
20473 + cooling-maps {
20474 + map0 {
20475 + trip = <&trip0>;
20476 + cooling-device = <&fan0 0 1>;
20477 + };
20478 + map1 {
20479 + trip = <&trip1>;
20480 + cooling-device = <&fan0 1 2>;
20481 + };
20482 + map2 {
20483 + trip = <&trip2>;
20484 + cooling-device = <&fan0 2 3>;
20485 + };
20486 + map3 {
20487 + trip = <&trip3>;
20488 + cooling-device = <&fan0 3 4>;
20489 + };
20490 + };
20491 + };
20492 + };
20493 +
20494 + fragment@2 {
20495 + target-path = "/__overrides__";
20496 + __overlay__ {
20497 + poe_fan_temp0 = <&trip0>,"temperature:0";
20498 + poe_fan_temp0_hyst = <&trip0>,"hysteresis:0";
20499 + poe_fan_temp1 = <&trip1>,"temperature:0";
20500 + poe_fan_temp1_hyst = <&trip1>,"hysteresis:0";
20501 + poe_fan_temp2 = <&trip2>,"temperature:0";
20502 + poe_fan_temp2_hyst = <&trip2>,"hysteresis:0";
20503 + poe_fan_temp3 = <&trip3>,"temperature:0";
20504 + poe_fan_temp3_hyst = <&trip3>,"hysteresis:0";
20505 + };
20506 + };
20507 +
20508 + __overrides__ {
20509 + poe_fan_temp0 = <&trip0>,"temperature:0";
20510 + poe_fan_temp0_hyst = <&trip0>,"hysteresis:0";
20511 + poe_fan_temp1 = <&trip1>,"temperature:0";
20512 + poe_fan_temp1_hyst = <&trip1>,"hysteresis:0";
20513 + poe_fan_temp2 = <&trip2>,"temperature:0";
20514 + poe_fan_temp2_hyst = <&trip2>,"hysteresis:0";
20515 + poe_fan_temp3 = <&trip3>,"temperature:0";
20516 + poe_fan_temp3_hyst = <&trip3>,"hysteresis:0";
20517 + };
20518 +};
20519 diff --git a/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
20520 new file mode 100644
20521 index 000000000000..9cda044a0f62
20522 --- /dev/null
20523 +++ b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
20524 @@ -0,0 +1,39 @@
20525 +// Definitions for Rpi-Proto
20526 +/dts-v1/;
20527 +/plugin/;
20528 +
20529 +/ {
20530 + compatible = "brcm,bcm2835";
20531 +
20532 + fragment@0 {
20533 + target = <&i2s>;
20534 + __overlay__ {
20535 + status = "okay";
20536 + };
20537 + };
20538 +
20539 + fragment@1 {
20540 + target = <&i2c1>;
20541 + __overlay__ {
20542 + #address-cells = <1>;
20543 + #size-cells = <0>;
20544 + status = "okay";
20545 +
20546 + wm8731@1a {
20547 + #sound-dai-cells = <0>;
20548 + compatible = "wlf,wm8731";
20549 + reg = <0x1a>;
20550 + status = "okay";
20551 + };
20552 + };
20553 + };
20554 +
20555 + fragment@2 {
20556 + target = <&sound>;
20557 + __overlay__ {
20558 + compatible = "rpi,rpi-proto";
20559 + i2s-controller = <&i2s>;
20560 + status = "okay";
20561 + };
20562 + };
20563 +};
20564 diff --git a/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
20565 new file mode 100644
20566 index 000000000000..89d8d2ea6b2e
20567 --- /dev/null
20568 +++ b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
20569 @@ -0,0 +1,47 @@
20570 +// rpi-sense HAT
20571 +/dts-v1/;
20572 +/plugin/;
20573 +
20574 +/ {
20575 + compatible = "brcm,bcm2835";
20576 +
20577 + fragment@0 {
20578 + target = <&i2c1>;
20579 + __overlay__ {
20580 + #address-cells = <1>;
20581 + #size-cells = <0>;
20582 + status = "okay";
20583 +
20584 + rpi-sense@46 {
20585 + compatible = "rpi,rpi-sense";
20586 + reg = <0x46>;
20587 + keys-int-gpios = <&gpio 23 1>;
20588 + status = "okay";
20589 + };
20590 +
20591 + lsm9ds1-magn@1c {
20592 + compatible = "st,lsm9ds1-magn";
20593 + reg = <0x1c>;
20594 + status = "okay";
20595 + };
20596 +
20597 + lsm9ds1-accel6a {
20598 + compatible = "st,lsm9ds1-accel";
20599 + reg = <0x6a>;
20600 + status = "okay";
20601 + };
20602 +
20603 + lps25h-press@5c {
20604 + compatible = "st,lps25h-press";
20605 + reg = <0x5c>;
20606 + status = "okay";
20607 + };
20608 +
20609 + hts221-humid@5f {
20610 + compatible = "st,hts221-humid", "st,hts221";
20611 + reg = <0x5f>;
20612 + status = "okay";
20613 + };
20614 + };
20615 + };
20616 +};
20617 diff --git a/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
20618 new file mode 100644
20619 index 000000000000..3c97a545d820
20620 --- /dev/null
20621 +++ b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
20622 @@ -0,0 +1,34 @@
20623 +// rpi-tv HAT
20624 +
20625 +/dts-v1/;
20626 +/plugin/;
20627 +
20628 +/ {
20629 + compatible = "brcm,bcm2835";
20630 +
20631 + fragment@0 {
20632 + target = <&spidev0>;
20633 + __overlay__ {
20634 + status = "disabled";
20635 + };
20636 + };
20637 +
20638 + fragment@1 {
20639 + target = <&spi0>;
20640 + __overlay__ {
20641 + /* needed to avoid dtc warning */
20642 + #address-cells = <1>;
20643 + #size-cells = <0>;
20644 +
20645 + status = "okay";
20646 +
20647 + cxd2880@0 {
20648 + compatible = "sony,cxd2880";
20649 + reg = <0>; /* CE0 */
20650 + spi-max-frequency = <50000000>;
20651 + status = "okay";
20652 + };
20653 + };
20654 + };
20655 +
20656 +};
20657 diff --git a/arch/arm/boot/dts/overlays/rpivid-v4l2-overlay.dts b/arch/arm/boot/dts/overlays/rpivid-v4l2-overlay.dts
20658 new file mode 100644
20659 index 000000000000..0a611b31b9d4
20660 --- /dev/null
20661 +++ b/arch/arm/boot/dts/overlays/rpivid-v4l2-overlay.dts
20662 @@ -0,0 +1,61 @@
20663 +// SPDX-License-Identifier: GPL-2.0-only
20664 +// Definitions for Raspberry Pi video decode engine
20665 +/dts-v1/;
20666 +/plugin/;
20667 +
20668 +#include <dt-bindings/interrupt-controller/arm-gic.h>
20669 +
20670 +/{
20671 + compatible = "brcm,bcm2711";
20672 +
20673 + fragment@0 {
20674 + target = <&scb>;
20675 + __overlay__ {
20676 + /* needed to avoid dtc warning */
20677 + #address-cells = <2>;
20678 + #size-cells = <2>;
20679 +
20680 + codec@7eb10000 {
20681 + compatible = "raspberrypi,rpivid-vid-decoder";
20682 + reg = <0x0 0x7eb10000 0x0 0x1000>, /* INTC */
20683 + <0x0 0x7eb00000 0x0 0x10000>; /* HEVC */
20684 + reg-names = "intc",
20685 + "hevc";
20686 +
20687 + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
20688 +
20689 + clocks = <&hevc_clk>;
20690 + clock-names = "hevc";
20691 + };
20692 + };
20693 + };
20694 +
20695 + fragment@1 {
20696 + target = <&scb>;
20697 + __overlay__ {
20698 + hevc-decoder@7eb00000 {
20699 + status = "disabled";
20700 + };
20701 + rpivid-local-intc@7eb10000 {
20702 + status = "disabled";
20703 + };
20704 + h264-decoder@7eb20000 {
20705 + status = "disabled";
20706 + };
20707 + vp9-decoder@7eb30000 {
20708 + status = "disabled";
20709 + };
20710 + };
20711 + };
20712 +
20713 + fragment@2 {
20714 + target-path = "/";
20715 + __overlay__ {
20716 + hevc_clk: hevc_clk {
20717 + compatible = "fixed-clock";
20718 + #clock-cells = <0>;
20719 + clock-frequency = <500000000>;
20720 + };
20721 + };
20722 + };
20723 +};
20724 diff --git a/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
20725 new file mode 100644
20726 index 000000000000..87e9a326eff1
20727 --- /dev/null
20728 +++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
20729 @@ -0,0 +1,49 @@
20730 +// Definitions for RRA DigiDAC1 Audio card
20731 +/dts-v1/;
20732 +/plugin/;
20733 +
20734 +/ {
20735 + compatible = "brcm,bcm2835";
20736 +
20737 + fragment@0 {
20738 + target = <&i2s>;
20739 + __overlay__ {
20740 + status = "okay";
20741 + };
20742 + };
20743 +
20744 + fragment@1 {
20745 + target = <&i2c1>;
20746 + __overlay__ {
20747 + #address-cells = <1>;
20748 + #size-cells = <0>;
20749 + status = "okay";
20750 +
20751 + wm8804@3b {
20752 + #sound-dai-cells = <0>;
20753 + compatible = "wlf,wm8804";
20754 + reg = <0x3b>;
20755 + status = "okay";
20756 + PVDD-supply = <&vdd_3v3_reg>;
20757 + DVDD-supply = <&vdd_3v3_reg>;
20758 + };
20759 +
20760 + wm8742: wm8741@1a {
20761 + compatible = "wlf,wm8741";
20762 + reg = <0x1a>;
20763 + status = "okay";
20764 + AVDD-supply = <&vdd_5v0_reg>;
20765 + DVDD-supply = <&vdd_3v3_reg>;
20766 + };
20767 + };
20768 + };
20769 +
20770 + fragment@2 {
20771 + target = <&sound>;
20772 + __overlay__ {
20773 + compatible = "rra,digidac1-soundcard";
20774 + i2s-controller = <&i2s>;
20775 + status = "okay";
20776 + };
20777 + };
20778 +};
20779 diff --git a/arch/arm/boot/dts/overlays/sainsmart18-overlay.dts b/arch/arm/boot/dts/overlays/sainsmart18-overlay.dts
20780 new file mode 100644
20781 index 000000000000..c51f1c030a55
20782 --- /dev/null
20783 +++ b/arch/arm/boot/dts/overlays/sainsmart18-overlay.dts
20784 @@ -0,0 +1,52 @@
20785 +/*
20786 + * Device Tree overlay for the Sainsmart 1.8" TFT LCD with ST7735R chip 160x128
20787 + */
20788 +
20789 +/dts-v1/;
20790 +/plugin/;
20791 +
20792 +/ {
20793 + compatible = "brcm,bcm2835";
20794 +
20795 + fragment@0 {
20796 + target = <&spidev0>;
20797 + __overlay__ {
20798 + status = "disabled";
20799 + };
20800 + };
20801 +
20802 + fragment@1 {
20803 + target = <&spi0>;
20804 + __overlay__ {
20805 + /* needed to avoid dtc warning */
20806 + #address-cells = <1>;
20807 + #size-cells = <0>;
20808 + status = "okay";
20809 +
20810 + ss18: sainsmart18@0 {
20811 + compatible = "fbtft,sainsmart18";
20812 + reg = <0>;
20813 + pinctrl-names = "default";
20814 + spi-max-frequency = <40000000>;
20815 + rotate = <90>;
20816 + buswidth = <8>;
20817 + fps = <50>;
20818 + height = <160>;
20819 + width = <128>;
20820 + reset-gpios = <&gpio 25 1>;
20821 + dc-gpios = <&gpio 24 0>;
20822 + debug = <0>;
20823 + };
20824 + };
20825 + };
20826 +
20827 + __overrides__ {
20828 + speed = <&ss18>,"spi-max-frequency:0";
20829 + rotate = <&ss18>,"rotate:0";
20830 + fps = <&ss18>,"fps:0";
20831 + bgr = <&ss18>,"bgr?";
20832 + debug = <&ss18>,"debug:0";
20833 + dc_pin = <&ss18>,"dc-gpios:4";
20834 + reset_pin = <&ss18>,"reset-gpios:4";
20835 + };
20836 +};
20837 diff --git a/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
20838 new file mode 100644
20839 index 000000000000..04d74d62897b
20840 --- /dev/null
20841 +++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
20842 @@ -0,0 +1,43 @@
20843 +/dts-v1/;
20844 +/plugin/;
20845 +
20846 +/ {
20847 + compatible = "brcm,bcm2835";
20848 +
20849 + fragment@0 {
20850 + target = <&i2c_arm>;
20851 + __overlay__ {
20852 + #address-cells = <1>;
20853 + #size-cells = <0>;
20854 + status = "okay";
20855 +
20856 + sc16is750: sc16is750@48 {
20857 + compatible = "nxp,sc16is750";
20858 + reg = <0x48>; /* i2c address */
20859 + clocks = <&sc16is750_clk>;
20860 + interrupt-parent = <&gpio>;
20861 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
20862 + gpio-controller;
20863 + #gpio-cells = <2>;
20864 + i2c-max-frequency = <400000>;
20865 + };
20866 + };
20867 + };
20868 +
20869 + fragment@1 {
20870 + target-path = "/";
20871 + __overlay__ {
20872 + sc16is750_clk: sc16is750_i2c_clk@48 {
20873 + compatible = "fixed-clock";
20874 + #clock-cells = <0>;
20875 + clock-frequency = <14745600>;
20876 + };
20877 + };
20878 + };
20879 +
20880 + __overrides__ {
20881 + int_pin = <&sc16is750>,"interrupts:0";
20882 + addr = <&sc16is750>,"reg:0", <&sc16is750_clk>,"name";
20883 + xtal = <&sc16is750_clk>,"clock-frequency:0";
20884 + };
20885 +};
20886 diff --git a/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
20887 new file mode 100644
20888 index 000000000000..da05e981314c
20889 --- /dev/null
20890 +++ b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
20891 @@ -0,0 +1,43 @@
20892 +/dts-v1/;
20893 +/plugin/;
20894 +
20895 +/ {
20896 + compatible = "brcm,bcm2835";
20897 +
20898 + fragment@0 {
20899 + target = <&i2c_arm>;
20900 + __overlay__ {
20901 + #address-cells = <1>;
20902 + #size-cells = <0>;
20903 + status = "okay";
20904 +
20905 + sc16is752: sc16is752@48 {
20906 + compatible = "nxp,sc16is752";
20907 + reg = <0x48>; /* i2c address */
20908 + clocks = <&sc16is752_clk>;
20909 + interrupt-parent = <&gpio>;
20910 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
20911 + gpio-controller;
20912 + #gpio-cells = <2>;
20913 + i2c-max-frequency = <400000>;
20914 + };
20915 + };
20916 + };
20917 +
20918 + fragment@1 {
20919 + target-path = "/";
20920 + __overlay__ {
20921 + sc16is752_clk: sc16is752_i2c_clk@48 {
20922 + compatible = "fixed-clock";
20923 + #clock-cells = <0>;
20924 + clock-frequency = <14745600>;
20925 + };
20926 + };
20927 + };
20928 +
20929 + __overrides__ {
20930 + int_pin = <&sc16is752>,"interrupts:0";
20931 + addr = <&sc16is752>,"reg:0",<&sc16is752_clk>,"name";
20932 + xtal = <&sc16is752_clk>,"clock-frequency:0";
20933 + };
20934 +};
20935 diff --git a/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts b/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts
20936 new file mode 100644
20937 index 000000000000..a49a04722b99
20938 --- /dev/null
20939 +++ b/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts
20940 @@ -0,0 +1,49 @@
20941 +/dts-v1/;
20942 +/plugin/;
20943 +
20944 +/ {
20945 + compatible = "brcm,bcm2835";
20946 +
20947 + fragment@0 {
20948 + target = <&spi0>;
20949 + __overlay__ {
20950 + #address-cells = <1>;
20951 + #size-cells = <0>;
20952 + status = "okay";
20953 +
20954 + sc16is752: sc16is752@0 {
20955 + compatible = "nxp,sc16is752";
20956 + reg = <0>; /* CE0 */
20957 + clocks = <&sc16is752_clk>;
20958 + interrupt-parent = <&gpio>;
20959 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
20960 + gpio-controller;
20961 + #gpio-cells = <2>;
20962 + spi-max-frequency = <4000000>;
20963 + };
20964 + };
20965 + };
20966 +
20967 + fragment@1 {
20968 + target = <&spidev0>;
20969 + __overlay__ {
20970 + status = "disabled";
20971 + };
20972 + };
20973 +
20974 + fragment@2 {
20975 + target-path = "/";
20976 + __overlay__ {
20977 + sc16is752_clk: sc16is752_spi0_0_clk {
20978 + compatible = "fixed-clock";
20979 + #clock-cells = <0>;
20980 + clock-frequency = <14745600>;
20981 + };
20982 + };
20983 + };
20984 +
20985 + __overrides__ {
20986 + int_pin = <&sc16is752>,"interrupts:0";
20987 + xtal = <&sc16is752_clk>,"clock-frequency:0";
20988 + };
20989 +};
20990 diff --git a/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
20991 new file mode 100644
20992 index 000000000000..730c6e8cd614
20993 --- /dev/null
20994 +++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
20995 @@ -0,0 +1,67 @@
20996 +/dts-v1/;
20997 +/plugin/;
20998 +
20999 +/ {
21000 + compatible = "brcm,bcm2835";
21001 +
21002 + fragment@0 {
21003 + target = <&gpio>;
21004 + __overlay__ {
21005 + spi1_pins: spi1_pins {
21006 + brcm,pins = <19 20 21>;
21007 + brcm,function = <3>; /* alt4 */
21008 + };
21009 +
21010 + spi1_cs_pins: spi1_cs_pins {
21011 + brcm,pins = <18>;
21012 + brcm,function = <1>; /* output */
21013 + };
21014 + };
21015 + };
21016 +
21017 + fragment@1 {
21018 + target = <&spi1>;
21019 + __overlay__ {
21020 + #address-cells = <1>;
21021 + #size-cells = <0>;
21022 + pinctrl-names = "default";
21023 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
21024 + cs-gpios = <&gpio 18 1>;
21025 + status = "okay";
21026 +
21027 + sc16is752: sc16is752@0 {
21028 + compatible = "nxp,sc16is752";
21029 + reg = <0>; /* CE0 */
21030 + clocks = <&sc16is752_clk>;
21031 + interrupt-parent = <&gpio>;
21032 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
21033 + gpio-controller;
21034 + #gpio-cells = <2>;
21035 + spi-max-frequency = <4000000>;
21036 + };
21037 + };
21038 + };
21039 +
21040 + fragment@2 {
21041 + target = <&aux>;
21042 + __overlay__ {
21043 + status = "okay";
21044 + };
21045 + };
21046 +
21047 + fragment@3 {
21048 + target-path = "/";
21049 + __overlay__ {
21050 + sc16is752_clk: sc16is752_spi1_0_clk {
21051 + compatible = "fixed-clock";
21052 + #clock-cells = <0>;
21053 + clock-frequency = <14745600>;
21054 + };
21055 + };
21056 + };
21057 +
21058 + __overrides__ {
21059 + int_pin = <&sc16is752>,"interrupts:0";
21060 + xtal = <&sc16is752_clk>,"clock-frequency:0";
21061 + };
21062 +};
21063 diff --git a/arch/arm/boot/dts/overlays/sdhost-overlay.dts b/arch/arm/boot/dts/overlays/sdhost-overlay.dts
21064 new file mode 100644
21065 index 000000000000..0b72b4eeac88
21066 --- /dev/null
21067 +++ b/arch/arm/boot/dts/overlays/sdhost-overlay.dts
21068 @@ -0,0 +1,38 @@
21069 +/dts-v1/;
21070 +/plugin/;
21071 +
21072 +/* Provide backwards compatible aliases for the old sdhost dtparams. */
21073 +
21074 +/{
21075 + compatible = "brcm,bcm2835";
21076 +
21077 + fragment@0 {
21078 + target = <&sdhost>;
21079 + frag0: __overlay__ {
21080 + brcm,overclock-50 = <0>;
21081 + brcm,pio-limit = <1>;
21082 + status = "okay";
21083 + };
21084 + };
21085 +
21086 + fragment@1 {
21087 + target = <&mmc>;
21088 + __overlay__ {
21089 + status = "disabled";
21090 + };
21091 + };
21092 +
21093 + fragment@2 {
21094 + target = <&mmcnr>;
21095 + __overlay__ {
21096 + status = "disabled";
21097 + };
21098 + };
21099 +
21100 + __overrides__ {
21101 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
21102 + force_pio = <&frag0>,"brcm,force-pio?";
21103 + pio_limit = <&frag0>,"brcm,pio-limit:0";
21104 + debug = <&frag0>,"brcm,debug?";
21105 + };
21106 +};
21107 diff --git a/arch/arm/boot/dts/overlays/sdio-overlay.dts b/arch/arm/boot/dts/overlays/sdio-overlay.dts
21108 new file mode 100644
21109 index 000000000000..873e49056379
21110 --- /dev/null
21111 +++ b/arch/arm/boot/dts/overlays/sdio-overlay.dts
21112 @@ -0,0 +1,77 @@
21113 +/dts-v1/;
21114 +/plugin/;
21115 +
21116 +/* Enable SDIO from MMC interface via various GPIO groups */
21117 +
21118 +/{
21119 + compatible = "brcm,bcm2835";
21120 +
21121 + fragment@0 {
21122 + target = <&mmcnr>;
21123 + __overlay__ {
21124 + status = "disabled";
21125 + };
21126 + };
21127 +
21128 + fragment@1 {
21129 + target = <&mmc>;
21130 + sdio_ovl: __overlay__ {
21131 + pinctrl-0 = <&sdio_ovl_pins>;
21132 + pinctrl-names = "default";
21133 + non-removable;
21134 + bus-width = <4>;
21135 + status = "okay";
21136 + };
21137 + };
21138 +
21139 + fragment@2 {
21140 + target = <&gpio>;
21141 + __overlay__ {
21142 + sdio_ovl_pins: sdio_ovl_pins {
21143 + brcm,pins = <22 23 24 25 26 27>;
21144 + brcm,function = <7>; /* ALT3 = SD1 */
21145 + brcm,pull = <0 2 2 2 2 2>;
21146 + };
21147 + };
21148 + };
21149 +
21150 + fragment@3 {
21151 + target = <&sdio_ovl_pins>;
21152 + __dormant__ {
21153 + brcm,pins = <22 23 24 25>;
21154 + brcm,pull = <0 2 2 2>;
21155 + };
21156 + };
21157 +
21158 + fragment@4 {
21159 + target = <&sdio_ovl_pins>;
21160 + __dormant__ {
21161 + brcm,pins = <34 35 36 37>;
21162 + brcm,pull = <0 2 2 2>;
21163 + };
21164 + };
21165 +
21166 + fragment@5 {
21167 + target = <&sdio_ovl_pins>;
21168 + __dormant__ {
21169 + brcm,pins = <34 35 36 37 38 39>;
21170 + brcm,pull = <0 2 2 2 2 2>;
21171 + };
21172 + };
21173 +
21174 + fragment@6 {
21175 + target-path = "/aliases";
21176 + __overlay__ {
21177 + mmc1 = "/soc/mmc@7e300000";
21178 + };
21179 + };
21180 +
21181 + __overrides__ {
21182 + poll_once = <&sdio_ovl>,"non-removable?";
21183 + bus_width = <&sdio_ovl>,"bus-width:0";
21184 + sdio_overclock = <&sdio_ovl>,"brcm,overclock-50:0";
21185 + gpios_22_25 = <0>,"=3";
21186 + gpios_34_37 = <0>,"=4";
21187 + gpios_34_39 = <0>,"=5";
21188 + };
21189 +};
21190 diff --git a/arch/arm/boot/dts/overlays/sdtweak-overlay.dts b/arch/arm/boot/dts/overlays/sdtweak-overlay.dts
21191 new file mode 100644
21192 index 000000000000..38157d2f9bf3
21193 --- /dev/null
21194 +++ b/arch/arm/boot/dts/overlays/sdtweak-overlay.dts
21195 @@ -0,0 +1,25 @@
21196 +/dts-v1/;
21197 +/plugin/;
21198 +
21199 +/* Provide backwards compatible aliases for the old sdhost dtparams. */
21200 +
21201 +/{
21202 + compatible = "brcm,bcm2835";
21203 +
21204 + fragment@0 {
21205 + target = <&sdhost>;
21206 + frag0: __overlay__ {
21207 + brcm,overclock-50 = <0>;
21208 + brcm,pio-limit = <1>;
21209 + };
21210 + };
21211 +
21212 + __overrides__ {
21213 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
21214 + force_pio = <&frag0>,"brcm,force-pio?";
21215 + pio_limit = <&frag0>,"brcm,pio-limit:0";
21216 + debug = <&frag0>,"brcm,debug?";
21217 + enable = <&frag0>,"status";
21218 + poll_once = <&frag0>,"non-removable?";
21219 + };
21220 +};
21221 diff --git a/arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts b/arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts
21222 new file mode 100644
21223 index 000000000000..57a0cc9b1741
21224 --- /dev/null
21225 +++ b/arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts
21226 @@ -0,0 +1,84 @@
21227 +/*
21228 + * Device Tree overlay for SH1106 based SPI OLED display
21229 + *
21230 + */
21231 +
21232 +/dts-v1/;
21233 +/plugin/;
21234 +
21235 +/ {
21236 + compatible = "brcm,bcm2835";
21237 +
21238 + fragment@0 {
21239 + target = <&spi0>;
21240 + __overlay__ {
21241 + status = "okay";
21242 + };
21243 + };
21244 +
21245 + fragment@1 {
21246 + target = <&spidev0>;
21247 + __overlay__ {
21248 + status = "disabled";
21249 + };
21250 + };
21251 +
21252 + fragment@2 {
21253 + target = <&spidev1>;
21254 + __overlay__ {
21255 + status = "disabled";
21256 + };
21257 + };
21258 +
21259 + fragment@3 {
21260 + target = <&gpio>;
21261 + __overlay__ {
21262 + sh1106_pins: sh1106_pins {
21263 + brcm,pins = <25 24>;
21264 + brcm,function = <1 1>; /* out out */
21265 + };
21266 + };
21267 + };
21268 +
21269 + fragment@4 {
21270 + target = <&spi0>;
21271 + __overlay__ {
21272 + /* needed to avoid dtc warning */
21273 + #address-cells = <1>;
21274 + #size-cells = <0>;
21275 +
21276 + sh1106: sh1106@0{
21277 + compatible = "sinowealth,sh1106";
21278 + reg = <0>;
21279 + pinctrl-names = "default";
21280 + pinctrl-0 = <&sh1106_pins>;
21281 +
21282 + spi-max-frequency = <4000000>;
21283 + bgr = <0>;
21284 + bpp = <1>;
21285 + rotate = <0>;
21286 + fps = <25>;
21287 + buswidth = <8>;
21288 + reset-gpios = <&gpio 25 1>;
21289 + dc-gpios = <&gpio 24 0>;
21290 + debug = <0>;
21291 +
21292 + sinowealth,height = <64>;
21293 + sinowealth,width = <128>;
21294 + sinowealth,page-offset = <0>;
21295 + };
21296 + };
21297 + };
21298 +
21299 + __overrides__ {
21300 + speed = <&sh1106>,"spi-max-frequency:0";
21301 + rotate = <&sh1106>,"rotate:0";
21302 + fps = <&sh1106>,"fps:0";
21303 + debug = <&sh1106>,"debug:0";
21304 + dc_pin = <&sh1106>,"dc-gpios:4",
21305 + <&sh1106_pins>,"brcm,pins:4";
21306 + reset_pin = <&sh1106>,"reset-gpios:4",
21307 + <&sh1106_pins>,"brcm,pins:0";
21308 + height = <&sh1106>,"sinowealth,height:0";
21309 + };
21310 +};
21311 diff --git a/arch/arm/boot/dts/overlays/smi-dev-overlay.dts b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts
21312 new file mode 100644
21313 index 000000000000..bafab6c92506
21314 --- /dev/null
21315 +++ b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts
21316 @@ -0,0 +1,20 @@
21317 +// Description: Overlay to enable character device interface for SMI.
21318 +// Author: Luke Wren <luke@raspberrypi.org>
21319 +
21320 +/dts-v1/;
21321 +/plugin/;
21322 +
21323 +/{
21324 + compatible = "brcm,bcm2835";
21325 +
21326 + fragment@0 {
21327 + target = <&soc>;
21328 + __overlay__ {
21329 + smi_dev {
21330 + compatible = "brcm,bcm2835-smi-dev";
21331 + smi_handle = <&smi>;
21332 + status = "okay";
21333 + };
21334 + };
21335 + };
21336 +};
21337 diff --git a/arch/arm/boot/dts/overlays/smi-nand-overlay.dts b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts
21338 new file mode 100644
21339 index 000000000000..ae1e50329d66
21340 --- /dev/null
21341 +++ b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts
21342 @@ -0,0 +1,66 @@
21343 +// Description: Overlay to enable NAND flash through
21344 +// the secondary memory interface
21345 +// Author: Luke Wren
21346 +
21347 +/dts-v1/;
21348 +/plugin/;
21349 +
21350 +/{
21351 + compatible = "brcm,bcm2835";
21352 +
21353 + fragment@0 {
21354 + target = <&smi>;
21355 + __overlay__ {
21356 + pinctrl-names = "default";
21357 + pinctrl-0 = <&smi_pins>;
21358 + status = "okay";
21359 + };
21360 + };
21361 +
21362 + fragment@1 {
21363 + target = <&soc>;
21364 + __overlay__ {
21365 + nand: flash@0 {
21366 + compatible = "brcm,bcm2835-smi-nand";
21367 + smi_handle = <&smi>;
21368 + #address-cells = <1>;
21369 + #size-cells = <1>;
21370 + status = "okay";
21371 +
21372 + partition@0 {
21373 + label = "stage2";
21374 + // 128k
21375 + reg = <0 0x20000>;
21376 + read-only;
21377 + };
21378 + partition@1 {
21379 + label = "firmware";
21380 + // 16M
21381 + reg = <0x20000 0x1000000>;
21382 + read-only;
21383 + };
21384 + partition@2 {
21385 + label = "root";
21386 + // 2G (will need to use 64 bit for >=4G)
21387 + reg = <0x1020000 0x80000000>;
21388 + };
21389 + };
21390 + };
21391 + };
21392 +
21393 + fragment@2 {
21394 + target = <&gpio>;
21395 + __overlay__ {
21396 + smi_pins: smi_pins {
21397 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
21398 + 12 13 14 15>;
21399 + /* Alt 1: SMI */
21400 + brcm,function = <5 5 5 5 5 5 5 5 5 5 5
21401 + 5 5 5 5 5>;
21402 + /* /CS, /WE and /OE are pulled high, as they are
21403 + generally active low signals */
21404 + brcm,pull = <2 2 2 2 2 2 2 2 0 0 0 0 0 0 0 0>;
21405 + };
21406 + };
21407 + };
21408 +};
21409 diff --git a/arch/arm/boot/dts/overlays/smi-overlay.dts b/arch/arm/boot/dts/overlays/smi-overlay.dts
21410 new file mode 100644
21411 index 000000000000..bb8c7830df23
21412 --- /dev/null
21413 +++ b/arch/arm/boot/dts/overlays/smi-overlay.dts
21414 @@ -0,0 +1,37 @@
21415 +// Description: Overlay to enable the secondary memory interface peripheral
21416 +// Author: Luke Wren
21417 +
21418 +/dts-v1/;
21419 +/plugin/;
21420 +
21421 +/{
21422 + compatible = "brcm,bcm2835";
21423 +
21424 + fragment@0 {
21425 + target = <&smi>;
21426 + __overlay__ {
21427 + pinctrl-names = "default";
21428 + pinctrl-0 = <&smi_pins>;
21429 + status = "okay";
21430 + };
21431 + };
21432 +
21433 + fragment@1 {
21434 + target = <&gpio>;
21435 + __overlay__ {
21436 + smi_pins: smi_pins {
21437 + /* Don't configure the top two address bits, as
21438 + these are already used as ID_SD and ID_SC */
21439 + brcm,pins = <2 3 4 5 6 7 8 9 10 11 12 13 14 15
21440 + 16 17 18 19 20 21 22 23 24 25>;
21441 + /* Alt 1: SMI */
21442 + brcm,function = <5 5 5 5 5 5 5 5 5 5 5 5 5 5 5
21443 + 5 5 5 5 5 5 5 5 5>;
21444 + /* /CS, /WE and /OE are pulled high, as they are
21445 + generally active low signals */
21446 + brcm,pull = <2 2 2 2 2 2 0 0 0 0 0 0 0 0 0 0 0
21447 + 0 0 0 0 0 0 0>;
21448 + };
21449 + };
21450 + };
21451 +};
21452 diff --git a/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
21453 new file mode 100644
21454 index 000000000000..a132b8637c31
21455 --- /dev/null
21456 +++ b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
21457 @@ -0,0 +1,31 @@
21458 +/*
21459 + * Device tree overlay to move spi0 to gpio 35 to 39 on CM
21460 + */
21461 +
21462 +/dts-v1/;
21463 +/plugin/;
21464 +
21465 +/ {
21466 + compatible = "brcm,bcm2835";
21467 +
21468 + fragment@0 {
21469 + target = <&spi0>;
21470 + __overlay__ {
21471 + cs-gpios = <&gpio 36 1>, <&gpio 35 1>;
21472 + };
21473 + };
21474 +
21475 + fragment@1 {
21476 + target = <&spi0_cs_pins>;
21477 + __overlay__ {
21478 + brcm,pins = <36 35>;
21479 + };
21480 + };
21481 +
21482 + fragment@2 {
21483 + target = <&spi0_pins>;
21484 + __overlay__ {
21485 + brcm,pins = <37 38 39>;
21486 + };
21487 + };
21488 +};
21489 diff --git a/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts b/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
21490 new file mode 100644
21491 index 000000000000..9ebcaf1b5ea0
21492 --- /dev/null
21493 +++ b/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
21494 @@ -0,0 +1,36 @@
21495 +/*
21496 + * Boot EEPROM overlay
21497 + */
21498 +
21499 +/dts-v1/;
21500 +/plugin/;
21501 +
21502 +/ {
21503 + compatible = "brcm,bcm2835";
21504 +
21505 + fragment@0 {
21506 + target = <&spi0>;
21507 + __overlay__ {
21508 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
21509 + status = "okay";
21510 + };
21511 + };
21512 +
21513 + fragment@1 {
21514 + target = <&spi0_cs_pins>;
21515 + __overlay__ {
21516 + brcm,pins = <45 44 43>;
21517 + brcm,function = <1>; /* output */
21518 + status = "okay";
21519 + };
21520 + };
21521 +
21522 + fragment@2 {
21523 + target = <&spi0_pins>;
21524 + __overlay__ {
21525 + brcm,pins = <40 41 42>;
21526 + brcm,function = <3>; /* alt4 */
21527 + status = "okay";
21528 + };
21529 + };
21530 +};
21531 diff --git a/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
21532 new file mode 100644
21533 index 000000000000..9664afc9845c
21534 --- /dev/null
21535 +++ b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
21536 @@ -0,0 +1,33 @@
21537 +/dts-v1/;
21538 +/plugin/;
21539 +
21540 +/ {
21541 + compatible = "brcm,bcm2835";
21542 +
21543 + fragment@0 {
21544 + target = <&spidev0>;
21545 + __dormant__ {
21546 + status = "disabled";
21547 + };
21548 + };
21549 +
21550 + fragment@1 {
21551 + target = <&spi0>;
21552 + __dormant__ {
21553 + #address-cells = <1>;
21554 + #size-cells = <0>;
21555 + status = "okay";
21556 +
21557 + rtc-pcf2123@0 {
21558 + compatible = "nxp,rtc-pcf2123";
21559 + spi-max-frequency = <5000000>;
21560 + spi-cs-high = <1>;
21561 + reg = <0>;
21562 + };
21563 + };
21564 + };
21565 +
21566 + __overrides__ {
21567 + pcf2123 = <0>, "=0=1";
21568 + };
21569 +};
21570 diff --git a/arch/arm/boot/dts/overlays/spi0-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi0-1cs-overlay.dts
21571 new file mode 100644
21572 index 000000000000..e6eb66e2076a
21573 --- /dev/null
21574 +++ b/arch/arm/boot/dts/overlays/spi0-1cs-overlay.dts
21575 @@ -0,0 +1,42 @@
21576 +/dts-v1/;
21577 +/plugin/;
21578 +
21579 +
21580 +/ {
21581 + compatible = "brcm,bcm2835";
21582 +
21583 + fragment@0 {
21584 + target = <&spi0_cs_pins>;
21585 + frag0: __overlay__ {
21586 + brcm,pins = <8>;
21587 + };
21588 + };
21589 +
21590 + fragment@1 {
21591 + target = <&spi0>;
21592 + frag1: __overlay__ {
21593 + cs-gpios = <&gpio 8 1>;
21594 + status = "okay";
21595 + };
21596 + };
21597 +
21598 + fragment@2 {
21599 + target = <&spidev1>;
21600 + __overlay__ {
21601 + status = "disabled";
21602 + };
21603 + };
21604 +
21605 + fragment@3 {
21606 + target = <&spi0_pins>;
21607 + __dormant__ {
21608 + brcm,pins = <10 11>;
21609 + };
21610 + };
21611 +
21612 + __overrides__ {
21613 + cs0_pin = <&frag0>,"brcm,pins:0",
21614 + <&frag1>,"cs-gpios:4";
21615 + no_miso = <0>,"=3";
21616 + };
21617 +};
21618 diff --git a/arch/arm/boot/dts/overlays/spi0-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi0-2cs-overlay.dts
21619 new file mode 100644
21620 index 000000000000..df6519537c3a
21621 --- /dev/null
21622 +++ b/arch/arm/boot/dts/overlays/spi0-2cs-overlay.dts
21623 @@ -0,0 +1,37 @@
21624 +/dts-v1/;
21625 +/plugin/;
21626 +
21627 +
21628 +/ {
21629 + compatible = "brcm,bcm2835";
21630 +
21631 + fragment@0 {
21632 + target = <&spi0_cs_pins>;
21633 + frag0: __overlay__ {
21634 + brcm,pins = <8 7>;
21635 + };
21636 + };
21637 +
21638 + fragment@1 {
21639 + target = <&spi0>;
21640 + frag1: __overlay__ {
21641 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
21642 + status = "okay";
21643 + };
21644 + };
21645 +
21646 + fragment@2 {
21647 + target = <&spi0_pins>;
21648 + __dormant__ {
21649 + brcm,pins = <10 11>;
21650 + };
21651 + };
21652 +
21653 + __overrides__ {
21654 + cs0_pin = <&frag0>,"brcm,pins:0",
21655 + <&frag1>,"cs-gpios:4";
21656 + cs1_pin = <&frag0>,"brcm,pins:4",
21657 + <&frag1>,"cs-gpios:16";
21658 + no_miso = <0>,"=2";
21659 + };
21660 +};
21661 diff --git a/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
21662 new file mode 100644
21663 index 000000000000..ea2794bc5fd5
21664 --- /dev/null
21665 +++ b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
21666 @@ -0,0 +1,57 @@
21667 +/dts-v1/;
21668 +/plugin/;
21669 +
21670 +
21671 +/ {
21672 + compatible = "brcm,bcm2835";
21673 +
21674 + fragment@0 {
21675 + target = <&gpio>;
21676 + __overlay__ {
21677 + spi1_pins: spi1_pins {
21678 + brcm,pins = <19 20 21>;
21679 + brcm,function = <3>; /* alt4 */
21680 + };
21681 +
21682 + spi1_cs_pins: spi1_cs_pins {
21683 + brcm,pins = <18>;
21684 + brcm,function = <1>; /* output */
21685 + };
21686 + };
21687 + };
21688 +
21689 + fragment@1 {
21690 + target = <&spi1>;
21691 + frag1: __overlay__ {
21692 + /* needed to avoid dtc warning */
21693 + #address-cells = <1>;
21694 + #size-cells = <0>;
21695 + pinctrl-names = "default";
21696 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
21697 + cs-gpios = <&gpio 18 1>;
21698 + status = "okay";
21699 +
21700 + spidev1_0: spidev@0 {
21701 + compatible = "spidev";
21702 + reg = <0>; /* CE0 */
21703 + #address-cells = <1>;
21704 + #size-cells = <0>;
21705 + spi-max-frequency = <125000000>;
21706 + status = "okay";
21707 + };
21708 + };
21709 + };
21710 +
21711 + fragment@2 {
21712 + target = <&aux>;
21713 + __overlay__ {
21714 + status = "okay";
21715 + };
21716 + };
21717 +
21718 + __overrides__ {
21719 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
21720 + <&frag1>,"cs-gpios:4";
21721 + cs0_spidev = <&spidev1_0>,"status";
21722 + };
21723 +};
21724 diff --git a/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
21725 new file mode 100644
21726 index 000000000000..dab34ee79ae2
21727 --- /dev/null
21728 +++ b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
21729 @@ -0,0 +1,69 @@
21730 +/dts-v1/;
21731 +/plugin/;
21732 +
21733 +
21734 +/ {
21735 + compatible = "brcm,bcm2835";
21736 +
21737 + fragment@0 {
21738 + target = <&gpio>;
21739 + __overlay__ {
21740 + spi1_pins: spi1_pins {
21741 + brcm,pins = <19 20 21>;
21742 + brcm,function = <3>; /* alt4 */
21743 + };
21744 +
21745 + spi1_cs_pins: spi1_cs_pins {
21746 + brcm,pins = <18 17>;
21747 + brcm,function = <1>; /* output */
21748 + };
21749 + };
21750 + };
21751 +
21752 + fragment@1 {
21753 + target = <&spi1>;
21754 + frag1: __overlay__ {
21755 + /* needed to avoid dtc warning */
21756 + #address-cells = <1>;
21757 + #size-cells = <0>;
21758 + pinctrl-names = "default";
21759 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
21760 + cs-gpios = <&gpio 18 1>, <&gpio 17 1>;
21761 + status = "okay";
21762 +
21763 + spidev1_0: spidev@0 {
21764 + compatible = "spidev";
21765 + reg = <0>; /* CE0 */
21766 + #address-cells = <1>;
21767 + #size-cells = <0>;
21768 + spi-max-frequency = <125000000>;
21769 + status = "okay";
21770 + };
21771 +
21772 + spidev1_1: spidev@1 {
21773 + compatible = "spidev";
21774 + reg = <1>; /* CE1 */
21775 + #address-cells = <1>;
21776 + #size-cells = <0>;
21777 + spi-max-frequency = <125000000>;
21778 + status = "okay";
21779 + };
21780 + };
21781 + };
21782 +
21783 + fragment@2 {
21784 + target = <&aux>;
21785 + __overlay__ {
21786 + status = "okay";
21787 + };
21788 + };
21789 +
21790 + __overrides__ {
21791 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
21792 + <&frag1>,"cs-gpios:4";
21793 + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
21794 + <&frag1>,"cs-gpios:16";
21795 + cs0_spidev = <&spidev1_0>,"status";
21796 + cs1_spidev = <&spidev1_1>,"status";
21797 + };
21798 +};
21799 diff --git a/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
21800 new file mode 100644
21801 index 000000000000..bc7e7d04324b
21802 --- /dev/null
21803 +++ b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
21804 @@ -0,0 +1,81 @@
21805 +/dts-v1/;
21806 +/plugin/;
21807 +
21808 +
21809 +/ {
21810 + compatible = "brcm,bcm2835";
21811 +
21812 + fragment@0 {
21813 + target = <&gpio>;
21814 + __overlay__ {
21815 + spi1_pins: spi1_pins {
21816 + brcm,pins = <19 20 21>;
21817 + brcm,function = <3>; /* alt4 */
21818 + };
21819 +
21820 + spi1_cs_pins: spi1_cs_pins {
21821 + brcm,pins = <18 17 16>;
21822 + brcm,function = <1>; /* output */
21823 + };
21824 + };
21825 + };
21826 +
21827 + fragment@1 {
21828 + target = <&spi1>;
21829 + frag1: __overlay__ {
21830 + /* needed to avoid dtc warning */
21831 + #address-cells = <1>;
21832 + #size-cells = <0>;
21833 + pinctrl-names = "default";
21834 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
21835 + cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>;
21836 + status = "okay";
21837 +
21838 + spidev1_0: spidev@0 {
21839 + compatible = "spidev";
21840 + reg = <0>; /* CE0 */
21841 + #address-cells = <1>;
21842 + #size-cells = <0>;
21843 + spi-max-frequency = <125000000>;
21844 + status = "okay";
21845 + };
21846 +
21847 + spidev1_1: spidev@1 {
21848 + compatible = "spidev";
21849 + reg = <1>; /* CE1 */
21850 + #address-cells = <1>;
21851 + #size-cells = <0>;
21852 + spi-max-frequency = <125000000>;
21853 + status = "okay";
21854 + };
21855 +
21856 + spidev1_2: spidev@2 {
21857 + compatible = "spidev";
21858 + reg = <2>; /* CE2 */
21859 + #address-cells = <1>;
21860 + #size-cells = <0>;
21861 + spi-max-frequency = <125000000>;
21862 + status = "okay";
21863 + };
21864 + };
21865 + };
21866 +
21867 + fragment@2 {
21868 + target = <&aux>;
21869 + __overlay__ {
21870 + status = "okay";
21871 + };
21872 + };
21873 +
21874 + __overrides__ {
21875 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
21876 + <&frag1>,"cs-gpios:4";
21877 + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
21878 + <&frag1>,"cs-gpios:16";
21879 + cs2_pin = <&spi1_cs_pins>,"brcm,pins:8",
21880 + <&frag1>,"cs-gpios:28";
21881 + cs0_spidev = <&spidev1_0>,"status";
21882 + cs1_spidev = <&spidev1_1>,"status";
21883 + cs2_spidev = <&spidev1_2>,"status";
21884 + };
21885 +};
21886 diff --git a/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
21887 new file mode 100644
21888 index 000000000000..2a29750462af
21889 --- /dev/null
21890 +++ b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
21891 @@ -0,0 +1,57 @@
21892 +/dts-v1/;
21893 +/plugin/;
21894 +
21895 +
21896 +/ {
21897 + compatible = "brcm,bcm2835";
21898 +
21899 + fragment@0 {
21900 + target = <&gpio>;
21901 + __overlay__ {
21902 + spi2_pins: spi2_pins {
21903 + brcm,pins = <40 41 42>;
21904 + brcm,function = <3>; /* alt4 */
21905 + };
21906 +
21907 + spi2_cs_pins: spi2_cs_pins {
21908 + brcm,pins = <43>;
21909 + brcm,function = <1>; /* output */
21910 + };
21911 + };
21912 + };
21913 +
21914 + fragment@1 {
21915 + target = <&spi2>;
21916 + frag1: __overlay__ {
21917 + /* needed to avoid dtc warning */
21918 + #address-cells = <1>;
21919 + #size-cells = <0>;
21920 + pinctrl-names = "default";
21921 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
21922 + cs-gpios = <&gpio 43 1>;
21923 + status = "okay";
21924 +
21925 + spidev2_0: spidev@0 {
21926 + compatible = "spidev";
21927 + reg = <0>; /* CE0 */
21928 + #address-cells = <1>;
21929 + #size-cells = <0>;
21930 + spi-max-frequency = <125000000>;
21931 + status = "okay";
21932 + };
21933 + };
21934 + };
21935 +
21936 + fragment@2 {
21937 + target = <&aux>;
21938 + __overlay__ {
21939 + status = "okay";
21940 + };
21941 + };
21942 +
21943 + __overrides__ {
21944 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
21945 + <&frag1>,"cs-gpios:4";
21946 + cs0_spidev = <&spidev2_0>,"status";
21947 + };
21948 +};
21949 diff --git a/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
21950 new file mode 100644
21951 index 000000000000..642678fc9ddd
21952 --- /dev/null
21953 +++ b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
21954 @@ -0,0 +1,69 @@
21955 +/dts-v1/;
21956 +/plugin/;
21957 +
21958 +
21959 +/ {
21960 + compatible = "brcm,bcm2835";
21961 +
21962 + fragment@0 {
21963 + target = <&gpio>;
21964 + __overlay__ {
21965 + spi2_pins: spi2_pins {
21966 + brcm,pins = <40 41 42>;
21967 + brcm,function = <3>; /* alt4 */
21968 + };
21969 +
21970 + spi2_cs_pins: spi2_cs_pins {
21971 + brcm,pins = <43 44>;
21972 + brcm,function = <1>; /* output */
21973 + };
21974 + };
21975 + };
21976 +
21977 + fragment@1 {
21978 + target = <&spi2>;
21979 + frag1: __overlay__ {
21980 + /* needed to avoid dtc warning */
21981 + #address-cells = <1>;
21982 + #size-cells = <0>;
21983 + pinctrl-names = "default";
21984 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
21985 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>;
21986 + status = "okay";
21987 +
21988 + spidev2_0: spidev@0 {
21989 + compatible = "spidev";
21990 + reg = <0>; /* CE0 */
21991 + #address-cells = <1>;
21992 + #size-cells = <0>;
21993 + spi-max-frequency = <125000000>;
21994 + status = "okay";
21995 + };
21996 +
21997 + spidev2_1: spidev@1 {
21998 + compatible = "spidev";
21999 + reg = <1>; /* CE1 */
22000 + #address-cells = <1>;
22001 + #size-cells = <0>;
22002 + spi-max-frequency = <125000000>;
22003 + status = "okay";
22004 + };
22005 + };
22006 + };
22007 +
22008 + fragment@2 {
22009 + target = <&aux>;
22010 + __overlay__ {
22011 + status = "okay";
22012 + };
22013 + };
22014 +
22015 + __overrides__ {
22016 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
22017 + <&frag1>,"cs-gpios:4";
22018 + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
22019 + <&frag1>,"cs-gpios:16";
22020 + cs0_spidev = <&spidev2_0>,"status";
22021 + cs1_spidev = <&spidev2_1>,"status";
22022 + };
22023 +};
22024 diff --git a/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
22025 new file mode 100644
22026 index 000000000000..28d40c6c3c37
22027 --- /dev/null
22028 +++ b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
22029 @@ -0,0 +1,81 @@
22030 +/dts-v1/;
22031 +/plugin/;
22032 +
22033 +
22034 +/ {
22035 + compatible = "brcm,bcm2835";
22036 +
22037 + fragment@0 {
22038 + target = <&gpio>;
22039 + __overlay__ {
22040 + spi2_pins: spi2_pins {
22041 + brcm,pins = <40 41 42>;
22042 + brcm,function = <3>; /* alt4 */
22043 + };
22044 +
22045 + spi2_cs_pins: spi2_cs_pins {
22046 + brcm,pins = <43 44 45>;
22047 + brcm,function = <1>; /* output */
22048 + };
22049 + };
22050 + };
22051 +
22052 + fragment@1 {
22053 + target = <&spi2>;
22054 + frag1: __overlay__ {
22055 + /* needed to avoid dtc warning */
22056 + #address-cells = <1>;
22057 + #size-cells = <0>;
22058 + pinctrl-names = "default";
22059 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
22060 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
22061 + status = "okay";
22062 +
22063 + spidev2_0: spidev@0 {
22064 + compatible = "spidev";
22065 + reg = <0>; /* CE0 */
22066 + #address-cells = <1>;
22067 + #size-cells = <0>;
22068 + spi-max-frequency = <125000000>;
22069 + status = "okay";
22070 + };
22071 +
22072 + spidev2_1: spidev@1 {
22073 + compatible = "spidev";
22074 + reg = <1>; /* CE1 */
22075 + #address-cells = <1>;
22076 + #size-cells = <0>;
22077 + spi-max-frequency = <125000000>;
22078 + status = "okay";
22079 + };
22080 +
22081 + spidev2_2: spidev@2 {
22082 + compatible = "spidev";
22083 + reg = <2>; /* CE2 */
22084 + #address-cells = <1>;
22085 + #size-cells = <0>;
22086 + spi-max-frequency = <125000000>;
22087 + status = "okay";
22088 + };
22089 + };
22090 + };
22091 +
22092 + fragment@2 {
22093 + target = <&aux>;
22094 + __overlay__ {
22095 + status = "okay";
22096 + };
22097 + };
22098 +
22099 + __overrides__ {
22100 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
22101 + <&frag1>,"cs-gpios:4";
22102 + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
22103 + <&frag1>,"cs-gpios:16";
22104 + cs2_pin = <&spi2_cs_pins>,"brcm,pins:8",
22105 + <&frag1>,"cs-gpios:28";
22106 + cs0_spidev = <&spidev2_0>,"status";
22107 + cs1_spidev = <&spidev2_1>,"status";
22108 + cs2_spidev = <&spidev2_2>,"status";
22109 + };
22110 +};
22111 diff --git a/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
22112 new file mode 100644
22113 index 000000000000..335af8637051
22114 --- /dev/null
22115 +++ b/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
22116 @@ -0,0 +1,44 @@
22117 +/dts-v1/;
22118 +/plugin/;
22119 +
22120 +
22121 +/ {
22122 + compatible = "brcm,bcm2711";
22123 +
22124 + fragment@0 {
22125 + target = <&spi3_cs_pins>;
22126 + frag0: __overlay__ {
22127 + brcm,pins = <0>;
22128 + brcm,function = <1>; /* output */
22129 + };
22130 + };
22131 +
22132 + fragment@1 {
22133 + target = <&spi3>;
22134 + frag1: __overlay__ {
22135 + /* needed to avoid dtc warning */
22136 + #address-cells = <1>;
22137 + #size-cells = <0>;
22138 +
22139 + pinctrl-names = "default";
22140 + pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
22141 + cs-gpios = <&gpio 0 1>;
22142 + status = "okay";
22143 +
22144 + spidev3_0: spidev@0 {
22145 + compatible = "spidev";
22146 + reg = <0>; /* CE0 */
22147 + #address-cells = <1>;
22148 + #size-cells = <0>;
22149 + spi-max-frequency = <125000000>;
22150 + status = "okay";
22151 + };
22152 + };
22153 + };
22154 +
22155 + __overrides__ {
22156 + cs0_pin = <&frag0>,"brcm,pins:0",
22157 + <&frag1>,"cs-gpios:4";
22158 + cs0_spidev = <&spidev3_0>,"status";
22159 + };
22160 +};
22161 diff --git a/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
22162 new file mode 100644
22163 index 000000000000..ce65da27f767
22164 --- /dev/null
22165 +++ b/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
22166 @@ -0,0 +1,56 @@
22167 +/dts-v1/;
22168 +/plugin/;
22169 +
22170 +
22171 +/ {
22172 + compatible = "brcm,bcm2711";
22173 +
22174 + fragment@0 {
22175 + target = <&spi3_cs_pins>;
22176 + frag0: __overlay__ {
22177 + brcm,pins = <0 24>;
22178 + brcm,function = <1>; /* output */
22179 + };
22180 + };
22181 +
22182 + fragment@1 {
22183 + target = <&spi3>;
22184 + frag1: __overlay__ {
22185 + /* needed to avoid dtc warning */
22186 + #address-cells = <1>;
22187 + #size-cells = <0>;
22188 +
22189 + pinctrl-names = "default";
22190 + pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
22191 + cs-gpios = <&gpio 0 1>, <&gpio 24 1>;
22192 + status = "okay";
22193 +
22194 + spidev3_0: spidev@0 {
22195 + compatible = "spidev";
22196 + reg = <0>; /* CE0 */
22197 + #address-cells = <1>;
22198 + #size-cells = <0>;
22199 + spi-max-frequency = <125000000>;
22200 + status = "okay";
22201 + };
22202 +
22203 + spidev3_1: spidev@1 {
22204 + compatible = "spidev";
22205 + reg = <1>; /* CE1 */
22206 + #address-cells = <1>;
22207 + #size-cells = <0>;
22208 + spi-max-frequency = <125000000>;
22209 + status = "okay";
22210 + };
22211 + };
22212 + };
22213 +
22214 + __overrides__ {
22215 + cs0_pin = <&frag0>,"brcm,pins:0",
22216 + <&frag1>,"cs-gpios:4";
22217 + cs1_pin = <&frag0>,"brcm,pins:4",
22218 + <&frag1>,"cs-gpios:16";
22219 + cs0_spidev = <&spidev3_0>,"status";
22220 + cs1_spidev = <&spidev3_1>,"status";
22221 + };
22222 +};
22223 diff --git a/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
22224 new file mode 100644
22225 index 000000000000..85d70b40352b
22226 --- /dev/null
22227 +++ b/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
22228 @@ -0,0 +1,44 @@
22229 +/dts-v1/;
22230 +/plugin/;
22231 +
22232 +
22233 +/ {
22234 + compatible = "brcm,bcm2711";
22235 +
22236 + fragment@0 {
22237 + target = <&spi4_cs_pins>;
22238 + frag0: __overlay__ {
22239 + brcm,pins = <4>;
22240 + brcm,function = <1>; /* output */
22241 + };
22242 + };
22243 +
22244 + fragment@1 {
22245 + target = <&spi4>;
22246 + frag1: __overlay__ {
22247 + /* needed to avoid dtc warning */
22248 + #address-cells = <1>;
22249 + #size-cells = <0>;
22250 +
22251 + pinctrl-names = "default";
22252 + pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
22253 + cs-gpios = <&gpio 4 1>;
22254 + status = "okay";
22255 +
22256 + spidev4_0: spidev@0 {
22257 + compatible = "spidev";
22258 + reg = <0>; /* CE0 */
22259 + #address-cells = <1>;
22260 + #size-cells = <0>;
22261 + spi-max-frequency = <125000000>;
22262 + status = "okay";
22263 + };
22264 + };
22265 + };
22266 +
22267 + __overrides__ {
22268 + cs0_pin = <&frag0>,"brcm,pins:0",
22269 + <&frag1>,"cs-gpios:4";
22270 + cs0_spidev = <&spidev4_0>,"status";
22271 + };
22272 +};
22273 diff --git a/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
22274 new file mode 100644
22275 index 000000000000..8bc2215a6a7e
22276 --- /dev/null
22277 +++ b/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
22278 @@ -0,0 +1,56 @@
22279 +/dts-v1/;
22280 +/plugin/;
22281 +
22282 +
22283 +/ {
22284 + compatible = "brcm,bcm2711";
22285 +
22286 + fragment@0 {
22287 + target = <&spi4_cs_pins>;
22288 + frag0: __overlay__ {
22289 + brcm,pins = <4 25>;
22290 + brcm,function = <1>; /* output */
22291 + };
22292 + };
22293 +
22294 + fragment@1 {
22295 + target = <&spi4>;
22296 + frag1: __overlay__ {
22297 + /* needed to avoid dtc warning */
22298 + #address-cells = <1>;
22299 + #size-cells = <0>;
22300 +
22301 + pinctrl-names = "default";
22302 + pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
22303 + cs-gpios = <&gpio 4 1>, <&gpio 25 1>;
22304 + status = "okay";
22305 +
22306 + spidev4_0: spidev@0 {
22307 + compatible = "spidev";
22308 + reg = <0>; /* CE0 */
22309 + #address-cells = <1>;
22310 + #size-cells = <0>;
22311 + spi-max-frequency = <125000000>;
22312 + status = "okay";
22313 + };
22314 +
22315 + spidev4_1: spidev@1 {
22316 + compatible = "spidev";
22317 + reg = <1>; /* CE1 */
22318 + #address-cells = <1>;
22319 + #size-cells = <0>;
22320 + spi-max-frequency = <125000000>;
22321 + status = "okay";
22322 + };
22323 + };
22324 + };
22325 +
22326 + __overrides__ {
22327 + cs0_pin = <&frag0>,"brcm,pins:0",
22328 + <&frag1>,"cs-gpios:4";
22329 + cs1_pin = <&frag0>,"brcm,pins:4",
22330 + <&frag1>,"cs-gpios:16";
22331 + cs0_spidev = <&spidev4_0>,"status";
22332 + cs1_spidev = <&spidev4_1>,"status";
22333 + };
22334 +};
22335 diff --git a/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
22336 new file mode 100644
22337 index 000000000000..c0f8cb8510ee
22338 --- /dev/null
22339 +++ b/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
22340 @@ -0,0 +1,44 @@
22341 +/dts-v1/;
22342 +/plugin/;
22343 +
22344 +
22345 +/ {
22346 + compatible = "brcm,bcm2711";
22347 +
22348 + fragment@0 {
22349 + target = <&spi5_cs_pins>;
22350 + frag0: __overlay__ {
22351 + brcm,pins = <12>;
22352 + brcm,function = <1>; /* output */
22353 + };
22354 + };
22355 +
22356 + fragment@1 {
22357 + target = <&spi5>;
22358 + frag1: __overlay__ {
22359 + /* needed to avoid dtc warning */
22360 + #address-cells = <1>;
22361 + #size-cells = <0>;
22362 +
22363 + pinctrl-names = "default";
22364 + pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
22365 + cs-gpios = <&gpio 12 1>;
22366 + status = "okay";
22367 +
22368 + spidev5_0: spidev@0 {
22369 + compatible = "spidev";
22370 + reg = <0>; /* CE0 */
22371 + #address-cells = <1>;
22372 + #size-cells = <0>;
22373 + spi-max-frequency = <125000000>;
22374 + status = "okay";
22375 + };
22376 + };
22377 + };
22378 +
22379 + __overrides__ {
22380 + cs0_pin = <&frag0>,"brcm,pins:0",
22381 + <&frag1>,"cs-gpios:4";
22382 + cs0_spidev = <&spidev5_0>,"status";
22383 + };
22384 +};
22385 diff --git a/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
22386 new file mode 100644
22387 index 000000000000..7758b9c00b4e
22388 --- /dev/null
22389 +++ b/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
22390 @@ -0,0 +1,56 @@
22391 +/dts-v1/;
22392 +/plugin/;
22393 +
22394 +
22395 +/ {
22396 + compatible = "brcm,bcm2711";
22397 +
22398 + fragment@0 {
22399 + target = <&spi5_cs_pins>;
22400 + frag0: __overlay__ {
22401 + brcm,pins = <12 26>;
22402 + brcm,function = <1>; /* output */
22403 + };
22404 + };
22405 +
22406 + fragment@1 {
22407 + target = <&spi5>;
22408 + frag1: __overlay__ {
22409 + /* needed to avoid dtc warning */
22410 + #address-cells = <1>;
22411 + #size-cells = <0>;
22412 +
22413 + pinctrl-names = "default";
22414 + pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
22415 + cs-gpios = <&gpio 12 1>, <&gpio 26 1>;
22416 + status = "okay";
22417 +
22418 + spidev5_0: spidev@0 {
22419 + compatible = "spidev";
22420 + reg = <0>; /* CE0 */
22421 + #address-cells = <1>;
22422 + #size-cells = <0>;
22423 + spi-max-frequency = <125000000>;
22424 + status = "okay";
22425 + };
22426 +
22427 + spidev5_1: spidev@1 {
22428 + compatible = "spidev";
22429 + reg = <1>; /* CE1 */
22430 + #address-cells = <1>;
22431 + #size-cells = <0>;
22432 + spi-max-frequency = <125000000>;
22433 + status = "okay";
22434 + };
22435 + };
22436 + };
22437 +
22438 + __overrides__ {
22439 + cs0_pin = <&frag0>,"brcm,pins:0",
22440 + <&frag1>,"cs-gpios:4";
22441 + cs1_pin = <&frag0>,"brcm,pins:4",
22442 + <&frag1>,"cs-gpios:16";
22443 + cs0_spidev = <&spidev5_0>,"status";
22444 + cs1_spidev = <&spidev5_1>,"status";
22445 + };
22446 +};
22447 diff --git a/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
22448 new file mode 100644
22449 index 000000000000..8c8a953eca01
22450 --- /dev/null
22451 +++ b/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
22452 @@ -0,0 +1,44 @@
22453 +/dts-v1/;
22454 +/plugin/;
22455 +
22456 +
22457 +/ {
22458 + compatible = "brcm,bcm2711";
22459 +
22460 + fragment@0 {
22461 + target = <&spi6_cs_pins>;
22462 + frag0: __overlay__ {
22463 + brcm,pins = <18>;
22464 + brcm,function = <1>; /* output */
22465 + };
22466 + };
22467 +
22468 + fragment@1 {
22469 + target = <&spi6>;
22470 + frag1: __overlay__ {
22471 + /* needed to avoid dtc warning */
22472 + #address-cells = <1>;
22473 + #size-cells = <0>;
22474 +
22475 + pinctrl-names = "default";
22476 + pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
22477 + cs-gpios = <&gpio 18 1>;
22478 + status = "okay";
22479 +
22480 + spidev6_0: spidev@0 {
22481 + compatible = "spidev";
22482 + reg = <0>; /* CE0 */
22483 + #address-cells = <1>;
22484 + #size-cells = <0>;
22485 + spi-max-frequency = <125000000>;
22486 + status = "okay";
22487 + };
22488 + };
22489 + };
22490 +
22491 + __overrides__ {
22492 + cs0_pin = <&frag0>,"brcm,pins:0",
22493 + <&frag1>,"cs-gpios:4";
22494 + cs0_spidev = <&spidev6_0>,"status";
22495 + };
22496 +};
22497 diff --git a/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
22498 new file mode 100644
22499 index 000000000000..2ff897f21aed
22500 --- /dev/null
22501 +++ b/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
22502 @@ -0,0 +1,56 @@
22503 +/dts-v1/;
22504 +/plugin/;
22505 +
22506 +
22507 +/ {
22508 + compatible = "brcm,bcm2711";
22509 +
22510 + fragment@0 {
22511 + target = <&spi6_cs_pins>;
22512 + frag0: __overlay__ {
22513 + brcm,pins = <18 27>;
22514 + brcm,function = <1>; /* output */
22515 + };
22516 + };
22517 +
22518 + fragment@1 {
22519 + target = <&spi6>;
22520 + frag1: __overlay__ {
22521 + /* needed to avoid dtc warning */
22522 + #address-cells = <1>;
22523 + #size-cells = <0>;
22524 +
22525 + pinctrl-names = "default";
22526 + pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
22527 + cs-gpios = <&gpio 18 1>, <&gpio 27 1>;
22528 + status = "okay";
22529 +
22530 + spidev6_0: spidev@0 {
22531 + compatible = "spidev";
22532 + reg = <0>; /* CE0 */
22533 + #address-cells = <1>;
22534 + #size-cells = <0>;
22535 + spi-max-frequency = <125000000>;
22536 + status = "okay";
22537 + };
22538 +
22539 + spidev6_1: spidev@1 {
22540 + compatible = "spidev";
22541 + reg = <1>; /* CE1 */
22542 + #address-cells = <1>;
22543 + #size-cells = <0>;
22544 + spi-max-frequency = <125000000>;
22545 + status = "okay";
22546 + };
22547 + };
22548 + };
22549 +
22550 + __overrides__ {
22551 + cs0_pin = <&frag0>,"brcm,pins:0",
22552 + <&frag1>,"cs-gpios:4";
22553 + cs1_pin = <&frag0>,"brcm,pins:4",
22554 + <&frag1>,"cs-gpios:16";
22555 + cs0_spidev = <&spidev6_0>,"status";
22556 + cs1_spidev = <&spidev6_1>,"status";
22557 + };
22558 +};
22559 diff --git a/arch/arm/boot/dts/overlays/ssd1306-overlay.dts b/arch/arm/boot/dts/overlays/ssd1306-overlay.dts
22560 new file mode 100644
22561 index 000000000000..84cf10e489d3
22562 --- /dev/null
22563 +++ b/arch/arm/boot/dts/overlays/ssd1306-overlay.dts
22564 @@ -0,0 +1,36 @@
22565 +// Overlay for SSD1306 128x64 and 128x32 OLED displays
22566 +/dts-v1/;
22567 +/plugin/;
22568 +
22569 +/ {
22570 + compatible = "brcm,bcm2835";
22571 +
22572 + fragment@0 {
22573 + target = <&i2c1>;
22574 + __overlay__ {
22575 + status = "okay";
22576 +
22577 + #address-cells = <1>;
22578 + #size-cells = <0>;
22579 +
22580 + ssd1306: oled@3c{
22581 + compatible = "solomon,ssd1306fb-i2c";
22582 + reg = <0x3c>;
22583 + solomon,width = <128>;
22584 + solomon,height = <64>;
22585 + solomon,page-offset = <0>;
22586 + };
22587 + };
22588 + };
22589 +
22590 + __overrides__ {
22591 + address = <&ssd1306>,"reg:0";
22592 + width = <&ssd1306>,"solomon,width:0";
22593 + height = <&ssd1306>,"solomon,height:0";
22594 + offset = <&ssd1306>,"solomon,page-offset:0";
22595 + normal = <&ssd1306>,"solomon,segment-no-remap?";
22596 + sequential = <&ssd1306>,"solomon,com-seq?";
22597 + remapped = <&ssd1306>,"solomon,com-lrremap?";
22598 + inverted = <&ssd1306>,"solomon,com-invdir?";
22599 + };
22600 +};
22601 diff --git a/arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts b/arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts
22602 new file mode 100644
22603 index 000000000000..ffc90c7cecf6
22604 --- /dev/null
22605 +++ b/arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts
22606 @@ -0,0 +1,84 @@
22607 +/*
22608 + * Device Tree overlay for SSD1306 based SPI OLED display
22609 + *
22610 + */
22611 +
22612 +/dts-v1/;
22613 +/plugin/;
22614 +
22615 +/ {
22616 + compatible = "brcm,bcm2835";
22617 +
22618 + fragment@0 {
22619 + target = <&spi0>;
22620 + __overlay__ {
22621 + status = "okay";
22622 + };
22623 + };
22624 +
22625 + fragment@1 {
22626 + target = <&spidev0>;
22627 + __overlay__ {
22628 + status = "disabled";
22629 + };
22630 + };
22631 +
22632 + fragment@2 {
22633 + target = <&spidev1>;
22634 + __overlay__ {
22635 + status = "disabled";
22636 + };
22637 + };
22638 +
22639 + fragment@3 {
22640 + target = <&gpio>;
22641 + __overlay__ {
22642 + ssd1306_pins: ssd1306_pins {
22643 + brcm,pins = <25 24>;
22644 + brcm,function = <1 1>; /* out out */
22645 + };
22646 + };
22647 + };
22648 +
22649 + fragment@4 {
22650 + target = <&spi0>;
22651 + __overlay__ {
22652 + /* needed to avoid dtc warning */
22653 + #address-cells = <1>;
22654 + #size-cells = <0>;
22655 +
22656 + ssd1306: ssd1306@0{
22657 + compatible = "solomon,ssd1306";
22658 + reg = <0>;
22659 + pinctrl-names = "default";
22660 + pinctrl-0 = <&ssd1306_pins>;
22661 +
22662 + spi-max-frequency = <10000000>;
22663 + bgr = <0>;
22664 + bpp = <1>;
22665 + rotate = <0>;
22666 + fps = <25>;
22667 + buswidth = <8>;
22668 + reset-gpios = <&gpio 25 1>;
22669 + dc-gpios = <&gpio 24 0>;
22670 + debug = <0>;
22671 +
22672 + solomon,height = <64>;
22673 + solomon,width = <128>;
22674 + solomon,page-offset = <0>;
22675 + };
22676 + };
22677 + };
22678 +
22679 + __overrides__ {
22680 + speed = <&ssd1306>,"spi-max-frequency:0";
22681 + rotate = <&ssd1306>,"rotate:0";
22682 + fps = <&ssd1306>,"fps:0";
22683 + debug = <&ssd1306>,"debug:0";
22684 + dc_pin = <&ssd1306>,"dc-gpios:4",
22685 + <&ssd1306_pins>,"brcm,pins:4";
22686 + reset_pin = <&ssd1306>,"reset-gpios:4",
22687 + <&ssd1306_pins>,"brcm,pins:0";
22688 + height = <&ssd1306>,"solomon,height:0";
22689 + };
22690 +};
22691 diff --git a/arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts b/arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts
22692 new file mode 100644
22693 index 000000000000..ffc872c60648
22694 --- /dev/null
22695 +++ b/arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts
22696 @@ -0,0 +1,83 @@
22697 +/*
22698 + * Device Tree overlay for SSD1351 based SPI OLED display
22699 + *
22700 + */
22701 +
22702 +/dts-v1/;
22703 +/plugin/;
22704 +
22705 +/ {
22706 + compatible = "brcm,bcm2835";
22707 +
22708 + fragment@0 {
22709 + target = <&spi0>;
22710 + __overlay__ {
22711 + status = "okay";
22712 + };
22713 + };
22714 +
22715 + fragment@1 {
22716 + target = <&spidev0>;
22717 + __overlay__ {
22718 + status = "disabled";
22719 + };
22720 + };
22721 +
22722 + fragment@2 {
22723 + target = <&spidev1>;
22724 + __overlay__ {
22725 + status = "disabled";
22726 + };
22727 + };
22728 +
22729 + fragment@3 {
22730 + target = <&gpio>;
22731 + __overlay__ {
22732 + ssd1351_pins: ssd1351_pins {
22733 + brcm,pins = <25 24>;
22734 + brcm,function = <1 1>; /* out out */
22735 + };
22736 + };
22737 + };
22738 +
22739 + fragment@4 {
22740 + target = <&spi0>;
22741 + __overlay__ {
22742 + /* needed to avoid dtc warning */
22743 + #address-cells = <1>;
22744 + #size-cells = <0>;
22745 +
22746 + ssd1351: ssd1351@0{
22747 + compatible = "solomon,ssd1351";
22748 + reg = <0>;
22749 + pinctrl-names = "default";
22750 + pinctrl-0 = <&ssd1351_pins>;
22751 +
22752 + spi-max-frequency = <4500000>;
22753 + bgr = <0>;
22754 + bpp = <16>;
22755 + rotate = <0>;
22756 + fps = <25>;
22757 + buswidth = <8>;
22758 + reset-gpios = <&gpio 25 1>;
22759 + dc-gpios = <&gpio 24 0>;
22760 + debug = <0>;
22761 +
22762 + solomon,height = <128>;
22763 + solomon,width = <128>;
22764 + solomon,page-offset = <0>;
22765 + };
22766 + };
22767 + };
22768 +
22769 + __overrides__ {
22770 + speed = <&ssd1351>,"spi-max-frequency:0";
22771 + rotate = <&ssd1351>,"rotate:0";
22772 + fps = <&ssd1351>,"fps:0";
22773 + debug = <&ssd1351>,"debug:0";
22774 + dc_pin = <&ssd1351>,"dc-gpios:4",
22775 + <&ssd1351_pins>,"brcm,pins:4";
22776 + reset_pin = <&ssd1351>,"reset-gpios:4",
22777 + <&ssd1351_pins>,"brcm,pins:0";
22778 + };
22779 +};
22780 diff --git a/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
22781 new file mode 100755
22782 index 000000000000..bad61535981e
22783 --- /dev/null
22784 +++ b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
22785 @@ -0,0 +1,73 @@
22786 +// Definitions for SuperAudioBoard
22787 +/dts-v1/;
22788 +/plugin/;
22789 +
22790 +/ {
22791 + compatible = "brcm,bcm2835";
22792 +
22793 + fragment@0 {
22794 + target = <&sound>;
22795 + __overlay__ {
22796 + compatible = "simple-audio-card";
22797 + i2s-controller = <&i2s>;
22798 + status = "okay";
22799 +
22800 + simple-audio-card,name = "SuperAudioBoard";
22801 +
22802 + simple-audio-card,widgets =
22803 + "Line", "Line In",
22804 + "Line", "Line Out";
22805 +
22806 + simple-audio-card,routing =
22807 + "Line Out","AOUTA+",
22808 + "Line Out","AOUTA-",
22809 + "Line Out","AOUTB+",
22810 + "Line Out","AOUTB-",
22811 + "AINA","Line In",
22812 + "AINB","Line In";
22813 +
22814 + simple-audio-card,format = "i2s";
22815 +
22816 + simple-audio-card,bitclock-master = <&sound_master>;
22817 + simple-audio-card,frame-master = <&sound_master>;
22818 +
22819 + simple-audio-card,cpu {
22820 + sound-dai = <&i2s>;
22821 + dai-tdm-slot-num = <2>;
22822 + dai-tdm-slot-width = <32>;
22823 + };
22824 +
22825 + sound_master: simple-audio-card,codec {
22826 + sound-dai = <&cs4271>;
22827 + system-clock-frequency = <24576000>;
22828 + };
22829 + };
22830 + };
22831 +
22832 + fragment@1 {
22833 + target = <&i2s>;
22834 + __overlay__ {
22835 + status = "okay";
22836 + };
22837 + };
22838 +
22839 + fragment@2 {
22840 + target = <&i2c1>;
22841 + __overlay__ {
22842 + #address-cells = <1>;
22843 + #size-cells = <0>;
22844 + status = "okay";
22845 +
22846 + cs4271: cs4271@10 {
22847 + #sound-dai-cells = <0>;
22848 + compatible = "cirrus,cs4271";
22849 + reg = <0x10>;
22850 + status = "okay";
22851 + reset-gpio = <&gpio 26 0>; /* Pin 26, active high */
22852 + };
22853 + };
22854 + };
22855 + __overrides__ {
22856 + gpiopin = <&cs4271>,"reset-gpio:4";
22857 + };
22858 +};
22859 diff --git a/arch/arm/boot/dts/overlays/sx150x-overlay.dts b/arch/arm/boot/dts/overlays/sx150x-overlay.dts
22860 new file mode 100644
22861 index 000000000000..1d1069345da2
22862 --- /dev/null
22863 +++ b/arch/arm/boot/dts/overlays/sx150x-overlay.dts
22864 @@ -0,0 +1,1706 @@
22865 +// Definitions for SX150x I2C GPIO Expanders from Semtech
22866 +
22867 +// dtparams:
22868 +// sx150<x>-<n>-<m> - Enables SX150X device on I2C#<n> with slave address <m>. <x> may be 1-9.
22869 +// <n> may be 0 or 1. Permissible values of <m> (which is denoted in hex)
22870 +// depend on the device variant.
22871 +// For SX1501, SX1502, SX1504 and SX1505, <m> may be 20 or 21.
22872 +// For SX1503 and SX1506, <m> may be 20.
22873 +// For SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
22874 +// For SX1508, <m> may be 20, 21, 22 or 23.
22875 +// sx150<x>-<n>-<m>-int-gpio - Integer, enables interrupts on SX150X device on I2C#<n> with slave address <m>,
22876 +// specifies the GPIO pin to which NINT output of SX150X is connected.
22877 +//
22878 +//
22879 +// Example 1: A single SX1505 device on I2C#1 with its slave address set to 0x20 and NINT output connected to GPIO25:
22880 +// dtoverlay=sx150x:sx1505-1-20,sx1505-1-20-int-gpio=25
22881 +//
22882 +// Example 2: Two SX1507 devices on I2C#0 with their slave addresses set to 0x3E and 0x70 (interrupts not used):
22883 +// dtoverlay=sx150x:sx1507-0-3E,sx1507-0-70
22884 +
22885 +/dts-v1/;
22886 +/plugin/;
22887 +
22888 +/ {
22889 + compatible = "brcm,bcm2835";
22890 +
22891 + // Enable I2C#0 interface
22892 + fragment@0 {
22893 + target = <&i2c0>;
22894 + __dormant__ {
22895 + status = "okay";
22896 + };
22897 + };
22898 +
22899 + // Enable I2C#1 interface
22900 + fragment@1 {
22901 + target = <&i2c1>;
22902 + __dormant__ {
22903 + status = "okay";
22904 + };
22905 + };
22906 +
22907 + // Enable a SX1501 on I2C#0 at slave addr 0x20
22908 + fragment@2 {
22909 + target = <&i2c0>;
22910 + __dormant__ {
22911 + #address-cells = <1>;
22912 + #size-cells = <0>;
22913 +
22914 + sx1501_0_20: sx150x@20 {
22915 + compatible = "semtech,sx1501q";
22916 + reg = <0x20>;
22917 + gpio-controller;
22918 + #gpio-cells = <2>;
22919 + #interrupt-cells = <2>;
22920 + interrupts = <25 2>; /* 1st word overwritten by sx1501-0-20-int-gpio parameter
22921 + 2nd word is 2 for falling-edge triggered */
22922 + status = "okay";
22923 + };
22924 + };
22925 + };
22926 +
22927 + // Enable a SX1501 on I2C#1 at slave addr 0x20
22928 + fragment@3 {
22929 + target = <&i2c1>;
22930 + __dormant__ {
22931 + #address-cells = <1>;
22932 + #size-cells = <0>;
22933 +
22934 + sx1501_1_20: sx150x@20 {
22935 + compatible = "semtech,sx1501q";
22936 + reg = <0x20>;
22937 + gpio-controller;
22938 + #gpio-cells = <2>;
22939 + #interrupt-cells = <2>;
22940 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-20-int-gpio parameter
22941 + 2nd word is 2 for falling-edge triggered */
22942 + status = "okay";
22943 + };
22944 + };
22945 + };
22946 +
22947 + // Enable a SX1501 on I2C#0 at slave addr 0x21
22948 + fragment@4 {
22949 + target = <&i2c0>;
22950 + __dormant__ {
22951 + #address-cells = <1>;
22952 + #size-cells = <0>;
22953 +
22954 + sx1501_0_21: sx150x@21 {
22955 + compatible = "semtech,sx1501q";
22956 + reg = <0x21>;
22957 + gpio-controller;
22958 + #gpio-cells = <2>;
22959 + #interrupt-cells = <2>;
22960 + interrupts = <25 2>; /* 1st word overwritten by sx1501-0-21-int-gpio parameter
22961 + 2nd word is 2 for falling-edge triggered */
22962 + status = "okay";
22963 + };
22964 + };
22965 + };
22966 +
22967 + // Enable a SX1501 on I2C#1 at slave addr 0x21
22968 + fragment@5 {
22969 + target = <&i2c1>;
22970 + __dormant__ {
22971 + #address-cells = <1>;
22972 + #size-cells = <0>;
22973 +
22974 + sx1501_1_21: sx150x@21 {
22975 + compatible = "semtech,sx1501q";
22976 + reg = <0x21>;
22977 + gpio-controller;
22978 + #gpio-cells = <2>;
22979 + #interrupt-cells = <2>;
22980 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
22981 + 2nd word is 2 for falling-edge triggered */
22982 + status = "okay";
22983 + };
22984 + };
22985 + };
22986 +
22987 + // Enable a SX1502 on I2C#0 at slave addr 0x20
22988 + fragment@6 {
22989 + target = <&i2c0>;
22990 + __dormant__ {
22991 + #address-cells = <1>;
22992 + #size-cells = <0>;
22993 +
22994 + sx1502_0_20: sx150x@20 {
22995 + compatible = "semtech,sx1502q";
22996 + reg = <0x20>;
22997 + gpio-controller;
22998 + #gpio-cells = <2>;
22999 + #interrupt-cells = <2>;
23000 + interrupts = <25 2>; /* 1st word overwritten by sx1502-0-20-int-gpio parameter
23001 + 2nd word is 2 for falling-edge triggered */
23002 + status = "okay";
23003 + };
23004 + };
23005 + };
23006 +
23007 + // Enable a SX1502 on I2C#1 at slave addr 0x20
23008 + fragment@7 {
23009 + target = <&i2c1>;
23010 + __dormant__ {
23011 + #address-cells = <1>;
23012 + #size-cells = <0>;
23013 +
23014 + sx1502_1_20: sx150x@20 {
23015 + compatible = "semtech,sx1502q";
23016 + reg = <0x20>;
23017 + gpio-controller;
23018 + #gpio-cells = <2>;
23019 + #interrupt-cells = <2>;
23020 + interrupts = <25 2>; /* 1st word overwritten by sx1502-1-20-int-gpio parameter
23021 + 2nd word is 2 for falling-edge triggered */
23022 + status = "okay";
23023 + };
23024 + };
23025 + };
23026 +
23027 + // Enable a SX1502 on I2C#0 at slave addr 0x21
23028 + fragment@8 {
23029 + target = <&i2c0>;
23030 + __dormant__ {
23031 + #address-cells = <1>;
23032 + #size-cells = <0>;
23033 +
23034 + sx1502_0_21: sx150x@21 {
23035 + compatible = "semtech,sx1502q";
23036 + reg = <0x21>;
23037 + gpio-controller;
23038 + #gpio-cells = <2>;
23039 + #interrupt-cells = <2>;
23040 + interrupts = <25 2>; /* 1st word overwritten by sx1502-0-21-int-gpio parameter
23041 + 2nd word is 2 for falling-edge triggered */
23042 + status = "okay";
23043 + };
23044 + };
23045 + };
23046 +
23047 + // Enable a SX1502 on I2C#1 at slave addr 0x21
23048 + fragment@9 {
23049 + target = <&i2c1>;
23050 + __dormant__ {
23051 + #address-cells = <1>;
23052 + #size-cells = <0>;
23053 +
23054 + sx1502_1_21: sx150x@21 {
23055 + compatible = "semtech,sx1502q";
23056 + reg = <0x21>;
23057 + gpio-controller;
23058 + #gpio-cells = <2>;
23059 + #interrupt-cells = <2>;
23060 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
23061 + 2nd word is 2 for falling-edge triggered */
23062 + status = "okay";
23063 + };
23064 + };
23065 + };
23066 +
23067 + // Enable a SX1503 on I2C#0 at slave addr 0x20
23068 + fragment@10 {
23069 + target = <&i2c0>;
23070 + __dormant__ {
23071 + #address-cells = <1>;
23072 + #size-cells = <0>;
23073 +
23074 + sx1503_0_20: sx150x@20 {
23075 + compatible = "semtech,sx1503q";
23076 + reg = <0x20>;
23077 + gpio-controller;
23078 + #gpio-cells = <2>;
23079 + #interrupt-cells = <2>;
23080 + interrupts = <25 2>; /* 1st word overwritten by sx1503-0-20-int-gpio parameter
23081 + 2nd word is 2 for falling-edge triggered */
23082 + status = "okay";
23083 + };
23084 + };
23085 + };
23086 +
23087 + // Enable a SX1503 on I2C#1 at slave addr 0x20
23088 + fragment@11 {
23089 + target = <&i2c1>;
23090 + __dormant__ {
23091 + #address-cells = <1>;
23092 + #size-cells = <0>;
23093 +
23094 + sx1503_1_20: sx150x@20 {
23095 + compatible = "semtech,sx1503q";
23096 + reg = <0x20>;
23097 + gpio-controller;
23098 + #gpio-cells = <2>;
23099 + #interrupt-cells = <2>;
23100 + interrupts = <25 2>; /* 1st word overwritten by sx1503-1-20-int-gpio parameter
23101 + 2nd word is 2 for falling-edge triggered */
23102 + status = "okay";
23103 + };
23104 + };
23105 + };
23106 +
23107 + // Enable a SX1504 on I2C#0 at slave addr 0x20
23108 + fragment@12 {
23109 + target = <&i2c0>;
23110 + __dormant__ {
23111 + #address-cells = <1>;
23112 + #size-cells = <0>;
23113 +
23114 + sx1504_0_20: sx150x@20 {
23115 + compatible = "semtech,sx1504q";
23116 + reg = <0x20>;
23117 + gpio-controller;
23118 + #gpio-cells = <2>;
23119 + #interrupt-cells = <2>;
23120 + interrupts = <25 2>; /* 1st word overwritten by sx1504-0-20-int-gpio parameter
23121 + 2nd word is 2 for falling-edge triggered */
23122 + status = "okay";
23123 + };
23124 + };
23125 + };
23126 +
23127 + // Enable a SX1504 on I2C#1 at slave addr 0x20
23128 + fragment@13 {
23129 + target = <&i2c1>;
23130 + __dormant__ {
23131 + #address-cells = <1>;
23132 + #size-cells = <0>;
23133 +
23134 + sx1504_1_20: sx150x@20 {
23135 + compatible = "semtech,sx1504q";
23136 + reg = <0x20>;
23137 + gpio-controller;
23138 + #gpio-cells = <2>;
23139 + #interrupt-cells = <2>;
23140 + interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
23141 + 2nd word is 2 for falling-edge triggered */
23142 + status = "okay";
23143 + };
23144 + };
23145 + };
23146 +
23147 + // Enable a SX1504 on I2C#0 at slave addr 0x21
23148 + fragment@14 {
23149 + target = <&i2c0>;
23150 + __dormant__ {
23151 + #address-cells = <1>;
23152 + #size-cells = <0>;
23153 +
23154 + sx1504_0_21: sx150x@21 {
23155 + compatible = "semtech,sx1504q";
23156 + reg = <0x21>;
23157 + gpio-controller;
23158 + #gpio-cells = <2>;
23159 + #interrupt-cells = <2>;
23160 + interrupts = <25 2>; /* 1st word overwritten by sx1504-0-21-int-gpio parameter
23161 + 2nd word is 2 for falling-edge triggered */
23162 + status = "okay";
23163 + };
23164 + };
23165 + };
23166 +
23167 + // Enable a SX1504 on I2C#1 at slave addr 0x21
23168 + fragment@15 {
23169 + target = <&i2c1>;
23170 + __dormant__ {
23171 + #address-cells = <1>;
23172 + #size-cells = <0>;
23173 +
23174 + sx1504_1_21: sx150x@21 {
23175 + compatible = "semtech,sx1504q";
23176 + reg = <0x21>;
23177 + gpio-controller;
23178 + #gpio-cells = <2>;
23179 + #interrupt-cells = <2>;
23180 + interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
23181 + 2nd word is 2 for falling-edge triggered */
23182 + status = "okay";
23183 + };
23184 + };
23185 + };
23186 +
23187 + // Enable a SX1505 on I2C#0 at slave addr 0x20
23188 + fragment@16 {
23189 + target = <&i2c0>;
23190 + __dormant__ {
23191 + #address-cells = <1>;
23192 + #size-cells = <0>;
23193 +
23194 + sx1505_0_20: sx150x@20 {
23195 + compatible = "semtech,sx1505q";
23196 + reg = <0x20>;
23197 + gpio-controller;
23198 + #gpio-cells = <2>;
23199 + #interrupt-cells = <2>;
23200 + interrupts = <25 2>; /* 1st word overwritten by sx1505-0-20-int-gpio parameter
23201 + 2nd word is 2 for falling-edge triggered */
23202 + status = "okay";
23203 + };
23204 + };
23205 + };
23206 +
23207 + // Enable a SX1505 on I2C#1 at slave addr 0x20
23208 + fragment@17 {
23209 + target = <&i2c1>;
23210 + __dormant__ {
23211 + #address-cells = <1>;
23212 + #size-cells = <0>;
23213 +
23214 + sx1505_1_20: sx150x@20 {
23215 + compatible = "semtech,sx1505q";
23216 + reg = <0x20>;
23217 + gpio-controller;
23218 + #gpio-cells = <2>;
23219 + #interrupt-cells = <2>;
23220 + interrupts = <25 2>; /* 1st word overwritten by sx1505-1-20-int-gpio parameter
23221 + 2nd word is 2 for falling-edge triggered */
23222 + status = "okay";
23223 + };
23224 + };
23225 + };
23226 +
23227 + // Enable a SX1505 on I2C#0 at slave addr 0x21
23228 + fragment@18 {
23229 + target = <&i2c0>;
23230 + __dormant__ {
23231 + #address-cells = <1>;
23232 + #size-cells = <0>;
23233 +
23234 + sx1505_0_21: sx150x@21 {
23235 + compatible = "semtech,sx1505q";
23236 + reg = <0x21>;
23237 + gpio-controller;
23238 + #gpio-cells = <2>;
23239 + #interrupt-cells = <2>;
23240 + interrupts = <25 2>; /* 1st word overwritten by sx1505-0-21-int-gpio parameter
23241 + 2nd word is 2 for falling-edge triggered */
23242 + status = "okay";
23243 + };
23244 + };
23245 + };
23246 +
23247 + // Enable a SX1505 on I2C#1 at slave addr 0x21
23248 + fragment@19 {
23249 + target = <&i2c1>;
23250 + __dormant__ {
23251 + #address-cells = <1>;
23252 + #size-cells = <0>;
23253 +
23254 + sx1505_1_21: sx150x@21 {
23255 + compatible = "semtech,sx1505q";
23256 + reg = <0x21>;
23257 + gpio-controller;
23258 + #gpio-cells = <2>;
23259 + #interrupt-cells = <2>;
23260 + interrupts = <25 2>; /* 1st word overwritten by sx1505-1-21-int-gpio parameter
23261 + 2nd word is 2 for falling-edge triggered */
23262 + status = "okay";
23263 + };
23264 + };
23265 + };
23266 +
23267 + // Enable a SX1506 on I2C#0 at slave addr 0x20
23268 + fragment@20 {
23269 + target = <&i2c0>;
23270 + __dormant__ {
23271 + #address-cells = <1>;
23272 + #size-cells = <0>;
23273 +
23274 + sx1506_0_20: sx150x@20 {
23275 + compatible = "semtech,sx1506q";
23276 + reg = <0x20>;
23277 + gpio-controller;
23278 + #gpio-cells = <2>;
23279 + #interrupt-cells = <2>;
23280 + interrupts = <25 2>; /* 1st word overwritten by sx1506-0-20-int-gpio parameter
23281 + 2nd word is 2 for falling-edge triggered */
23282 + status = "okay";
23283 + };
23284 + };
23285 + };
23286 +
23287 + // Enable a SX1506 on I2C#1 at slave addr 0x20
23288 + fragment@21 {
23289 + target = <&i2c1>;
23290 + __dormant__ {
23291 + #address-cells = <1>;
23292 + #size-cells = <0>;
23293 +
23294 + sx1506_1_20: sx150x@20 {
23295 + compatible = "semtech,sx1506q";
23296 + reg = <0x20>;
23297 + gpio-controller;
23298 + #gpio-cells = <2>;
23299 + #interrupt-cells = <2>;
23300 + interrupts = <25 2>; /* 1st word overwritten by sx1506-1-20-int-gpio parameter
23301 + 2nd word is 2 for falling-edge triggered */
23302 + status = "okay";
23303 + };
23304 + };
23305 + };
23306 +
23307 + // Enable a SX1507 on I2C#0 at slave addr 0x3E
23308 + fragment@22 {
23309 + target = <&i2c0>;
23310 + __dormant__ {
23311 + #address-cells = <1>;
23312 + #size-cells = <0>;
23313 +
23314 + sx1507_0_3E: sx150x@3E {
23315 + compatible = "semtech,sx1507q";
23316 + reg = <0x3E>;
23317 + gpio-controller;
23318 + #gpio-cells = <2>;
23319 + #interrupt-cells = <2>;
23320 + interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3E-int-gpio parameter
23321 + 2nd word is 2 for falling-edge triggered */
23322 + status = "okay";
23323 + };
23324 + };
23325 + };
23326 +
23327 + // Enable a SX1507 on I2C#1 at slave addr 0x3E
23328 + fragment@23 {
23329 + target = <&i2c1>;
23330 + __dormant__ {
23331 + #address-cells = <1>;
23332 + #size-cells = <0>;
23333 +
23334 + sx1507_1_3E: sx150x@3E {
23335 + compatible = "semtech,sx1507q";
23336 + reg = <0x3E>;
23337 + gpio-controller;
23338 + #gpio-cells = <2>;
23339 + #interrupt-cells = <2>;
23340 + interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3E-int-gpio parameter
23341 + 2nd word is 2 for falling-edge triggered */
23342 + status = "okay";
23343 + };
23344 + };
23345 + };
23346 +
23347 + // Enable a SX1507 on I2C#0 at slave addr 0x3F
23348 + fragment@24 {
23349 + target = <&i2c0>;
23350 + __dormant__ {
23351 + #address-cells = <1>;
23352 + #size-cells = <0>;
23353 +
23354 + sx1507_0_3F: sx150x@3F {
23355 + compatible = "semtech,sx1507q";
23356 + reg = <0x3F>;
23357 + gpio-controller;
23358 + #gpio-cells = <2>;
23359 + #interrupt-cells = <2>;
23360 + interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3F-int-gpio parameter
23361 + 2nd word is 2 for falling-edge triggered */
23362 + status = "okay";
23363 + };
23364 + };
23365 + };
23366 +
23367 + // Enable a SX1507 on I2C#1 at slave addr 0x3F
23368 + fragment@25 {
23369 + target = <&i2c1>;
23370 + __dormant__ {
23371 + #address-cells = <1>;
23372 + #size-cells = <0>;
23373 +
23374 + sx1507_1_3F: sx150x@3F {
23375 + compatible = "semtech,sx1507q";
23376 + reg = <0x3F>;
23377 + gpio-controller;
23378 + #gpio-cells = <2>;
23379 + #interrupt-cells = <2>;
23380 + interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3F-int-gpio parameter
23381 + 2nd word is 2 for falling-edge triggered */
23382 + status = "okay";
23383 + };
23384 + };
23385 + };
23386 +
23387 + // Enable a SX1507 on I2C#0 at slave addr 0x70
23388 + fragment@26 {
23389 + target = <&i2c0>;
23390 + __dormant__ {
23391 + #address-cells = <1>;
23392 + #size-cells = <0>;
23393 +
23394 + sx1507_0_70: sx150x@70 {
23395 + compatible = "semtech,sx1507q";
23396 + reg = <0x70>;
23397 + gpio-controller;
23398 + #gpio-cells = <2>;
23399 + #interrupt-cells = <2>;
23400 + interrupts = <25 2>; /* 1st word overwritten by sx1507-0-70-int-gpio parameter
23401 + 2nd word is 2 for falling-edge triggered */
23402 + status = "okay";
23403 + };
23404 + };
23405 + };
23406 +
23407 + // Enable a SX1507 on I2C#1 at slave addr 0x70
23408 + fragment@27 {
23409 + target = <&i2c1>;
23410 + __dormant__ {
23411 + #address-cells = <1>;
23412 + #size-cells = <0>;
23413 +
23414 + sx1507_1_70: sx150x@70 {
23415 + compatible = "semtech,sx1507q";
23416 + reg = <0x70>;
23417 + gpio-controller;
23418 + #gpio-cells = <2>;
23419 + #interrupt-cells = <2>;
23420 + interrupts = <25 2>; /* 1st word overwritten by sx1507-1-70-int-gpio parameter
23421 + 2nd word is 2 for falling-edge triggered */
23422 + status = "okay";
23423 + };
23424 + };
23425 + };
23426 +
23427 + // Enable a SX1507 on I2C#0 at slave addr 0x71
23428 + fragment@28 {
23429 + target = <&i2c0>;
23430 + __dormant__ {
23431 + #address-cells = <1>;
23432 + #size-cells = <0>;
23433 +
23434 + sx1507_0_71: sx150x@71 {
23435 + compatible = "semtech,sx1507q";
23436 + reg = <0x71>;
23437 + gpio-controller;
23438 + #gpio-cells = <2>;
23439 + #interrupt-cells = <2>;
23440 + interrupts = <25 2>; /* 1st word overwritten by sx1507-0-71-int-gpio parameter
23441 + 2nd word is 2 for falling-edge triggered */
23442 + status = "okay";
23443 + };
23444 + };
23445 + };
23446 +
23447 + // Enable a SX1507 on I2C#1 at slave addr 0x71
23448 + fragment@29 {
23449 + target = <&i2c1>;
23450 + __dormant__ {
23451 + #address-cells = <1>;
23452 + #size-cells = <0>;
23453 +
23454 + sx1507_1_71: sx150x@71 {
23455 + compatible = "semtech,sx1507q";
23456 + reg = <0x71>;
23457 + gpio-controller;
23458 + #gpio-cells = <2>;
23459 + #interrupt-cells = <2>;
23460 + interrupts = <25 2>; /* 1st word overwritten by sx1507-1-71-int-gpio parameter
23461 + 2nd word is 2 for falling-edge triggered */
23462 + status = "okay";
23463 + };
23464 + };
23465 + };
23466 +
23467 + // Enable a SX1508 on I2C#0 at slave addr 0x20
23468 + fragment@30 {
23469 + target = <&i2c0>;
23470 + __dormant__ {
23471 + #address-cells = <1>;
23472 + #size-cells = <0>;
23473 +
23474 + sx1508_0_20: sx150x@20 {
23475 + compatible = "semtech,sx1508q";
23476 + reg = <0x20>;
23477 + gpio-controller;
23478 + #gpio-cells = <2>;
23479 + #interrupt-cells = <2>;
23480 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-20-int-gpio parameter
23481 + 2nd word is 2 for falling-edge triggered */
23482 + status = "okay";
23483 + };
23484 + };
23485 + };
23486 +
23487 + // Enable a SX1508 on I2C#1 at slave addr 0x20
23488 + fragment@31 {
23489 + target = <&i2c1>;
23490 + __dormant__ {
23491 + #address-cells = <1>;
23492 + #size-cells = <0>;
23493 +
23494 + sx1508_1_20: sx150x@20 {
23495 + compatible = "semtech,sx1508q";
23496 + reg = <0x20>;
23497 + gpio-controller;
23498 + #gpio-cells = <2>;
23499 + #interrupt-cells = <2>;
23500 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-20-int-gpio parameter
23501 + 2nd word is 2 for falling-edge triggered */
23502 + status = "okay";
23503 + };
23504 + };
23505 + };
23506 +
23507 + // Enable a SX1508 on I2C#0 at slave addr 0x21
23508 + fragment@32 {
23509 + target = <&i2c0>;
23510 + __dormant__ {
23511 + #address-cells = <1>;
23512 + #size-cells = <0>;
23513 +
23514 + sx1508_0_21: sx150x@21 {
23515 + compatible = "semtech,sx1508q";
23516 + reg = <0x21>;
23517 + gpio-controller;
23518 + #gpio-cells = <2>;
23519 + #interrupt-cells = <2>;
23520 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-21-int-gpio parameter
23521 + 2nd word is 2 for falling-edge triggered */
23522 + status = "okay";
23523 + };
23524 + };
23525 + };
23526 +
23527 + // Enable a SX1508 on I2C#1 at slave addr 0x21
23528 + fragment@33 {
23529 + target = <&i2c1>;
23530 + __dormant__ {
23531 + #address-cells = <1>;
23532 + #size-cells = <0>;
23533 +
23534 + sx1508_1_21: sx150x@21 {
23535 + compatible = "semtech,sx1508q";
23536 + reg = <0x21>;
23537 + gpio-controller;
23538 + #gpio-cells = <2>;
23539 + #interrupt-cells = <2>;
23540 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-21-int-gpio parameter
23541 + 2nd word is 2 for falling-edge triggered */
23542 + status = "okay";
23543 + };
23544 + };
23545 + };
23546 +
23547 + // Enable a SX1508 on I2C#0 at slave addr 0x22
23548 + fragment@34 {
23549 + target = <&i2c0>;
23550 + __dormant__ {
23551 + #address-cells = <1>;
23552 + #size-cells = <0>;
23553 +
23554 + sx1508_0_22: sx150x@22 {
23555 + compatible = "semtech,sx1508q";
23556 + reg = <0x22>;
23557 + gpio-controller;
23558 + #gpio-cells = <2>;
23559 + #interrupt-cells = <2>;
23560 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-22-int-gpio parameter
23561 + 2nd word is 2 for falling-edge triggered */
23562 + status = "okay";
23563 + };
23564 + };
23565 + };
23566 +
23567 + // Enable a SX1508 on I2C#1 at slave addr 0x22
23568 + fragment@35 {
23569 + target = <&i2c1>;
23570 + __dormant__ {
23571 + #address-cells = <1>;
23572 + #size-cells = <0>;
23573 +
23574 + sx1508_1_22: sx150x@22 {
23575 + compatible = "semtech,sx1508q";
23576 + reg = <0x22>;
23577 + gpio-controller;
23578 + #gpio-cells = <2>;
23579 + #interrupt-cells = <2>;
23580 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-22-int-gpio parameter
23581 + 2nd word is 2 for falling-edge triggered */
23582 + status = "okay";
23583 + };
23584 + };
23585 + };
23586 +
23587 + // Enable a SX1508 on I2C#0 at slave addr 0x23
23588 + fragment@36 {
23589 + target = <&i2c0>;
23590 + __dormant__ {
23591 + #address-cells = <1>;
23592 + #size-cells = <0>;
23593 +
23594 + sx1508_0_23: sx150x@23 {
23595 + compatible = "semtech,sx1508q";
23596 + reg = <0x23>;
23597 + gpio-controller;
23598 + #gpio-cells = <2>;
23599 + #interrupt-cells = <2>;
23600 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-23-int-gpio parameter
23601 + 2nd word is 2 for falling-edge triggered */
23602 + status = "okay";
23603 + };
23604 + };
23605 + };
23606 +
23607 + // Enable a SX1508 on I2C#1 at slave addr 0x23
23608 + fragment@37 {
23609 + target = <&i2c1>;
23610 + __dormant__ {
23611 + #address-cells = <1>;
23612 + #size-cells = <0>;
23613 +
23614 + sx1508_1_23: sx150x@23 {
23615 + compatible = "semtech,sx1508q";
23616 + reg = <0x23>;
23617 + gpio-controller;
23618 + #gpio-cells = <2>;
23619 + #interrupt-cells = <2>;
23620 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-23-int-gpio parameter
23621 + 2nd word is 2 for falling-edge triggered */
23622 + status = "okay";
23623 + };
23624 + };
23625 + };
23626 +
23627 + // Enable a SX1509 on I2C#0 at slave addr 0x3E
23628 + fragment@38 {
23629 + target = <&i2c0>;
23630 + __dormant__ {
23631 + #address-cells = <1>;
23632 + #size-cells = <0>;
23633 +
23634 + sx1509_0_3E: sx150x@3E {
23635 + compatible = "semtech,sx1509q";
23636 + reg = <0x3E>;
23637 + gpio-controller;
23638 + #gpio-cells = <2>;
23639 + #interrupt-cells = <2>;
23640 + interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3E-int-gpio parameter
23641 + 2nd word is 2 for falling-edge triggered */
23642 + status = "okay";
23643 + };
23644 + };
23645 + };
23646 +
23647 + // Enable a SX1509 on I2C#1 at slave addr 0x3E
23648 + fragment@39 {
23649 + target = <&i2c1>;
23650 + __dormant__ {
23651 + #address-cells = <1>;
23652 + #size-cells = <0>;
23653 +
23654 + sx1509_1_3E: sx150x@3E {
23655 + compatible = "semtech,sx1509q";
23656 + reg = <0x3E>;
23657 + gpio-controller;
23658 + #gpio-cells = <2>;
23659 + #interrupt-cells = <2>;
23660 + interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3E-int-gpio parameter
23661 + 2nd word is 2 for falling-edge triggered */
23662 + status = "okay";
23663 + };
23664 + };
23665 + };
23666 +
23667 + // Enable a SX1509 on I2C#0 at slave addr 0x3F
23668 + fragment@40 {
23669 + target = <&i2c0>;
23670 + __dormant__ {
23671 + #address-cells = <1>;
23672 + #size-cells = <0>;
23673 +
23674 + sx1509_0_3F: sx150x@3F {
23675 + compatible = "semtech,sx1509q";
23676 + reg = <0x3F>;
23677 + gpio-controller;
23678 + #gpio-cells = <2>;
23679 + #interrupt-cells = <2>;
23680 + interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3F-int-gpio parameter
23681 + 2nd word is 2 for falling-edge triggered */
23682 + status = "okay";
23683 + };
23684 + };
23685 + };
23686 +
23687 + // Enable a SX1509 on I2C#1 at slave addr 0x3F
23688 + fragment@41 {
23689 + target = <&i2c1>;
23690 + __dormant__ {
23691 + #address-cells = <1>;
23692 + #size-cells = <0>;
23693 +
23694 + sx1509_1_3F: sx150x@3F {
23695 + compatible = "semtech,sx1509q";
23696 + reg = <0x3F>;
23697 + gpio-controller;
23698 + #gpio-cells = <2>;
23699 + #interrupt-cells = <2>;
23700 + interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3F-int-gpio parameter
23701 + 2nd word is 2 for falling-edge triggered */
23702 + status = "okay";
23703 + };
23704 + };
23705 + };
23706 +
23707 + // Enable a SX1509 on I2C#0 at slave addr 0x70
23708 + fragment@42 {
23709 + target = <&i2c0>;
23710 + __dormant__ {
23711 + #address-cells = <1>;
23712 + #size-cells = <0>;
23713 +
23714 + sx1509_0_70: sx150x@70 {
23715 + compatible = "semtech,sx1509q";
23716 + reg = <0x70>;
23717 + gpio-controller;
23718 + #gpio-cells = <2>;
23719 + #interrupt-cells = <2>;
23720 + interrupts = <25 2>; /* 1st word overwritten by sx1509-0-70-int-gpio parameter
23721 + 2nd word is 2 for falling-edge triggered */
23722 + status = "okay";
23723 + };
23724 + };
23725 + };
23726 +
23727 + // Enable a SX1509 on I2C#1 at slave addr 0x70
23728 + fragment@43 {
23729 + target = <&i2c1>;
23730 + __dormant__ {
23731 + #address-cells = <1>;
23732 + #size-cells = <0>;
23733 +
23734 + sx1509_1_70: sx150x@70 {
23735 + compatible = "semtech,sx1509q";
23736 + reg = <0x70>;
23737 + gpio-controller;
23738 + #gpio-cells = <2>;
23739 + #interrupt-cells = <2>;
23740 + interrupts = <25 2>; /* 1st word overwritten by sx1509-1-70-int-gpio parameter
23741 + 2nd word is 2 for falling-edge triggered */
23742 + status = "okay";
23743 + };
23744 + };
23745 + };
23746 +
23747 + // Enable a SX1509 on I2C#0 at slave addr 0x71
23748 + fragment@44 {
23749 + target = <&i2c0>;
23750 + __dormant__ {
23751 + #address-cells = <1>;
23752 + #size-cells = <0>;
23753 +
23754 + sx1509_0_71: sx150x@71 {
23755 + compatible = "semtech,sx1509q";
23756 + reg = <0x71>;
23757 + gpio-controller;
23758 + #gpio-cells = <2>;
23759 + #interrupt-cells = <2>;
23760 + interrupts = <25 2>; /* 1st word overwritten by sx1509-0-71-int-gpio parameter
23761 + 2nd word is 2 for falling-edge triggered */
23762 + status = "okay";
23763 + };
23764 + };
23765 + };
23766 +
23767 + // Enable a SX1509 on I2C#1 at slave addr 0x71
23768 + fragment@45 {
23769 + target = <&i2c1>;
23770 + __dormant__ {
23771 + #address-cells = <1>;
23772 + #size-cells = <0>;
23773 +
23774 + sx1509_1_71: sx150x@71 {
23775 + compatible = "semtech,sx1509q";
23776 + reg = <0x71>;
23777 + gpio-controller;
23778 + #gpio-cells = <2>;
23779 + #interrupt-cells = <2>;
23780 + interrupts = <25 2>; /* 1st word overwritten by sx1509-1-71-int-gpio parameter
23781 + 2nd word is 2 for falling-edge triggered */
23782 + status = "okay";
23783 + };
23784 + };
23785 + };
23786 +
23787 + // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x20
23788 + fragment@46 {
23789 + target = <&sx1501_0_20>;
23790 + __dormant__ {
23791 + interrupt-parent = <&gpio>;
23792 + interrupt-controller;
23793 + pinctrl-names = "default";
23794 + pinctrl-0 = <&sx150x_0_20_pins>;
23795 + };
23796 + };
23797 +
23798 + // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x20
23799 + fragment@47 {
23800 + target = <&sx1501_1_20>;
23801 + __dormant__ {
23802 + interrupt-parent = <&gpio>;
23803 + interrupt-controller;
23804 + pinctrl-names = "default";
23805 + pinctrl-0 = <&sx150x_1_20_pins>;
23806 + };
23807 + };
23808 +
23809 + // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x21
23810 + fragment@48 {
23811 + target = <&sx1501_0_21>;
23812 + __dormant__ {
23813 + interrupt-parent = <&gpio>;
23814 + interrupt-controller;
23815 + pinctrl-names = "default";
23816 + pinctrl-0 = <&sx150x_0_21_pins>;
23817 + };
23818 + };
23819 +
23820 + // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x21
23821 + fragment@49 {
23822 + target = <&sx1501_1_21>;
23823 + __dormant__ {
23824 + interrupt-parent = <&gpio>;
23825 + interrupt-controller;
23826 + pinctrl-names = "default";
23827 + pinctrl-0 = <&sx150x_1_21_pins>;
23828 + };
23829 + };
23830 +
23831 + // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x20
23832 + fragment@50 {
23833 + target = <&sx1502_0_20>;
23834 + __dormant__ {
23835 + interrupt-parent = <&gpio>;
23836 + interrupt-controller;
23837 + pinctrl-names = "default";
23838 + pinctrl-0 = <&sx150x_0_20_pins>;
23839 + };
23840 + };
23841 +
23842 + // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x20
23843 + fragment@51 {
23844 + target = <&sx1502_1_20>;
23845 + __dormant__ {
23846 + interrupt-parent = <&gpio>;
23847 + interrupt-controller;
23848 + pinctrl-names = "default";
23849 + pinctrl-0 = <&sx150x_1_20_pins>;
23850 + };
23851 + };
23852 +
23853 + // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x21
23854 + fragment@52 {
23855 + target = <&sx1502_0_21>;
23856 + __dormant__ {
23857 + interrupt-parent = <&gpio>;
23858 + interrupt-controller;
23859 + pinctrl-names = "default";
23860 + pinctrl-0 = <&sx150x_0_21_pins>;
23861 + };
23862 + };
23863 +
23864 + // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x21
23865 + fragment@53 {
23866 + target = <&sx1502_1_21>;
23867 + __dormant__ {
23868 + interrupt-parent = <&gpio>;
23869 + interrupt-controller;
23870 + pinctrl-names = "default";
23871 + pinctrl-0 = <&sx150x_1_21_pins>;
23872 + };
23873 + };
23874 +
23875 + // Enable interrupts for a SX1503 on I2C#0 at slave addr 0x20
23876 + fragment@54 {
23877 + target = <&sx1503_0_20>;
23878 + __dormant__ {
23879 + interrupt-parent = <&gpio>;
23880 + interrupt-controller;
23881 + pinctrl-names = "default";
23882 + pinctrl-0 = <&sx150x_0_20_pins>;
23883 + };
23884 + };
23885 +
23886 + // Enable interrupts for a SX1503 on I2C#1 at slave addr 0x20
23887 + fragment@55 {
23888 + target = <&sx1503_1_20>;
23889 + __dormant__ {
23890 + interrupt-parent = <&gpio>;
23891 + interrupt-controller;
23892 + pinctrl-names = "default";
23893 + pinctrl-0 = <&sx150x_1_20_pins>;
23894 + };
23895 + };
23896 +
23897 + // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x20
23898 + fragment@56 {
23899 + target = <&sx1504_0_20>;
23900 + __dormant__ {
23901 + interrupt-parent = <&gpio>;
23902 + interrupt-controller;
23903 + pinctrl-names = "default";
23904 + pinctrl-0 = <&sx150x_0_20_pins>;
23905 + };
23906 + };
23907 +
23908 + // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x20
23909 + fragment@57 {
23910 + target = <&sx1504_1_20>;
23911 + __dormant__ {
23912 + interrupt-parent = <&gpio>;
23913 + interrupt-controller;
23914 + pinctrl-names = "default";
23915 + pinctrl-0 = <&sx150x_1_20_pins>;
23916 + };
23917 + };
23918 +
23919 + // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x21
23920 + fragment@58 {
23921 + target = <&sx1504_0_21>;
23922 + __dormant__ {
23923 + interrupt-parent = <&gpio>;
23924 + interrupt-controller;
23925 + pinctrl-names = "default";
23926 + pinctrl-0 = <&sx150x_0_21_pins>;
23927 + };
23928 + };
23929 +
23930 + // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x21
23931 + fragment@59 {
23932 + target = <&sx1504_1_21>;
23933 + __dormant__ {
23934 + interrupt-parent = <&gpio>;
23935 + interrupt-controller;
23936 + pinctrl-names = "default";
23937 + pinctrl-0 = <&sx150x_1_21_pins>;
23938 + };
23939 + };
23940 +
23941 + // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x20
23942 + fragment@60 {
23943 + target = <&sx1505_0_20>;
23944 + __dormant__ {
23945 + interrupt-parent = <&gpio>;
23946 + interrupt-controller;
23947 + pinctrl-names = "default";
23948 + pinctrl-0 = <&sx150x_0_20_pins>;
23949 + };
23950 + };
23951 +
23952 + // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x20
23953 + fragment@61 {
23954 + target = <&sx1505_1_20>;
23955 + __dormant__ {
23956 + interrupt-parent = <&gpio>;
23957 + interrupt-controller;
23958 + pinctrl-names = "default";
23959 + pinctrl-0 = <&sx150x_1_20_pins>;
23960 + };
23961 + };
23962 +
23963 + // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x21
23964 + fragment@62 {
23965 + target = <&sx1505_0_21>;
23966 + __dormant__ {
23967 + interrupt-parent = <&gpio>;
23968 + interrupt-controller;
23969 + pinctrl-names = "default";
23970 + pinctrl-0 = <&sx150x_0_21_pins>;
23971 + };
23972 + };
23973 +
23974 + // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x21
23975 + fragment@63 {
23976 + target = <&sx1505_1_21>;
23977 + __dormant__ {
23978 + interrupt-parent = <&gpio>;
23979 + interrupt-controller;
23980 + pinctrl-names = "default";
23981 + pinctrl-0 = <&sx150x_1_21_pins>;
23982 + };
23983 + };
23984 +
23985 + // Enable interrupts for a SX1506 on I2C#0 at slave addr 0x20
23986 + fragment@64 {
23987 + target = <&sx1506_0_20>;
23988 + __dormant__ {
23989 + interrupt-parent = <&gpio>;
23990 + interrupt-controller;
23991 + pinctrl-names = "default";
23992 + pinctrl-0 = <&sx150x_0_20_pins>;
23993 + };
23994 + };
23995 +
23996 + // Enable interrupts for a SX1506 on I2C#1 at slave addr 0x20
23997 + fragment@65 {
23998 + target = <&sx1506_1_20>;
23999 + __dormant__ {
24000 + interrupt-parent = <&gpio>;
24001 + interrupt-controller;
24002 + pinctrl-names = "default";
24003 + pinctrl-0 = <&sx150x_1_20_pins>;
24004 + };
24005 + };
24006 +
24007 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3E
24008 + fragment@66 {
24009 + target = <&sx1507_0_3E>;
24010 + __dormant__ {
24011 + interrupt-parent = <&gpio>;
24012 + interrupt-controller;
24013 + pinctrl-names = "default";
24014 + pinctrl-0 = <&sx150x_0_3E_pins>;
24015 + };
24016 + };
24017 +
24018 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3E
24019 + fragment@67 {
24020 + target = <&sx1507_1_3E>;
24021 + __dormant__ {
24022 + interrupt-parent = <&gpio>;
24023 + interrupt-controller;
24024 + pinctrl-names = "default";
24025 + pinctrl-0 = <&sx150x_1_3E_pins>;
24026 + };
24027 + };
24028 +
24029 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3F
24030 + fragment@68 {
24031 + target = <&sx1507_0_3F>;
24032 + __dormant__ {
24033 + interrupt-parent = <&gpio>;
24034 + interrupt-controller;
24035 + pinctrl-names = "default";
24036 + pinctrl-0 = <&sx150x_0_3F_pins>;
24037 + };
24038 + };
24039 +
24040 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3F
24041 + fragment@69 {
24042 + target = <&sx1507_1_3F>;
24043 + __dormant__ {
24044 + interrupt-parent = <&gpio>;
24045 + interrupt-controller;
24046 + pinctrl-names = "default";
24047 + pinctrl-0 = <&sx150x_1_3F_pins>;
24048 + };
24049 + };
24050 +
24051 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x70
24052 + fragment@70 {
24053 + target = <&sx1507_0_70>;
24054 + __dormant__ {
24055 + interrupt-parent = <&gpio>;
24056 + interrupt-controller;
24057 + pinctrl-names = "default";
24058 + pinctrl-0 = <&sx150x_1_70_pins>;
24059 + };
24060 + };
24061 +
24062 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x70
24063 + fragment@71 {
24064 + target = <&sx1507_1_70>;
24065 + __dormant__ {
24066 + interrupt-parent = <&gpio>;
24067 + interrupt-controller;
24068 + pinctrl-names = "default";
24069 + pinctrl-0 = <&sx150x_1_70_pins>;
24070 + };
24071 + };
24072 +
24073 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x71
24074 + fragment@72 {
24075 + target = <&sx1507_0_71>;
24076 + __dormant__ {
24077 + interrupt-parent = <&gpio>;
24078 + interrupt-controller;
24079 + pinctrl-names = "default";
24080 + pinctrl-0 = <&sx150x_0_71_pins>;
24081 + };
24082 + };
24083 +
24084 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x71
24085 + fragment@73 {
24086 + target = <&sx1507_1_71>;
24087 + __dormant__ {
24088 + interrupt-parent = <&gpio>;
24089 + interrupt-controller;
24090 + pinctrl-names = "default";
24091 + pinctrl-0 = <&sx150x_1_71_pins>;
24092 + };
24093 + };
24094 +
24095 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x20
24096 + fragment@74 {
24097 + target = <&sx1508_0_20>;
24098 + __dormant__ {
24099 + interrupt-parent = <&gpio>;
24100 + interrupt-controller;
24101 + pinctrl-names = "default";
24102 + pinctrl-0 = <&sx150x_0_20_pins>;
24103 + };
24104 + };
24105 +
24106 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x20
24107 + fragment@75 {
24108 + target = <&sx1508_1_20>;
24109 + __dormant__ {
24110 + interrupt-parent = <&gpio>;
24111 + interrupt-controller;
24112 + pinctrl-names = "default";
24113 + pinctrl-0 = <&sx150x_1_20_pins>;
24114 + };
24115 + };
24116 +
24117 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x21
24118 + fragment@76 {
24119 + target = <&sx1508_0_21>;
24120 + __dormant__ {
24121 + interrupt-parent = <&gpio>;
24122 + interrupt-controller;
24123 + pinctrl-names = "default";
24124 + pinctrl-0 = <&sx150x_0_21_pins>;
24125 + };
24126 + };
24127 +
24128 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x21
24129 + fragment@77 {
24130 + target = <&sx1508_1_21>;
24131 + __dormant__ {
24132 + interrupt-parent = <&gpio>;
24133 + interrupt-controller;
24134 + pinctrl-names = "default";
24135 + pinctrl-0 = <&sx150x_1_21_pins>;
24136 + };
24137 + };
24138 +
24139 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x22
24140 + fragment@78 {
24141 + target = <&sx1508_0_22>;
24142 + __dormant__ {
24143 + interrupt-parent = <&gpio>;
24144 + interrupt-controller;
24145 + pinctrl-names = "default";
24146 + pinctrl-0 = <&sx150x_0_22_pins>;
24147 + };
24148 + };
24149 +
24150 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x22
24151 + fragment@79 {
24152 + target = <&sx1508_1_22>;
24153 + __dormant__ {
24154 + interrupt-parent = <&gpio>;
24155 + interrupt-controller;
24156 + pinctrl-names = "default";
24157 + pinctrl-0 = <&sx150x_1_22_pins>;
24158 + };
24159 + };
24160 +
24161 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x23
24162 + fragment@80 {
24163 + target = <&sx1508_0_23>;
24164 + __dormant__ {
24165 + interrupt-parent = <&gpio>;
24166 + interrupt-controller;
24167 + pinctrl-names = "default";
24168 + pinctrl-0 = <&sx150x_0_23_pins>;
24169 + };
24170 + };
24171 +
24172 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x23
24173 + fragment@81 {
24174 + target = <&sx1508_1_23>;
24175 + __dormant__ {
24176 + interrupt-parent = <&gpio>;
24177 + interrupt-controller;
24178 + pinctrl-names = "default";
24179 + pinctrl-0 = <&sx150x_1_23_pins>;
24180 + };
24181 + };
24182 +
24183 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3E
24184 + fragment@82 {
24185 + target = <&sx1509_0_3E>;
24186 + __dormant__ {
24187 + interrupt-parent = <&gpio>;
24188 + interrupt-controller;
24189 + pinctrl-names = "default";
24190 + pinctrl-0 = <&sx150x_0_3E_pins>;
24191 + };
24192 + };
24193 +
24194 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3E
24195 + fragment@83 {
24196 + target = <&sx1509_1_3E>;
24197 + __dormant__ {
24198 + interrupt-parent = <&gpio>;
24199 + interrupt-controller;
24200 + pinctrl-names = "default";
24201 + pinctrl-0 = <&sx150x_1_3E_pins>;
24202 + };
24203 + };
24204 +
24205 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3F
24206 + fragment@84 {
24207 + target = <&sx1509_0_3F>;
24208 + __dormant__ {
24209 + interrupt-parent = <&gpio>;
24210 + interrupt-controller;
24211 + pinctrl-names = "default";
24212 + pinctrl-0 = <&sx150x_0_3F_pins>;
24213 + };
24214 + };
24215 +
24216 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3F
24217 + fragment@85 {
24218 + target = <&sx1509_1_3F>;
24219 + __dormant__ {
24220 + interrupt-parent = <&gpio>;
24221 + interrupt-controller;
24222 + pinctrl-names = "default";
24223 + pinctrl-0 = <&sx150x_1_3F_pins>;
24224 + };
24225 + };
24226 +
24227 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x70
24228 + fragment@86 {
24229 + target = <&sx1509_0_70>;
24230 + __dormant__ {
24231 + interrupt-parent = <&gpio>;
24232 + interrupt-controller;
24233 + pinctrl-names = "default";
24234 + pinctrl-0 = <&sx150x_0_70_pins>;
24235 + };
24236 + };
24237 +
24238 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x70
24239 + fragment@87 {
24240 + target = <&sx1509_1_70>;
24241 + __dormant__ {
24242 + interrupt-parent = <&gpio>;
24243 + interrupt-controller;
24244 + pinctrl-names = "default";
24245 + pinctrl-0 = <&sx150x_1_70_pins>;
24246 + };
24247 + };
24248 +
24249 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x71
24250 + fragment@88 {
24251 + target = <&sx1509_0_71>;
24252 + __dormant__ {
24253 + interrupt-parent = <&gpio>;
24254 + interrupt-controller;
24255 + pinctrl-names = "default";
24256 + pinctrl-0 = <&sx150x_0_71_pins>;
24257 + };
24258 + };
24259 +
24260 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x71
24261 + fragment@89 {
24262 + target = <&sx1509_1_71>;
24263 + __dormant__ {
24264 + interrupt-parent = <&gpio>;
24265 + interrupt-controller;
24266 + pinctrl-names = "default";
24267 + pinctrl-0 = <&sx150x_1_71_pins>;
24268 + };
24269 + };
24270 +
24271 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x20
24272 + // Configure as a input with no pull-up/down
24273 + fragment@90 {
24274 + target = <&gpio>;
24275 + __dormant__ {
24276 + sx150x_0_20_pins: sx150x_0_20_pins {
24277 + brcm,pins = <0>; /* overwritten by sx150x-0-20-int-gpio parameter */
24278 + brcm,function = <0>;
24279 + brcm,pull = <0>;
24280 + };
24281 + };
24282 + };
24283 +
24284 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x20
24285 + // Configure as a input with no pull-up/down
24286 + fragment@91 {
24287 + target = <&gpio>;
24288 + __dormant__ {
24289 + sx150x_1_20_pins: sx150x_1_20_pins {
24290 + brcm,pins = <0>; /* overwritten by sx150x-1-20-int-gpio parameter */
24291 + brcm,function = <0>;
24292 + brcm,pull = <0>;
24293 + };
24294 + };
24295 + };
24296 +
24297 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x21
24298 + // Configure as a input with no pull-up/down
24299 + fragment@92 {
24300 + target = <&gpio>;
24301 + __dormant__ {
24302 + sx150x_0_21_pins: sx150x_0_21_pins {
24303 + brcm,pins = <0>; /* overwritten by sx150x-0-21-int-gpio parameter */
24304 + brcm,function = <0>;
24305 + brcm,pull = <0>;
24306 + };
24307 + };
24308 + };
24309 +
24310 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x21
24311 + // Configure as a input with no pull-up/down
24312 + fragment@93 {
24313 + target = <&gpio>;
24314 + __dormant__ {
24315 + sx150x_1_21_pins: sx150x_1_21_pins {
24316 + brcm,pins = <0>; /* overwritten by sx150x-1-21-int-gpio parameter */
24317 + brcm,function = <0>;
24318 + brcm,pull = <0>;
24319 + };
24320 + };
24321 + };
24322 +
24323 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x22
24324 + // Configure as a input with no pull-up/down
24325 + fragment@94 {
24326 + target = <&gpio>;
24327 + __dormant__ {
24328 + sx150x_0_22_pins: sx150x_0_22_pins {
24329 + brcm,pins = <0>; /* overwritten by sx150x-0-22-int-gpio parameter */
24330 + brcm,function = <0>;
24331 + brcm,pull = <0>;
24332 + };
24333 + };
24334 + };
24335 +
24336 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x22
24337 + // Configure as a input with no pull-up/down
24338 + fragment@95 {
24339 + target = <&gpio>;
24340 + __dormant__ {
24341 + sx150x_1_22_pins: sx150x_1_22_pins {
24342 + brcm,pins = <0>; /* overwritten by sx150x-1-22-int-gpio parameter */
24343 + brcm,function = <0>;
24344 + brcm,pull = <0>;
24345 + };
24346 + };
24347 + };
24348 +
24349 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x23
24350 + // Configure as a input with no pull-up/down
24351 + fragment@96 {
24352 + target = <&gpio>;
24353 + __dormant__ {
24354 + sx150x_0_23_pins: sx150x_0_23_pins {
24355 + brcm,pins = <0>; /* overwritten by sx150x-0-23-int-gpio parameter */
24356 + brcm,function = <0>;
24357 + brcm,pull = <0>;
24358 + };
24359 + };
24360 + };
24361 +
24362 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x23
24363 + // Configure as a input with no pull-up/down
24364 + fragment@97 {
24365 + target = <&gpio>;
24366 + __dormant__ {
24367 + sx150x_1_23_pins: sx150x_1_23_pins {
24368 + brcm,pins = <0>; /* overwritten by sx150x-1-23-int-gpio parameter */
24369 + brcm,function = <0>;
24370 + brcm,pull = <0>;
24371 + };
24372 + };
24373 + };
24374 +
24375 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3E
24376 + // Configure as a input with no pull-up/down
24377 + fragment@98 {
24378 + target = <&gpio>;
24379 + __dormant__ {
24380 + sx150x_0_3E_pins: sx150x_0_3E_pins {
24381 + brcm,pins = <0>; /* overwritten by sx150x-0-3E-int-gpio parameter */
24382 + brcm,function = <0>;
24383 + brcm,pull = <0>;
24384 + };
24385 + };
24386 + };
24387 +
24388 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3E
24389 + // Configure as a input with no pull-up/down
24390 + fragment@99 {
24391 + target = <&gpio>;
24392 + __dormant__ {
24393 + sx150x_1_3E_pins: sx150x_1_3E_pins {
24394 + brcm,pins = <0>; /* overwritten by sx150x-1-3E-int-gpio parameter */
24395 + brcm,function = <0>;
24396 + brcm,pull = <0>;
24397 + };
24398 + };
24399 + };
24400 +
24401 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3F
24402 + // Configure as a input with no pull-up/down
24403 + fragment@100 {
24404 + target = <&gpio>;
24405 + __dormant__ {
24406 + sx150x_0_3F_pins: sx150x_0_3F_pins {
24407 + brcm,pins = <0>; /* overwritten by sx150x-0-3F-int-gpio parameter */
24408 + brcm,function = <0>;
24409 + brcm,pull = <0>;
24410 + };
24411 + };
24412 + };
24413 +
24414 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3F
24415 + // Configure as a input with no pull-up/down
24416 + fragment@101 {
24417 + target = <&gpio>;
24418 + __dormant__ {
24419 + sx150x_1_3F_pins: sx150x_1_3F_pins {
24420 + brcm,pins = <0>; /* overwritten by sx150x-1-3F-int-gpio parameter */
24421 + brcm,function = <0>;
24422 + brcm,pull = <0>;
24423 + };
24424 + };
24425 + };
24426 +
24427 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x70
24428 + // Configure as a input with no pull-up/down
24429 + fragment@102 {
24430 + target = <&gpio>;
24431 + __dormant__ {
24432 + sx150x_0_70_pins: sx150x_0_70_pins {
24433 + brcm,pins = <0>; /* overwritten by sx150x-0-70-int-gpio parameter */
24434 + brcm,function = <0>;
24435 + brcm,pull = <0>;
24436 + };
24437 + };
24438 + };
24439 +
24440 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x70
24441 + // Configure as a input with no pull-up/down
24442 + fragment@103 {
24443 + target = <&gpio>;
24444 + __dormant__ {
24445 + sx150x_1_70_pins: sx150x_1_70_pins {
24446 + brcm,pins = <0>; /* overwritten by sx150x-1-70-int-gpio parameter */
24447 + brcm,function = <0>;
24448 + brcm,pull = <0>;
24449 + };
24450 + };
24451 + };
24452 +
24453 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x71
24454 + // Configure as a input with no pull-up/down
24455 + fragment@104 {
24456 + target = <&gpio>;
24457 + __dormant__ {
24458 + sx150x_0_71_pins: sx150x_0_71_pins {
24459 + brcm,pins = <0>; /* overwritten by sx150x-0-71-int-gpio parameter */
24460 + brcm,function = <0>;
24461 + brcm,pull = <0>;
24462 + };
24463 + };
24464 + };
24465 +
24466 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x71
24467 + // Configure as a input with no pull-up/down
24468 + fragment@105 {
24469 + target = <&gpio>;
24470 + __dormant__ {
24471 + sx150x_1_71_pins: sx150x_1_71_pins {
24472 + brcm,pins = <0>; /* overwritten by sx150x-1-71-int-gpio parameter */
24473 + brcm,function = <0>;
24474 + brcm,pull = <0>;
24475 + };
24476 + };
24477 + };
24478 +
24479 + __overrides__ {
24480 + sx1501-0-20 = <0>,"+0+2";
24481 + sx1501-1-20 = <0>,"+1+3";
24482 + sx1501-0-21 = <0>,"+0+4";
24483 + sx1501-1-21 = <0>,"+1+5";
24484 + sx1502-0-20 = <0>,"+0+6";
24485 + sx1502-1-20 = <0>,"+1+7";
24486 + sx1502-0-21 = <0>,"+0+8";
24487 + sx1502-1-21 = <0>,"+1+9";
24488 + sx1503-0-20 = <0>,"+0+10";
24489 + sx1503-1-20 = <0>,"+1+11";
24490 + sx1504-0-20 = <0>,"+0+12";
24491 + sx1504-1-20 = <0>,"+1+13";
24492 + sx1504-0-21 = <0>,"+0+14";
24493 + sx1504-1-21 = <0>,"+1+15";
24494 + sx1505-0-20 = <0>,"+0+16";
24495 + sx1505-1-20 = <0>,"+1+17";
24496 + sx1505-0-21 = <0>,"+0+18";
24497 + sx1505-1-21 = <0>,"+1+19";
24498 + sx1506-0-20 = <0>,"+0+20";
24499 + sx1506-1-20 = <0>,"+1+21";
24500 + sx1507-0-3E = <0>,"+0+22";
24501 + sx1507-1-3E = <0>,"+1+23";
24502 + sx1507-0-3F = <0>,"+0+24";
24503 + sx1507-1-3F = <0>,"+1+25";
24504 + sx1507-0-70 = <0>,"+0+26";
24505 + sx1507-1-70 = <0>,"+1+27";
24506 + sx1507-0-71 = <0>,"+0+28";
24507 + sx1507-1-71 = <0>,"+1+29";
24508 + sx1508-0-20 = <0>,"+0+30";
24509 + sx1508-1-20 = <0>,"+1+31";
24510 + sx1508-0-21 = <0>,"+0+32";
24511 + sx1508-1-21 = <0>,"+1+33";
24512 + sx1508-0-22 = <0>,"+0+34";
24513 + sx1508-1-22 = <0>,"+1+35";
24514 + sx1508-0-23 = <0>,"+0+36";
24515 + sx1508-1-23 = <0>,"+1+37";
24516 + sx1509-0-3E = <0>,"+0+38";
24517 + sx1509-1-3E = <0>,"+1+39";
24518 + sx1509-0-3F = <0>,"+0+40";
24519 + sx1509-1-3F = <0>,"+1+41";
24520 + sx1509-0-70 = <0>,"+0+42";
24521 + sx1509-1-70 = <0>,"+1+43";
24522 + sx1509-0-71 = <0>,"+0+44";
24523 + sx1509-1-71 = <0>,"+1+45";
24524 + sx1501-0-20-int-gpio = <0>,"+46+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1501_0_20>,"interrupts:0";
24525 + sx1501-1-20-int-gpio = <0>,"+47+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1501_1_20>,"interrupts:0";
24526 + sx1501-0-21-int-gpio = <0>,"+48+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1501_0_21>,"interrupts:0";
24527 + sx1501-1-21-int-gpio = <0>,"+49+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1501_1_21>,"interrupts:0";
24528 + sx1502-0-20-int-gpio = <0>,"+50+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1502_0_20>,"interrupts:0";
24529 + sx1502-1-20-int-gpio = <0>,"+51+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1502_1_20>,"interrupts:0";
24530 + sx1502-0-21-int-gpio = <0>,"+52+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1502_0_21>,"interrupts:0";
24531 + sx1502-1-21-int-gpio = <0>,"+53+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1502_1_21>,"interrupts:0";
24532 + sx1503-0-20-int-gpio = <0>,"+54+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1503_0_20>,"interrupts:0";
24533 + sx1503-1-20-int-gpio = <0>,"+55+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1503_1_20>,"interrupts:0";
24534 + sx1504-0-20-int-gpio = <0>,"+56+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1504_0_20>,"interrupts:0";
24535 + sx1504-1-20-int-gpio = <0>,"+57+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1504_1_20>,"interrupts:0";
24536 + sx1504-0-21-int-gpio = <0>,"+58+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1504_0_21>,"interrupts:0";
24537 + sx1504-1-21-int-gpio = <0>,"+59+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1504_1_21>,"interrupts:0";
24538 + sx1505-0-20-int-gpio = <0>,"+60+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1505_0_20>,"interrupts:0";
24539 + sx1505-1-20-int-gpio = <0>,"+61+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1505_1_20>,"interrupts:0";
24540 + sx1505-0-21-int-gpio = <0>,"+62+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1505_0_21>,"interrupts:0";
24541 + sx1505-1-21-int-gpio = <0>,"+63+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1505_1_21>,"interrupts:0";
24542 + sx1506-0-20-int-gpio = <0>,"+64+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1506_0_20>,"interrupts:0";
24543 + sx1506-1-20-int-gpio = <0>,"+65+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1506_1_20>,"interrupts:0";
24544 + sx1507-0-3E-int-gpio = <0>,"+66+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1507_0_3E>,"interrupts:0";
24545 + sx1507-1-3E-int-gpio = <0>,"+67+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1507_1_3E>,"interrupts:0";
24546 + sx1507-0-3F-int-gpio = <0>,"+68+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1507_0_3F>,"interrupts:0";
24547 + sx1507-1-3F-int-gpio = <0>,"+69+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1507_1_3F>,"interrupts:0";
24548 + sx1507-0-70-int-gpio = <0>,"+60+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1507_0_70>,"interrupts:0";
24549 + sx1507-1-70-int-gpio = <0>,"+71+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1507_1_70>,"interrupts:0";
24550 + sx1507-0-71-int-gpio = <0>,"+72+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1507_0_71>,"interrupts:0";
24551 + sx1507-1-71-int-gpio = <0>,"+73+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1507_1_71>,"interrupts:0";
24552 + sx1508-0-20-int-gpio = <0>,"+74+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1508_0_20>,"interrupts:0";
24553 + sx1508-1-20-int-gpio = <0>,"+75+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1508_1_20>,"interrupts:0";
24554 + sx1508-0-21-int-gpio = <0>,"+76+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1508_0_21>,"interrupts:0";
24555 + sx1508-1-21-int-gpio = <0>,"+77+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1508_1_21>,"interrupts:0";
24556 + sx1508-0-22-int-gpio = <0>,"+78+94", <&sx150x_0_22_pins>,"brcm,pins:0", <&sx1508_0_22>,"interrupts:0";
24557 + sx1508-1-22-int-gpio = <0>,"+79+95", <&sx150x_1_22_pins>,"brcm,pins:0", <&sx1508_1_22>,"interrupts:0";
24558 + sx1508-0-23-int-gpio = <0>,"+80+96", <&sx150x_0_23_pins>,"brcm,pins:0", <&sx1508_0_23>,"interrupts:0";
24559 + sx1508-1-23-int-gpio = <0>,"+81+97", <&sx150x_1_23_pins>,"brcm,pins:0", <&sx1508_1_23>,"interrupts:0";
24560 + sx1509-0-3E-int-gpio = <0>,"+82+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1509_0_3E>,"interrupts:0";
24561 + sx1509-1-3E-int-gpio = <0>,"+83+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1509_1_3E>,"interrupts:0";
24562 + sx1509-0-3F-int-gpio = <0>,"+84+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1509_0_3F>,"interrupts:0";
24563 + sx1509-1-3F-int-gpio = <0>,"+85+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1509_1_3F>,"interrupts:0";
24564 + sx1509-0-70-int-gpio = <0>,"+86+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1509_0_70>,"interrupts:0";
24565 + sx1509-1-70-int-gpio = <0>,"+87+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1509_1_70>,"interrupts:0";
24566 + sx1509-0-71-int-gpio = <0>,"+88+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1509_0_71>,"interrupts:0";
24567 + sx1509-1-71-int-gpio = <0>,"+89+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1509_1_71>,"interrupts:0";
24568 + };
24569 +};
24570 +
24571 diff --git a/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts b/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
24572 new file mode 100644
24573 index 000000000000..047695bb0c71
24574 --- /dev/null
24575 +++ b/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
24576 @@ -0,0 +1,52 @@
24577 +// SPDX-License-Identifier: GPL-2.0-only
24578 +// Definitions to add I2S audio from the Toshiba TC358743 HDMI to CSI2 bridge.
24579 +// Requires tc358743 overlay to have been loaded to actually function.
24580 +/dts-v1/;
24581 +/plugin/;
24582 +
24583 +/ {
24584 + compatible = "brcm,bcm2835";
24585 +
24586 + fragment@0 {
24587 + target = <&i2s>;
24588 + __overlay__ {
24589 + status = "okay";
24590 + };
24591 + };
24592 +
24593 + fragment@1 {
24594 + target-path = "/";
24595 + __overlay__ {
24596 + tc358743_codec: tc358743-codec {
24597 + #sound-dai-cells = <0>;
24598 + compatible = "linux,spdif-dir";
24599 + status = "okay";
24600 + };
24601 + };
24602 + };
24603 +
24604 + fragment@2 {
24605 + target = <&sound>;
24606 + sound_overlay: __overlay__ {
24607 + compatible = "simple-audio-card";
24608 + simple-audio-card,format = "i2s";
24609 + simple-audio-card,name = "tc358743";
24610 + simple-audio-card,bitclock-master = <&dailink0_slave>;
24611 + simple-audio-card,frame-master = <&dailink0_slave>;
24612 + status = "okay";
24613 +
24614 + simple-audio-card,cpu {
24615 + sound-dai = <&i2s>;
24616 + dai-tdm-slot-num = <2>;
24617 + dai-tdm-slot-width = <32>;
24618 + };
24619 + dailink0_slave: simple-audio-card,codec {
24620 + sound-dai = <&tc358743_codec>;
24621 + };
24622 + };
24623 + };
24624 +
24625 + __overrides__ {
24626 + card-name = <&sound_overlay>,"simple-audio-card,name";
24627 + };
24628 +};
24629 diff --git a/arch/arm/boot/dts/overlays/tc358743-overlay.dts b/arch/arm/boot/dts/overlays/tc358743-overlay.dts
24630 new file mode 100644
24631 index 000000000000..a1f8af36d2e7
24632 --- /dev/null
24633 +++ b/arch/arm/boot/dts/overlays/tc358743-overlay.dts
24634 @@ -0,0 +1,107 @@
24635 +// SPDX-License-Identifier: GPL-2.0-only
24636 +// Definitions for Toshiba TC358743 HDMI to CSI2 bridge on VC I2C bus
24637 +/dts-v1/;
24638 +/plugin/;
24639 +
24640 +/{
24641 + compatible = "brcm,bcm2835";
24642 +
24643 + fragment@0 {
24644 + target = <&i2c_csi_dsi>;
24645 + __overlay__ {
24646 + #address-cells = <1>;
24647 + #size-cells = <0>;
24648 + status = "okay";
24649 +
24650 + tc358743@0f {
24651 + compatible = "toshiba,tc358743";
24652 + reg = <0x0f>;
24653 + status = "okay";
24654 +
24655 + clocks = <&tc358743_clk>;
24656 + clock-names = "refclk";
24657 +
24658 + port {
24659 + tc358743: endpoint {
24660 + remote-endpoint = <&csi1_ep>;
24661 + clock-lanes = <0>;
24662 + clock-noncontinuous;
24663 + link-frequencies =
24664 + /bits/ 64 <486000000>;
24665 + };
24666 + };
24667 + };
24668 + };
24669 + };
24670 +
24671 + fragment@1 {
24672 + target = <&csi1>;
24673 + __overlay__ {
24674 + status = "okay";
24675 +
24676 + port {
24677 + csi1_ep: endpoint {
24678 + remote-endpoint = <&tc358743>;
24679 + };
24680 + };
24681 + };
24682 + };
24683 +
24684 + fragment@2 {
24685 + target = <&tc358743>;
24686 + __overlay__ {
24687 + data-lanes = <1 2>;
24688 + };
24689 + };
24690 +
24691 + fragment@3 {
24692 + target = <&tc358743>;
24693 + __dormant__ {
24694 + data-lanes = <1 2 3 4>;
24695 + };
24696 + };
24697 +
24698 + fragment@4 {
24699 + target = <&i2c0if>;
24700 + __overlay__ {
24701 + status = "okay";
24702 + };
24703 + };
24704 +
24705 + fragment@5 {
24706 + target = <&i2c0mux>;
24707 + __overlay__ {
24708 + status = "okay";
24709 + };
24710 + };
24711 +
24712 + fragment@6 {
24713 + target-path = "/";
24714 + __overlay__ {
24715 + tc358743_clk: bridge-clk {
24716 + compatible = "fixed-clock";
24717 + #clock-cells = <0>;
24718 + clock-frequency = <27000000>;
24719 + };
24720 + };
24721 + };
24722 +
24723 + fragment@7 {
24724 + target = <&csi1_ep>;
24725 + __overlay__ {
24726 + data-lanes = <1 2>;
24727 + };
24728 + };
24729 +
24730 + fragment@8 {
24731 + target = <&csi1_ep>;
24732 + __dormant__ {
24733 + data-lanes = <1 2 3 4>;
24734 + };
24735 + };
24736 +
24737 + __overrides__ {
24738 + 4lane = <0>, "-2+3-7+8";
24739 + link-frequency = <&tc358743>,"link-frequencies#0";
24740 + };
24741 +};
24742 diff --git a/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
24743 new file mode 100644
24744 index 000000000000..a102b09e3ab5
24745 --- /dev/null
24746 +++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
24747 @@ -0,0 +1,222 @@
24748 +/*
24749 + * tinylcd35-overlay.dts
24750 + *
24751 + * -------------------------------------------------
24752 + * www.tinlylcd.com
24753 + * -------------------------------------------------
24754 + * Device---Driver-----BUS GPIO's
24755 + * display tinylcd35 spi0.0 25 24 18
24756 + * touch ads7846 spi0.1 5
24757 + * rtc ds1307 i2c1-0068
24758 + * rtc pcf8563 i2c1-0051
24759 + * keypad gpio-keys --------- 17 22 27 23 28
24760 + *
24761 + *
24762 + * TinyLCD.com 3.5 inch TFT
24763 + *
24764 + * Version 001
24765 + * 5/3/2015 -- Noralf Trønnes Initial Device tree framework
24766 + * 10/3/2015 -- tinylcd@gmail.com added ds1307 support.
24767 + *
24768 + */
24769 +
24770 +/dts-v1/;
24771 +/plugin/;
24772 +
24773 +/ {
24774 + compatible = "brcm,bcm2835";
24775 +
24776 + fragment@0 {
24777 + target = <&spi0>;
24778 + __overlay__ {
24779 + status = "okay";
24780 + };
24781 + };
24782 +
24783 + fragment@1 {
24784 + target = <&spidev0>;
24785 + __overlay__ {
24786 + status = "disabled";
24787 + };
24788 + };
24789 +
24790 + fragment@2 {
24791 + target = <&spidev1>;
24792 + __overlay__ {
24793 + status = "disabled";
24794 + };
24795 + };
24796 +
24797 + fragment@3 {
24798 + target = <&gpio>;
24799 + __overlay__ {
24800 + tinylcd35_pins: tinylcd35_pins {
24801 + brcm,pins = <25 24 18>;
24802 + brcm,function = <1>; /* out */
24803 + };
24804 + tinylcd35_ts_pins: tinylcd35_ts_pins {
24805 + brcm,pins = <5>;
24806 + brcm,function = <0>; /* in */
24807 + };
24808 + keypad_pins: keypad_pins {
24809 + brcm,pins = <4 17 22 23 27>;
24810 + brcm,function = <0>; /* in */
24811 + brcm,pull = <1>; /* down */
24812 + };
24813 + };
24814 + };
24815 +
24816 + fragment@4 {
24817 + target = <&spi0>;
24818 + __overlay__ {
24819 + /* needed to avoid dtc warning */
24820 + #address-cells = <1>;
24821 + #size-cells = <0>;
24822 +
24823 + tinylcd35: tinylcd35@0{
24824 + compatible = "neosec,tinylcd";
24825 + reg = <0>;
24826 + pinctrl-names = "default";
24827 + pinctrl-0 = <&tinylcd35_pins>,
24828 + <&tinylcd35_ts_pins>;
24829 +
24830 + spi-max-frequency = <48000000>;
24831 + rotate = <270>;
24832 + fps = <20>;
24833 + bgr;
24834 + buswidth = <8>;
24835 + reset-gpios = <&gpio 25 1>;
24836 + dc-gpios = <&gpio 24 0>;
24837 + led-gpios = <&gpio 18 0>;
24838 + debug = <0>;
24839 +
24840 + init = <0x10000B0 0x80
24841 + 0x10000C0 0x0A 0x0A
24842 + 0x10000C1 0x01 0x01
24843 + 0x10000C2 0x33
24844 + 0x10000C5 0x00 0x42 0x80
24845 + 0x10000B1 0xD0 0x11
24846 + 0x10000B4 0x02
24847 + 0x10000B6 0x00 0x22 0x3B
24848 + 0x10000B7 0x07
24849 + 0x1000036 0x58
24850 + 0x10000F0 0x36 0xA5 0xD3
24851 + 0x10000E5 0x80
24852 + 0x10000E5 0x01
24853 + 0x10000B3 0x00
24854 + 0x10000E5 0x00
24855 + 0x10000F0 0x36 0xA5 0x53
24856 + 0x10000E0 0x00 0x35 0x33 0x00 0x00 0x00 0x00 0x35 0x33 0x00 0x00 0x00
24857 + 0x100003A 0x55
24858 + 0x1000011
24859 + 0x2000001
24860 + 0x1000029>;
24861 + };
24862 +
24863 + tinylcd35_ts: tinylcd35_ts@1 {
24864 + compatible = "ti,ads7846";
24865 + reg = <1>;
24866 + status = "disabled";
24867 +
24868 + spi-max-frequency = <2000000>;
24869 + interrupts = <5 2>; /* high-to-low edge triggered */
24870 + interrupt-parent = <&gpio>;
24871 + pendown-gpio = <&gpio 5 0>;
24872 + ti,x-plate-ohms = /bits/ 16 <100>;
24873 + ti,pressure-max = /bits/ 16 <255>;
24874 + };
24875 + };
24876 + };
24877 +
24878 + /* RTC */
24879 +
24880 + fragment@5 {
24881 + target = <&i2c1>;
24882 + __dormant__ {
24883 + #address-cells = <1>;
24884 + #size-cells = <0>;
24885 +
24886 + status = "okay";
24887 +
24888 + pcf8563: pcf8563@51 {
24889 + compatible = "nxp,pcf8563";
24890 + reg = <0x51>;
24891 + status = "okay";
24892 + };
24893 + };
24894 + };
24895 +
24896 + fragment@6 {
24897 + target = <&i2c1>;
24898 + __dormant__ {
24899 + #address-cells = <1>;
24900 + #size-cells = <0>;
24901 +
24902 + status = "okay";
24903 +
24904 + ds1307: ds1307@68 {
24905 + compatible = "dallas,ds1307";
24906 + reg = <0x68>;
24907 + status = "okay";
24908 + };
24909 + };
24910 + };
24911 +
24912 + /*
24913 + * Values for input event code is found under the
24914 + * 'Keys and buttons' heading in include/uapi/linux/input.h
24915 + */
24916 + fragment@7 {
24917 + target-path = "/soc";
24918 + __overlay__ {
24919 + keypad: keypad {
24920 + compatible = "gpio-keys";
24921 + pinctrl-names = "default";
24922 + pinctrl-0 = <&keypad_pins>;
24923 + status = "disabled";
24924 + autorepeat;
24925 +
24926 + button@17 {
24927 + label = "GPIO KEY_UP";
24928 + linux,code = <103>;
24929 + gpios = <&gpio 17 0>;
24930 + };
24931 + button@22 {
24932 + label = "GPIO KEY_DOWN";
24933 + linux,code = <108>;
24934 + gpios = <&gpio 22 0>;
24935 + };
24936 + button@27 {
24937 + label = "GPIO KEY_LEFT";
24938 + linux,code = <105>;
24939 + gpios = <&gpio 27 0>;
24940 + };
24941 + button@23 {
24942 + label = "GPIO KEY_RIGHT";
24943 + linux,code = <106>;
24944 + gpios = <&gpio 23 0>;
24945 + };
24946 + button@4 {
24947 + label = "GPIO KEY_ENTER";
24948 + linux,code = <28>;
24949 + gpios = <&gpio 4 0>;
24950 + };
24951 + };
24952 + };
24953 + };
24954 +
24955 + __overrides__ {
24956 + speed = <&tinylcd35>,"spi-max-frequency:0";
24957 + rotate = <&tinylcd35>,"rotate:0";
24958 + fps = <&tinylcd35>,"fps:0";
24959 + debug = <&tinylcd35>,"debug:0";
24960 + touch = <&tinylcd35_ts>,"status";
24961 + touchgpio = <&tinylcd35_ts_pins>,"brcm,pins:0",
24962 + <&tinylcd35_ts>,"interrupts:0",
24963 + <&tinylcd35_ts>,"pendown-gpio:4";
24964 + xohms = <&tinylcd35_ts>,"ti,x-plate-ohms;0";
24965 + rtc-pcf = <0>,"=5";
24966 + rtc-ds = <0>,"=6";
24967 + keypad = <&keypad>,"status";
24968 + };
24969 +};
24970 diff --git a/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts b/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts
24971 new file mode 100644
24972 index 000000000000..e69188503ca3
24973 --- /dev/null
24974 +++ b/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts
24975 @@ -0,0 +1,44 @@
24976 +/*
24977 + * Device Tree overlay for the Infineon SLB9670 Trusted Platform Module add-on
24978 + * boards, which can be used as a secure key storage and hwrng.
24979 + * available as "Iridium SLB9670" by Infineon and "LetsTrust TPM" by pi3g.
24980 + */
24981 +
24982 +/dts-v1/;
24983 +/plugin/;
24984 +
24985 +/ {
24986 + compatible = "brcm,bcm2835";
24987 +
24988 + fragment@0 {
24989 + target = <&spi0>;
24990 + __overlay__ {
24991 + status = "okay";
24992 + };
24993 + };
24994 +
24995 + fragment@1 {
24996 + target = <&spidev1>;
24997 + __overlay__ {
24998 + status = "disabled";
24999 + };
25000 + };
25001 +
25002 + fragment@2 {
25003 + target = <&spi0>;
25004 + __overlay__ {
25005 + /* needed to avoid dtc warning */
25006 + #address-cells = <1>;
25007 + #size-cells = <0>;
25008 + slb9670: slb9670@1 {
25009 + compatible = "infineon,slb9670";
25010 + reg = <1>; /* CE1 */
25011 + #address-cells = <1>;
25012 + #size-cells = <0>;
25013 + spi-max-frequency = <32000000>;
25014 + status = "okay";
25015 + };
25016 +
25017 + };
25018 + };
25019 +};
25020 diff --git a/arch/arm/boot/dts/overlays/uart0-overlay.dts b/arch/arm/boot/dts/overlays/uart0-overlay.dts
25021 new file mode 100755
25022 index 000000000000..73d563bbaabf
25023 --- /dev/null
25024 +++ b/arch/arm/boot/dts/overlays/uart0-overlay.dts
25025 @@ -0,0 +1,32 @@
25026 +/dts-v1/;
25027 +/plugin/;
25028 +
25029 +/{
25030 + compatible = "brcm,bcm2835";
25031 +
25032 + fragment@0 {
25033 + target = <&uart0>;
25034 + __overlay__ {
25035 + pinctrl-names = "default";
25036 + pinctrl-0 = <&uart0_pins>;
25037 + status = "okay";
25038 + };
25039 + };
25040 +
25041 + fragment@1 {
25042 + target = <&gpio>;
25043 + __overlay__ {
25044 + uart0_pins: uart0_pins {
25045 + brcm,pins = <14 15>;
25046 + brcm,function = <4>; /* alt0 */
25047 + brcm,pull = <0 2>;
25048 + };
25049 + };
25050 + };
25051 +
25052 + __overrides__ {
25053 + txd0_pin = <&uart0_pins>,"brcm,pins:0";
25054 + rxd0_pin = <&uart0_pins>,"brcm,pins:4";
25055 + pin_func = <&uart0_pins>,"brcm,function:0";
25056 + };
25057 +};
25058 diff --git a/arch/arm/boot/dts/overlays/uart1-overlay.dts b/arch/arm/boot/dts/overlays/uart1-overlay.dts
25059 new file mode 100644
25060 index 000000000000..986d725a2652
25061 --- /dev/null
25062 +++ b/arch/arm/boot/dts/overlays/uart1-overlay.dts
25063 @@ -0,0 +1,38 @@
25064 +/dts-v1/;
25065 +/plugin/;
25066 +
25067 +/{
25068 + compatible = "brcm,bcm2835";
25069 +
25070 + fragment@0 {
25071 + target = <&uart1>;
25072 + __overlay__ {
25073 + pinctrl-names = "default";
25074 + pinctrl-0 = <&uart1_pins>;
25075 + status = "okay";
25076 + };
25077 + };
25078 +
25079 + fragment@1 {
25080 + target = <&gpio>;
25081 + __overlay__ {
25082 + uart1_pins: uart1_pins {
25083 + brcm,pins = <14 15>;
25084 + brcm,function = <2>; /* alt5 */
25085 + brcm,pull = <0 2>;
25086 + };
25087 + };
25088 + };
25089 +
25090 + fragment@2 {
25091 + target-path = "/chosen";
25092 + __overlay__ {
25093 + bootargs = "8250.nr_uarts=1";
25094 + };
25095 + };
25096 +
25097 + __overrides__ {
25098 + txd1_pin = <&uart1_pins>,"brcm,pins:0";
25099 + rxd1_pin = <&uart1_pins>,"brcm,pins:4";
25100 + };
25101 +};
25102 diff --git a/arch/arm/boot/dts/overlays/uart2-overlay.dts b/arch/arm/boot/dts/overlays/uart2-overlay.dts
25103 new file mode 100644
25104 index 000000000000..9face240aca1
25105 --- /dev/null
25106 +++ b/arch/arm/boot/dts/overlays/uart2-overlay.dts
25107 @@ -0,0 +1,27 @@
25108 +/dts-v1/;
25109 +/plugin/;
25110 +
25111 +/{
25112 + compatible = "brcm,bcm2711";
25113 +
25114 + fragment@0 {
25115 + target = <&uart2>;
25116 + __overlay__ {
25117 + pinctrl-names = "default";
25118 + pinctrl-0 = <&uart2_pins>;
25119 + status = "okay";
25120 + };
25121 + };
25122 +
25123 + fragment@1 {
25124 + target = <&uart2_pins>;
25125 + __dormant__ {
25126 + brcm,pins = <0 1 2 3>;
25127 + brcm,pull = <0 2 2 0>;
25128 + };
25129 + };
25130 +
25131 + __overrides__ {
25132 + ctsrts = <0>,"=1";
25133 + };
25134 +};
25135 diff --git a/arch/arm/boot/dts/overlays/uart3-overlay.dts b/arch/arm/boot/dts/overlays/uart3-overlay.dts
25136 new file mode 100644
25137 index 000000000000..ae9f9fe5ea1d
25138 --- /dev/null
25139 +++ b/arch/arm/boot/dts/overlays/uart3-overlay.dts
25140 @@ -0,0 +1,27 @@
25141 +/dts-v1/;
25142 +/plugin/;
25143 +
25144 +/{
25145 + compatible = "brcm,bcm2711";
25146 +
25147 + fragment@0 {
25148 + target = <&uart3>;
25149 + __overlay__ {
25150 + pinctrl-names = "default";
25151 + pinctrl-0 = <&uart3_pins>;
25152 + status = "okay";
25153 + };
25154 + };
25155 +
25156 + fragment@1 {
25157 + target = <&uart3_pins>;
25158 + __dormant__ {
25159 + brcm,pins = <4 5 6 7>;
25160 + brcm,pull = <0 2 2 0>;
25161 + };
25162 + };
25163 +
25164 + __overrides__ {
25165 + ctsrts = <0>,"=1";
25166 + };
25167 +};
25168 diff --git a/arch/arm/boot/dts/overlays/uart4-overlay.dts b/arch/arm/boot/dts/overlays/uart4-overlay.dts
25169 new file mode 100644
25170 index 000000000000..ac004ffbadbf
25171 --- /dev/null
25172 +++ b/arch/arm/boot/dts/overlays/uart4-overlay.dts
25173 @@ -0,0 +1,27 @@
25174 +/dts-v1/;
25175 +/plugin/;
25176 +
25177 +/{
25178 + compatible = "brcm,bcm2711";
25179 +
25180 + fragment@0 {
25181 + target = <&uart4>;
25182 + __overlay__ {
25183 + pinctrl-names = "default";
25184 + pinctrl-0 = <&uart4_pins>;
25185 + status = "okay";
25186 + };
25187 + };
25188 +
25189 + fragment@1 {
25190 + target = <&uart4_pins>;
25191 + __dormant__ {
25192 + brcm,pins = <8 9 10 11>;
25193 + brcm,pull = <0 2 2 0>;
25194 + };
25195 + };
25196 +
25197 + __overrides__ {
25198 + ctsrts = <0>,"=1";
25199 + };
25200 +};
25201 diff --git a/arch/arm/boot/dts/overlays/uart5-overlay.dts b/arch/arm/boot/dts/overlays/uart5-overlay.dts
25202 new file mode 100644
25203 index 000000000000..04eaf376effe
25204 --- /dev/null
25205 +++ b/arch/arm/boot/dts/overlays/uart5-overlay.dts
25206 @@ -0,0 +1,27 @@
25207 +/dts-v1/;
25208 +/plugin/;
25209 +
25210 +/{
25211 + compatible = "brcm,bcm2711";
25212 +
25213 + fragment@0 {
25214 + target = <&uart5>;
25215 + __overlay__ {
25216 + pinctrl-names = "default";
25217 + pinctrl-0 = <&uart5_pins>;
25218 + status = "okay";
25219 + };
25220 + };
25221 +
25222 + fragment@1 {
25223 + target = <&uart5_pins>;
25224 + __dormant__ {
25225 + brcm,pins = <12 13 14 15>;
25226 + brcm,pull = <0 2 2 0>;
25227 + };
25228 + };
25229 +
25230 + __overrides__ {
25231 + ctsrts = <0>,"=1";
25232 + };
25233 +};
25234 diff --git a/arch/arm/boot/dts/overlays/udrc-overlay.dts b/arch/arm/boot/dts/overlays/udrc-overlay.dts
25235 new file mode 100644
25236 index 000000000000..ae7c37996894
25237 --- /dev/null
25238 +++ b/arch/arm/boot/dts/overlays/udrc-overlay.dts
25239 @@ -0,0 +1,128 @@
25240 +#include <dt-bindings/clock/bcm2835.h>
25241 +/*
25242 + * Device tree overlay for the Universal Digital Radio Controller
25243 + */
25244 +
25245 +/dts-v1/;
25246 +/plugin/;
25247 +
25248 +/ {
25249 + compatible = "brcm,bcm2835";
25250 + fragment@0 {
25251 + target = <&i2s>;
25252 + __overlay__ {
25253 + clocks = <&clocks BCM2835_CLOCK_PCM>;
25254 + clock-names = "pcm";
25255 + status = "okay";
25256 + };
25257 + };
25258 +
25259 + fragment@1 {
25260 + target-path = "/";
25261 + __overlay__ {
25262 + regulators {
25263 + compatible = "simple-bus";
25264 + #address-cells = <1>;
25265 + #size-cells = <0>;
25266 +
25267 + udrc0_ldoin: udrc0_ldoin {
25268 + compatible = "regulator-fixed";
25269 + regulator-name = "ldoin";
25270 + regulator-min-microvolt = <3300000>;
25271 + regulator-max-microvolt = <3300000>;
25272 + regulator-always-on;
25273 + };
25274 + };
25275 + };
25276 + };
25277 +
25278 + fragment@2 {
25279 + target = <&i2c1>;
25280 + __overlay__ {
25281 + #address-cells = <1>;
25282 + #size-cells = <0>;
25283 + status = "okay";
25284 + clocks = <&clocks BCM2835_CLOCK_VPU>;
25285 + clock-frequency = <400000>;
25286 +
25287 + tlv320aic32x4: tlv320aic32x4@18 {
25288 + compatible = "ti,tlv320aic32x4";
25289 + #sound-dai-cells = <0>;
25290 + reg = <0x18>;
25291 + status = "okay";
25292 +
25293 + clocks = <&clocks BCM2835_CLOCK_GP0>;
25294 + clock-names = "mclk";
25295 + assigned-clocks = <&clocks BCM2835_CLOCK_GP0>;
25296 + assigned-clock-rates = <25000000>;
25297 +
25298 + pinctrl-names = "default";
25299 + pinctrl-0 = <&gpclk0_pin &aic3204_reset>;
25300 +
25301 + reset-gpios = <&gpio 13 0>;
25302 +
25303 + iov-supply = <&udrc0_ldoin>;
25304 + ldoin-supply = <&udrc0_ldoin>;
25305 + };
25306 + };
25307 + };
25308 +
25309 + fragment@3 {
25310 + target = <&sound>;
25311 + snd: __overlay__ {
25312 + compatible = "simple-audio-card";
25313 + i2s-controller = <&i2s>;
25314 + status = "okay";
25315 +
25316 + simple-audio-card,name = "udrc";
25317 + simple-audio-card,format = "i2s";
25318 +
25319 + simple-audio-card,bitclock-master = <&dailink0_master>;
25320 + simple-audio-card,frame-master = <&dailink0_master>;
25321 +
25322 + simple-audio-card,widgets =
25323 + "Line", "Line In",
25324 + "Line", "Line Out";
25325 +
25326 + simple-audio-card,routing =
25327 + "IN1_R", "Line In",
25328 + "IN1_L", "Line In",
25329 + "CM_L", "Line In",
25330 + "CM_R", "Line In",
25331 + "Line Out", "LOR",
25332 + "Line Out", "LOL";
25333 +
25334 + dailink0_master: simple-audio-card,cpu {
25335 + sound-dai = <&i2s>;
25336 + };
25337 +
25338 + simple-audio-card,codec {
25339 + sound-dai = <&tlv320aic32x4>;
25340 + };
25341 + };
25342 + };
25343 +
25344 + fragment@4 {
25345 + target = <&gpio>;
25346 + __overlay__ {
25347 + gpclk0_pin: gpclk0_pin {
25348 + brcm,pins = <4>;
25349 + brcm,function = <4>;
25350 + };
25351 +
25352 + aic3204_reset: aic3204_reset {
25353 + brcm,pins = <13>;
25354 + brcm,function = <1>;
25355 + brcm,pull = <1>;
25356 + };
25357 +
25358 + aic3204_gpio: aic3204_gpio {
25359 + brcm,pins = <26>;
25360 + };
25361 + };
25362 + };
25363 +
25364 + __overrides__ {
25365 + alsaname = <&snd>, "simple-audio-card,name";
25366 + };
25367 +};
25368 diff --git a/arch/arm/boot/dts/overlays/upstream-overlay.dts b/arch/arm/boot/dts/overlays/upstream-overlay.dts
25369 new file mode 100644
25370 index 000000000000..2e9dcd4f5f0a
25371 --- /dev/null
25372 +++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts
25373 @@ -0,0 +1,113 @@
25374 +// redo: ovmerge -c vc4-kms-v3d-overlay.dts,cma-default dwc2-overlay.dts,dr_mode=otg
25375 +
25376 +/dts-v1/;
25377 +/plugin/;
25378 +
25379 +#include <dt-bindings/clock/bcm2835.h>
25380 +
25381 +/ {
25382 + compatible = "brcm,bcm2835";
25383 + fragment@0 {
25384 + target = <&cma>;
25385 + __dormant__ {
25386 + size = <0x10000000>;
25387 + };
25388 + };
25389 + fragment@1 {
25390 + target = <&i2c2>;
25391 + __overlay__ {
25392 + status = "okay";
25393 + };
25394 + };
25395 + fragment@2 {
25396 + target = <&fb>;
25397 + __overlay__ {
25398 + status = "disabled";
25399 + };
25400 + };
25401 + fragment@3 {
25402 + target = <&pixelvalve0>;
25403 + __overlay__ {
25404 + status = "okay";
25405 + };
25406 + };
25407 + fragment@4 {
25408 + target = <&pixelvalve1>;
25409 + __overlay__ {
25410 + status = "okay";
25411 + };
25412 + };
25413 + fragment@5 {
25414 + target = <&pixelvalve2>;
25415 + __overlay__ {
25416 + status = "okay";
25417 + };
25418 + };
25419 + fragment@6 {
25420 + target = <&hvs>;
25421 + __overlay__ {
25422 + status = "okay";
25423 + };
25424 + };
25425 + fragment@7 {
25426 + target = <&hdmi>;
25427 + __overlay__ {
25428 + status = "okay";
25429 + };
25430 + };
25431 + fragment@8 {
25432 + target = <&v3d>;
25433 + __overlay__ {
25434 + status = "okay";
25435 + };
25436 + };
25437 + fragment@9 {
25438 + target = <&vc4>;
25439 + __overlay__ {
25440 + status = "okay";
25441 + };
25442 + };
25443 + fragment@10 {
25444 + target = <&clocks>;
25445 + __overlay__ {
25446 + claim-clocks = <BCM2835_PLLD_DSI0 BCM2835_PLLD_DSI1 BCM2835_PLLH_AUX BCM2835_PLLH_PIX>;
25447 + };
25448 + };
25449 + fragment@11 {
25450 + target = <&vec>;
25451 + __overlay__ {
25452 + status = "okay";
25453 + };
25454 + };
25455 + fragment@12 {
25456 + target = <&txp>;
25457 + __overlay__ {
25458 + status = "okay";
25459 + };
25460 + };
25461 + fragment@13 {
25462 + target = <&hdmi>;
25463 + __dormant__ {
25464 + dmas;
25465 + };
25466 + };
25467 + fragment@14 {
25468 + target = <&audio>;
25469 + __overlay__ {
25470 + brcm,disable-hdmi;
25471 + };
25472 + };
25473 + fragment@15 {
25474 + target = <&usb>;
25475 + #address-cells = <1>;
25476 + #size-cells = <1>;
25477 + __overlay__ {
25478 + compatible = "brcm,bcm2835-usb";
25479 + dr_mode = "otg";
25480 + g-np-tx-fifo-size = <32>;
25481 + g-rx-fifo-size = <558>;
25482 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
25483 + status = "okay";
25484 + };
25485 + };
25486 +};
25487 diff --git a/arch/arm/boot/dts/overlays/upstream-pi4-overlay.dts b/arch/arm/boot/dts/overlays/upstream-pi4-overlay.dts
25488 new file mode 100644
25489 index 000000000000..6195e02bf9ff
25490 --- /dev/null
25491 +++ b/arch/arm/boot/dts/overlays/upstream-pi4-overlay.dts
25492 @@ -0,0 +1,161 @@
25493 +// redo: ovmerge -c vc4-kms-v3d-pi4-overlay.dts,cma-default dwc2-overlay.dts,dr_mode=otg
25494 +
25495 +/dts-v1/;
25496 +/plugin/;
25497 +
25498 +#include <dt-bindings/clock/bcm2835.h>
25499 +
25500 +/ {
25501 + compatible = "brcm,bcm2835";
25502 + fragment@0 {
25503 + target = <&cma>;
25504 + __dormant__ {
25505 + size = <0x10000000>;
25506 + };
25507 + };
25508 + fragment@1 {
25509 + target = <&ddc0>;
25510 + __overlay__ {
25511 + status = "okay";
25512 + };
25513 + };
25514 + fragment@2 {
25515 + target = <&ddc1>;
25516 + __overlay__ {
25517 + status = "okay";
25518 + };
25519 + };
25520 + fragment@3 {
25521 + target = <&hdmi0>;
25522 + __overlay__ {
25523 + status = "okay";
25524 + };
25525 + };
25526 + fragment@4 {
25527 + target = <&hdmi1>;
25528 + __overlay__ {
25529 + status = "okay";
25530 + };
25531 + };
25532 + fragment@5 {
25533 + target = <&hvs>;
25534 + __overlay__ {
25535 + status = "okay";
25536 + };
25537 + };
25538 + fragment@6 {
25539 + target = <&pixelvalve0>;
25540 + __overlay__ {
25541 + status = "okay";
25542 + };
25543 + };
25544 + fragment@7 {
25545 + target = <&pixelvalve1>;
25546 + __overlay__ {
25547 + status = "okay";
25548 + };
25549 + };
25550 + fragment@8 {
25551 + target = <&pixelvalve2>;
25552 + __overlay__ {
25553 + status = "okay";
25554 + };
25555 + };
25556 + fragment@9 {
25557 + target = <&pixelvalve3>;
25558 + __overlay__ {
25559 + status = "okay";
25560 + };
25561 + };
25562 + fragment@10 {
25563 + target = <&pixelvalve4>;
25564 + __overlay__ {
25565 + status = "okay";
25566 + };
25567 + };
25568 + fragment@11 {
25569 + target = <&v3d>;
25570 + __overlay__ {
25571 + status = "okay";
25572 + };
25573 + };
25574 + fragment@12 {
25575 + target = <&vc4>;
25576 + __overlay__ {
25577 + status = "okay";
25578 + };
25579 + };
25580 + fragment@13 {
25581 + target = <&txp>;
25582 + __overlay__ {
25583 + status = "okay";
25584 + };
25585 + };
25586 + fragment@14 {
25587 + target = <&fb>;
25588 + __overlay__ {
25589 + status = "disabled";
25590 + };
25591 + };
25592 + fragment@15 {
25593 + target = <&firmwarekms>;
25594 + __overlay__ {
25595 + status = "disabled";
25596 + };
25597 + };
25598 + fragment@16 {
25599 + target = <&vec>;
25600 + __overlay__ {
25601 + status = "disabled";
25602 + };
25603 + };
25604 + fragment@17 {
25605 + target = <&hdmi0>;
25606 + __dormant__ {
25607 + dmas;
25608 + };
25609 + };
25610 + fragment@18 {
25611 + target = <&hdmi1>;
25612 + __dormant__ {
25613 + dmas;
25614 + };
25615 + };
25616 + fragment@19 {
25617 + target = <&audio>;
25618 + __overlay__ {
25619 + brcm,disable-hdmi;
25620 + };
25621 + };
25622 + fragment@20 {
25623 + target = <&dvp>;
25624 + __overlay__ {
25625 + status = "okay";
25626 + };
25627 + };
25628 + fragment@21 {
25629 + target = <&pixelvalve3>;
25630 + __dormant__ {
25631 + status = "okay";
25632 + };
25633 + };
25634 + fragment@22 {
25635 + target = <&vec>;
25636 + __dormant__ {
25637 + status = "okay";
25638 + };
25639 + };
25640 + fragment@23 {
25641 + target = <&usb>;
25642 + #address-cells = <1>;
25643 + #size-cells = <1>;
25644 + __overlay__ {
25645 + compatible = "brcm,bcm2835-usb";
25646 + dr_mode = "otg";
25647 + g-np-tx-fifo-size = <32>;
25648 + g-rx-fifo-size = <558>;
25649 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
25650 + status = "okay";
25651 + };
25652 + };
25653 +};
25654 diff --git a/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
25655 new file mode 100644
25656 index 000000000000..ca344492bed8
25657 --- /dev/null
25658 +++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
25659 @@ -0,0 +1,40 @@
25660 +/*
25661 + * vc4-fkms-v3d-overlay.dts
25662 + */
25663 +
25664 +/dts-v1/;
25665 +/plugin/;
25666 +
25667 +#include "cma-overlay.dts"
25668 +
25669 +/ {
25670 + compatible = "brcm,bcm2835";
25671 +
25672 + fragment@1 {
25673 + target = <&fb>;
25674 + __overlay__ {
25675 + status = "disabled";
25676 + };
25677 + };
25678 +
25679 + fragment@2 {
25680 + target = <&firmwarekms>;
25681 + __overlay__ {
25682 + status = "okay";
25683 + };
25684 + };
25685 +
25686 + fragment@3 {
25687 + target = <&v3d>;
25688 + __overlay__ {
25689 + status = "okay";
25690 + };
25691 + };
25692 +
25693 + fragment@4 {
25694 + target = <&vc4>;
25695 + __overlay__ {
25696 + status = "okay";
25697 + };
25698 + };
25699 +};
25700 diff --git a/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts
25701 new file mode 100644
25702 index 000000000000..b03394844abd
25703 --- /dev/null
25704 +++ b/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts
25705 @@ -0,0 +1,43 @@
25706 +/*
25707 + * vc4-kms-v3d-overlay.dts
25708 + */
25709 +
25710 +/dts-v1/;
25711 +/plugin/;
25712 +
25713 +#include <dt-bindings/pinctrl/bcm2835.h>
25714 +
25715 +/ {
25716 + compatible = "brcm,bcm2835";
25717 +
25718 + fragment@0 {
25719 + target-path = "/";
25720 + __overlay__ {
25721 + panel: panel {
25722 + compatible = "ontat,yx700wv03", "simple-panel";
25723 +
25724 + port {
25725 + panel_in: endpoint {
25726 + remote-endpoint = <&dpi_out>;
25727 + };
25728 + };
25729 + };
25730 + };
25731 + };
25732 +
25733 + fragment@1 {
25734 + target = <&dpi>;
25735 + __overlay__ {
25736 + status = "okay";
25737 +
25738 + pinctrl-names = "default";
25739 + pinctrl-0 = <&dpi_18bit_gpio0>;
25740 +
25741 + port {
25742 + dpi_out: endpoint@0 {
25743 + remote-endpoint = <&panel_in>;
25744 + };
25745 + };
25746 + };
25747 + };
25748 +};
25749 diff --git a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
25750 new file mode 100644
25751 index 000000000000..6d34a2bff49b
25752 --- /dev/null
25753 +++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
25754 @@ -0,0 +1,122 @@
25755 +/*
25756 + * vc4-kms-v3d-overlay.dts
25757 + */
25758 +
25759 +/dts-v1/;
25760 +/plugin/;
25761 +
25762 +#include <dt-bindings/clock/bcm2835.h>
25763 +
25764 +#include "cma-overlay.dts"
25765 +
25766 +/ {
25767 + compatible = "brcm,bcm2835";
25768 +
25769 + fragment@1 {
25770 + target = <&i2c2>;
25771 + __overlay__ {
25772 + status = "okay";
25773 + };
25774 + };
25775 +
25776 + fragment@2 {
25777 + target = <&fb>;
25778 + __overlay__ {
25779 + status = "disabled";
25780 + };
25781 + };
25782 +
25783 + fragment@3 {
25784 + target = <&pixelvalve0>;
25785 + __overlay__ {
25786 + status = "okay";
25787 + };
25788 + };
25789 +
25790 + fragment@4 {
25791 + target = <&pixelvalve1>;
25792 + __overlay__ {
25793 + status = "okay";
25794 + };
25795 + };
25796 +
25797 + fragment@5 {
25798 + target = <&pixelvalve2>;
25799 + __overlay__ {
25800 + status = "okay";
25801 + };
25802 + };
25803 +
25804 + fragment@6 {
25805 + target = <&hvs>;
25806 + __overlay__ {
25807 + status = "okay";
25808 + };
25809 + };
25810 +
25811 + fragment@7 {
25812 + target = <&hdmi>;
25813 + __overlay__ {
25814 + status = "okay";
25815 + };
25816 + };
25817 +
25818 + fragment@8 {
25819 + target = <&v3d>;
25820 + __overlay__ {
25821 + status = "okay";
25822 + };
25823 + };
25824 +
25825 + fragment@9 {
25826 + target = <&vc4>;
25827 + __overlay__ {
25828 + status = "okay";
25829 + };
25830 + };
25831 +
25832 + fragment@10 {
25833 + target = <&clocks>;
25834 + __overlay__ {
25835 + claim-clocks = <
25836 + BCM2835_PLLD_DSI0
25837 + BCM2835_PLLD_DSI1
25838 + BCM2835_PLLH_AUX
25839 + BCM2835_PLLH_PIX
25840 + >;
25841 + };
25842 + };
25843 +
25844 + fragment@11 {
25845 + target = <&vec>;
25846 + __overlay__ {
25847 + status = "okay";
25848 + };
25849 + };
25850 +
25851 + fragment@12 {
25852 + target = <&txp>;
25853 + __overlay__ {
25854 + status = "okay";
25855 + };
25856 + };
25857 +
25858 + fragment@13 {
25859 + target = <&hdmi>;
25860 + __dormant__ {
25861 + dmas;
25862 + };
25863 + };
25864 +
25865 + fragment@14 {
25866 + target = <&audio>;
25867 + __overlay__ {
25868 + brcm,disable-hdmi;
25869 + };
25870 + };
25871 +
25872 + __overrides__ {
25873 + audio = <0>,"!13", <0>,"=14";
25874 + noaudio = <0>,"=13", <0>,"!14";
25875 + };
25876 +};
25877 diff --git a/arch/arm/boot/dts/overlays/vc4-kms-v3d-pi4-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-v3d-pi4-overlay.dts
25878 new file mode 100644
25879 index 000000000000..f721f12d729d
25880 --- /dev/null
25881 +++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-pi4-overlay.dts
25882 @@ -0,0 +1,186 @@
25883 +/*
25884 + * vc4-kms-v3d-pi4-overlay.dts
25885 + */
25886 +
25887 +/dts-v1/;
25888 +/plugin/;
25889 +
25890 +#include <dt-bindings/clock/bcm2835.h>
25891 +
25892 +#include "cma-overlay.dts"
25893 +
25894 +/ {
25895 + compatible = "brcm,bcm2835";
25896 +
25897 + fragment@1 {
25898 + target = <&ddc0>;
25899 + __overlay__ {
25900 + status = "okay";
25901 + };
25902 + };
25903 +
25904 + fragment@2 {
25905 + target = <&ddc1>;
25906 + __overlay__ {
25907 + status = "okay";
25908 + };
25909 + };
25910 +
25911 + fragment@3 {
25912 + target = <&hdmi0>;
25913 + __overlay__ {
25914 + status = "okay";
25915 + };
25916 + };
25917 +
25918 + fragment@4 {
25919 + target = <&hdmi1>;
25920 + __overlay__ {
25921 + status = "okay";
25922 + };
25923 + };
25924 +
25925 + fragment@5 {
25926 + target = <&hvs>;
25927 + __overlay__ {
25928 + status = "okay";
25929 + };
25930 + };
25931 +
25932 + fragment@6 {
25933 + target = <&pixelvalve0>;
25934 + __overlay__ {
25935 + status = "okay";
25936 + };
25937 + };
25938 +
25939 + fragment@7 {
25940 + target = <&pixelvalve1>;
25941 + __overlay__ {
25942 + status = "okay";
25943 + };
25944 + };
25945 +
25946 + fragment@8 {
25947 + target = <&pixelvalve2>;
25948 + __overlay__ {
25949 + status = "okay";
25950 + };
25951 + };
25952 +
25953 + fragment@9 {
25954 + target = <&pixelvalve3>;
25955 + __overlay__ {
25956 + status = "okay";
25957 + };
25958 + };
25959 +
25960 + fragment@10 {
25961 + target = <&pixelvalve4>;
25962 + __overlay__ {
25963 + status = "okay";
25964 + };
25965 + };
25966 +
25967 + fragment@11 {
25968 + target = <&v3d>;
25969 + __overlay__ {
25970 + status = "okay";
25971 + };
25972 + };
25973 +
25974 + fragment@12 {
25975 + target = <&vc4>;
25976 + __overlay__ {
25977 + status = "okay";
25978 + };
25979 + };
25980 +
25981 + fragment@13 {
25982 + target = <&txp>;
25983 + __overlay__ {
25984 + status = "okay";
25985 + };
25986 + };
25987 +
25988 + fragment@14 {
25989 + target = <&fb>;
25990 + __overlay__ {
25991 + status = "disabled";
25992 + };
25993 + };
25994 +
25995 + fragment@15 {
25996 + target = <&firmwarekms>;
25997 + __overlay__ {
25998 + status = "disabled";
25999 + };
26000 + };
26001 +
26002 + fragment@16 {
26003 + target = <&vec>;
26004 + __overlay__ {
26005 + status = "disabled";
26006 + };
26007 + };
26008 +
26009 + fragment@17 {
26010 + target = <&hdmi0>;
26011 + __dormant__ {
26012 + dmas;
26013 + };
26014 + };
26015 +
26016 + fragment@18 {
26017 + target = <&hdmi1>;
26018 + __dormant__ {
26019 + dmas;
26020 + };
26021 + };
26022 +
26023 + fragment@19 {
26024 + target = <&audio>;
26025 + __overlay__ {
26026 + brcm,disable-hdmi;
26027 + };
26028 + };
26029 +
26030 + fragment@20 {
26031 + target = <&dvp>;
26032 + __overlay__ {
26033 + status = "okay";
26034 + };
26035 + };
26036 +
26037 + fragment@21 {
26038 + target = <&pixelvalve3>;
26039 + __dormant__ {
26040 + status = "okay";
26041 + };
26042 + };
26043 +
26044 + fragment@22 {
26045 + target = <&vec>;
26046 + __dormant__ {
26047 + status = "okay";
26048 + };
26049 + };
26050 +
26051 + __overrides__ {
26052 + audio = <0>,"!17";
26053 + audio1 = <0>,"!18";
26054 + noaudio = <0>,"=17", <0>,"=18", <0>,"!19";
26055 + composite = <0>, "!1",
26056 + <0>, "!2",
26057 + <0>, "!3",
26058 + <0>, "!4",
26059 + <0>, "!6",
26060 + <0>, "!7",
26061 + <0>, "!8",
26062 + <0>, "!9",
26063 + <0>, "!10",
26064 + <0>, "!16",
26065 + <0>, "=21",
26066 + <0>, "=22";
26067 + };
26068 +};
26069 diff --git a/arch/arm/boot/dts/overlays/vga666-overlay.dts b/arch/arm/boot/dts/overlays/vga666-overlay.dts
26070 new file mode 100644
26071 index 000000000000..a4968d180a5d
26072 --- /dev/null
26073 +++ b/arch/arm/boot/dts/overlays/vga666-overlay.dts
26074 @@ -0,0 +1,30 @@
26075 +/dts-v1/;
26076 +/plugin/;
26077 +
26078 +/{
26079 + compatible = "brcm,bcm2835";
26080 +
26081 + // There is no VGA driver module, but we need a platform device
26082 + // node (that doesn't already use pinctrl) to hang the pinctrl
26083 + // reference on - leds will do
26084 +
26085 + fragment@0 {
26086 + target = <&leds>;
26087 + __overlay__ {
26088 + pinctrl-names = "default";
26089 + pinctrl-0 = <&vga666_pins>;
26090 + };
26091 + };
26092 +
26093 + fragment@1 {
26094 + target = <&gpio>;
26095 + __overlay__ {
26096 + vga666_pins: vga666_pins {
26097 + brcm,pins = <2 3 4 5 6 7 8 9 10 11 12
26098 + 13 14 15 16 17 18 19 20 21>;
26099 + brcm,function = <6>; /* alt2 */
26100 + brcm,pull = <0>; /* no pull */
26101 + };
26102 + };
26103 + };
26104 +};
26105 diff --git a/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
26106 new file mode 100644
26107 index 000000000000..f44e325bc1f2
26108 --- /dev/null
26109 +++ b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
26110 @@ -0,0 +1,40 @@
26111 +// Definitions for w1-gpio module (without external pullup)
26112 +/dts-v1/;
26113 +/plugin/;
26114 +
26115 +/ {
26116 + compatible = "brcm,bcm2835";
26117 +
26118 + fragment@0 {
26119 + target-path = "/";
26120 + __overlay__ {
26121 +
26122 + w1: onewire@0 {
26123 + compatible = "w1-gpio";
26124 + pinctrl-names = "default";
26125 + pinctrl-0 = <&w1_pins>;
26126 + gpios = <&gpio 4 0>;
26127 + status = "okay";
26128 + };
26129 + };
26130 + };
26131 +
26132 + fragment@1 {
26133 + target = <&gpio>;
26134 + __overlay__ {
26135 + w1_pins: w1_pins@0 {
26136 + brcm,pins = <4>;
26137 + brcm,function = <0>; // in (initially)
26138 + brcm,pull = <0>; // off
26139 + };
26140 + };
26141 + };
26142 +
26143 + __overrides__ {
26144 + gpiopin = <&w1>,"gpios:4",
26145 + <&w1>,"reg:0",
26146 + <&w1_pins>,"brcm,pins:0",
26147 + <&w1_pins>,"reg:0";
26148 + pullup; // Silently ignore unneeded parameter
26149 + };
26150 +};
26151 diff --git a/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
26152 new file mode 100644
26153 index 000000000000..953c6a1aeab9
26154 --- /dev/null
26155 +++ b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
26156 @@ -0,0 +1,42 @@
26157 +// Definitions for w1-gpio module (with external pullup)
26158 +/dts-v1/;
26159 +/plugin/;
26160 +
26161 +/ {
26162 + compatible = "brcm,bcm2835";
26163 +
26164 + fragment@0 {
26165 + target-path = "/";
26166 + __overlay__ {
26167 +
26168 + w1: onewire@0 {
26169 + compatible = "w1-gpio";
26170 + pinctrl-names = "default";
26171 + pinctrl-0 = <&w1_pins>;
26172 + gpios = <&gpio 4 0>, <&gpio 5 1>;
26173 + status = "okay";
26174 + };
26175 + };
26176 + };
26177 +
26178 + fragment@1 {
26179 + target = <&gpio>;
26180 + __overlay__ {
26181 + w1_pins: w1_pins@0 {
26182 + brcm,pins = <4 5>;
26183 + brcm,function = <0 1>; // in out
26184 + brcm,pull = <0 0>; // off off
26185 + };
26186 + };
26187 + };
26188 +
26189 + __overrides__ {
26190 + gpiopin = <&w1>,"gpios:4",
26191 + <&w1>,"reg:0",
26192 + <&w1_pins>,"brcm,pins:0",
26193 + <&w1_pins>,"reg:0";
26194 + extpullup = <&w1>,"gpios:16",
26195 + <&w1_pins>,"brcm,pins:4";
26196 + pullup; // Silently ignore unneeded parameter
26197 + };
26198 +};
26199 diff --git a/arch/arm/boot/dts/overlays/w5500-overlay.dts b/arch/arm/boot/dts/overlays/w5500-overlay.dts
26200 new file mode 100644
26201 index 000000000000..4d3e66296753
26202 --- /dev/null
26203 +++ b/arch/arm/boot/dts/overlays/w5500-overlay.dts
26204 @@ -0,0 +1,63 @@
26205 +// Overlay for the Wiznet w5500 Ethernet Controller
26206 +/dts-v1/;
26207 +/plugin/;
26208 +
26209 +/ {
26210 + compatible = "brcm,bcm2835";
26211 +
26212 + fragment@0 {
26213 + target = <&spidev0>;
26214 + __overlay__ {
26215 + status = "disabled";
26216 + };
26217 + };
26218 +
26219 + fragment@1 {
26220 + target = <&spidev1>;
26221 + __dormant__ {
26222 + status = "disabled";
26223 + };
26224 + };
26225 +
26226 + fragment@2 {
26227 + target = <&spi0>;
26228 + __overlay__ {
26229 + /* needed to avoid dtc warning */
26230 + #address-cells = <1>;
26231 + #size-cells = <0>;
26232 +
26233 + status = "okay";
26234 +
26235 + eth1: w5500@0{
26236 + compatible = "wiznet,w5500";
26237 + reg = <0>; /* CE0 */
26238 + pinctrl-names = "default";
26239 + pinctrl-0 = <&eth1_pins>;
26240 + interrupt-parent = <&gpio>;
26241 + interrupts = <25 0x8>;
26242 + spi-max-frequency = <30000000>;
26243 +// local-mac-address = [aa bb cc dd ee ff];
26244 + status = "okay";
26245 + };
26246 + };
26247 + };
26248 +
26249 + fragment@3 {
26250 + target = <&gpio>;
26251 + __overlay__ {
26252 + eth1_pins: eth1_pins {
26253 + brcm,pins = <25>;
26254 + brcm,function = <0>; /* in */
26255 + brcm,pull = <0>; /* none */
26256 + };
26257 + };
26258 + };
26259 +
26260 + __overrides__ {
26261 + int_pin = <&eth1>, "interrupts:0",
26262 + <&eth1_pins>, "brcm,pins:0";
26263 + speed = <&eth1>, "spi-max-frequency:0";
26264 + cs = <&eth1>, "reg:0",
26265 + <0>, "!0=1";
26266 + };
26267 +};
26268 diff --git a/arch/arm/boot/dts/overlays/wittypi-overlay.dts b/arch/arm/boot/dts/overlays/wittypi-overlay.dts
26269 new file mode 100644
26270 index 000000000000..71ce806186de
26271 --- /dev/null
26272 +++ b/arch/arm/boot/dts/overlays/wittypi-overlay.dts
26273 @@ -0,0 +1,44 @@
26274 +/*
26275 + * Device Tree overlay for Witty Pi extension board by UUGear
26276 + *
26277 + */
26278 +
26279 +/dts-v1/;
26280 +/plugin/;
26281 +
26282 +/ {
26283 +
26284 + compatible = "brcm,bcm2835";
26285 +
26286 + fragment@0 {
26287 + target = <&leds>;
26288 + __overlay__ {
26289 + compatible = "gpio-leds";
26290 + wittypi_led: wittypi_led {
26291 + label = "wittypi_led";
26292 + linux,default-trigger = "default-on";
26293 + gpios = <&gpio 17 0>;
26294 + };
26295 + };
26296 + };
26297 +
26298 + fragment@1 {
26299 + target = <&i2c1>;
26300 + __overlay__ {
26301 + #address-cells = <1>;
26302 + #size-cells = <0>;
26303 +
26304 + rtc: ds1337@68 {
26305 + compatible = "dallas,ds1337";
26306 + reg = <0x68>;
26307 + wakeup-source;
26308 + };
26309 + };
26310 + };
26311 +
26312 + __overrides__ {
26313 + led_gpio = <&wittypi_led>,"gpios:4";
26314 + led_trigger = <&wittypi_led>,"linux,default-trigger";
26315 + };
26316 +
26317 +};
26318 diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
26319 index 9b1170658d60..cc6c25629057 100644
26320 --- a/arch/arm64/boot/dts/Makefile
26321 +++ b/arch/arm64/boot/dts/Makefile
26322 @@ -30,3 +30,5 @@ subdir-y += ti
26323 subdir-y += toshiba
26324 subdir-y += xilinx
26325 subdir-y += zte
26326 +
26327 +subdir-y += overlays
26328 diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
26329 index cb7de8d99223..c3eaf8d63ee4 100644
26330 --- a/arch/arm64/boot/dts/broadcom/Makefile
26331 +++ b/arch/arm64/boot/dts/broadcom/Makefile
26332 @@ -1,9 +1,21 @@
26333 # SPDX-License-Identifier: GPL-2.0
26334 -dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b.dtb \
26335 - bcm2837-rpi-3-a-plus.dtb \
26336 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-a-plus.dtb \
26337 bcm2837-rpi-3-b.dtb \
26338 bcm2837-rpi-3-b-plus.dtb \
26339 bcm2837-rpi-cm3-io3.dtb
26340 +dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-2-b.dtb
26341 +dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-3-b.dtb
26342 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-2-b.dtb
26343 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb
26344 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b.dtb
26345 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b-plus.dtb
26346 +dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-cm3.dtb
26347 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-cm3.dtb
26348
26349 subdir-y += northstar2
26350 subdir-y += stingray
26351 +
26352 +# Enable fixups to support overlays on BCM2835 platforms
26353 +ifeq ($(CONFIG_ARCH_BCM2835),y)
26354 + DTC_FLAGS ?= -@
26355 +endif
26356 diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts
26357 new file mode 100644
26358 index 000000000000..116cdbf94b9b
26359 --- /dev/null
26360 +++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts
26361 @@ -0,0 +1,3 @@
26362 +#define RPI364
26363 +
26364 +#include "../../../../arm/boot/dts/bcm2710-rpi-2-b.dts"
26365 diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
26366 new file mode 100644
26367 index 000000000000..d9242ff77079
26368 --- /dev/null
26369 +++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
26370 @@ -0,0 +1,3 @@
26371 +#define RPI364
26372 +
26373 +#include "../../../../arm/boot/dts/bcm2710-rpi-3-b-plus.dts"
26374 diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts
26375 new file mode 100644
26376 index 000000000000..deb33441da95
26377 --- /dev/null
26378 +++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts
26379 @@ -0,0 +1,3 @@
26380 +#define RPI364
26381 +
26382 +#include "../../../../arm/boot/dts/bcm2710-rpi-3-b.dts"
26383 diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts
26384 new file mode 100644
26385 index 000000000000..1c2560017c02
26386 --- /dev/null
26387 +++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts
26388 @@ -0,0 +1,3 @@
26389 +#define RPI364
26390 +
26391 +#include "../../../../arm/boot/dts/bcm2710-rpi-cm3.dts"
26392 diff --git a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts
26393 index d24c53682e44..1fd86f81f542 100644
26394 --- a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts
26395 +++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts
26396 @@ -1,2 +1,3 @@
26397 -// SPDX-License-Identifier: GPL-2.0
26398 -#include "arm/bcm2711-rpi-4-b.dts"
26399 +#define RPI364
26400 +
26401 +#include "../../../../arm/boot/dts/bcm2711-rpi-4-b.dts"
26402 diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi
26403 new file mode 120000
26404 index 000000000000..e5c400284467
26405 --- /dev/null
26406 +++ b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi
26407 @@ -0,0 +1 @@
26408 +../../../../arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
26409 \ No newline at end of file
26410 diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
26411 new file mode 120000
26412 index 000000000000..fc4c05bbe7fd
26413 --- /dev/null
26414 +++ b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
26415 @@ -0,0 +1 @@
26416 +../../../../arm/boot/dts/bcm283x-rpi-lan7515.dtsi
26417 \ No newline at end of file
26418 diff --git a/arch/arm64/boot/dts/overlays b/arch/arm64/boot/dts/overlays
26419 new file mode 120000
26420 index 000000000000..ded08646b6f6
26421 --- /dev/null
26422 +++ b/arch/arm64/boot/dts/overlays
26423 @@ -0,0 +1 @@
26424 +../../../arm/boot/dts/overlays
26425 \ No newline at end of file
26426 diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst
26427 index 50d580d77ae9..079b83308011 100644
26428 --- a/scripts/Makefile.dtbinst
26429 +++ b/scripts/Makefile.dtbinst
26430 @@ -18,9 +18,10 @@ include scripts/Kbuild.include
26431 include $(src)/Makefile
26432
26433 dtbs := $(addprefix $(dst)/, $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS),$(dtb-)))
26434 +dtbos := $(addprefix $(dst)/, $(dtbo-y) $(if $(CONFIG_OF_ALL_DTBS),$(dtb-)))
26435 subdirs := $(addprefix $(obj)/, $(subdir-y) $(subdir-m))
26436
26437 -__dtbs_install: $(dtbs) $(subdirs)
26438 +__dtbs_install: $(dtbs) $(dtbos) $(subdirs)
26439 @:
26440
26441 quiet_cmd_dtb_install = INSTALL $@
26442 @@ -29,6 +30,9 @@ quiet_cmd_dtb_install = INSTALL $@
26443 $(dst)/%.dtb: $(obj)/%.dtb
26444 $(call cmd,dtb_install)
26445
26446 +$(dst)/%.dtbo: $(obj)/%.dtbo
26447 + $(call cmd,dtb_install)
26448 +
26449 PHONY += $(subdirs)
26450 $(subdirs):
26451 $(Q)$(MAKE) $(dtbinst)=$@ dst=$(patsubst $(obj)/%,$(dst)/%,$@)
26452 diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
26453 index 94133708889d..9c0df5bde46c 100644
26454 --- a/scripts/Makefile.lib
26455 +++ b/scripts/Makefile.lib
26456 @@ -281,6 +281,7 @@ DTC_FLAGS += -Wno-interrupt_provider
26457 ifeq ($(findstring 1,$(KBUILD_EXTRA_WARN)),)
26458 DTC_FLAGS += -Wno-unit_address_vs_reg \
26459 -Wno-unit_address_format \
26460 + -Wno-gpios_property \
26461 -Wno-avoid_unnecessary_addr_size \
26462 -Wno-alias_paths \
26463 -Wno-graph_child_address \
26464 @@ -341,6 +342,18 @@ endef
26465 $(obj)/%.dt.yaml: $(src)/%.dts $(DTC) $(DT_TMP_SCHEMA) FORCE
26466 $(call if_changed_rule,dtc,yaml)
26467
26468 +quiet_cmd_dtco = DTCO $@
26469 +cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
26470 + $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
26471 + $(DTC) -@ -H epapr -O dtb -o $@ -b 0 \
26472 + -i $(dir $<) $(DTC_FLAGS) \
26473 + -Wno-interrupts_property \
26474 + -d $(depfile).dtc.tmp $(dtc-tmp) ; \
26475 + cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
26476 +
26477 +$(obj)/%.dtbo: $(src)/%-overlay.dts FORCE
26478 + $(call if_changed_dep,dtco)
26479 +
26480 dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
26481
26482 # Bzip2
26483 --
26484 2.30.2
26485
OpenWrt Source Repository