target/linux/bcm27xx/patches-5.10/950-0039-Main-bcm2708-bcm2709-linux-port.patch

   1 From 0ef60858b9927024cd310038c97976e27e4daada Mon Sep 17 00:00:00 2001
   2 From: popcornmix <popcornmix@gmail.com>
   3 Date: Sun, 12 May 2013 12:24:19 +0100
   4 Subject: [PATCH] Main bcm2708/bcm2709 linux port
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 Signed-off-by: popcornmix <popcornmix@gmail.com>
  10 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
  11
  12 bcm2709: Drop platform smp and timer init code
  13
  14 irq-bcm2836 handles this through these functions:
  15 bcm2835_init_local_timer_frequency()
  16 bcm2836_arm_irqchip_smp_init()
  17
  18 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
  19
  20 bcm270x: Use watchdog for reboot/poweroff
  21
  22 The watchdog driver already has support for reboot/poweroff.
  23 Make use of this and remove the code from the platform files.
  24
  25 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
  26
  27 board_bcm2835: Remove coherent dma pool increase - API has gone
  28 ---
  29  arch/arm/mach-bcm/Kconfig         |  1 +
  30  arch/arm/mm/proc-v6.S             | 15 ++++++++++++---
  31  drivers/irqchip/irq-bcm2835.c     |  7 ++++++-
  32  drivers/mailbox/bcm2835-mailbox.c | 18 ++++++++++++++++--
  33  4 files changed, 35 insertions(+), 6 deletions(-)
  34
  35 --- a/arch/arm/mach-bcm/Kconfig
  36 +++ b/arch/arm/mach-bcm/Kconfig
  37 @@ -165,6 +165,7 @@ config ARCH_BCM2835
  38         select PINCTRL
  39         select PINCTRL_BCM2835
  40         select MFD_CORE
  41 +       select MFD_SYSCON if ARCH_MULTI_V7
  42         help
  43           This enables support for the Broadcom BCM2711 and BCM283x SoCs.
  44           This SoC is used in the Raspberry Pi and Roku 2 devices.
  45 --- a/arch/arm/mm/proc-v6.S
  46 +++ b/arch/arm/mm/proc-v6.S
  47 @@ -70,10 +70,19 @@ ENDPROC(cpu_v6_reset)
  48   *
  49   *     IRQs are already disabled.
  50   */
  51 +
  52 +/* See jira SW-5991 for details of this workaround */
  53  ENTRY(cpu_v6_do_idle)
  54 -       mov     r1, #0
  55 -       mcr     p15, 0, r1, c7, c10, 4          @ DWB - WFI may enter a low-power mode
  56 -       mcr     p15, 0, r1, c7, c0, 4           @ wait for interrupt
  57 +       .align 5
  58 +       mov     r1, #2
  59 +1:     subs    r1, #1
  60 +       nop
  61 +       mcreq   p15, 0, r1, c7, c10, 4          @ DWB - WFI may enter a low-power mode
  62 +       mcreq   p15, 0, r1, c7, c0, 4           @ wait for interrupt
  63 +       nop
  64 +       nop
  65 +       nop
  66 +       bne 1b
  67         ret     lr
  68
  69  ENTRY(cpu_v6_dcache_clean_area)
  70 --- a/drivers/irqchip/irq-bcm2835.c
  71 +++ b/drivers/irqchip/irq-bcm2835.c
  72 @@ -43,7 +43,9 @@
  73  #include <linux/irqdomain.h>
  74
  75  #include <asm/exception.h>
  76 +#ifndef CONFIG_ARM64
  77  #include <asm/mach/irq.h>
  78 +#endif
  79
  80  /* Put the bank and irq (32 bits) into the hwirq */
  81  #define MAKE_HWIRQ(b, n)       (((b) << 5) | (n))
  82 @@ -72,6 +74,7 @@
  83  #define NR_BANKS               3
  84  #define IRQS_PER_BANK          32
  85  #define NUMBER_IRQS            MAKE_HWIRQ(NR_BANKS, 0)
  86 +#undef FIQ_START
  87  #define FIQ_START              (NR_IRQS_BANK0 + MAKE_HWIRQ(NR_BANKS - 1, 0))
  88
  89  static const int reg_pending[] __initconst = { 0x00, 0x04, 0x08 };
  90 @@ -253,10 +256,12 @@ static int __init armctrl_of_init(struct
  91                                         MAKE_HWIRQ(b, i) + NUMBER_IRQS);
  92                         BUG_ON(irq <= 0);
  93                         irq_set_chip(irq, &armctrl_chip);
  94 -                       set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  95 +                       irq_set_probe(irq);
  96                 }
  97         }
  98 +#ifndef CONFIG_ARM64
  99         init_FIQ(FIQ_START);
 100 +#endif
 101
 102         return 0;
 103  }
 104 --- a/drivers/mailbox/bcm2835-mailbox.c
 105 +++ b/drivers/mailbox/bcm2835-mailbox.c
 106 @@ -45,12 +45,15 @@
 107  #define MAIL1_WRT      (ARM_0_MAIL1 + 0x00)
 108  #define MAIL1_STA      (ARM_0_MAIL1 + 0x18)
 109
 110 +/* On ARCH_BCM270x these come through <linux/interrupt.h> (arm_control.h ) */
 111 +#ifndef ARM_MS_FULL
 112  /* Status register: FIFO state. */
 113  #define ARM_MS_FULL            BIT(31)
 114  #define ARM_MS_EMPTY           BIT(30)
 115
 116  /* Configuration register: Enable interrupts. */
 117  #define ARM_MC_IHAVEDATAIRQEN  BIT(0)
 118 +#endif
 119
 120  struct bcm2835_mbox {
 121         void __iomem *regs;
 122 @@ -145,7 +148,7 @@ static int bcm2835_mbox_probe(struct pla
 123                 return -ENOMEM;
 124         spin_lock_init(&mbox->lock);
 125
 126 -       ret = devm_request_irq(dev, irq_of_parse_and_map(dev->of_node, 0),
 127 +       ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
 128                                bcm2835_mbox_irq, 0, dev_name(dev), mbox);
 129         if (ret) {
 130                 dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n",
 131 @@ -195,7 +198,18 @@ static struct platform_driver bcm2835_mb
 132         },
 133         .probe          = bcm2835_mbox_probe,
 134  };
 135 -module_platform_driver(bcm2835_mbox_driver);
 136 +
 137 +static int __init bcm2835_mbox_init(void)
 138 +{
 139 +       return platform_driver_register(&bcm2835_mbox_driver);
 140 +}
 141 +arch_initcall(bcm2835_mbox_init);
 142 +
 143 +static void __init bcm2835_mbox_exit(void)
 144 +{
 145 +       platform_driver_unregister(&bcm2835_mbox_driver);
 146 +}
 147 +module_exit(bcm2835_mbox_exit);
 148
 149  MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
 150  MODULE_DESCRIPTION("BCM2835 mailbox IPC driver");