target/linux/bcm27xx/patches-4.19/950-0768-fixup-clk-raspberrypi-Also-support-v3d-clock.patch

   1 From c4374e446b6957234432d5c3f5d5f89f1acb807d Mon Sep 17 00:00:00 2001
   2 From: popcornmix <popcornmix@gmail.com>
   3 Date: Thu, 7 Nov 2019 12:25:27 +0000
   4 Subject: [PATCH] fixup! clk-raspberrypi: Also support v3d clock
   5
   6 ---
   7  drivers/clk/bcm/clk-raspberrypi.c | 4 ++--
   8  1 file changed, 2 insertions(+), 2 deletions(-)
   9
  10 --- a/drivers/clk/bcm/clk-raspberrypi.c
  11 +++ b/drivers/clk/bcm/clk-raspberrypi.c
  12 @@ -474,7 +474,7 @@ raspberrypi_register_pll_divider(struct
  13          * PLLH's channels have a fixed divide by 10 afterwards, which
  14          * is what our consumers are actually using.
  15          */
  16 -       if (data->fixed_divider != 1) {
  17 +       if (data->fixed_divider != 0) {
  18                 struct clk_lookup *lookup;
  19                 struct clk_hw *clk = clk_hw_register_fixed_factor(rpi->dev,
  20                                                     data->divider_name,
  21 @@ -559,7 +559,7 @@ static const struct raspberrypi_clk_desc
  22                 .source_pll = "osc",
  23                 .divider_name = "pllb_arm",
  24                 .lookup = "cpu0",
  25 -               .fixed_divider = 2,
  26 +               .fixed_divider = 1,
  27                 .clock_id = RPI_FIRMWARE_ARM_CLK_ID,
  28                 .flags = CLK_SET_RATE_PARENT),
  29  };