target/linux/bcm27xx/patches-4.19/950-0715-clk-bcm2835-Add-BCM2711_CLOCK_EMMC2-support.patch

   1 From b4c6046e1c55ddf211215191be9ea6316238889b Mon Sep 17 00:00:00 2001
   2 From: Stefan Wahren <wahrenst@gmx.net>
   3 Date: Fri, 20 Sep 2019 07:27:03 +0200
   4 Subject: [PATCH] clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support
   5
   6 commit 42de9ad400afadd41ee027b5feef234a2d2918b9 upstream.
   7
   8 The new BCM2711 supports an additional clock for the emmc2 block.
   9 So add a new compatible and register this clock only for BCM2711.
  10
  11 Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
  12 Reviewed-by: Matthias Brugger <mbrugger@suse.com>
  13 Acked-by: Eric Anholt <eric@anholt.net>
  14 Reviewed-by: Eric Anholt <eric@anholt.net>
  15 ---
  16  arch/arm/boot/dts/bcm2838.dtsi      |  1 +
  17  drivers/clk/bcm/clk-bcm2835.c       | 20 +++++++++++++++++++-
  18  include/dt-bindings/clock/bcm2835.h |  2 ++
  19  3 files changed, 22 insertions(+), 1 deletion(-)
  20
  21 --- a/arch/arm/boot/dts/bcm2838.dtsi
  22 +++ b/arch/arm/boot/dts/bcm2838.dtsi
  23 @@ -210,7 +210,7 @@
  24                         compatible = "brcm,bcm2711-emmc2";
  25                         status = "okay";
  26                         interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
  27 -                       clocks = <&clocks BCM2838_CLOCK_EMMC2>;
  28 +                       clocks = <&clocks BCM2711_CLOCK_EMMC2>;
  29                         reg = <0x7e340000 0x100>;
  30                 };
  31
  32 --- a/drivers/clk/bcm/clk-bcm2835.c
  33 +++ b/drivers/clk/bcm/clk-bcm2835.c
  34 @@ -124,6 +124,8 @@
  35  #define CM_AVEODIV             0x1bc
  36  #define CM_EMMCCTL             0x1c0
  37  #define CM_EMMCDIV             0x1c4
  38 +#define CM_EMMC2CTL            0x1d0
  39 +#define CM_EMMC2DIV            0x1d4
  40
  41  /* General bits for the CM_*CTL regs */
  42  # define CM_ENABLE                     BIT(4)
  43 @@ -302,7 +304,8 @@
  44  #define VCMSG_ID_CORE_CLOCK     4
  45
  46  #define SOC_BCM2835            BIT(0)
  47 -#define SOC_ALL                        (SOC_BCM2835)
  48 +#define SOC_BCM2711            BIT(1)
  49 +#define SOC_ALL                        (SOC_BCM2835 | SOC_BCM2711)
  50
  51  /*
  52   * Names of clocks used within the driver that need to be replaced
  53 @@ -2102,6 +2105,16 @@ static const struct bcm2835_clk_desc clk
  54                 .frac_bits = 8,
  55                 .tcnt_mux = 39),
  56
  57 +       /* EMMC2 clock (only available for BCM2711) */
  58 +       [BCM2711_CLOCK_EMMC2]   = REGISTER_PER_CLK(
  59 +               SOC_BCM2711,
  60 +               .name = "emmc2",
  61 +               .ctl_reg = CM_EMMC2CTL,
  62 +               .div_reg = CM_EMMC2DIV,
  63 +               .int_bits = 4,
  64 +               .frac_bits = 8,
  65 +               .tcnt_mux = 42),
  66 +
  67         /* General purpose (GPIO) clocks */
  68         [BCM2835_CLOCK_GP0]     = REGISTER_PER_CLK(
  69                 SOC_ALL,
  70 @@ -2376,8 +2389,13 @@ static const struct cprman_plat_data cpr
  71         .soc = SOC_BCM2835,
  72  };
  73
  74 +static const struct cprman_plat_data cprman_bcm2711_plat_data = {
  75 +       .soc = SOC_BCM2711,
  76 +};
  77 +
  78  static const struct of_device_id bcm2835_clk_of_match[] = {
  79         { .compatible = "brcm,bcm2835-cprman", .data = &cprman_bcm2835_plat_data },
  80 +       { .compatible = "brcm,bcm2711-cprman", .data = &cprman_bcm2711_plat_data },
  81         {}
  82  };
  83  MODULE_DEVICE_TABLE(of, bcm2835_clk_of_match);
  84 --- a/include/dt-bindings/clock/bcm2835.h
  85 +++ b/include/dt-bindings/clock/bcm2835.h
  86 @@ -66,3 +66,5 @@
  87  #define BCM2835_CLOCK_DSI1E            48
  88  #define BCM2835_CLOCK_DSI0P            49
  89  #define BCM2835_CLOCK_DSI1P            50
  90 +
  91 +#define BCM2711_CLOCK_EMMC2            51