ath79: add support for COMFAST CF-E130N v2
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-4.19 / 950-0556-ARM-dts-bcm283x-Move-BCM2835-6-7-specific-to-bcm2835.patch
1 From 545c00748a070340e9669740e45afc2672e1fcb6 Mon Sep 17 00:00:00 2001
2 From: Stefan Wahren <wahrenst@gmx.net>
3 Date: Sun, 19 May 2019 12:26:21 +0200
4 Subject: [PATCH] ARM: dts: bcm283x: Move BCM2835/6/7 specific to
5 bcm2835-common.dtsi
6
7 We want all common BCM2835/6/7/8 functions in bcm283x.dtsi and all
8 BCM2835/6/7 specific in the new bcm2835-common.dtsi.
9
10 Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
11 ---
12 arch/arm/boot/dts/bcm2835-common.dtsi | 53 +++++++++++++++++++++++++++
13 arch/arm/boot/dts/bcm2835.dtsi | 1 +
14 arch/arm/boot/dts/bcm2836.dtsi | 1 +
15 arch/arm/boot/dts/bcm2837.dtsi | 1 +
16 arch/arm/boot/dts/bcm283x.dtsi | 43 +---------------------
17 5 files changed, 57 insertions(+), 42 deletions(-)
18 create mode 100644 arch/arm/boot/dts/bcm2835-common.dtsi
19
20 --- /dev/null
21 +++ b/arch/arm/boot/dts/bcm2835-common.dtsi
22 @@ -0,0 +1,53 @@
23 +// SPDX-License-Identifier: GPL-2.0
24 +
25 +/* This include file covers the common peripherals and configuration between
26 + * bcm2835, bcm2836 and bcm2837 implementations.
27 + */
28 +
29 +/ {
30 + soc {
31 + timer@7e003000 {
32 + compatible = "brcm,bcm2835-system-timer";
33 + reg = <0x7e003000 0x1000>;
34 + interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
35 + /* This could be a reference to BCM2835_CLOCK_TIMER,
36 + * but we don't have the driver using the common clock
37 + * support yet.
38 + */
39 + clock-frequency = <1000000>;
40 + };
41 +
42 + intc: interrupt-controller@7e00b200 {
43 + compatible = "brcm,bcm2835-armctrl-ic";
44 + reg = <0x7e00b200 0x200>;
45 + interrupt-controller;
46 + #interrupt-cells = <2>;
47 + };
48 +
49 + thermal: thermal@7e212000 {
50 + compatible = "brcm,bcm2835-thermal";
51 + reg = <0x7e212000 0x8>;
52 + clocks = <&clocks BCM2835_CLOCK_TSENS>;
53 + #thermal-sensor-cells = <0>;
54 + status = "disabled";
55 + };
56 +
57 + v3d: v3d@7ec00000 {
58 + compatible = "brcm,bcm2835-v3d";
59 + reg = <0x7ec00000 0x1000>;
60 + interrupts = <1 10>;
61 + };
62 + };
63 +};
64 +
65 +&gpio {
66 + i2c_slave_gpio18: i2c_slave_gpio18 {
67 + brcm,pins = <18 19 20 21>;
68 + brcm,function = <BCM2835_FSEL_ALT3>;
69 + };
70 +
71 + jtag_gpio4: jtag_gpio4 {
72 + brcm,pins = <4 5 6 12 13>;
73 + brcm,function = <BCM2835_FSEL_ALT5>;
74 + };
75 +};
76 --- a/arch/arm/boot/dts/bcm2835.dtsi
77 +++ b/arch/arm/boot/dts/bcm2835.dtsi
78 @@ -1,5 +1,6 @@
79 // SPDX-License-Identifier: GPL-2.0
80 #include "bcm283x.dtsi"
81 +#include "bcm2835-common.dtsi"
82
83 / {
84 compatible = "brcm,bcm2835";
85 --- a/arch/arm/boot/dts/bcm2836.dtsi
86 +++ b/arch/arm/boot/dts/bcm2836.dtsi
87 @@ -1,5 +1,6 @@
88 // SPDX-License-Identifier: GPL-2.0
89 #include "bcm283x.dtsi"
90 +#include "bcm2835-common.dtsi"
91
92 / {
93 compatible = "brcm,bcm2836";
94 --- a/arch/arm/boot/dts/bcm2837.dtsi
95 +++ b/arch/arm/boot/dts/bcm2837.dtsi
96 @@ -1,4 +1,5 @@
97 #include "bcm283x.dtsi"
98 +#include "bcm2835-common.dtsi"
99
100 / {
101 compatible = "brcm,bcm2837";
102 --- a/arch/arm/boot/dts/bcm283x.dtsi
103 +++ b/arch/arm/boot/dts/bcm283x.dtsi
104 @@ -55,17 +55,6 @@
105 #address-cells = <1>;
106 #size-cells = <1>;
107
108 - timer@7e003000 {
109 - compatible = "brcm,bcm2835-system-timer";
110 - reg = <0x7e003000 0x1000>;
111 - interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
112 - /* This could be a reference to BCM2835_CLOCK_TIMER,
113 - * but we don't have the driver using the common clock
114 - * support yet.
115 - */
116 - clock-frequency = <1000000>;
117 - };
118 -
119 txp@7e004000 {
120 compatible = "brcm,bcm2835-txp";
121 reg = <0x7e004000 0x20>;
122 @@ -113,13 +102,6 @@
123 brcm,dma-channel-mask = <0x7f35>;
124 };
125
126 - intc: interrupt-controller@7e00b200 {
127 - compatible = "brcm,bcm2835-armctrl-ic";
128 - reg = <0x7e00b200 0x200>;
129 - interrupt-controller;
130 - #interrupt-cells = <2>;
131 - };
132 -
133 watchdog@7e100000 {
134 compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
135 #power-domain-cells = <1>;
136 @@ -183,8 +165,7 @@
137 interrupt-controller;
138 #interrupt-cells = <2>;
139
140 - /* Defines pin muxing groups according to
141 - * BCM2835-ARM-Peripherals.pdf page 102.
142 + /* Defines common pin muxing groups
143 *
144 * While each pin can have its mux selected
145 * for various functions individually, some
146 @@ -262,15 +243,7 @@
147 brcm,pins = <44 45>;
148 brcm,function = <BCM2835_FSEL_ALT2>;
149 };
150 - i2c_slave_gpio18: i2c_slave_gpio18 {
151 - brcm,pins = <18 19 20 21>;
152 - brcm,function = <BCM2835_FSEL_ALT3>;
153 - };
154
155 - jtag_gpio4: jtag_gpio4 {
156 - brcm,pins = <4 5 6 12 13>;
157 - brcm,function = <BCM2835_FSEL_ALT5>;
158 - };
159 jtag_gpio22: jtag_gpio22 {
160 brcm,pins = <22 23 24 25 26 27>;
161 brcm,function = <BCM2835_FSEL_ALT4>;
162 @@ -488,14 +461,6 @@
163 status = "disabled";
164 };
165
166 - thermal: thermal@7e212000 {
167 - compatible = "brcm,bcm2835-thermal";
168 - reg = <0x7e212000 0x8>;
169 - clocks = <&clocks BCM2835_CLOCK_TSENS>;
170 - #thermal-sensor-cells = <0>;
171 - status = "disabled";
172 - };
173 -
174 aux: aux@7e215000 {
175 compatible = "brcm,bcm2835-aux";
176 #clock-cells = <1>;
177 @@ -661,12 +626,6 @@
178 phy-names = "usb2-phy";
179 };
180
181 - v3d: v3d@7ec00000 {
182 - compatible = "brcm,bcm2835-v3d";
183 - reg = <0x7ec00000 0x1000>;
184 - interrupts = <1 10>;
185 - };
186 -
187 vc4: gpu {
188 compatible = "brcm,bcm2835-vc4";
189 };