target/linux/at91/patches-5.15/145-power-reset-at91-sama5d2_shdwc-add-support-for-sama7.patch

   1 From f39f2312a68ec0843adba08f9c9182ffa5624190 Mon Sep 17 00:00:00 2001
   2 From: Claudiu Beznea <claudiu.beznea@microchip.com>
   3 Date: Wed, 16 Dec 2020 14:57:33 +0200
   4 Subject: [PATCH 145/247] power: reset: at91-sama5d2_shdwc: add support for
   5  sama7g5
   6
   7 Add support for SAMA7G5 by adding proper struct reg_config structure
   8 and since SAMA7G5 is not currently on LPDDR setups the commit also
   9 avoid the mapping of DDR controller.
  10
  11 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
  12 Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
  13 ---
  14  drivers/power/reset/at91-sama5d2_shdwc.c | 72 ++++++++++++++++++------
  15  1 file changed, 54 insertions(+), 18 deletions(-)
  16
  17 --- a/drivers/power/reset/at91-sama5d2_shdwc.c
  18 +++ b/drivers/power/reset/at91-sama5d2_shdwc.c
  19 @@ -78,9 +78,15 @@ struct pmc_reg_config {
  20         u8 mckr;
  21  };
  22
  23 +struct ddrc_reg_config {
  24 +       u32 type_offset;
  25 +       u32 type_mask;
  26 +};
  27 +
  28  struct reg_config {
  29         struct shdwc_reg_config shdwc;
  30         struct pmc_reg_config pmc;
  31 +       struct ddrc_reg_config ddrc;
  32  };
  33
  34  struct shdwc {
  35 @@ -262,6 +268,10 @@ static const struct reg_config sama5d2_r
  36         .pmc = {
  37                 .mckr           = 0x30,
  38         },
  39 +       .ddrc = {
  40 +               .type_offset    = AT91_DDRSDRC_MDR,
  41 +               .type_mask      = AT91_DDRSDRC_MD
  42 +       },
  43  };
  44
  45  static const struct reg_config sam9x60_reg_config = {
  46 @@ -275,6 +285,23 @@ static const struct reg_config sam9x60_r
  47         .pmc = {
  48                 .mckr           = 0x28,
  49         },
  50 +       .ddrc = {
  51 +               .type_offset    = AT91_DDRSDRC_MDR,
  52 +               .type_mask      = AT91_DDRSDRC_MD
  53 +       },
  54 +};
  55 +
  56 +static const struct reg_config sama7g5_reg_config = {
  57 +       .shdwc = {
  58 +               .wkup_pin_input = 0,
  59 +               .mr_rtcwk_shift = 17,
  60 +               .mr_rttwk_shift = 16,
  61 +               .sr_rtcwk_shift = 5,
  62 +               .sr_rttwk_shift = 4,
  63 +       },
  64 +       .pmc = {
  65 +               .mckr           = 0x28,
  66 +       },
  67  };
  68
  69  static const struct of_device_id at91_shdwc_of_match[] = {
  70 @@ -285,6 +312,10 @@ static const struct of_device_id at91_sh
  71         {
  72                 .compatible = "microchip,sam9x60-shdwc",
  73                 .data = &sam9x60_reg_config,
  74 +       },
  75 +       {
  76 +               .compatible = "microchip,sama7g5-shdwc",
  77 +               .data = &sama7g5_reg_config,
  78         }, {
  79                 /*sentinel*/
  80         }
  81 @@ -294,6 +325,7 @@ MODULE_DEVICE_TABLE(of, at91_shdwc_of_ma
  82  static const struct of_device_id at91_pmc_ids[] = {
  83         { .compatible = "atmel,sama5d2-pmc" },
  84         { .compatible = "microchip,sam9x60-pmc" },
  85 +       { .compatible = "microchip,sama7g5-pmc" },
  86         { /* Sentinel. */ }
  87  };
  88
  89 @@ -355,30 +387,34 @@ static int __init at91_shdwc_probe(struc
  90                 goto clk_disable;
  91         }
  92
  93 -       np = of_find_compatible_node(NULL, NULL, "atmel,sama5d3-ddramc");
  94 -       if (!np) {
  95 -               ret = -ENODEV;
  96 -               goto unmap;
  97 -       }
  98 +       if (at91_shdwc->rcfg->ddrc.type_mask) {
  99 +               np = of_find_compatible_node(NULL, NULL,
 100 +                                            "atmel,sama5d3-ddramc");
 101 +               if (!np) {
 102 +                       ret = -ENODEV;
 103 +                       goto unmap;
 104 +               }
 105
 106 -       at91_shdwc->mpddrc_base = of_iomap(np, 0);
 107 -       of_node_put(np);
 108 +               at91_shdwc->mpddrc_base = of_iomap(np, 0);
 109 +               of_node_put(np);
 110
 111 -       if (!at91_shdwc->mpddrc_base) {
 112 -               ret = -ENOMEM;
 113 -               goto unmap;
 114 +               if (!at91_shdwc->mpddrc_base) {
 115 +                       ret = -ENOMEM;
 116 +                       goto unmap;
 117 +               }
 118 +
 119 +               ddr_type = readl(at91_shdwc->mpddrc_base +
 120 +                                at91_shdwc->rcfg->ddrc.type_offset) &
 121 +                                at91_shdwc->rcfg->ddrc.type_mask;
 122 +               if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 &&
 123 +                   ddr_type != AT91_DDRSDRC_MD_LPDDR3) {
 124 +                       iounmap(at91_shdwc->mpddrc_base);
 125 +                       at91_shdwc->mpddrc_base = NULL;
 126 +               }
 127         }
 128
 129         pm_power_off = at91_poweroff;
 130
 131 -       ddr_type = readl(at91_shdwc->mpddrc_base + AT91_DDRSDRC_MDR) &
 132 -                        AT91_DDRSDRC_MD;
 133 -       if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 &&
 134 -           ddr_type != AT91_DDRSDRC_MD_LPDDR3) {
 135 -               iounmap(at91_shdwc->mpddrc_base);
 136 -               at91_shdwc->mpddrc_base = NULL;
 137 -       }
 138 -
 139         return 0;
 140
 141  unmap: