at91: kernel v5.15: copy config and patches from 5.10
[openwrt/openwrt.git] / target / linux / at91 / patches-5.15 / 102-dt-bindings-clock-at91-add-sama7g5-pll-defines.patch
1 From 44bb7c72cdd830f54fe18e730205f892d9cbfe39 Mon Sep 17 00:00:00 2001
2 From: Eugen Hristev <eugen.hristev@microchip.com>
3 Date: Thu, 19 Nov 2020 17:43:08 +0200
4 Subject: [PATCH 102/247] dt-bindings: clock: at91: add sama7g5 pll defines
5
6 Add SAMA7G5 specific PLL defines to be referenced in a phandle as a
7 PMC_TYPE_CORE clock.
8
9 Suggested-by: Claudiu Beznea <claudiu.beznea@microchip.com>
10 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
11 [claudiu.beznea@microchip.com: adapt comit message, adapt sama7g5.c]
12 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
13 Link: https://lore.kernel.org/r/1605800597-16720-3-git-send-email-claudiu.beznea@microchip.com
14 Signed-off-by: Stephen Boyd <sboyd@kernel.org>
15 ---
16 drivers/clk/at91/sama7g5.c | 6 +++---
17 include/dt-bindings/clock/at91.h | 10 ++++++++++
18 2 files changed, 13 insertions(+), 3 deletions(-)
19
20 --- a/drivers/clk/at91/sama7g5.c
21 +++ b/drivers/clk/at91/sama7g5.c
22 @@ -182,13 +182,13 @@ static const struct {
23 .p = "audiopll_fracck",
24 .l = &pll_layout_divpmc,
25 .t = PLL_TYPE_DIV,
26 - .eid = PMC_I2S0_MUX, },
27 + .eid = PMC_AUDIOPMCPLL, },
28
29 { .n = "audiopll_diviock",
30 .p = "audiopll_fracck",
31 .l = &pll_layout_divio,
32 .t = PLL_TYPE_DIV,
33 - .eid = PMC_I2S1_MUX, },
34 + .eid = PMC_AUDIOIOPLL, },
35 },
36
37 [PLL_ID_ETH] = {
38 @@ -835,7 +835,7 @@ static void __init sama7g5_pmc_setup(str
39 if (IS_ERR(regmap))
40 return;
41
42 - sama7g5_pmc = pmc_data_allocate(PMC_I2S1_MUX + 1,
43 + sama7g5_pmc = pmc_data_allocate(PMC_ETHPLL + 1,
44 nck(sama7g5_systemck),
45 nck(sama7g5_periphck),
46 nck(sama7g5_gck), 8);
47 --- a/include/dt-bindings/clock/at91.h
48 +++ b/include/dt-bindings/clock/at91.h
49 @@ -25,6 +25,16 @@
50 #define PMC_PLLBCK 8
51 #define PMC_AUDIOPLLCK 9
52
53 +/* SAMA7G5 */
54 +#define PMC_CPUPLL (PMC_MAIN + 1)
55 +#define PMC_SYSPLL (PMC_MAIN + 2)
56 +#define PMC_DDRPLL (PMC_MAIN + 3)
57 +#define PMC_IMGPLL (PMC_MAIN + 4)
58 +#define PMC_BAUDPLL (PMC_MAIN + 5)
59 +#define PMC_AUDIOPMCPLL (PMC_MAIN + 6)
60 +#define PMC_AUDIOIOPLL (PMC_MAIN + 7)
61 +#define PMC_ETHPLL (PMC_MAIN + 8)
62 +
63 #ifndef AT91_PMC_MOSCS
64 #define AT91_PMC_MOSCS 0 /* MOSCS Flag */
65 #define AT91_PMC_LOCKA 1 /* PLLA Lock */