target/linux/at91/patches-5.10/210-ARM-at91-pm-add-support-for-2.5V-LDO-regulator-contr.patch

   1 From b2073cc043612bf95b115bd94103cfb2936f05bf Mon Sep 17 00:00:00 2001
   2 From: Claudiu Beznea <claudiu.beznea@microchip.com>
   3 Date: Thu, 15 Apr 2021 13:50:00 +0300
   4 Subject: [PATCH 210/247] ARM: at91: pm: add support for 2.5V LDO regulator
   5  control
   6
   7 Add support to disable/enable 2.5V LDO regulator when entering/exiting
   8 any ULP mode.
   9
  10 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
  11 Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
  12 Link: https://lore.kernel.org/r/20210415105010.569620-15-claudiu.beznea@microchip.com
  13 ---
  14  arch/arm/mach-at91/pm.h         |  1 +
  15  arch/arm/mach-at91/pm_suspend.S | 29 +++++++++++++++++++++++++++++
  16  2 files changed, 30 insertions(+)
  17
  18 diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
  19 index 666474088d55..53bdc9000e44 100644
  20 --- a/arch/arm/mach-at91/pm.h
  21 +++ b/arch/arm/mach-at91/pm.h
  22 @@ -13,6 +13,7 @@
  23  #include <soc/at91/at91sam9_ddrsdr.h>
  24  #include <soc/at91/at91sam9_sdramc.h>
  25  #include <soc/at91/sama7-ddr.h>
  26 +#include <soc/at91/sama7-sfrbu.h>
  27
  28  #define AT91_MEMCTRL_MC                0
  29  #define AT91_MEMCTRL_SDRAMC    1
  30 diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
  31 index 8b0b8619ee8a..9c9e08fd8300 100644
  32 --- a/arch/arm/mach-at91/pm_suspend.S
  33 +++ b/arch/arm/mach-at91/pm_suspend.S
  34 @@ -83,6 +83,29 @@ tmp3 .req    r6
  35
  36         .endm
  37
  38 +/**
  39 + * Set state for 2.5V low power regulator
  40 + * @ena: 0 - disable regulator
  41 + *      1 - enable regulator
  42 + *
  43 + * Side effects: overwrites r7, r8, r9, r10
  44 + */
  45 +       .macro at91_2_5V_reg_set_low_power ena
  46 +#ifdef CONFIG_SOC_SAMA7
  47 +       ldr     r7, .sfrbu
  48 +       mov     r8, #\ena
  49 +       ldr     r9, [r7, #AT91_SFRBU_25LDOCR]
  50 +       orr     r9, r9, #AT91_SFRBU_25LDOCR_LP
  51 +       cmp     r8, #1
  52 +       beq     lp_done_\ena
  53 +       bic     r9, r9, #AT91_SFRBU_25LDOCR_LP
  54 +lp_done_\ena:
  55 +       ldr     r10, =AT91_SFRBU_25LDOCR_LDOANAKEY
  56 +       orr     r9, r9, r10
  57 +       str     r9, [r7, #AT91_SFRBU_25LDOCR]
  58 +#endif
  59 +       .endm
  60 +
  61         .text
  62
  63         .arm
  64 @@ -906,6 +929,9 @@ save_mck:
  65
  66         at91_plla_disable
  67
  68 +       /* Enable low power mode for 2.5V regulator. */
  69 +       at91_2_5V_reg_set_low_power 1
  70 +
  71         ldr     tmp3, .pm_mode
  72         cmp     tmp3, #AT91_PM_ULP1
  73         beq     ulp1_mode
  74 @@ -918,6 +944,9 @@ ulp1_mode:
  75         b       ulp_exit
  76
  77  ulp_exit:
  78 +       /* Disable low power mode for 2.5V regulator. */
  79 +       at91_2_5V_reg_set_low_power 0
  80 +
  81         ldr     pmc, .pmc_base
  82
  83         at91_plla_enable
  84 --
  85 2.32.0
  86