9feea824903470ba86f3836771e856b2430d691e
[openwrt/openwrt.git] / target / linux / at91 / patches-5.10 / 104-clk-at91-clk-master-add-5th-divisor-for-mck-master.patch
1 From b2349278894bb381fa26a8717d3093d53f08fd36 Mon Sep 17 00:00:00 2001
2 From: Eugen Hristev <eugen.hristev@microchip.com>
3 Date: Thu, 19 Nov 2020 17:43:10 +0200
4 Subject: [PATCH 104/247] clk: at91: clk-master: add 5th divisor for mck master
5
6 clk-master can have 5 divisors with a field width of 3 bits
7 on some products.
8
9 Change the mask and number of divisors accordingly.
10
11 Reported-by: Mihai Sain <mihai.sain@microchip.com>
12 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
13 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
14 Link: https://lore.kernel.org/r/1605800597-16720-5-git-send-email-claudiu.beznea@microchip.com
15 Signed-off-by: Stephen Boyd <sboyd@kernel.org>
16 ---
17 drivers/clk/at91/clk-master.c | 2 +-
18 drivers/clk/at91/pmc.h | 2 +-
19 2 files changed, 2 insertions(+), 2 deletions(-)
20
21 --- a/drivers/clk/at91/clk-master.c
22 +++ b/drivers/clk/at91/clk-master.c
23 @@ -15,7 +15,7 @@
24 #define MASTER_PRES_MASK 0x7
25 #define MASTER_PRES_MAX MASTER_PRES_MASK
26 #define MASTER_DIV_SHIFT 8
27 -#define MASTER_DIV_MASK 0x3
28 +#define MASTER_DIV_MASK 0x7
29
30 #define PMC_MCR 0x30
31 #define PMC_MCR_ID_MSK GENMASK(3, 0)
32 --- a/drivers/clk/at91/pmc.h
33 +++ b/drivers/clk/at91/pmc.h
34 @@ -48,7 +48,7 @@ extern const struct clk_master_layout at
35
36 struct clk_master_characteristics {
37 struct clk_range output;
38 - u32 divisors[4];
39 + u32 divisors[5];
40 u8 have_div3_pres;
41 };
42