adm5120: add 3.3 support
[openwrt/openwrt.git] / target / linux / adm5120 / patches-3.3 / a01-adm5120-core-build-error-fixes.patch
1 --- a/arch/mips/adm5120/common/platform.c
2 +++ b/arch/mips/adm5120/common/platform.c
3 @@ -18,6 +18,7 @@
4 #include <linux/gpio.h>
5 #include <linux/irq.h>
6 #include <linux/slab.h>
7 +#include <linux/export.h>
8
9 #include <asm/bootinfo.h>
10
11 --- a/arch/mips/adm5120/common/clock.c
12 +++ b/arch/mips/adm5120/common/clock.c
13 @@ -33,7 +33,7 @@ static struct clk uart_clk = {
14
15 struct clk *clk_get(struct device *dev, const char *id)
16 {
17 - char *name = dev_name(dev);
18 + const char *name = dev_name(dev);
19
20 if (!strcmp(name, "apb:uart0") || !strcmp(name, "apb:uart1"))
21 return &uart_clk;
22 --- a/arch/mips/pci/pci-adm5120.c
23 +++ b/arch/mips/pci/pci-adm5120.c
24 @@ -49,7 +49,7 @@
25 static unsigned int adm5120_pci_nr_irqs __initdata;
26 static struct adm5120_pci_irq *adm5120_pci_irq_map __initdata;
27
28 -static spinlock_t pci_lock = SPIN_LOCK_UNLOCKED;
29 +static DEFINE_SPINLOCK(pci_lock);
30
31 /* -------------------------------------------------------------------------*/
32
33 --- a/arch/mips/adm5120/common/irq.c
34 +++ b/arch/mips/adm5120/common/irq.c
35 @@ -23,9 +23,9 @@
36
37 #include <asm/mach-adm5120/adm5120_defs.h>
38
39 -static void adm5120_intc_irq_unmask(unsigned int irq);
40 -static void adm5120_intc_irq_mask(unsigned int irq);
41 -static int adm5120_intc_irq_set_type(unsigned int irq, unsigned int flow_type);
42 +static void adm5120_intc_irq_unmask(struct irq_data *d);
43 +static void adm5120_intc_irq_mask(struct irq_data *d);
44 +static int adm5120_intc_irq_set_type(struct irq_data *d, unsigned int flow_type);
45
46 static inline void intc_write_reg(unsigned int reg, u32 val)
47 {
48 @@ -43,10 +43,10 @@ static inline u32 intc_read_reg(unsigned
49
50 static struct irq_chip adm5120_intc_irq_chip = {
51 .name = "INTC",
52 - .unmask = adm5120_intc_irq_unmask,
53 - .mask = adm5120_intc_irq_mask,
54 - .mask_ack = adm5120_intc_irq_mask,
55 - .set_type = adm5120_intc_irq_set_type
56 + .irq_unmask = adm5120_intc_irq_unmask,
57 + .irq_mask = adm5120_intc_irq_mask,
58 + .irq_mask_ack = adm5120_intc_irq_mask,
59 + .irq_set_type = adm5120_intc_irq_set_type
60 };
61
62 static struct irqaction adm5120_intc_irq_action = {
63 @@ -54,20 +54,19 @@ static struct irqaction adm5120_intc_irq
64 .name = "cascade [INTC]"
65 };
66
67 -static void adm5120_intc_irq_unmask(unsigned int irq)
68 +static void adm5120_intc_irq_unmask(struct irq_data *d)
69 {
70 - irq -= ADM5120_INTC_IRQ_BASE;
71 - intc_write_reg(INTC_REG_IRQ_ENABLE, 1 << irq);
72 + intc_write_reg(INTC_REG_IRQ_ENABLE, 1 << (d->irq - ADM5120_INTC_IRQ_BASE));
73 }
74
75 -static void adm5120_intc_irq_mask(unsigned int irq)
76 +static void adm5120_intc_irq_mask(struct irq_data *d)
77 {
78 - irq -= ADM5120_INTC_IRQ_BASE;
79 - intc_write_reg(INTC_REG_IRQ_DISABLE, 1 << irq);
80 + intc_write_reg(INTC_REG_IRQ_DISABLE, 1 << (d->irq - ADM5120_INTC_IRQ_BASE));
81 }
82
83 -static int adm5120_intc_irq_set_type(unsigned int irq, unsigned int flow_type)
84 +static int adm5120_intc_irq_set_type(struct irq_data *d, unsigned int flow_type)
85 {
86 + unsigned int irq = d->irq;
87 unsigned int sense;
88 unsigned long mode;
89 int err = 0;
90 @@ -105,10 +104,6 @@ static int adm5120_intc_irq_set_type(uns
91 mode &= ~(1 << (irq - ADM5120_INTC_IRQ_BASE));
92
93 intc_write_reg(INTC_REG_INT_MODE, mode);
94 - /* fallthrough */
95 - default:
96 - irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
97 - irq_desc[irq].status |= sense;
98 break;
99 }
100
101 @@ -162,8 +157,7 @@ static void __init adm5120_intc_irq_init
102 for (i = ADM5120_INTC_IRQ_BASE;
103 i <= ADM5120_INTC_IRQ_BASE + INTC_IRQ_LAST;
104 i++) {
105 - irq_desc[i].status = INTC_IRQ_STATUS;
106 - set_irq_chip_and_handler(i, &adm5120_intc_irq_chip,
107 + irq_set_chip_and_handler(i, &adm5120_intc_irq_chip,
108 handle_level_irq);
109 }
110