mac80211: merge a fix for a ps-poll handling issue
[openwrt/openwrt.git] / package / boot / uboot-sunxi / patches / 004-sunxi-mmc-set-transfer-timeout-according-to-byte_cnt.patch
1 diff --git a/package/boot/uboot-sunxi/patches/004-sunxi-mmc-set-transfer-timeout-according-to-byte_cnt.patch b/package/boot/uboot-sunxi/patches/004-sunxi-mmc-set-transfer-timeout-according-to-byte_cnt.patch
2 new file mode 100644
3 index 0000000..180b60b
4 --- /dev/null
5 +++ b/package/boot/uboot-sunxi/patches/004-sunxi-mmc-set-transfer-timeout-according-to-byte_cnt.patch
6 @@ -0,0 +1,36 @@
7 +From 8a5481e2e51a86e858c4f1481729421f26cc240c Mon Sep 17 00:00:00 2001
8 +From: Yousong Zhou <yszhou4tech@gmail.com>
9 +Date: Sat, 29 Aug 2015 21:26:11 +0800
10 +Subject: [PATCH] sunxi: mmc: set transfer timeout according to byte_cnt.
11 +
12 +Originally a timeout value of 2 seconds was used regardless of the size
13 +of data to be transfered. This prevented slow devices from working
14 +correctly while there was no much gain for faster devices, e.g. it takes
15 +3708ms for a transfer of uImage of size 1899008 bytes.
16 +
17 +Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
18 +---
19 + drivers/mmc/sunxi_mmc.c | 6 ++++--
20 + 1 file changed, 4 insertions(+), 2 deletions(-)
21 +
22 +diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
23 +index e7ab828..7a990f7 100644
24 +--- a/drivers/mmc/sunxi_mmc.c
25 ++++ b/drivers/mmc/sunxi_mmc.c
26 +@@ -257,9 +257,11 @@ static int mmc_trans_data_by_cpu(struct mmc *mmc, struct mmc_data *data)
27 + const uint32_t status_bit = reading ? SUNXI_MMC_STATUS_FIFO_EMPTY :
28 + SUNXI_MMC_STATUS_FIFO_FULL;
29 + unsigned i;
30 +- unsigned byte_cnt = data->blocksize * data->blocks;
31 +- unsigned timeout_msecs = 2000;
32 + unsigned *buff = (unsigned int *)(reading ? data->dest : data->src);
33 ++ unsigned byte_cnt = data->blocksize * data->blocks;
34 ++ unsigned timeout_msecs = byte_cnt >> 8;
35 ++ if (timeout_msecs < 2000)
36 ++ timeout_msecs = 2000;
37 +
38 + /* Always read / write data through the CPU */
39 + setbits_le32(&mmchost->reg->gctrl, SUNXI_MMC_GCTRL_ACCESS_BY_AHB);
40 +--
41 +1.7.10.4
42 +