package/boot/uboot-layerscape/patches/0058-mmc-fsl_esdhc-disable-sdhc2-when-no-card-inserted-fo.patch

   1 From 0499ca266f668c9d72217631151f3b6e15350134 Mon Sep 17 00:00:00 2001
   2 From: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
   3 Date: Wed, 15 Jun 2016 17:42:51 +0530
   4 Subject: [PATCH 58/93] mmc: fsl_esdhc: disable sdhc2 when no card inserted
   5  for ls1012ardb
   6
   7 This is a temporary workaround patch for ls1012ardb becasue there
   8 was host controller hardware issue found on some RDB boards when
   9 there was no eMMC adapter card inserted. This would cause below
  10 continious error messages in linux. So this patch is to disable
  11 sdhc2 when finding there isn't card inserted.
  12 "mmc1: Controller never released inhibit bit(s)."
  13
  14 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
  15 ---
  16  board/freescale/ls1012ardb/ls1012ardb.c |   24 ++++++++++++++++++++++++
  17  1 file changed, 24 insertions(+)
  18
  19 diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
  20 index 90cbd5e..ad4d8ee 100644
  21 --- a/board/freescale/ls1012ardb/ls1012ardb.c
  22 +++ b/board/freescale/ls1012ardb/ls1012ardb.c
  23 @@ -171,6 +171,30 @@ int board_early_init_f(void)
  24         return 0;
  25  }
  26
  27 +int mmc_check_sdhc2_card(void)
  28 +{
  29 +       u8 io = 0;
  30 +       u8 is_card = 0;
  31 +
  32 +       /* Initialize i2c early for Serial flash bank information */
  33 +       i2c_set_bus_num(0);
  34 +
  35 +       if (i2c_read(I2C_MUX_IO1_ADDR, 0, 1, &io, 1) < 0) {
  36 +               printf("Error reading i2c boot information!\n");
  37 +               return 0; /* Don't want to hang() on this error */
  38 +       }
  39 +
  40 +       io = io & 0x0c;
  41 +
  42 +       switch (io) {
  43 +       case 0:
  44 +       case 8:
  45 +               is_card = 1;
  46 +       }
  47 +
  48 +       return is_card;
  49 +}
  50 +
  51  int board_init(void)
  52  {
  53         struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
  54 --
  55 1.7.9.5
  56