package/boot/uboot-layerscape/patches/0042-DNCPE-138-Rest-external-PHYs.patch

   1 From 63acb257c32bd86abbad5abcc002d6c78b72f0ab Mon Sep 17 00:00:00 2001
   2 From: Anji J <anji.jagarlmudi@freescale.com>
   3 Date: Mon, 16 May 2016 20:21:38 +0530
   4 Subject: [PATCH 42/93] DNCPE-138 Rest external PHYs
   5
   6 Need to reset external PHYs through IO expander for proper function.
   7
   8 Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>>
   9 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
  10 ---
  11  board/freescale/ls1012ardb/eth.c |   14 ++++++++++++++
  12  include/configs/ls1012ardb.h     |    9 +++++++++
  13  2 files changed, 23 insertions(+)
  14
  15 diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c
  16 index 29830e8..24fdd83 100644
  17 --- a/board/freescale/ls1012ardb/eth.c
  18 +++ b/board/freescale/ls1012ardb/eth.c
  19 @@ -20,6 +20,20 @@
  20
  21  #define DEFAULT_PFE_MDIO_NAME "PFE_MDIO"
  22
  23 +
  24 +void reset_phy(void)
  25 +{
  26 +
  27 +       /*Through reset IO expander reset both RGMII and SGMII PHYs */
  28 +       i2c_reg_write(CONFIG_SYS_I2C_RESET_IO_EXPANDER, 6, __PHY_MASK);
  29 +       i2c_reg_write(CONFIG_SYS_I2C_RESET_IO_EXPANDER, 2, __PHY_ETH2_MASK);
  30 +       mdelay(10);
  31 +       i2c_reg_write(CONFIG_SYS_I2C_RESET_IO_EXPANDER, 2, __PHY_ETH1_MASK);
  32 +       mdelay(10);
  33 +       i2c_reg_write(CONFIG_SYS_I2C_RESET_IO_EXPANDER, 2, 0xFF);
  34 +       mdelay(50);
  35 +}
  36 +
  37  int board_eth_init(bd_t *bis)
  38  {
  39  #ifdef CONFIG_FSL_PPFE
  40 diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
  41 index 1b72bf1..23722e0 100644
  42 --- a/include/configs/ls1012ardb.h
  43 +++ b/include/configs/ls1012ardb.h
  44 @@ -24,6 +24,7 @@
  45  #define EMAC2_PHY_ADDR          0x1
  46  #define CONFIG_PHYLIB
  47  #define CONFIG_PHY_REALTEK
  48 +#define CONFIG_RESET_PHY_R
  49  #endif
  50
  51  /*
  52 @@ -128,6 +129,14 @@
  53  #define __SW_REV_A             0xF8
  54  #define __SW_REV_B             0xF0
  55
  56 +/*
  57 + *I2C RESET expander
  58 + */
  59 +#define CONFIG_SYS_I2C_RESET_IO_EXPANDER       0x25
  60 +#define __PHY_MASK             0xF9
  61 +#define __PHY_ETH2_MASK                0xFB
  62 +#define __PHY_ETH1_MASK                0xFD
  63 +
  64  #define CONFIG_CMD_MEMINFO
  65  #define CONFIG_CMD_MEMTEST
  66  #define CONFIG_SYS_MEMTEST_START       0x80000000
  67 --
  68 1.7.9.5
  69