package/boot/uboot-layerscape/patches/0030-ARMv8-Enable-CPUECTLR.SMPEN-for-data-coherency.patch

   1 From 367c16da9255dacf6440f3c72c01c197cfb1bbe8 Mon Sep 17 00:00:00 2001
   2 From: Sumit Garg <sumit.garg@nxp.com>
   3 Date: Wed, 11 May 2016 12:44:35 -0400
   4 Subject: [PATCH 30/93] ARMv8: Enable CPUECTLR.SMPEN for data coherency
   5
   6 Data coherency is enabled only when the CPUECTLR.SMPEN bit is set.
   7 The SMPEN bit should be set before enabling the data cache. If not
   8 enabled, the cache is not coherent with other cores and data
   9 corruption could occur. It also enables core level cache snooping.
  10
  11 Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
  12 ---
  13  arch/arm/cpu/armv8/start.S |    3 +++
  14  1 file changed, 3 insertions(+)
  15
  16 diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
  17 index 235213f..9703f6b 100644
  18 --- a/arch/arm/cpu/armv8/start.S
  19 +++ b/arch/arm/cpu/armv8/start.S
  20 @@ -70,6 +70,9 @@ reset:
  21         mov     x0, #3 << 20
  22         msr     cpacr_el1, x0                   /* Enable FP/SIMD */
  23  0:
  24 +       /* Enalbe SMPEN bit */
  25 +       mov     x0, #0x40
  26 +       msr     s3_1_c15_c2_1, x0
  27
  28         /* Apply ARM core specific erratas */
  29         bl      apply_core_errata
  30 --
  31 1.7.9.5
  32