package/boot/uboot-lantiq/patches/0111-MIPS-add-board-support-for-Arcadyan-ARV7510PW22.patch

   1 --- /dev/null
   2 +++ b/board/arcadyan/arv7510pw22/arv7510pw22.c
   3 @@ -0,0 +1,55 @@
   4 +/*
   5 + * Copyright (C) 2014 Álvaro Fernández Rojas <noltari@gmail.com>
   6 + *
   7 + * SPDX-License-Identifier:    GPL-2.0+
   8 + */
   9 +
  10 +#include <common.h>
  11 +#include <switch.h>
  12 +#include <asm/gpio.h>
  13 +#include <asm/lantiq/eth.h>
  14 +#include <asm/lantiq/reset.h>
  15 +#include <asm/lantiq/chipid.h>
  16 +
  17 +int board_early_init_f(void)
  18 +{
  19 +       /* Switch on Power LED */
  20 +       gpio_direction_output(2, 0);
  21 +       gpio_set_value(2, 0);
  22 +
  23 +       return 0;
  24 +}
  25 +
  26 +int checkboard(void)
  27 +{
  28 +       puts("Board: " CONFIG_BOARD_NAME "\n");
  29 +       ltq_chip_print_info();
  30 +
  31 +       return 0;
  32 +}
  33 +
  34 +static const struct ltq_eth_port_config eth_port_config[] = {
  35 +       /* MAC0: Atheros ar8216 switch */
  36 +       { 0, 0x0, LTQ_ETH_PORT_SWITCH, PHY_INTERFACE_MODE_NONE },
  37 +};
  38 +
  39 +static const struct ltq_eth_board_config eth_board_config = {
  40 +       .ports = eth_port_config,
  41 +       .num_ports = ARRAY_SIZE(eth_port_config),
  42 +};
  43 +
  44 +int board_eth_init(bd_t *bis)
  45 +{
  46 +       return ltq_eth_initialize(&eth_board_config);
  47 +}
  48 +
  49 +static struct switch_device ar8216_dev = {
  50 +       .name = "ar8216",
  51 +       .cpu_port = 0,
  52 +       .port_mask = 0xF,
  53 +};
  54 +
  55 +int board_switch_init(void)
  56 +{
  57 +       return switch_device_register(&ar8216_dev);
  58 +}
  59 --- /dev/null
  60 +++ b/board/arcadyan/arv7510pw22/config.mk
  61 @@ -0,0 +1,7 @@
  62 +#
  63 +# Copyright (C) 2011-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
  64 +#
  65 +# SPDX-License-Identifier:     GPL-2.0+
  66 +#
  67 +
  68 +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR)
  69 --- /dev/null
  70 +++ b/board/arcadyan/arv7510pw22/ddr_settings.h
  71 @@ -0,0 +1,55 @@
  72 +/*
  73 + * Copyright (C) 2014 Álvaro Fernández Rojas <noltari@gmail.com>
  74 + *
  75 + * This file has been generated with lantiq_ram_extract_magic.awk script.
  76 + *
  77 + * SPDX-License-Identifier:    GPL-2.0+
  78 + */
  79 +
  80 +#define MC_DC00_VALUE  0x1B1B
  81 +#define MC_DC01_VALUE  0x0
  82 +#define MC_DC02_VALUE  0x0
  83 +#define MC_DC03_VALUE  0x0
  84 +#define MC_DC04_VALUE  0x0
  85 +#define MC_DC05_VALUE  0x200
  86 +#define MC_DC06_VALUE  0x605
  87 +#define MC_DC07_VALUE  0x303
  88 +#define MC_DC08_VALUE  0x102
  89 +#define MC_DC09_VALUE  0x70A
  90 +#define MC_DC10_VALUE  0x203
  91 +#define MC_DC11_VALUE  0xC02
  92 +#define MC_DC12_VALUE  0x1C8
  93 +#define MC_DC13_VALUE  0x1
  94 +#define MC_DC14_VALUE  0x0
  95 +#define MC_DC15_VALUE  0x134
  96 +#define MC_DC16_VALUE  0xC800
  97 +#define MC_DC17_VALUE  0xD
  98 +#define MC_DC18_VALUE  0x301
  99 +#define MC_DC19_VALUE  0x200
 100 +#define MC_DC20_VALUE  0xA03
 101 +#define MC_DC21_VALUE  0x1400
 102 +#define MC_DC22_VALUE  0x1414
 103 +#define MC_DC23_VALUE  0x0
 104 +#define MC_DC24_VALUE  0x5B
 105 +#define MC_DC25_VALUE  0x0
 106 +#define MC_DC26_VALUE  0x0
 107 +#define MC_DC27_VALUE  0x0
 108 +#define MC_DC28_VALUE  0x510
 109 +#define MC_DC29_VALUE  0x4E20
 110 +#define MC_DC30_VALUE  0x8235
 111 +#define MC_DC31_VALUE  0x0
 112 +#define MC_DC32_VALUE  0x0
 113 +#define MC_DC33_VALUE  0x0
 114 +#define MC_DC34_VALUE  0x0
 115 +#define MC_DC35_VALUE  0x0
 116 +#define MC_DC36_VALUE  0x0
 117 +#define MC_DC37_VALUE  0x0
 118 +#define MC_DC38_VALUE  0x0
 119 +#define MC_DC39_VALUE  0x0
 120 +#define MC_DC40_VALUE  0x0
 121 +#define MC_DC41_VALUE  0x0
 122 +#define MC_DC42_VALUE  0x0
 123 +#define MC_DC43_VALUE  0x0
 124 +#define MC_DC44_VALUE  0x0
 125 +#define MC_DC45_VALUE  0x500
 126 +#define MC_DC46_VALUE  0x0
 127 --- /dev/null
 128 +++ b/board/arcadyan/arv7510pw22/Makefile
 129 @@ -0,0 +1,27 @@
 130 +#
 131 +# Copyright (C) 2000-2011 Wolfgang Denk, DENX Software Engineering, wd@denx.de
 132 +#
 133 +# SPDX-License-Identifier:     GPL-2.0+
 134 +#
 135 +
 136 +include $(TOPDIR)/config.mk
 137 +
 138 +LIB    = $(obj)lib$(BOARD).o
 139 +
 140 +COBJS  = $(BOARD).o
 141 +
 142 +SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 143 +OBJS   := $(addprefix $(obj),$(COBJS))
 144 +SOBJS  := $(addprefix $(obj),$(SOBJS))
 145 +
 146 +$(LIB):        $(obj).depend $(OBJS) $(SOBJS)
 147 +       $(call cmd_link_o_target, $(OBJS) $(SOBJS))
 148 +
 149 +#########################################################################
 150 +
 151 +# defines $(obj).depend target
 152 +include $(SRCTREE)/rules.mk
 153 +
 154 +sinclude $(obj).depend
 155 +
 156 +#########################################################################
 157 --- a/boards.cfg
 158 +++ b/boards.cfg
 159 @@ -508,6 +508,9 @@ Active  mips        mips32         danub
 160  Active  mips        mips32         danube      arcadyan        arv7510pw           arv7510pw_brn                        arv7510pw:SYS_BOOT_BRN                                                                                                            Luka Perkov <luka@openwrt.org>
 161  Active  mips        mips32         danube      arcadyan        arv7510pw           arv7510pw_nor                        arv7510pw:SYS_BOOT_NOR                                                                                                            Luka Perkov <luka@openwrt.org>
 162  Active  mips        mips32         danube      arcadyan        arv7510pw           arv7510pw_ram                        arv7510pw:SYS_BOOT_RAM                                                                                                            Luka Perkov <luka@openwrt.org>
 163 +Active  mips        mips32         danube      arcadyan        arv7510pw22         arv7510pw22_brn                        arv7510pw22:SYS_BOOT_BRN                                                                                                          Álvaro Fernández Rojas <noltari@gmail.com>
 164 +Active  mips        mips32         danube      arcadyan        arv7510pw22         arv7510pw22_nor                        arv7510pw22:SYS_BOOT_NOR                                                                                                          Álvaro Fernández Rojas <noltari@gmail.com>
 165 +Active  mips        mips32         danube      arcadyan        arv7510pw22         arv7510pw22_ram                        arv7510pw22:SYS_BOOT_RAM                                                                                                          Álvaro Fernández Rojas <noltari@gmail.com>
 166  Active  mips        mips32         danube      arcadyan        arv7518pw           arv7518pw_brn                        arv7518pw:SYS_BOOT_BRN                                                                                                            Luka Perkov <luka@openwrt.org>
 167  Active  mips        mips32         danube      arcadyan        arv7518pw           arv7518pw_nor                        arv7518pw:SYS_BOOT_NOR                                                                                                            Luka Perkov <luka@openwrt.org>
 168  Active  mips        mips32         danube      arcadyan        arv7518pw           arv7518pw_ram                        arv7518pw:SYS_BOOT_RAM                                                                                                            Luka Perkov <luka@openwrt.org>
 169 --- /dev/null
 170 +++ b/include/configs/arv7510pw22.h
 171 @@ -0,0 +1,69 @@
 172 +/*
 173 + * Copyright (C) 2014 Álvaro Fernández Rojas <noltari@gmail.com>
 174 + *
 175 + * SPDX-License-Identifier:    GPL-2.0+
 176 + */
 177 +
 178 +#ifndef __CONFIG_H
 179 +#define __CONFIG_H
 180 +
 181 +#define CONFIG_MACH_TYPE       "ARV7510PW22"
 182 +#define CONFIG_IDENT_STRING    " "CONFIG_MACH_TYPE
 183 +#define CONFIG_BOARD_NAME      "Arcadyan ARV7510PW22"
 184 +
 185 +/* Configure SoC */
 186 +#define CONFIG_LTQ_SUPPORT_UART                /* Enable ASC and UART */
 187 +
 188 +#define CONFIG_LTQ_SUPPORT_ETHERNET    /* Enable ethernet */
 189 +
 190 +#define CONFIG_LTQ_SUPPORT_NOR_FLASH   /* Have a parallel NOR flash */
 191 +
 192 +#define CONFIG_SYS_BOOTM_LEN           0x1000000       /* 16 MB */
 193 +
 194 +/* Switch devices */
 195 +#define CONFIG_SWITCH_MULTI
 196 +#define CONFIG_SWITCH_AR8216
 197 +
 198 +/* Environment */
 199 +#if defined(CONFIG_SYS_BOOT_NOR)
 200 +#define CONFIG_ENV_IS_IN_FLASH
 201 +#define CONFIG_ENV_OVERWRITE
 202 +#define CONFIG_ENV_OFFSET              (256 * 1024)
 203 +#define CONFIG_ENV_SECT_SIZE           (128 * 1024)
 204 +#else
 205 +#define CONFIG_ENV_IS_NOWHERE
 206 +#endif
 207 +
 208 +#define CONFIG_ENV_SIZE                        (8 * 1024)
 209 +#define CONFIG_LOADADDR                        CONFIG_SYS_LOAD_ADDR
 210 +
 211 +/* Burnboot loadable image */
 212 +#if defined(CONFIG_SYS_BOOT_BRN)
 213 +#define CONFIG_SYS_TEXT_BASE           0x80002000
 214 +#define CONFIG_SKIP_LOWLEVEL_INIT
 215 +#define CONFIG_SYS_DISABLE_CACHE
 216 +#define CONFIG_ENV_OVERWRITE 1
 217 +#endif
 218 +
 219 +/* Console */
 220 +#define CONFIG_LTQ_ADVANCED_CONSOLE
 221 +#define CONFIG_BAUDRATE                        115200
 222 +#define CONFIG_CONSOLE_ASC             1
 223 +#define CONFIG_CONSOLE_DEV             "ttyLTQ1"
 224 +
 225 +/* Pull in default board configs for Lantiq XWAY Danube */
 226 +#include <asm/lantiq/config.h>
 227 +#include <asm/arch/config.h>
 228 +
 229 +/* Pull in default OpenWrt configs for Lantiq SoC */
 230 +#include "openwrt-lantiq-common.h"
 231 +
 232 +#define CONFIG_ENV_UPDATE_UBOOT_NOR            \
 233 +       "update-uboot-nor=run load-uboot-nor write-uboot-nor\0"
 234 +
 235 +#define CONFIG_EXTRA_ENV_SETTINGS      \
 236 +       CONFIG_ENV_LANTIQ_DEFAULTS      \
 237 +       CONFIG_ENV_UPDATE_UBOOT_NOR     \
 238 +       "kernel_addr=0xB0060000\0"
 239 +
 240 +#endif /* __CONFIG_H */