rockchip: add Radxa CM3 IO board support
[openwrt/staging/jow.git] / target / linux / ramips / dts / mt7621_jcg_jhr-ac876m.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "mt7621.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8
9 / {
10 compatible = "jcg,jhr-ac876m", "mediatek,mt7621-soc";
11 model = "JCG JHR-AC876M";
12
13 aliases {
14 led-boot = &led_wps;
15 led-failsafe = &led_wps;
16 led-running = &led_wps;
17 led-upgrade = &led_wps;
18 label-mac-device = &gmac1;
19 };
20
21 leds {
22 compatible = "gpio-leds";
23
24 usb3 {
25 label = "blue:usb3";
26 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
27 trigger-sources = <&xhci_ehci_port1>;
28 linux,default-trigger = "usbport";
29 };
30
31 usb2 {
32 label = "blue:usb2";
33 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
34 trigger-sources = <&ehci_port2>;
35 linux,default-trigger = "usbport";
36 };
37
38 led_wps: wps {
39 function = LED_FUNCTION_WPS;
40 color = <LED_COLOR_ID_BLUE>;
41 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
42 };
43 };
44
45 keys {
46 compatible = "gpio-keys";
47
48 reset {
49 label = "reset";
50 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
51 linux,code = <KEY_RESTART>;
52 };
53
54 wps {
55 label = "wps";
56 gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
57 linux,code = <KEY_WPS_BUTTON>;
58 };
59 };
60 };
61
62 &spi0 {
63 status = "okay";
64
65 flash@0 {
66 compatible = "jedec,spi-nor";
67 reg = <0>;
68 spi-max-frequency = <80000000>;
69 m25p,fast-read;
70
71 partitions {
72 compatible = "fixed-partitions";
73 #address-cells = <1>;
74 #size-cells = <1>;
75
76 partition@0 {
77 label = "u-boot";
78 reg = <0x0 0x30000>;
79 read-only;
80 };
81
82 partition@30000 {
83 label = "u-boot-env";
84 reg = <0x30000 0x10000>;
85 read-only;
86 };
87
88 factory: partition@40000 {
89 label = "factory";
90 reg = <0x40000 0x10000>;
91 read-only;
92
93 nvmem-layout {
94 compatible = "fixed-layout";
95 #address-cells = <1>;
96 #size-cells = <1>;
97
98 eeprom_factory_0: eeprom@0 {
99 reg = <0x0 0x4da8>;
100 };
101
102 eeprom_factory_8000: eeprom@8000 {
103 reg = <0x8000 0x4da8>;
104 };
105
106 macaddr_factory_4: macaddr@4 {
107 reg = <0x4 0x6>;
108 };
109
110 macaddr_factory_e000: macaddr@e000 {
111 reg = <0xe000 0x6>;
112 };
113 };
114 };
115
116 partition@50000 {
117 compatible = "denx,uimage";
118 label = "firmware";
119 reg = <0x50000 0xfb0000>;
120 };
121 };
122 };
123 };
124
125 &pcie {
126 status = "okay";
127 };
128
129 &pcie0 {
130 wifi@0,0 {
131 compatible = "mediatek,mt76";
132 reg = <0x0000 0 0 0 0>;
133 nvmem-cells = <&eeprom_factory_0>;
134 nvmem-cell-names = "eeprom";
135 ieee80211-freq-limit = <2400000 2500000>;
136
137 led {
138 led-active-low;
139 };
140 };
141 };
142
143 &pcie1 {
144 wifi@0,0 {
145 compatible = "mediatek,mt76";
146 reg = <0x0000 0 0 0 0>;
147 nvmem-cells = <&eeprom_factory_8000>;
148 nvmem-cell-names = "eeprom";
149 ieee80211-freq-limit = <5000000 6000000>;
150
151 led {
152 led-active-low;
153 };
154 };
155 };
156
157 &gmac0 {
158 nvmem-cells = <&macaddr_factory_e000>;
159 nvmem-cell-names = "mac-address";
160 };
161
162 &gmac1 {
163 status = "okay";
164 label = "wan";
165 phy-handle = <&ethphy4>;
166
167 nvmem-cells = <&macaddr_factory_4>;
168 nvmem-cell-names = "mac-address";
169 };
170
171 &mdio {
172 ethphy4: ethernet-phy@4 {
173 reg = <4>;
174 };
175 };
176
177 &switch0 {
178 ports {
179 port@0 {
180 status = "okay";
181 label = "lan1";
182 };
183
184 port@1 {
185 status = "okay";
186 label = "lan2";
187 };
188
189 port@2 {
190 status = "okay";
191 label = "lan3";
192 };
193
194 port@3 {
195 status = "okay";
196 label = "lan4";
197 };
198 };
199 };
200
201 &state_default {
202 gpio {
203 groups = "i2c", "uart3", "jtag", "wdt";
204 function = "gpio";
205 };
206 };