target/linux/ipq806x/patches-6.1/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch

   1 From 504188183408fac0f61b59f5ed8ea1773fe43669 Mon Sep 17 00:00:00 2001
   2 From: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
   3 Date: Wed, 15 Jun 2022 16:59:30 +0200
   4 Subject: [PATCH 2/2] ARM: dts: qcom: add MDIO dedicated controller node for
   5  ipq806x
   6
   7 Add MDIO dedicated controller attached to gmac0 and fix rb3011 dts to
   8 correctly use the new tag.
   9
  10 Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
  11 ---
  12  arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 134 +++++++++++-----------
  13  arch/arm/boot/dts/qcom-ipq8064.dtsi       |  14 +++
  14  2 files changed, 81 insertions(+), 67 deletions(-)
  15
  16 --- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
  17 +++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
  18 @@ -25,73 +25,6 @@
  19                 device_type = "memory";
  20         };
  21
  22 -       mdio0: mdio-0 {
  23 -               status = "okay";
  24 -               compatible = "virtual,mdio-gpio";
  25 -               gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
  26 -                       <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
  27 -               #address-cells = <1>;
  28 -               #size-cells = <0>;
  29 -
  30 -               pinctrl-0 = <&mdio0_pins>;
  31 -               pinctrl-names = "default";
  32 -
  33 -               switch0: switch@10 {
  34 -                       compatible = "qca,qca8337";
  35 -                       #address-cells = <1>;
  36 -                       #size-cells = <0>;
  37 -
  38 -                       dsa,member = <0 0>;
  39 -
  40 -                       pinctrl-0 = <&sw0_reset_pin>;
  41 -                       pinctrl-names = "default";
  42 -
  43 -                       reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
  44 -                       reg = <0x10>;
  45 -
  46 -                       ports {
  47 -                               #address-cells = <1>;
  48 -                               #size-cells = <0>;
  49 -
  50 -                               switch0cpu: port@0 {
  51 -                                       reg = <0>;
  52 -                                       label = "cpu";
  53 -                                       ethernet = <&gmac0>;
  54 -                                       phy-mode = "rgmii-id";
  55 -                                       fixed-link {
  56 -                                               speed = <1000>;
  57 -                                               full-duplex;
  58 -                                       };
  59 -                               };
  60 -
  61 -                               port@1 {
  62 -                                       reg = <1>;
  63 -                                       label = "sw1";
  64 -                               };
  65 -
  66 -                               port@2 {
  67 -                                       reg = <2>;
  68 -                                       label = "sw2";
  69 -                               };
  70 -
  71 -                               port@3 {
  72 -                                       reg = <3>;
  73 -                                       label = "sw3";
  74 -                               };
  75 -
  76 -                               port@4 {
  77 -                                       reg = <4>;
  78 -                                       label = "sw4";
  79 -                               };
  80 -
  81 -                               port@5 {
  82 -                                       reg = <5>;
  83 -                                       label = "sw5";
  84 -                               };
  85 -                       };
  86 -               };
  87 -       };
  88 -
  89         mdio1: mdio-1 {
  90                 status = "okay";
  91                 compatible = "virtual,mdio-gpio";
  92 @@ -222,6 +155,73 @@
  93         status = "okay";
  94  };
  95
  96 +&mdio0 {
  97 +       status = "okay";
  98 +       compatible = "virtual,mdio-gpio";
  99 +       gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
 100 +               <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
 101 +       #address-cells = <1>;
 102 +       #size-cells = <0>;
 103 +
 104 +       pinctrl-0 = <&mdio0_pins>;
 105 +       pinctrl-names = "default";
 106 +
 107 +       switch0: switch@10 {
 108 +               compatible = "qca,qca8337";
 109 +               #address-cells = <1>;
 110 +               #size-cells = <0>;
 111 +
 112 +               dsa,member = <0 0>;
 113 +
 114 +               pinctrl-0 = <&sw0_reset_pin>;
 115 +               pinctrl-names = "default";
 116 +
 117 +               reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
 118 +               reg = <0x10>;
 119 +
 120 +               ports {
 121 +                       #address-cells = <1>;
 122 +                       #size-cells = <0>;
 123 +
 124 +                       switch0cpu: port@0 {
 125 +                               reg = <0>;
 126 +                               label = "cpu";
 127 +                               ethernet = <&gmac0>;
 128 +                               phy-mode = "rgmii-id";
 129 +                               fixed-link {
 130 +                                       speed = <1000>;
 131 +                                       full-duplex;
 132 +                               };
 133 +                       };
 134 +
 135 +                       port@1 {
 136 +                               reg = <1>;
 137 +                               label = "sw1";
 138 +                       };
 139 +
 140 +                       port@2 {
 141 +                               reg = <2>;
 142 +                               label = "sw2";
 143 +                       };
 144 +
 145 +                       port@3 {
 146 +                               reg = <3>;
 147 +                               label = "sw3";
 148 +                       };
 149 +
 150 +                       port@4 {
 151 +                               reg = <4>;
 152 +                               label = "sw4";
 153 +                       };
 154 +
 155 +                       port@5 {
 156 +                               reg = <5>;
 157 +                               label = "sw5";
 158 +                       };
 159 +               };
 160 +       };
 161 +};
 162 +
 163  &gmac0 {
 164         status = "okay";
 165
 166 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
 167 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
 168 @@ -476,6 +476,20 @@
 169                         snps,blen = <16 0 0 0 0 0 0>;
 170                 };
 171
 172 +               mdio0: mdio@37000000 {
 173 +                       #address-cells = <1>;
 174 +                       #size-cells = <0>;
 175 +
 176 +                       compatible = "qcom,ipq8064-mdio", "syscon";
 177 +                       reg = <0x37000000 0x200000>;
 178 +                       resets = <&gcc GMAC_CORE1_RESET>;
 179 +                       reset-names = "stmmaceth";
 180 +                       clocks = <&gcc GMAC_CORE1_CLK>;
 181 +                       clock-names = "stmmaceth";
 182 +
 183 +                       status = "disabled";
 184 +               };
 185 +
 186                 vsdcc_fixed: vsdcc-regulator {
 187                         compatible = "regulator-fixed";
 188                         regulator-name = "SDCC Power";