target/linux/ipq806x/patches-6.1/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch

   1 From 211fc0c0a63c99b68663a27182e643316c2d8cbe Mon Sep 17 00:00:00 2001
   2 From: Ansuel Smith <ansuelsmth@gmail.com>
   3 Date: Tue, 18 Jan 2022 00:07:57 +0100
   4 Subject: [PATCH v3 15/18] ARM: dts: qcom: add multiple missing binding for cpu
   5  and l2 for ipq8064
   6
   7 Add multiple binding for cpu node, l2 node and add idle-states
   8 definition for ipq8064 dtsi.
   9
  10 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  11 Tested-by: Jonathan McDowell <noodles@earth.li>
  12 ---
  13  arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++
  14  1 file changed, 36 insertions(+)
  15
  16 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
  17 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
  18 @@ -30,6 +30,15 @@
  19                         next-level-cache = <&L2>;
  20                         qcom,acc = <&acc0>;
  21                         qcom,saw = <&saw0>;
  22 +                       clocks = <&kraitcc 0>, <&kraitcc 4>;
  23 +                       clock-names = "cpu", "l2";
  24 +                       clock-latency = <100000>;
  25 +                       operating-points-v2 = <&opp_table0>;
  26 +                       voltage-tolerance = <5>;
  27 +                       cooling-min-state = <0>;
  28 +                       cooling-max-state = <10>;
  29 +                       #cooling-cells = <2>;
  30 +                       cpu-idle-states = <&CPU_SPC>;
  31                 };
  32
  33                 cpu1: cpu@1 {
  34 @@ -40,11 +49,35 @@
  35                         next-level-cache = <&L2>;
  36                         qcom,acc = <&acc1>;
  37                         qcom,saw = <&saw1>;
  38 +                       clocks = <&kraitcc 1>, <&kraitcc 4>;
  39 +                       clock-names = "cpu", "l2";
  40 +                       clock-latency = <100000>;
  41 +                       operating-points-v2 = <&opp_table0>;
  42 +                       voltage-tolerance = <5>;
  43 +                       cooling-min-state = <0>;
  44 +                       cooling-max-state = <10>;
  45 +                       #cooling-cells = <2>;
  46 +                       cpu-idle-states = <&CPU_SPC>;
  47 +               };
  48 +
  49 +               idle-states {
  50 +                       CPU_SPC: spc {
  51 +                               compatible = "qcom,idle-state-spc";
  52 +                               status = "disabled";
  53 +                               entry-latency-us = <400>;
  54 +                               exit-latency-us = <900>;
  55 +                               min-residency-us = <3000>;
  56 +                       };
  57                 };
  58
  59                 L2: l2-cache {
  60                         compatible = "cache";
  61                         cache-level = <2>;
  62 +                       qcom,saw = <&saw_l2>;
  63 +
  64 +                       clocks = <&kraitcc 4>;
  65 +                       clock-names = "l2";
  66 +                       operating-points-v2 = <&opp_table_l2>;
  67                 };
  68         };
  69
  70 --- a/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi
  71 +++ b/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi
  72 @@ -2,6 +2,18 @@
  73
  74  #include "qcom-ipq8064.dtsi"
  75
  76 +&cpu0 {
  77 +       cpu-supply = <&smb208_s2a>;
  78 +};
  79 +
  80 +&cpu1 {
  81 +       cpu-supply = <&smb208_s2b>;
  82 +};
  83 +
  84 +&L2 {
  85 +       l2-supply = <&smb208_s1a>;
  86 +};
  87 +
  88  &rpm {
  89         smb208_regulators: regulators {
  90                 compatible = "qcom,rpm-smb208-regulators";
  91 --- a/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
  92 +++ b/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
  93 @@ -2,6 +2,18 @@
  94
  95  #include "qcom-ipq8064-v2.0.dtsi"
  96
  97 +&cpu0 {
  98 +       cpu-supply = <&smb208_s2a>;
  99 +};
 100 +
 101 +&cpu1 {
 102 +       cpu-supply = <&smb208_s2b>;
 103 +};
 104 +
 105 +&L2 {
 106 +       l2-supply = <&smb208_s1a>;
 107 +};
 108 +
 109  &rpm {
 110         smb208_regulators: regulators {
 111                 compatible = "qcom,rpm-smb208-regulators";
 112 --- a/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi
 113 +++ b/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi
 114 @@ -2,6 +2,18 @@
 115
 116  #include "qcom-ipq8062.dtsi"
 117
 118 +&cpu0 {
 119 +       cpu-supply = <&smb208_s2a>;
 120 +};
 121 +
 122 +&cpu1 {
 123 +       cpu-supply = <&smb208_s2b>;
 124 +};
 125 +
 126 +&L2 {
 127 +       l2-supply = <&smb208_s1a>;
 128 +};
 129 +
 130  &rpm {
 131         smb208_regulators: regulators {
 132                 compatible = "qcom,rpm-smb208-regulators";
 133 --- a/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi
 134 +++ b/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi
 135 @@ -2,6 +2,18 @@
 136
 137  #include "qcom-ipq8065.dtsi"
 138
 139 +&cpu0 {
 140 +       cpu-supply = <&smb208_s2a>;
 141 +};
 142 +
 143 +&cpu1 {
 144 +       cpu-supply = <&smb208_s2b>;
 145 +};
 146 +
 147 +&L2 {
 148 +       l2-supply = <&smb208_s1a>;
 149 +};
 150 +
 151  &rpm {
 152         smb208_regulators: regulators {
 153                 compatible = "qcom,rpm-smb208-regulators";