16e924b303d047258bb32750fd52cd0dac271482
[openwrt/openwrt.git] / target / linux / ipq806x / patches-6.1 / 107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch
1 From 076ebb6e1799c4c7a1d2e07510d88b9e9b57b551 Mon Sep 17 00:00:00 2001
2 From: Ansuel Smith <ansuelsmth@gmail.com>
3 Date: Tue, 18 Jan 2022 00:03:47 +0100
4 Subject: [PATCH v3 13/18] ARM: dts: qcom: add opp table for cpu and l2 for
5 ipq8064
6
7 Add opp table for cpu and l2 cache. While the current cpufreq is
8 the generic one that doesn't scale the L2 cache, we add the l2
9 cache opp anyway for the sake of completeness. This will be handy in the
10 future when a dedicated cpufreq driver is introduced for krait cores
11 that will correctly scale l2 cache with the core freq.
12
13 Opp-level is set based on the logic of
14 0: idle level
15 1: normal level
16 2: turbo level
17
18 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
19 Tested-by: Jonathan McDowell <noodles@earth.li>
20 ---
21 arch/arm/boot/dts/qcom-ipq8064.dtsi | 99 +++++++++++++++++++++++++++++
22 1 file changed, 99 insertions(+)
23
24 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
25 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
26 @@ -48,6 +48,105 @@
27 };
28 };
29
30 + opp_table_l2: opp_table_l2 {
31 + compatible = "operating-points-v2";
32 +
33 + opp-384000000 {
34 + opp-hz = /bits/ 64 <384000000>;
35 + opp-microvolt = <1100000>;
36 + clock-latency-ns = <100000>;
37 + opp-level = <0>;
38 + };
39 +
40 + opp-1000000000 {
41 + opp-hz = /bits/ 64 <1000000000>;
42 + opp-microvolt = <1100000>;
43 + clock-latency-ns = <100000>;
44 + opp-level = <1>;
45 + };
46 +
47 + opp-1200000000 {
48 + opp-hz = /bits/ 64 <1200000000>;
49 + opp-microvolt = <1150000>;
50 + clock-latency-ns = <100000>;
51 + opp-level = <2>;
52 + };
53 + };
54 +
55 + opp_table0: opp_table0 {
56 + compatible = "operating-points-v2-kryo-cpu";
57 + nvmem-cells = <&speedbin_efuse>;
58 +
59 + /*
60 + * Voltage thresholds are <target min max>
61 + */
62 + opp-384000000 {
63 + opp-hz = /bits/ 64 <384000000>;
64 + opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
65 + opp-microvolt-speed0-pvs1-v0 = <925000 878750 971250>;
66 + opp-microvolt-speed0-pvs2-v0 = <875000 831250 918750>;
67 + opp-microvolt-speed0-pvs3-v0 = <800000 760000 840000>;
68 + opp-supported-hw = <0x1>;
69 + clock-latency-ns = <100000>;
70 + opp-level = <0>;
71 + };
72 +
73 + opp-600000000 {
74 + opp-hz = /bits/ 64 <600000000>;
75 + opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
76 + opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>;
77 + opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>;
78 + opp-microvolt-speed0-pvs3-v0 = <850000 807500 892500>;
79 + opp-supported-hw = <0x1>;
80 + clock-latency-ns = <100000>;
81 + opp-level = <1>;
82 + };
83 +
84 + opp-800000000 {
85 + opp-hz = /bits/ 64 <800000000>;
86 + opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
87 + opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>;
88 + opp-microvolt-speed0-pvs2-v0 = <995000 945250 1044750>;
89 + opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>;
90 + opp-supported-hw = <0x1>;
91 + clock-latency-ns = <100000>;
92 + opp-level = <1>;
93 + };
94 +
95 + opp-1000000000 {
96 + opp-hz = /bits/ 64 <1000000000>;
97 + opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>;
98 + opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
99 + opp-microvolt-speed0-pvs2-v0 = <1025000 973750 1076250>;
100 + opp-microvolt-speed0-pvs3-v0 = <950000 902500 997500>;
101 + opp-supported-hw = <0x1>;
102 + clock-latency-ns = <100000>;
103 + opp-level = <1>;
104 + };
105 +
106 + opp-1200000000 {
107 + opp-hz = /bits/ 64 <1200000000>;
108 + opp-microvolt-speed0-pvs0-v0 = <1200000 1140000 1260000>;
109 + opp-microvolt-speed0-pvs1-v0 = <1125000 1068750 1181250>;
110 + opp-microvolt-speed0-pvs2-v0 = <1075000 1021250 1128750>;
111 + opp-microvolt-speed0-pvs3-v0 = <1000000 950000 1050000>;
112 + opp-supported-hw = <0x1>;
113 + clock-latency-ns = <100000>;
114 + opp-level = <2>;
115 + };
116 +
117 + opp-1400000000 {
118 + opp-hz = /bits/ 64 <1400000000>;
119 + opp-microvolt-speed0-pvs0-v0 = <1250000 1187500 1312500>;
120 + opp-microvolt-speed0-pvs1-v0 = <1175000 1116250 1233750>;
121 + opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>;
122 + opp-microvolt-speed0-pvs3-v0 = <1050000 997500 1102500>;
123 + opp-supported-hw = <0x1>;
124 + clock-latency-ns = <100000>;
125 + opp-level = <2>;
126 + };
127 + };
128 +
129 thermal-zones {
130 sensor0-thermal {
131 polling-delay-passive = <0>;
132 --- a/arch/arm/boot/dts/qcom-ipq8065.dtsi
133 +++ b/arch/arm/boot/dts/qcom-ipq8065.dtsi
134 @@ -6,3 +6,92 @@
135 model = "Qualcomm Technologies, Inc. IPQ8065";
136 compatible = "qcom,ipq8065", "qcom,ipq8064";
137 };
138 +
139 +&opp_table_l2 {
140 + /delete-node/opp-1200000000;
141 +
142 + opp-1400000000 {
143 + opp-hz = /bits/ 64 <1400000000>;
144 + opp-microvolt = <1150000>;
145 + clock-latency-ns = <100000>;
146 + opp-level = <2>;
147 + };
148 +};
149 +
150 +&opp_table0 {
151 + /*
152 + * On ipq8065 1.2 ghz freq is not present
153 + * Remove it to make cpufreq work and not
154 + * complain for missing definition
155 + */
156 +
157 + /delete-node/opp-1200000000;
158 +
159 + /*
160 + * Voltage thresholds are <target min max>
161 + */
162 + opp-384000000 {
163 + opp-microvolt-speed0-pvs0-v0 = <975000 926250 1023750>;
164 + opp-microvolt-speed0-pvs1-v0 = <950000 902500 997500>;
165 + opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>;
166 + opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>;
167 + opp-microvolt-speed0-pvs4-v0 = <875000 831250 918750>;
168 + opp-microvolt-speed0-pvs5-v0 = <825000 783750 866250>;
169 + opp-microvolt-speed0-pvs6-v0 = <775000 736250 813750>;
170 + };
171 +
172 + opp-600000000 {
173 + opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
174 + opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>;
175 + opp-microvolt-speed0-pvs2-v0 = <950000 902500 997500>;
176 + opp-microvolt-speed0-pvs3-v0 = <925000 878750 971250>;
177 + opp-microvolt-speed0-pvs4-v0 = <900000 855000 945000>;
178 + opp-microvolt-speed0-pvs5-v0 = <850000 807500 892500>;
179 + opp-microvolt-speed0-pvs6-v0 = <800000 760000 840000>;
180 + };
181 +
182 + opp-800000000 {
183 + opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
184 + opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>;
185 + opp-microvolt-speed0-pvs2-v0 = <1000000 950000 1050000>;
186 + opp-microvolt-speed0-pvs3-v0 = <975000 926250 1023750>;
187 + opp-microvolt-speed0-pvs4-v0 = <950000 902500 997500>;
188 + opp-microvolt-speed0-pvs5-v0 = <900000 855000 945000>;
189 + opp-microvolt-speed0-pvs6-v0 = <850000 807500 892500>;
190 + };
191 +
192 + opp-1000000000 {
193 + opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
194 + opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
195 + opp-microvolt-speed0-pvs2-v0 = <1050000 997500 1102500>;
196 + opp-microvolt-speed0-pvs3-v0 = <1025000 973750 1076250>;
197 + opp-microvolt-speed0-pvs4-v0 = <1000000 950000 1050000>;
198 + opp-microvolt-speed0-pvs5-v0 = <950000 902500 997500>;
199 + opp-microvolt-speed0-pvs6-v0 = <900000 855000 945000>;
200 + };
201 +
202 + opp-1400000000 {
203 + opp-microvolt-speed0-pvs0-v0 = <1175000 1116250 1233750>;
204 + opp-microvolt-speed0-pvs1-v0 = <1150000 1092500 1207500>;
205 + opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>;
206 + opp-microvolt-speed0-pvs3-v0 = <1100000 1045000 1155000>;
207 + opp-microvolt-speed0-pvs4-v0 = <1075000 1021250 1128750>;
208 + opp-microvolt-speed0-pvs5-v0 = <1025000 973750 1076250>;
209 + opp-microvolt-speed0-pvs6-v0 = <975000 926250 1023750>;
210 + opp-level = <1>;
211 + };
212 +
213 + opp-1725000000 {
214 + opp-hz = /bits/ 64 <1725000000>;
215 + opp-microvolt-speed0-pvs0-v0 = <1262500 1199375 1325625>;
216 + opp-microvolt-speed0-pvs1-v0 = <1225000 1163750 1286250>;
217 + opp-microvolt-speed0-pvs2-v0 = <1200000 1140000 1260000>;
218 + opp-microvolt-speed0-pvs3-v0 = <1175000 1116250 1233750>;
219 + opp-microvolt-speed0-pvs4-v0 = <1150000 1092500 1207500>;
220 + opp-microvolt-speed0-pvs5-v0 = <1100000 1045000 1155000>;
221 + opp-microvolt-speed0-pvs6-v0 = <1050000 997500 1102500>;
222 + opp-supported-hw = <0x1>;
223 + clock-latency-ns = <100000>;
224 + opp-level = <2>;
225 + };
226 +};
227 --- a/arch/arm/boot/dts/qcom-ipq8062.dtsi
228 +++ b/arch/arm/boot/dts/qcom-ipq8062.dtsi
229 @@ -6,3 +6,39 @@
230 model = "Qualcomm Technologies, Inc. IPQ8062";
231 compatible = "qcom,ipq8062", "qcom,ipq8064";
232 };
233 +
234 +&opp_table0 {
235 + /delete-node/opp-1200000000;
236 + /delete-node/opp-1400000000;
237 +
238 + /*
239 + * Voltage thresholds are <target min max>
240 + */
241 + opp-384000000 {
242 + opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
243 + opp-microvolt-speed0-pvs1-v0 = < 925000 878750 971250>;
244 + opp-microvolt-speed0-pvs2-v0 = < 875000 831250 918750>;
245 + opp-microvolt-speed0-pvs3-v0 = < 800000 760000 840000>;
246 + };
247 +
248 + opp-600000000 {
249 + opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
250 + opp-microvolt-speed0-pvs1-v0 = < 975000 926250 1023750>;
251 + opp-microvolt-speed0-pvs2-v0 = < 925000 878750 971250>;
252 + opp-microvolt-speed0-pvs3-v0 = < 850000 807500 892500>;
253 + };
254 +
255 + opp-800000000 {
256 + opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
257 + opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>;
258 + opp-microvolt-speed0-pvs2-v0 = < 995000 945250 1044750>;
259 + opp-microvolt-speed0-pvs3-v0 = < 900000 855000 945000>;
260 + };
261 +
262 + opp-1000000000 {
263 + opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>;
264 + opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
265 + opp-microvolt-speed0-pvs2-v0 = <1025000 973750 1076250>;
266 + opp-microvolt-speed0-pvs3-v0 = < 950000 902500 997500>;
267 + };
268 +};