target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8068-ap3935.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq8064-v2.0.dtsi"
   4
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/leds/common.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8
   9 / {
  10         model = "Extreme Networks AP3935";
  11         compatible = "extreme,ap3935", "qcom,ipq8064";
  12
  13         memory@0 {
  14                 reg = <0x41400000 0x3ec00000>;
  15                 device_type = "memory";
  16         };
  17
  18         aliases {
  19                 serial0 = &gsbi7_serial;
  20                 serial1 = &gsbi2_serial;
  21                 mdio-gpio0 = &mdio0;
  22                 ethernet0 = &gmac0;
  23                 ethernet1 = &gmac2;
  24
  25                 led-boot = &led_power_green;
  26                 led-failsafe = &led_power_orange;
  27                 led-running = &led_power_green;
  28                 led-upgrade = &led_power_green;
  29         };
  30
  31         chosen {
  32                 stdout-path = "serial0:115200n8";
  33                 bootargs-override = "ubi.block=0,0 root=/dev/ubiblock0_0";
  34         };
  35
  36         keys {
  37                 compatible = "gpio-keys";
  38                 pinctrl-0 = <&button_pins>;
  39                 pinctrl-names = "default";
  40
  41                 reset {
  42                         label = "reset";
  43                         gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
  44                         linux,code = <KEY_RESTART>;
  45                         debounce-interval = <60>;
  46                         wakeup-source;
  47                 };
  48         };
  49
  50         leds {
  51                 compatible = "gpio-leds";
  52                 pinctrl-0 = <&led_pins>;
  53                 pinctrl-names = "default";
  54
  55                 led_power_green: power_green {
  56                         function = LED_FUNCTION_POWER;
  57                         color = <LED_COLOR_ID_GREEN>;
  58                         gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
  59                 };
  60
  61                 led_power_orange: power_orange {
  62                         function = LED_FUNCTION_POWER;
  63                         color = <LED_COLOR_ID_ORANGE>;
  64                         gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
  65                 };
  66
  67                 led_wlan2g_green {
  68                         label = "green:wlan2g";
  69                         gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
  70                         linux,default-trigger = "phy0tpt";
  71                 };
  72
  73                 led_wlan5g_green {
  74                         label = "green:wlan5g";
  75                         gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
  76                         linux,default-trigger = "phy1tpt";
  77                 };
  78
  79                 led_lan1_green {
  80                         label = "green:lan1";
  81                         gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
  82                 };
  83
  84                 led_lan1_orange {
  85                         label = "orange:lan1";
  86                         gpios = <&qcom_pinmux 27 GPIO_ACTIVE_LOW>;
  87                 };
  88
  89                 led_lan2_green {
  90                         label = "green:lan2";
  91                         gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
  92                 };
  93
  94                 led_lan2_orange {
  95                         label = "orange:lan2";
  96                         gpios = <&qcom_pinmux 29 GPIO_ACTIVE_LOW>;
  97                 };
  98         };
  99 };
 100
 101
 102 &qcom_pinmux {
 103         spi_pins: spi_pins {
 104                 mux {
 105                         pins = "gpio18", "gpio19";
 106                         function = "gsbi5";
 107                         drive-strength = <10>;
 108                         bias-pull-down;
 109                 };
 110
 111                 clk {
 112                         pins = "gpio21";
 113                         function = "gsbi5";
 114                         drive-strength = <12>;
 115                         bias-pull-down;
 116                 };
 117
 118                 cs {
 119                         pins = "gpio20";
 120                         function = "gpio";
 121                         drive-strength = <10>;
 122                         bias-pull-up;
 123                 };
 124         };
 125
 126         led_pins: led_pins {
 127                 mux {
 128                         pins = "gpio22", "gpio23", "gpio24", "gpio25",
 129                                     "gpio26", "gpio27", "gpio28", "gpio29";
 130                         function = "gpio";
 131                         drive-strength = <10>;
 132                         bias-pull-up;
 133                 };
 134         };
 135
 136         button_pins: button_pins {
 137                 mux {
 138                         pins = "gpio56";
 139                         function = "gpio";
 140                         bias-pull-up;
 141                 };
 142         };
 143 };
 144
 145 &gsbi2 {
 146         qcom,mode = <GSBI_PROT_I2C_UART>;
 147         status = "okay";
 148
 149         gsbi2_serial: serial@12490000 {
 150                 status = "okay";
 151         };
 152 };
 153
 154 &gsbi4 {
 155         qcom,mode = <GSBI_PROT_I2C_UART>;
 156         status = "okay";
 157
 158         serial@16340000 {
 159                 status = "disabled";
 160         };
 161 };
 162
 163 &gsbi7 {
 164         qcom,mode = <GSBI_PROT_I2C_UART>;
 165         status = "okay";
 166
 167         gsbi7_serial: serial@16640000 {
 168                 status = "okay";
 169         };
 170 };
 171
 172 &gsbi5 {
 173         qcom,mode = <GSBI_PROT_SPI>;
 174         status = "okay";
 175
 176         spi4: spi@1a280000 {
 177                 status = "okay";
 178                 spi-max-frequency = <50000000>;
 179
 180                 pinctrl-0 = <&spi_pins>;
 181                 pinctrl-names = "default";
 182
 183                 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 184
 185                 flash@0 {
 186                         compatible = "jedec,spi-nor";
 187                         spi-max-frequency = <50000000>;
 188                         reg = <0>;
 189
 190                         partitions {
 191                                 compatible = "fixed-partitions";
 192                                 #address-cells = <1>;
 193                                 #size-cells = <1>;
 194
 195                                 cfg1@2a0000 {
 196                                         compatible = "u-boot,env-redundant-bool";
 197                                         label = "CFG1";
 198                                         reg = <0x2a0000 0x0010000>;
 199
 200                                         ethaddr: ethaddr {
 201                                                 #nvmem-cell-cells = <1>;
 202                                         };
 203                                 };
 204
 205                                 bootpri@2b0000 {
 206                                         label = "BootPRI";
 207                                         reg = <0x2b0000 0x0080000>;
 208                                 };
 209
 210                                 cfg2@330000 {
 211                                         label = "CFG2";
 212                                         reg = <0x330000 0x0010000>;
 213                                 };
 214
 215                                 fs@340000 {
 216                                         label = "FS";
 217                                         reg = <0x340000 0x0080000>;
 218                                 };
 219
 220                                 priimg@3c0000 {
 221                                         label = "PriImg";
 222                                         reg = <0x3c0000 0x0e10000>;
 223                                 };
 224
 225                                 secimg@11d0000 {
 226                                         label = "SecImg";
 227                                         reg = <0x11d0000 0x0e10000>;
 228                                 };
 229                         };
 230                 };
 231         };
 232 };
 233
 234 &pcie0 {
 235         status = "okay";
 236
 237         /delete-property/ pinctrl-0;
 238         /delete-property/ pinctrl-names;
 239
 240         bridge@0,0 {
 241                 reg = <0x00000000 0 0 0 0>;
 242                 #address-cells = <3>;
 243                 #size-cells = <2>;
 244                 ranges;
 245
 246                 wifi@1,0 {
 247                         compatible = "qcom,ath10k";
 248                         status = "okay";
 249                         reg = <0x00010000 0 0 0 0>;
 250                 };
 251         };
 252 };
 253
 254 &pcie1 {
 255         status = "okay";
 256
 257         /delete-property/ pinctrl-0;
 258         /delete-property/ pinctrl-names;
 259
 260         bridge@0,0 {
 261                 reg = <0x00000000 0 0 0 0>;
 262                 #address-cells = <3>;
 263                 #size-cells = <2>;
 264                 ranges;
 265
 266                 wifi@1,0 {
 267                         compatible = "qcom,ath10k";
 268                         status = "okay";
 269                         reg = <0x00010000 0 0 0 0>;
 270                 };
 271         };
 272 };
 273
 274 &nand {
 275         status = "okay";
 276
 277         pinctrl-0 = <&nand_pins>;
 278         pinctrl-names = "default";
 279
 280         nand@0 {
 281                 compatible = "qcom,nandcs";
 282
 283                 reg = <0>;
 284
 285                 nand-ecc-strength = <8>;
 286                 nand-bus-width = <8>;
 287                 nand-ecc-step-size = <512>;
 288
 289                 partitions {
 290                         compatible = "fixed-partitions";
 291                         #address-cells = <1>;
 292                         #size-cells = <1>;
 293
 294                         ubi@0 {
 295                                 label = "ubi";
 296                                 reg = <0x0000000 0x20000000>;
 297                         };
 298                 };
 299         };
 300 };
 301
 302 &soc {
 303         mdio1: mdio {
 304                 compatible = "virtual,mdio-gpio";
 305                 #address-cells = <1>;
 306                 #size-cells = <0>;
 307
 308                 status = "okay";
 309
 310                 pinctrl-0 = <&mdio0_pins>;
 311                 pinctrl-names = "default";
 312
 313                 gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
 314
 315                 phy1: ethernet-phy@1 {
 316                         reg = <1>;
 317                 };
 318
 319                 phy2: ethernet-phy@2 {
 320                         reg = <2>;
 321                 };
 322         };
 323 };
 324
 325 &gmac0 {
 326         status = "okay";
 327
 328         qcom,id = <0>;
 329         mdiobus = <&mdio1>;
 330
 331         phy-mode = "rgmii";
 332         phy-handle = <&phy1>;
 333
 334         nvmem-cells = <&ethaddr 0>;
 335         nvmem-cell-names = "mac-address";
 336
 337         fixed-link {
 338                 speed = <1000>;
 339                 full-duplex;
 340         };
 341 };
 342
 343 &gmac2 {
 344         status = "okay";
 345
 346         qcom,id = <2>;
 347         mdiobus = <&mdio1>;
 348
 349         phy-mode = "sgmii";
 350         phy-handle = <&phy2>;
 351
 352         nvmem-cells = <&ethaddr 1>;
 353         nvmem-cell-names = "mac-address";
 354 };
 355
 356 &adm_dma {
 357         status = "okay";
 358 };