ipq40xx: switch default to 6.6
[openwrt/openwrt.git] / target / linux / ipq40xx / files-6.1 / arch / arm / boot / dts / qcom-ipq4029-gl-s1300.dts
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
2
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/soc/qcom,tcsr.h>
8
9 / {
10 model = "GL.iNet GL-S1300";
11 compatible = "glinet,gl-s1300";
12
13 aliases {
14 led-boot = &led_power;
15 led-failsafe = &led_power;
16 led-running = &led_power;
17 led-upgrade = &led_power;
18 };
19
20 memory {
21 device_type = "memory";
22 reg = <0x80000000 0x10000000>;
23 };
24
25 soc {
26 rng@22000 {
27 status = "okay";
28 };
29
30 mdio@90000 {
31 status = "okay";
32 };
33
34 tcsr@1949000 {
35 compatible = "qcom,tcsr";
36 reg = <0x1949000 0x100>;
37 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
38 };
39
40 tcsr@194b000 {
41 /* select hostmode */
42 compatible = "qcom,tcsr";
43 reg = <0x194b000 0x100>;
44 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
45 status = "okay";
46 };
47
48 ess_tcsr@1953000 {
49 compatible = "qcom,tcsr";
50 reg = <0x1953000 0x1000>;
51 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
52 };
53
54 tcsr@1957000 {
55 compatible = "qcom,tcsr";
56 reg = <0x1957000 0x100>;
57 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
58 };
59
60 usb2@60f8800 {
61 status = "okay";
62 };
63
64 usb3@8af8800 {
65 status = "okay";
66 };
67
68 crypto@8e3a000 {
69 status = "okay";
70 };
71
72 watchdog@b017000 {
73 status = "okay";
74 };
75 };
76
77 keys {
78 compatible = "gpio-keys";
79
80 wps {
81 label = "wps";
82 gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
83 linux,code = <KEY_WPS_BUTTON>;
84 };
85
86 reset {
87 label = "reset";
88 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
89 linux,code = <KEY_RESTART>;
90 };
91 };
92
93 leds {
94 compatible = "gpio-leds";
95
96 led_power: power {
97 function = LED_FUNCTION_POWER;
98 color = <LED_COLOR_ID_GREEN>;
99 gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
100 default-state = "on";
101 };
102
103 mesh {
104 label = "green:mesh";
105 gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>;
106 };
107
108 wlan {
109 function = LED_FUNCTION_WLAN;
110 color = <LED_COLOR_ID_GREEN>;
111 gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
112 linux,default-trigger = "phy0tpt";
113 };
114 };
115 };
116
117 &vqmmc {
118 status = "okay";
119 };
120
121 &sdhci {
122 status = "okay";
123 pinctrl-0 = <&sd_pins>;
124 pinctrl-names = "default";
125 cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
126 vqmmc-supply = <&vqmmc>;
127 };
128
129 &blsp_dma {
130 status = "okay";
131 };
132
133 &cryptobam {
134 status = "okay";
135 };
136
137 &blsp1_spi1 {
138 pinctrl-0 = <&spi_0_pins>;
139 pinctrl-names = "default";
140 status = "okay";
141 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
142
143 flash@0 {
144 compatible = "jedec,spi-nor";
145 reg = <0>;
146 spi-max-frequency = <24000000>;
147
148 partitions {
149 compatible = "fixed-partitions";
150 #address-cells = <1>;
151 #size-cells = <1>;
152
153 SBL1@0 {
154 label = "SBL1";
155 reg = <0x0 0x40000>;
156 read-only;
157 };
158
159 MIBIB@40000 {
160 label = "MIBIB";
161 reg = <0x40000 0x20000>;
162 read-only;
163 };
164
165 QSEE@60000 {
166 label = "QSEE";
167 reg = <0x60000 0x60000>;
168 read-only;
169 };
170
171 CDT@c0000 {
172 label = "CDT";
173 reg = <0xc0000 0x10000>;
174 read-only;
175 };
176
177 DDRPARAMS@d0000 {
178 label = "DDRPARAMS";
179 reg = <0xd0000 0x10000>;
180 read-only;
181 };
182
183 APPSBLENV@e0000 {
184 label = "APPSBLENV";
185 reg = <0xe0000 0x10000>;
186 read-only;
187 };
188
189 APPSBL@f0000 {
190 label = "APPSBL";
191 reg = <0xf0000 0x80000>;
192 read-only;
193 };
194
195 ART@170000 {
196 label = "ART";
197 reg = <0x170000 0x10000>;
198 read-only;
199
200 nvmem-layout {
201 compatible = "fixed-layout";
202 #address-cells = <1>;
203 #size-cells = <1>;
204
205 precal_art_1000: precal@1000 {
206 reg = <0x1000 0x2f20>;
207 };
208
209 precal_art_5000: precal@5000 {
210 reg = <0x5000 0x2f20>;
211 };
212 };
213 };
214
215 firmware@180000 {
216 compatible = "denx,fit";
217 label = "firmware";
218 reg = <0x180000 0xe80000>;
219 };
220 };
221 };
222 };
223
224 &blsp1_spi2 {
225 pinctrl-0 = <&spi_1_pins>;
226 pinctrl-names = "default";
227 status = "okay";
228
229 spidev1: spi@0 {
230 compatible = "silabs,si3210";
231 reg = <0>;
232 spi-max-frequency = <24000000>;
233 };
234 };
235
236 &blsp1_uart1 {
237 pinctrl-0 = <&serial_pins>;
238 pinctrl-names = "default";
239 status = "okay";
240 };
241
242 &blsp1_uart2 {
243 pinctrl-0 = <&serial_1_pins>;
244 pinctrl-names = "default";
245 status = "okay";
246 };
247
248 &tlmm {
249 serial_pins: serial_pinmux {
250 mux {
251 pins = "gpio16", "gpio17";
252 function = "blsp_uart0";
253 bias-disable;
254 };
255 };
256
257 serial_1_pins: serial1_pinmux {
258 mux {
259 pins = "gpio8", "gpio9",
260 "gpio10", "gpio11";
261 function = "blsp_uart1";
262 bias-disable;
263 };
264 };
265
266 spi_0_pins: spi_0_pinmux {
267 pinmux {
268 function = "blsp_spi0";
269 pins = "gpio13", "gpio14", "gpio15";
270 };
271 pinmux_cs {
272 function = "gpio";
273 pins = "gpio12";
274 };
275 pinconf {
276 pins = "gpio13", "gpio14", "gpio15";
277 drive-strength = <12>;
278 bias-disable;
279 };
280 pinconf_cs {
281 pins = "gpio12";
282 drive-strength = <2>;
283 bias-disable;
284 output-high;
285 };
286 };
287
288 spi_1_pins: spi_1_pinmux {
289 mux {
290 pins = "gpio44", "gpio46", "gpio47";
291 function = "blsp_spi1";
292 bias-disable;
293 };
294 host_int {
295 pins = "gpio42";
296 function = "gpio";
297 input;
298 };
299 cs {
300 pins = "gpio45";
301 function = "gpio";
302 bias-pull-up;
303 };
304 wake {
305 pins = "gpio40";
306 function = "gpio";
307 output-high;
308 };
309 reset {
310 pins = "gpio49";
311 function = "gpio";
312 output-high;
313 };
314 };
315
316 sd_pins: sd_pins {
317 pinmux {
318 function = "sdio";
319 pins = "gpio23", "gpio24", "gpio25", "gpio26",
320 "gpio28", "gpio29", "gpio30", "gpio31";
321 drive-strength = <10>;
322 };
323
324 pinmux_sd_clk {
325 function = "sdio";
326 pins = "gpio27";
327 drive-strength = <16>;
328 };
329
330 pinmux_sd7 {
331 function = "sdio";
332 pins = "gpio32";
333 drive-strength = <10>;
334 bias-disable;
335 };
336 };
337 };
338
339 &usb2_hs_phy {
340 status = "okay";
341 };
342
343 &usb3_hs_phy {
344 status = "okay";
345 };
346
347 &usb3_ss_phy {
348 status = "okay";
349 };
350
351 &wifi0 {
352 status = "okay";
353 nvmem-cell-names = "pre-calibration";
354 nvmem-cells = <&precal_art_1000>;
355 qcom,ath10k-calibration-variant = "GL-S1300";
356 };
357
358 &wifi1 {
359 status = "okay";
360 nvmem-cell-names = "pre-calibration";
361 nvmem-cells = <&precal_art_5000>;
362 qcom,ath10k-calibration-variant = "GL-S1300";
363 };