target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7 #include <dt-bindings/leds/common.h>
   8
   9 / {
  10         chosen {
  11                 bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
  12         };
  13
  14         aliases {
  15                 led-boot = &led_sys;
  16                 led-failsafe = &led_sys;
  17                 led-running = &led_sys;
  18                 led-upgrade = &led_sys;
  19         };
  20
  21         soc {
  22                 rng@22000 {
  23                         status = "okay";
  24                 };
  25
  26                 mdio@90000 {
  27                         status = "okay";
  28                         pinctrl-0 = <&mdio_pins>;
  29                         pinctrl-names = "default";
  30                 };
  31
  32                 tcsr@1949000 {
  33                         compatible = "qcom,tcsr";
  34                         reg = <0x1949000 0x100>;
  35                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  36                 };
  37
  38                 tcsr@194b000 {
  39                         compatible = "qcom,tcsr";
  40                         reg = <0x194b000 0x100>;
  41                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  42                 };
  43
  44                 ess_tcsr@1953000 {
  45                         compatible = "qcom,tcsr";
  46                         reg = <0x1953000 0x1000>;
  47                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  48                 };
  49
  50                 tcsr@1957000 {
  51                         compatible = "qcom,tcsr";
  52                         reg = <0x1957000 0x100>;
  53                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  54                 };
  55
  56                 usb2@60f8800 {
  57                         status = "okay";
  58                 };
  59
  60                 usb3@8af8800 {
  61                         status = "okay";
  62                 };
  63
  64                 crypto@8e3a000 {
  65                         status = "okay";
  66                 };
  67
  68                 watchdog@b017000 {
  69                         status = "okay";
  70                 };
  71         };
  72
  73         leds {
  74                 compatible = "gpio-leds";
  75
  76                 led_sys: led-0 {
  77                         gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
  78                         color = <LED_COLOR_ID_BLUE>;
  79                         function = LED_FUNCTION_POWER;
  80                 };
  81
  82                 led-1 {
  83                         gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
  84                         linux,default-trigger = "phy0tpt";
  85                         color = <LED_COLOR_ID_BLUE>;
  86                         function = LED_FUNCTION_WLAN;
  87                         function-enumerator = <0>;
  88                 };
  89
  90                 led-2 {
  91                         gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
  92                         linux,default-trigger = "phy1tpt";
  93                         color = <LED_COLOR_ID_BLUE>;
  94                         function = LED_FUNCTION_WLAN;
  95                         function-enumerator = <1>;
  96                 };
  97         };
  98
  99         keys {
 100                 compatible = "gpio-keys";
 101
 102                 reset {
 103                         label = "reset";
 104                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
 105                         linux,code = <KEY_RESTART>;
 106                 };
 107         };
 108 };
 109
 110 &blsp_dma {
 111         status = "okay";
 112 };
 113
 114 &blsp1_spi1 {
 115         status = "okay";
 116
 117         flash@0 {
 118                 reg = <0>;
 119                 compatible = "jedec,spi-nor";
 120                 spi-max-frequency = <24000000>;
 121
 122                 partitions {
 123                         compatible = "fixed-partitions";
 124                         #address-cells = <1>;
 125                         #size-cells = <1>;
 126
 127                         partition@0 {
 128                                 label = "SBL1";
 129                                 reg = <0x0 0x40000>;
 130                                 read-only;
 131                         };
 132
 133                         partition@40000 {
 134                                 label = "MIBIB";
 135                                 reg = <0x40000 0x20000>;
 136                                 read-only;
 137                         };
 138
 139                         partition@60000 {
 140                                 label = "QSEE";
 141                                 reg = <0x60000 0x60000>;
 142                                 read-only;
 143                         };
 144
 145                         partition@c0000 {
 146                                 label = "CDT";
 147                                 reg = <0xc0000 0x10000>;
 148                                 read-only;
 149                         };
 150
 151                         partition@d0000 {
 152                                 label = "DDRPARAMS";
 153                                 reg = <0xd0000 0x10000>;
 154                                 read-only;
 155                         };
 156
 157                         partition@e0000 {
 158                                 label = "APPSBLENV";
 159                                 reg = <0xe0000 0x10000>;
 160                                 read-only;
 161                         };
 162
 163                         partition@f0000 {
 164                                 label = "APPSBL";
 165                                 reg = <0xf0000 0x80000>;
 166                                 read-only;
 167                         };
 168
 169                         partition@170000 {
 170                                 label = "ART";
 171                                 reg = <0x170000 0x10000>;
 172                                 read-only;
 173
 174                                 nvmem-layout {
 175                                         compatible = "fixed-layout";
 176                                         #address-cells = <1>;
 177                                         #size-cells = <1>;
 178
 179                                         precal_art_1000: precal@1000 {
 180                                                 reg = <0x1000 0x2f20>;
 181                                         };
 182
 183                                         precal_art_5000: precal@5000 {
 184                                                 reg = <0x5000 0x2f20>;
 185                                         };
 186                                 };
 187                         };
 188                 };
 189         };
 190 };
 191
 192 &nand {
 193         status = "okay";
 194
 195         nand@0 {
 196                 partitions {
 197                         compatible = "fixed-partitions";
 198                         #address-cells = <1>;
 199                         #size-cells = <1>;
 200
 201                         nand_rootfs: partition@0 {
 202                                 label = "ubi";
 203                                 /* reg defined in 64M/128M variant dts. */
 204                         };
 205                 };
 206         };
 207 };
 208
 209 &blsp1_uart1 {
 210         pinctrl-0 = <&serial_0_pins>;
 211         pinctrl-names = "default";
 212         status = "okay";
 213 };
 214
 215 &cryptobam {
 216         status = "okay";
 217 };
 218
 219 &pcie0 {
 220         status = "okay";
 221         pinctrl-names = "default";
 222         pinctrl-0 = <&pcie_pins>;
 223         perst-gpio = <&tlmm 4 GPIO_ACTIVE_LOW>;
 224         wake-gpio = <&tlmm 40 GPIO_ACTIVE_HIGH>;
 225
 226         /* Free slot for use */
 227         bridge@0,0 {
 228                 reg = <0x00000000 0 0 0 0>;
 229                 #address-cells = <3>;
 230                 #size-cells = <2>;
 231                 ranges;
 232         };
 233 };
 234
 235 &qpic_bam {
 236         status = "okay";
 237 };
 238
 239 &sdhci {
 240         pinctrl-0 = <&sd_0_pins>;
 241         pinctrl-names = "default";
 242         vqmmc-supply = <&vqmmc>;
 243         status = "okay";
 244 };
 245
 246 &tlmm {
 247         pcie_pins: pcie_pinmux {
 248                 mux {
 249                         pins = "gpio2";
 250                         function = "gpio";
 251                         output-low;
 252                         bias-pull-down;
 253                 };
 254         };
 255
 256         mdio_pins: mdio_pinmux {
 257                 mux_1 {
 258                         pins = "gpio6";
 259                         function = "mdio";
 260                         bias-pull-up;
 261                 };
 262
 263                 mux_2 {
 264                         pins = "gpio7";
 265                         function = "mdc";
 266                         bias-pull-up;
 267                 };
 268         };
 269
 270         sd_0_pins: sd_0_pinmux {
 271                 mux_1 {
 272                         pins = "gpio23", "gpio24", "gpio25", "gpio26", "gpio28";
 273                         function = "sdio";
 274                         drive-strength = <10>;
 275                 };
 276
 277                 mux_2 {
 278                         pins = "gpio27";
 279                         function = "sdio";
 280                         drive-strength = <16>;
 281                 };
 282         };
 283
 284         serial_0_pins: serial0-pinmux {
 285                 mux {
 286                         pins = "gpio16", "gpio17";
 287                         function = "blsp_uart0";
 288                         bias-disable;
 289                 };
 290         };
 291 };
 292
 293 &ethphy0 {
 294         qcom,single-led-1000;
 295         qcom,single-led-100;
 296         qcom,single-led-10;
 297 };
 298
 299 &ethphy1 {
 300         qcom,single-led-1000;
 301         qcom,single-led-100;
 302         qcom,single-led-10;
 303 };
 304
 305 &ethphy2 {
 306         qcom,single-led-1000;
 307         qcom,single-led-100;
 308         qcom,single-led-10;
 309 };
 310
 311 &ethphy3 {
 312         qcom,single-led-1000;
 313         qcom,single-led-100;
 314         qcom,single-led-10;
 315 };
 316
 317 &ethphy4 {
 318         qcom,single-led-1000;
 319         qcom,single-led-100;
 320         qcom,single-led-10;
 321 };
 322
 323 &gmac {
 324         status = "okay";
 325 };
 326
 327 &switch {
 328         status = "okay";
 329 };
 330
 331 &swport1 {
 332         status = "okay";
 333
 334         label = "lan4";
 335 };
 336
 337 &swport2 {
 338         status = "okay";
 339
 340         label = "lan3";
 341 };
 342
 343 &swport3 {
 344         status = "okay";
 345
 346         label = "lan2";
 347 };
 348
 349 &swport4 {
 350         status = "okay";
 351
 352         label = "lan1";
 353 };
 354
 355 &swport5 {
 356         status = "okay";
 357 };
 358
 359 &usb3_ss_phy {
 360         status = "okay";
 361 };
 362
 363 &usb3_hs_phy {
 364         status = "okay";
 365 };
 366
 367 &usb2_hs_phy {
 368         status = "okay";
 369 };
 370
 371 &vqmmc {
 372         status = "okay";
 373 };
 374
 375 &wifi0 {
 376         status = "okay";
 377         nvmem-cell-names = "pre-calibration";
 378         nvmem-cells = <&precal_art_1000>;
 379         qcom,ath10k-calibration-variant = "P&W-R619AC";
 380 };
 381
 382 &wifi1 {
 383         status = "okay";
 384         nvmem-cell-names = "pre-calibration";
 385         nvmem-cells = <&precal_art_5000>;
 386         qcom,ath10k-calibration-variant = "P&W-R619AC";
 387 };