target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 // Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
   3
   4 #include "qcom-ipq4019.dtsi"
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8
   9 / {
  10         aliases {
  11                 ethernet1 = &swport5;
  12         };
  13
  14         soc {
  15                 rng@22000 {
  16                         status = "okay";
  17                 };
  18
  19                 mdio@90000 {
  20                         status = "okay";
  21
  22                         pinctrl-0 = <&mdio_pins>;
  23                         pinctrl-names = "default";
  24                 };
  25
  26                 counter@4a1000 {
  27                         compatible = "qcom,qca-gcnt";
  28                         reg = <0x4a1000 0x4>;
  29                 };
  30
  31                 tcsr@1949000 {
  32                         compatible = "qcom,tcsr";
  33                         reg = <0x1949000 0x100>;
  34                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  35                 };
  36
  37                 tcsr@194b000 {
  38                         status = "okay";
  39
  40                         compatible = "qcom,tcsr";
  41                         reg = <0x194b000 0x100>;
  42                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  43                 };
  44
  45                 ess_tcsr@1953000 {
  46                         compatible = "qcom,tcsr";
  47                         reg = <0x1953000 0x1000>;
  48                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  49                 };
  50
  51                 tcsr@1957000 {
  52                         compatible = "qcom,tcsr";
  53                         reg = <0x1957000 0x100>;
  54                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  55                 };
  56
  57                 usb2: usb2@60f8800 {
  58                         status = "okay";
  59                 };
  60
  61                 usb3: usb3@8af8800 {
  62                         status = "okay";
  63                 };
  64
  65                 crypto@8e3a000 {
  66                         status = "okay";
  67                 };
  68
  69                 watchdog@b017000 {
  70                         status = "okay";
  71                 };
  72         };
  73 };
  74
  75 &tlmm {
  76         mdio_pins: mdio_pinmux {
  77                 pinmux_1 {
  78                         pins = "gpio53";
  79                         function = "mdio";
  80                 };
  81
  82                 pinmux_2 {
  83                         pins = "gpio52";
  84                         function = "mdc";
  85                 };
  86
  87                 pinconf {
  88                         pins = "gpio52", "gpio53";
  89                         bias-pull-up;
  90                 };
  91         };
  92
  93         serial_pins: serial_pinmux {
  94                 mux {
  95                         pins = "gpio60", "gpio61";
  96                         function = "blsp_uart0";
  97                         bias-disable;
  98                 };
  99         };
 100
 101         spi_0_pins: spi_0_pinmux {
 102                 pin {
 103                         function = "blsp_spi0";
 104                         pins = "gpio55", "gpio56", "gpio57";
 105                         drive-strength = <2>;
 106                         bias-disable;
 107                 };
 108
 109                 pin_cs {
 110                         function = "gpio";
 111                         pins = "gpio54", "gpio59";
 112                         drive-strength = <2>;
 113                         bias-disable;
 114                         output-high;
 115                 };
 116         };
 117 };
 118
 119 &blsp_dma {
 120         status = "okay";
 121 };
 122
 123 &blsp1_spi1 {
 124         status = "okay";
 125
 126         pinctrl-0 = <&spi_0_pins>;
 127         pinctrl-names = "default";
 128         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
 129
 130         flash@0 {
 131                 status = "okay";
 132
 133                 compatible = "jedec,spi-nor";
 134                 reg = <0>;
 135                 spi-max-frequency = <24000000>;
 136
 137                 partitions {
 138                         compatible = "fixed-partitions";
 139                         #address-cells = <1>;
 140                         #size-cells = <1>;
 141
 142                         partition@0 {
 143                                 label = "SBL1";
 144                                 reg = <0x00000000 0x00040000>;
 145                                 read-only;
 146                         };
 147
 148                         partition@40000 {
 149                                 label = "MIBIB";
 150                                 reg = <0x00040000 0x00020000>;
 151                                 read-only;
 152                         };
 153
 154                         partition@60000 {
 155                                 label = "QSEE";
 156                                 reg = <0x00060000 0x00060000>;
 157                                 read-only;
 158                         };
 159
 160                         partition@c0000 {
 161                                 label = "CDT";
 162                                 reg = <0x000c0000 0x00010000>;
 163                                 read-only;
 164                         };
 165
 166                         partition@d0000 {
 167                                 label = "DDRPARAMS";
 168                                 reg = <0x000d0000 0x00010000>;
 169                                 read-only;
 170                         };
 171
 172                         partition@e0000 {
 173                                 label = "APPSBLENV"; /* uboot env*/
 174                                 reg = <0x000e0000 0x00010000>;
 175                                 read-only;
 176                         };
 177
 178                         partition@f0000 {
 179                                 label = "APPSBL"; /* uboot */
 180                                 reg = <0x000f0000 0x00080000>;
 181                                 read-only;
 182                         };
 183
 184                         partition@170000 {
 185                                 label = "ART";
 186                                 reg = <0x00170000 0x00010000>;
 187                                 read-only;
 188
 189                                 nvmem-layout {
 190                                         compatible = "fixed-layout";
 191                                         #address-cells = <1>;
 192                                         #size-cells = <1>;
 193
 194                                         precal_art_1000: precal@1000 {
 195                                                 reg = <0x1000 0x2f20>;
 196                                         };
 197
 198                                         precal_art_5000: precal@5000 {
 199                                                 reg = <0x5000 0x2f20>;
 200                                         };
 201                                 };
 202                         };
 203                 };
 204         };
 205
 206         spi-nand@1 {
 207                 status = "okay";
 208
 209                 compatible = "spi-nand";
 210                 reg = <1>;
 211                 spi-max-frequency = <24000000>;
 212
 213                 partitions {
 214                         compatible = "fixed-partitions";
 215                         #address-cells = <1>;
 216                         #size-cells = <1>;
 217
 218                         partition@0 {
 219                                 label = "ubi";
 220                                 reg = <0x00000000 0x08000000>;
 221                         };
 222                 };
 223         };
 224 };
 225
 226 &blsp1_uart1 {
 227         status = "okay";
 228
 229         pinctrl-0 = <&serial_pins>;
 230         pinctrl-names = "default";
 231 };
 232
 233 &cryptobam {
 234         status = "okay";
 235 };
 236
 237 &gmac {
 238         status = "okay";
 239 };
 240
 241 &switch {
 242         status = "okay";
 243 };
 244
 245 &swport4 {
 246         status = "okay";
 247
 248         label = "lan";
 249 };
 250
 251 &swport5 {
 252         status = "okay";
 253 };
 254
 255 &wifi0 {
 256         status = "okay";
 257         nvmem-cell-names = "pre-calibration";
 258         nvmem-cells = <&precal_art_1000>;
 259         qcom,ath10k-calibration-variant = "8devices-Jalapeno";
 260 };
 261
 262 &wifi1 {
 263         status = "okay";
 264         nvmem-cell-names = "pre-calibration";
 265         nvmem-cells = <&precal_art_5000>;
 266         qcom,ath10k-calibration-variant = "8devices-Jalapeno";
 267 };
 268
 269 &usb3_ss_phy {
 270         status = "okay";
 271 };
 272
 273 &usb3_hs_phy {
 274         status = "okay";
 275 };
 276
 277 &usb2_hs_phy {
 278         status = "okay";
 279 };