target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/leds/common.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8
   9 / {
  10         model = "Edgecore ECW5211";
  11         compatible = "edgecore,ecw5211";
  12
  13         aliases {
  14                 led-boot = &led_power;
  15                 led-failsafe = &led_power;
  16                 led-running = &led_power;
  17                 led-upgrade = &led_power;
  18                 ethernet0 = &swport5;
  19                 ethernet1 = &gmac;
  20         };
  21
  22         chosen {
  23                 bootargs-append = " root=/dev/ubiblock0_1";
  24         };
  25
  26         keys {
  27                 compatible = "gpio-keys";
  28
  29                 reset {
  30                         label = "reset";
  31                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  32                         linux,code = <KEY_RESTART>;
  33                 };
  34         };
  35
  36         leds {
  37                 compatible = "gpio-leds";
  38
  39                 led_power: power {
  40                         function = LED_FUNCTION_POWER;
  41                         color = <LED_COLOR_ID_YELLOW>;
  42                         gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  43                 };
  44
  45                 wlan2g {
  46                         label = "green:wlan2g";
  47                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  48                         linux,default-trigger = "phy0tpt";
  49                 };
  50
  51                 wlan5g {
  52                         label = "green:wlan5g";
  53                         gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  54                         linux,default-trigger = "phy1tpt";
  55                 };
  56         };
  57
  58         soc {
  59                 rng@22000 {
  60                         status = "okay";
  61                 };
  62
  63                 counter@4a1000 {
  64                         compatible = "qcom,qca-gcnt";
  65                         reg = <0x4a1000 0x4>;
  66                 };
  67
  68                 tcsr@1949000 {
  69                         compatible = "qcom,tcsr";
  70                         reg = <0x1949000 0x100>;
  71                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  72                 };
  73
  74                 tcsr@194b000 {
  75                         compatible = "qcom,tcsr";
  76                         reg = <0x194b000 0x100>;
  77                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  78                 };
  79
  80                 ess_tcsr@1953000 {
  81                         compatible = "qcom,tcsr";
  82                         reg = <0x1953000 0x1000>;
  83                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  84                 };
  85
  86                 tcsr@1957000 {
  87                         compatible = "qcom,tcsr";
  88                         reg = <0x1957000 0x100>;
  89                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  90                 };
  91
  92                 usb2@60f8800 {
  93                         status = "okay";
  94                 };
  95
  96                 usb3@8af8800 {
  97                         status = "okay";
  98
  99                         dwc3@8a00000 {
 100                                 phys = <&usb3_hs_phy>;
 101                                 phy-names = "usb2-phy";
 102                         };
 103                 };
 104
 105                 crypto@8e3a000 {
 106                         status = "okay";
 107                 };
 108
 109                 watchdog@b017000 {
 110                         status = "okay";
 111                 };
 112         };
 113 };
 114
 115 &tlmm {
 116         mdio_pins: mdio_pinmux {
 117                 mux_mdio {
 118                         pins = "gpio53";
 119                         function = "mdio";
 120                         bias-pull-up;
 121                 };
 122
 123                 mux_mdc {
 124                         pins = "gpio52";
 125                         function = "mdc";
 126                         bias-pull-up;
 127                 };
 128         };
 129
 130         serial_pins: serial_pinmux {
 131                 mux {
 132                         pins = "gpio60", "gpio61";
 133                         function = "blsp_uart0";
 134                         bias-disable;
 135                 };
 136         };
 137
 138         spi0_pins: spi0_pinmux {
 139                 pin {
 140                         function = "blsp_spi0";
 141                         pins = "gpio55", "gpio56", "gpio57";
 142                         drive-strength = <2>;
 143                         bias-disable;
 144                 };
 145
 146                 pin_cs {
 147                         function = "gpio";
 148                         pins = "gpio54", "gpio4";
 149                         drive-strength = <2>;
 150                         bias-disable;
 151                         output-high;
 152                 };
 153         };
 154
 155         i2c0_pins: i2c0_pinmux {
 156                 mux_i2c {
 157                         function = "blsp_i2c0";
 158                         pins = "gpio58", "gpio59";
 159                         drive-strength = <16>;
 160                         bias-disable;
 161                 };
 162         };
 163 };
 164
 165 &blsp_dma {
 166         status = "okay";
 167 };
 168
 169 &blsp1_spi1 {
 170         status = "okay";
 171
 172         pinctrl-0 = <&spi0_pins>;
 173         pinctrl-names = "default";
 174         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>;
 175
 176         flash@0 {
 177                 compatible = "jedec,spi-nor";
 178                 reg = <0>;
 179                 spi-max-frequency = <24000000>;
 180
 181                 partitions {
 182                         compatible = "fixed-partitions";
 183                         #address-cells = <1>;
 184                         #size-cells = <1>;
 185
 186                         partition@0 {
 187                                 label = "0:SBL1";
 188                                 reg = <0x00000000 0x00040000>;
 189                                 read-only;
 190                         };
 191
 192                         partition@40000 {
 193                                 label = "0:MIBIB";
 194                                 reg = <0x00040000 0x00020000>;
 195                                 read-only;
 196                         };
 197
 198                         partition@60000 {
 199                                 label = "0:QSEE";
 200                                 reg = <0x00060000 0x00060000>;
 201                                 read-only;
 202                         };
 203
 204                         partition@c0000 {
 205                                 label = "0:CDT";
 206                                 reg = <0x000c0000 0x00010000>;
 207                                 read-only;
 208                         };
 209
 210                         partition@d0000 {
 211                                 label = "0:DDRPARAMS";
 212                                 reg = <0x000d0000 0x00010000>;
 213                                 read-only;
 214                         };
 215
 216                         partition@e0000 {
 217                                 label = "0:APPSBLENV"; /* uboot env */
 218                                 reg = <0x000e0000 0x00010000>;
 219                         };
 220
 221                         partition@f0000 {
 222                                 label = "0:APPSBL"; /* uboot */
 223                                 reg = <0x000f0000 0x00080000>;
 224                                 read-only;
 225                         };
 226
 227                         partition@170000 {
 228                                 label = "0:ART";
 229                                 reg = <0x00170000 0x00010000>;
 230                                 read-only;
 231
 232                                 nvmem-layout {
 233                                         compatible = "fixed-layout";
 234                                         #address-cells = <1>;
 235                                         #size-cells = <1>;
 236
 237                                         precal_art_1000: precal@1000 {
 238                                                 reg = <0x1000 0x2f20>;
 239                                         };
 240
 241                                         precal_art_5000: precal@5000 {
 242                                                 reg = <0x5000 0x2f20>;
 243                                         };
 244                                 };
 245                         };
 246                 };
 247         };
 248
 249         flash@1 {
 250                 compatible = "spi-nand";
 251                 reg = <1>;
 252                 spi-max-frequency = <24000000>;
 253
 254                 partitions {
 255                         compatible = "fixed-partitions";
 256                         #address-cells = <1>;
 257                         #size-cells = <1>;
 258
 259                         partition@0 {
 260                                 label = "rootfs";
 261                                 reg = <0x00000000 0x04000000>;
 262                         };
 263                 };
 264         };
 265 };
 266
 267 &blsp1_i2c3 {
 268         status = "okay";
 269
 270         pinctrl-0 = <&i2c0_pins>;
 271         pinctrl-names = "default";
 272
 273         tpm@29 {
 274                 compatible = "atmel,at97sc3204t";
 275                 reg = <0x29>;
 276         };
 277 };
 278
 279 &blsp1_uart1 {
 280         status = "okay";
 281
 282         pinctrl-0 = <&serial_pins>;
 283         pinctrl-names = "default";
 284 };
 285
 286 &cryptobam {
 287         status = "okay";
 288 };
 289
 290 &mdio {
 291         status = "okay";
 292
 293         pinctrl-0 = <&mdio_pins>;
 294         pinctrl-names = "default";
 295 };
 296
 297 &gmac {
 298         status = "okay";
 299 };
 300
 301 &switch {
 302         status = "okay";
 303 };
 304
 305 &swport4 {
 306         status = "okay";
 307
 308         label = "lan";
 309 };
 310
 311 &swport5 {
 312         status = "okay";
 313 };
 314
 315 &wifi0 {
 316         status = "okay";
 317         nvmem-cell-names = "pre-calibration";
 318         nvmem-cells = <&precal_art_1000>;
 319 };
 320
 321 &wifi1 {
 322         status = "okay";
 323         nvmem-cell-names = "pre-calibration";
 324         nvmem-cells = <&precal_art_5000>;
 325         qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
 326 };
 327
 328 &usb3_hs_phy {
 329         status = "okay";
 330 };
 331
 332 &usb2_hs_phy {
 333         status = "okay";
 334 };