target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/leds/common.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8
   9 / {
  10         model = "ALFA Network AP120C-AC";
  11         compatible = "alfa-network,ap120c-ac";
  12
  13         aliases {
  14                 led-boot = &status;
  15                 led-failsafe = &status;
  16                 led-running = &status;
  17                 led-upgrade = &status;
  18                 ethernet1 = &swport5;
  19         };
  20
  21         keys {
  22                 compatible = "gpio-keys";
  23
  24                 reset {
  25                         label = "reset";
  26                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  27                         linux,code = <KEY_RESTART>;
  28                 };
  29         };
  30
  31         leds {
  32                 compatible = "gpio-leds";
  33
  34                 status: status {
  35                         function = LED_FUNCTION_STATUS;
  36                         color = <LED_COLOR_ID_BLUE>;
  37                         gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  38                         default-state = "keep";
  39                 };
  40
  41                 wan {
  42                         function = LED_FUNCTION_WAN;
  43                         color = <LED_COLOR_ID_AMBER>;
  44                         gpios = <&ethphy4 1 GPIO_ACTIVE_HIGH>;
  45                 };
  46
  47                 wlan2g {
  48                         label = "green:wlan2g";
  49                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  50                         linux,default-trigger = "phy0tpt";
  51                 };
  52
  53                 wlan5g {
  54                         label = "red:wlan5g";
  55                         gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  56                         linux,default-trigger = "phy1tpt";
  57                 };
  58         };
  59
  60         soc {
  61                 rng@22000 {
  62                         status = "okay";
  63                 };
  64
  65                 mdio@90000 {
  66                         status = "okay";
  67
  68                         pinctrl-0 = <&mdio_pins>;
  69                         pinctrl-names = "default";
  70                 };
  71
  72                 counter@4a1000 {
  73                         compatible = "qcom,qca-gcnt";
  74                         reg = <0x4a1000 0x4>;
  75                 };
  76
  77                 tcsr@1949000 {
  78                         compatible = "qcom,tcsr";
  79                         reg = <0x1949000 0x100>;
  80                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  81                 };
  82
  83                 tcsr@194b000 {
  84                         compatible = "qcom,tcsr";
  85                         reg = <0x194b000 0x100>;
  86                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  87                 };
  88
  89                 ess_tcsr@1953000 {
  90                         compatible = "qcom,tcsr";
  91                         reg = <0x1953000 0x1000>;
  92                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  93                 };
  94
  95                 tcsr@1957000 {
  96                         compatible = "qcom,tcsr";
  97                         reg = <0x1957000 0x100>;
  98                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  99                 };
 100
 101                 usb2@60f8800 {
 102                         status = "okay";
 103                 };
 104
 105                 usb3@8af8800 {
 106                         status = "okay";
 107
 108                         dwc3@8a00000 {
 109                                 phys = <&usb3_hs_phy>;
 110                                 phy-names = "usb2-phy";
 111                         };
 112                 };
 113
 114                 crypto@8e3a000 {
 115                         status = "okay";
 116                 };
 117
 118                 watchdog@b017000 {
 119                         status = "okay";
 120                 };
 121         };
 122 };
 123
 124 &blsp_dma {
 125         status = "okay";
 126 };
 127
 128 &blsp1_i2c3 {
 129         status = "okay";
 130
 131         pinctrl-0 = <&i2c0_pins>;
 132         pinctrl-names = "default";
 133
 134         tpm@29 {
 135                 compatible = "atmel,at97sc3204t";
 136                 reg = <0x29>;
 137         };
 138 };
 139
 140 &blsp1_spi1 {
 141         status = "okay";
 142
 143         pinctrl-0 = <&spi0_pins>;
 144         pinctrl-names = "default";
 145         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
 146                    <&tlmm  4 GPIO_ACTIVE_HIGH>;
 147
 148         flash@0 {
 149                 compatible = "jedec,spi-nor";
 150                 reg = <0>;
 151                 spi-max-frequency = <24000000>;
 152
 153                 partitions {
 154                         compatible = "fixed-partitions";
 155                         #address-cells = <1>;
 156                         #size-cells = <1>;
 157
 158                         partition@0 {
 159                                 label = "SBL1";
 160                                 reg = <0x00000000 0x00040000>;
 161                                 read-only;
 162                         };
 163
 164                         partition@40000 {
 165                                 label = "MIBIB";
 166                                 reg = <0x00040000 0x00020000>;
 167                                 read-only;
 168                         };
 169
 170                         partition@60000 {
 171                                 label = "QSEE";
 172                                 reg = <0x00060000 0x00060000>;
 173                                 read-only;
 174                         };
 175
 176                         partition@c0000 {
 177                                 label = "CDT";
 178                                 reg = <0x000c0000 0x00010000>;
 179                                 read-only;
 180                         };
 181
 182                         partition@d0000 {
 183                                 label = "DDRPARAMS";
 184                                 reg = <0x000d0000 0x00010000>;
 185                                 read-only;
 186                         };
 187
 188                         partition@e0000 {
 189                                 label = "APPSBLENV";
 190                                 reg = <0x000e0000 0x00010000>;
 191                         };
 192
 193                         partition@f0000 {
 194                                 label = "APPSBL";
 195                                 reg = <0x000f0000 0x00080000>;
 196                                 read-only;
 197                         };
 198
 199                         partition@170000 {
 200                                 label = "ART";
 201                                 reg = <0x00170000 0x00010000>;
 202                                 read-only;
 203
 204                                 nvmem-layout {
 205                                         compatible = "fixed-layout";
 206                                         #address-cells = <1>;
 207                                         #size-cells = <1>;
 208
 209                                         precal_art_1000: precal@1000 {
 210                                                 reg = <0x1000 0x2f20>;
 211                                         };
 212
 213                                         precal_art_5000: precal@5000 {
 214                                                 reg = <0x5000 0x2f20>;
 215                                         };
 216                                 };
 217                         };
 218
 219                         partition@180000 {
 220                                 label = "priv_data1";
 221                                 reg = <0x00180000 0x00010000>;
 222                                 read-only;
 223                         };
 224
 225                         partition@190000 {
 226                                 label = "priv_data2";
 227                                 reg = <0x00190000 0x00010000>;
 228                                 read-only;
 229                         };
 230                 };
 231         };
 232
 233         nand@1 {
 234                 compatible = "spi-nand";
 235                 reg = <1>;
 236                 spi-max-frequency = <24000000>;
 237
 238                 partitions {
 239                         compatible = "fixed-partitions";
 240                         #address-cells = <1>;
 241                         #size-cells = <1>;
 242
 243                         partition@0 {
 244                                 label = "rootfs1";
 245                                 reg = <0x00000000 0x04000000>;
 246                         };
 247
 248                         partition@4000000 {
 249                                 label = "rootfs2";
 250                                 reg = <0x04000000 0x04000000>;
 251                         };
 252                 };
 253         };
 254 };
 255
 256 &blsp1_uart1 {
 257         status = "okay";
 258
 259         pinctrl-0 = <&serial0_pins>;
 260         pinctrl-names = "default";
 261 };
 262
 263 &cryptobam {
 264         status = "okay";
 265 };
 266
 267 &ethphy4 {
 268         gpio-controller;
 269         #gpio-cells = <2>;
 270 };
 271
 272 &tlmm {
 273         i2c0_pins: i2c0_pinmux {
 274                 mux_i2c {
 275                         function = "blsp_i2c0";
 276                         pins = "gpio58", "gpio59";
 277                         drive-strength = <16>;
 278                         bias-disable;
 279                 };
 280         };
 281
 282         mdio_pins: mdio_pinmux {
 283                 mux_mdio {
 284                         pins = "gpio53";
 285                         function = "mdio";
 286                         bias-pull-up;
 287                 };
 288
 289                 mux_mdc {
 290                         pins = "gpio52";
 291                         function = "mdc";
 292                         bias-pull-up;
 293                 };
 294         };
 295
 296         serial0_pins: serial0_pinmux {
 297                 mux_uart {
 298                         pins = "gpio60", "gpio61";
 299                         function = "blsp_uart0";
 300                         bias-disable;
 301                 };
 302         };
 303
 304         spi0_pins: spi0_pinmux {
 305                 mux_spi {
 306                         function = "blsp_spi0";
 307                         pins = "gpio55", "gpio56", "gpio57";
 308                         drive-strength = <12>;
 309                         bias-disable;
 310                 };
 311
 312                 mux_cs {
 313                         function = "gpio";
 314                         pins = "gpio54", "gpio4";
 315                         drive-strength = <2>;
 316                         bias-disable;
 317                         output-high;
 318                 };
 319         };
 320 };
 321
 322 &usb2_hs_phy {
 323         status = "okay";
 324 };
 325
 326 &usb3_hs_phy {
 327         status = "okay";
 328 };
 329
 330 &gmac {
 331         status = "okay";
 332 };
 333
 334 &switch {
 335         status = "okay";
 336 };
 337
 338 &swport4 {
 339         status = "okay";
 340
 341         label = "lan";
 342 };
 343
 344 &swport5 {
 345         status = "okay";
 346 };
 347
 348 &wifi0 {
 349         status = "okay";
 350         nvmem-cell-names = "pre-calibration";
 351         nvmem-cells = <&precal_art_1000>;
 352 };
 353
 354 &wifi1 {
 355         status = "okay";
 356         qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
 357         nvmem-cell-names = "pre-calibration";
 358         nvmem-cells = <&precal_art_5000>;
 359 };