xlat lib: Fix some types
authorSandrine Bailleux <sandrine.bailleux@arm.com>
Wed, 19 Jul 2017 09:11:13 +0000 (10:11 +0100)
committerSandrine Bailleux <sandrine.bailleux@arm.com>
Wed, 26 Jul 2017 08:28:23 +0000 (09:28 +0100)
Fix the type length and signedness of some of the constants and
variables used in the translation table library.

This patch supersedes Pull Request #1018:
https://github.com/ARM-software/arm-trusted-firmware/pull/1018

Change-Id: Ibd45faf7a4fb428a0bf71c752551d35800212fb2
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
include/lib/xlat_tables/aarch32/xlat_tables_aarch32.h
include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h
lib/xlat_tables/aarch32/xlat_tables.c
lib/xlat_tables/aarch64/xlat_tables.c
lib/xlat_tables_v2/aarch32/xlat_tables_arch.c
lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
lib/xlat_tables_v2/xlat_tables_internal.c

index 28be8e3d6dcf1f7621f872989258690c54294bb6..a418d2dd66c0aa30ac15f75c26a3dc37452a4fa0 100644 (file)
@@ -28,7 +28,7 @@
 #error "Invalid granule size. AArch32 supports 4KB pages only."
 #endif
 
-#define MIN_LVL_BLOCK_DESC 1
+#define MIN_LVL_BLOCK_DESC     U(1)
 
 #define XLAT_TABLE_LEVEL_MIN   U(1)
 
@@ -43,7 +43,7 @@
  * [1] See the ARMv8-A Architecture Reference Manual (DDI 0487A.j) for more
  * information, Section G4.6.5
  */
-#define MIN_VIRT_ADDR_SPACE_SIZE       (1      << (32 - TTBCR_TxSZ_MAX))
+#define MIN_VIRT_ADDR_SPACE_SIZE       (ULL(1) << (32 - TTBCR_TxSZ_MAX))
 #define MAX_VIRT_ADDR_SPACE_SIZE       (ULL(1) << (32 - TTBCR_TxSZ_MIN))
 
 /*
@@ -67,6 +67,6 @@
  * CHECK_VIRT_ADDR_SPACE_SIZE() macro first.
  */
 #define GET_XLAT_TABLE_LEVEL_BASE(virt_addr_space_size)                        \
-       (((virt_addr_space_size) > (1 << L1_XLAT_ADDRESS_SHIFT)) ? 1 : 2)
+       (((virt_addr_space_size) > (ULL(1) << L1_XLAT_ADDRESS_SHIFT)) ? 1 : 2)
 
 #endif /* __XLAT_TABLES_AARCH32_H__ */
index 9cad0353fb118bdaa5b06762ce4875e6248e895a..7381bc829e667eeb2895d85edffd36933a2c0811 100644 (file)
@@ -26,9 +26,9 @@
  * descriptors.
  */
 #if PAGE_SIZE == (4 * 1024)
-# define MIN_LVL_BLOCK_DESC 1
+# define MIN_LVL_BLOCK_DESC    U(1)
 #elif PAGE_SIZE == (16 * 1024) || PAGE_SIZE == (64 * 1024)
-# define MIN_LVL_BLOCK_DESC 2
+# define MIN_LVL_BLOCK_DESC    U(2)
 #endif
 
 #define XLAT_TABLE_LEVEL_MIN   U(0)
@@ -45,7 +45,7 @@
  * information:
  * Page 1730: 'Input address size', 'For all translation stages'.
  */
-#define MIN_VIRT_ADDR_SPACE_SIZE       (1      << (64 - TCR_TxSZ_MAX))
+#define MIN_VIRT_ADDR_SPACE_SIZE       (ULL(1) << (64 - TCR_TxSZ_MAX))
 #define MAX_VIRT_ADDR_SPACE_SIZE       (ULL(1) << (64 - TCR_TxSZ_MIN))
 
 /*
@@ -72,6 +72,7 @@
 #define GET_XLAT_TABLE_LEVEL_BASE(virt_addr_space_size)                                \
        (((virt_addr_space_size) > (ULL(1) << L0_XLAT_ADDRESS_SHIFT))           \
        ? 0                                                                     \
-       : (((virt_addr_space_size) > (1 << L1_XLAT_ADDRESS_SHIFT)) ? 1 : 2))
+        : (((virt_addr_space_size) > (ULL(1) << L1_XLAT_ADDRESS_SHIFT))        \
+        ? 1 : 2))
 
 #endif /* __XLAT_TABLES_AARCH64_H__ */
index 71db2d5f67db784edb56f28412e8047d489a01a6..c7e34f20f1f81b32cb0ac4643fed62d369d47290 100644 (file)
@@ -88,13 +88,13 @@ void enable_mmu_secure(unsigned int flags)
                ttbcr = TTBCR_EAE_BIT |
                        TTBCR_SH0_NON_SHAREABLE | TTBCR_RGN0_OUTER_NC |
                        TTBCR_RGN0_INNER_NC |
-                       (32 - __builtin_ctzl((uintptr_t)PLAT_VIRT_ADDR_SPACE_SIZE));
+                       (32 - __builtin_ctzll(PLAT_VIRT_ADDR_SPACE_SIZE));
        } else {
                /* Inner & outer WBWA & shareable. */
                ttbcr = TTBCR_EAE_BIT |
                        TTBCR_SH0_INNER_SHAREABLE | TTBCR_RGN0_OUTER_WBA |
                        TTBCR_RGN0_INNER_WBA |
-                       (32 - __builtin_ctzl((uintptr_t)PLAT_VIRT_ADDR_SPACE_SIZE));
+                       (32 - __builtin_ctzll(PLAT_VIRT_ADDR_SPACE_SIZE));
        }
        ttbcr |= TTBCR_EPD1_BIT;
        write_ttbcr(ttbcr);
index 4125651e9fc375d9ebd2ecf8faef8d72524af5df..2ddf8cba8e4226899a21bfcac9f03fe292dda885 100644 (file)
@@ -145,12 +145,12 @@ void init_xlat_tables(void)
                        /* Inner & outer non-cacheable non-shareable. */\
                        tcr = TCR_SH_NON_SHAREABLE |                    \
                                TCR_RGN_OUTER_NC | TCR_RGN_INNER_NC |   \
-                               (64 - __builtin_ctzl(PLAT_VIRT_ADDR_SPACE_SIZE));\
+                               (64 - __builtin_ctzll(PLAT_VIRT_ADDR_SPACE_SIZE));\
                } else {                                                \
                        /* Inner & outer WBWA & shareable. */           \
                        tcr = TCR_SH_INNER_SHAREABLE |                  \
                                TCR_RGN_OUTER_WBA | TCR_RGN_INNER_WBA | \
-                               (64 - __builtin_ctzl(PLAT_VIRT_ADDR_SPACE_SIZE));\
+                               (64 - __builtin_ctzll(PLAT_VIRT_ADDR_SPACE_SIZE));\
                }                                                       \
                tcr |= _tcr_extra;                                      \
                write_tcr_el##_el(tcr);                                 \
index 9c4d68bc31aa6a193b436d8fef48f133d05086d6..be18552e39a55b1808e7410c839479555c2b4e0a 100644 (file)
@@ -131,10 +131,10 @@ void enable_mmu_arch(unsigned int flags,
                uintptr_t virtual_addr_space_size = max_va + 1;
                assert(CHECK_VIRT_ADDR_SPACE_SIZE(virtual_addr_space_size));
                /*
-                * __builtin_ctzl(0) is undefined but here we are guaranteed
+                * __builtin_ctzll(0) is undefined but here we are guaranteed
                 * that virtual_addr_space_size is in the range [1, UINT32_MAX].
                 */
-               ttbcr |= 32 - __builtin_ctzl(virtual_addr_space_size);
+               ttbcr |= 32 - __builtin_ctzll(virtual_addr_space_size);
        }
 
        /*
index 5f389f3658e6158f633bfc978ff0ceeaa4c6eff8..61eac10645d03215bb33b473de7a211654efae81 100644 (file)
@@ -220,10 +220,10 @@ void enable_mmu_arch(unsigned int flags,
        uintptr_t virtual_addr_space_size = max_va + 1;
        assert(CHECK_VIRT_ADDR_SPACE_SIZE(virtual_addr_space_size));
        /*
-        * __builtin_ctzl(0) is undefined but here we are guaranteed that
+        * __builtin_ctzll(0) is undefined but here we are guaranteed that
         * virtual_addr_space_size is in the range [1,UINTPTR_MAX].
         */
-       tcr = 64 - __builtin_ctzl(virtual_addr_space_size);
+       tcr = 64 - __builtin_ctzll(virtual_addr_space_size);
 
        /*
         * Set the cacheability and shareability attributes for memory
index 5efc834fa8a84a7b1970dc0dc9aa1180ea1fec6d..940337bef69697e23c979902850aed0cf8585e93 100644 (file)
@@ -357,7 +357,7 @@ static void xlat_tables_unmap_region(xlat_ctx_t *ctx, mmap_region_t *mm,
  */
 static action_t xlat_tables_map_region_action(const mmap_region_t *mm,
                const int desc_type, const unsigned long long dest_pa,
-               const uintptr_t table_entry_base_va, const int level)
+               const uintptr_t table_entry_base_va, const unsigned int level)
 {
        uintptr_t mm_end_va = mm->base_va + mm->size - 1;
        uintptr_t table_entry_end_va =