ipq806x: convert each device to DSA implementation
[openwrt/staging/svanheule.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-r7500.dts
1 #include "qcom-ipq8064-v1.0.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/soc/qcom,tcsr.h>
5
6 / {
7 model = "Netgear Nighthawk X4 R7500";
8 compatible = "netgear,r7500", "qcom,ipq8064";
9
10 memory@0 {
11 reg = <0x42000000 0xe000000>;
12 device_type = "memory";
13 };
14
15 reserved-memory {
16 #address-cells = <1>;
17 #size-cells = <1>;
18 ranges;
19 rsvd@41200000 {
20 reg = <0x41200000 0x300000>;
21 no-map;
22 };
23 };
24
25 aliases {
26 mdio-gpio0 = &mdio0;
27
28 led-boot = &power_white;
29 led-failsafe = &power_amber;
30 led-running = &power_white;
31 led-upgrade = &power_amber;
32 };
33
34 chosen {
35 bootargs = "rootfstype=squashfs noinitrd";
36 };
37
38 keys {
39 compatible = "gpio-keys";
40 pinctrl-0 = <&button_pins>;
41 pinctrl-names = "default";
42
43 wifi {
44 label = "wifi";
45 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
46 linux,code = <KEY_RFKILL>;
47 debounce-interval = <60>;
48 wakeup-source;
49 };
50
51 reset {
52 label = "reset";
53 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
54 linux,code = <KEY_RESTART>;
55 debounce-interval = <60>;
56 wakeup-source;
57 };
58
59 wps {
60 label = "wps";
61 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
62 linux,code = <KEY_WPS_BUTTON>;
63 debounce-interval = <60>;
64 wakeup-source;
65 };
66 };
67
68 leds {
69 compatible = "gpio-leds";
70 pinctrl-0 = <&led_pins>;
71 pinctrl-names = "default";
72
73 usb1 {
74 label = "white:usb1";
75 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
76 };
77
78 usb2 {
79 label = "white:usb2";
80 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
81 };
82
83 power_amber: power_amber {
84 label = "amber:power";
85 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
86 };
87
88 wan_white {
89 label = "white:wan";
90 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
91 };
92
93 wan_amber {
94 label = "amber:wan";
95 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
96 };
97
98 wps {
99 label = "white:wps";
100 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
101 };
102
103 esata {
104 label = "white:esata";
105 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
106 };
107
108 power_white: power_white {
109 label = "white:power";
110 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
111 default-state = "keep";
112 };
113
114 wifi {
115 label = "white:wifi";
116 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
117 };
118 };
119 };
120
121 &qcom_pinmux {
122 button_pins: button_pins {
123 mux {
124 pins = "gpio6", "gpio54", "gpio65";
125 function = "gpio";
126 drive-strength = <2>;
127 bias-pull-up;
128 };
129 };
130
131 led_pins: led_pins {
132 mux {
133 pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
134 "gpio24","gpio26", "gpio53", "gpio64";
135 function = "gpio";
136 drive-strength = <2>;
137 bias-pull-up;
138 };
139 };
140 };
141
142 &gsbi5 {
143 status = "disabled";
144
145 spi@1a280000 {
146 status = "disabled";
147 };
148 };
149
150 &hs_phy_0 {
151 status = "okay";
152 };
153
154 &ss_phy_0 {
155 status = "okay";
156 };
157
158 &usb3_0 {
159 status = "okay";
160 };
161
162 &hs_phy_1 {
163 status = "okay";
164 };
165
166 &ss_phy_1 {
167 status = "okay";
168 };
169
170 &usb3_1 {
171 status = "okay";
172 };
173
174 &pcie0 {
175 status = "okay";
176 };
177
178 &pcie1 {
179 status = "okay";
180 max-link-speed = <1>;
181 };
182
183 &nand {
184 status = "okay";
185
186 nand@0 {
187 reg = <0>;
188 compatible = "qcom,nandcs";
189
190 nand-ecc-strength = <4>;
191 nand-bus-width = <8>;
192 nand-ecc-step-size = <512>;
193
194 nand-is-boot-medium;
195 qcom,boot-partitions = <0x0 0x1180000>;
196
197 partitions {
198 compatible = "fixed-partitions";
199 #address-cells = <1>;
200 #size-cells = <1>;
201
202 qcadata@0 {
203 label = "qcadata";
204 reg = <0x0000000 0x0c80000>;
205 read-only;
206 };
207
208 APPSBL@c80000 {
209 label = "APPSBL";
210 reg = <0x0c80000 0x0500000>;
211 read-only;
212 };
213
214 APPSBLENV@1180000 {
215 label = "APPSBLENV";
216 reg = <0x1180000 0x0080000>;
217 read-only;
218 };
219
220 art: art@1200000 {
221 label = "art";
222 reg = <0x1200000 0x0140000>;
223 read-only;
224 };
225
226 kernel@1340000 {
227 label = "kernel";
228 reg = <0x1340000 0x0400000>;
229 };
230
231 ubi@1740000 {
232 label = "ubi";
233 reg = <0x1740000 0x1600000>;
234 };
235
236 netgear@2d40000 {
237 label = "netgear";
238 reg = <0x2d40000 0x0c00000>;
239 read-only;
240 };
241
242 reserve@3940000 {
243 label = "reserve";
244 reg = <0x3940000 0x46c0000>;
245 read-only;
246 };
247 };
248 };
249 };
250
251 &mdio0 {
252 status = "okay";
253
254 pinctrl-0 = <&mdio0_pins>;
255 pinctrl-names = "default";
256
257 switch@10 {
258 compatible = "qca,qca8337";
259 #address-cells = <1>;
260 #size-cells = <0>;
261 reg = <0x10>;
262
263 ports {
264 #address-cells = <1>;
265 #size-cells = <0>;
266
267 port@0 {
268 reg = <0>;
269 label = "cpu";
270 ethernet = <&gmac1>;
271 phy-mode = "rgmii";
272 tx-internal-delay-ps = <1000>;
273 rx-internal-delay-ps = <1000>;
274
275 fixed-link {
276 speed = <1000>;
277 full-duplex;
278 };
279 };
280
281 port@1 {
282 reg = <1>;
283 label = "lan1";
284 phy-mode = "internal";
285 phy-handle = <&phy_port1>;
286 };
287
288 port@2 {
289 reg = <2>;
290 label = "lan2";
291 phy-mode = "internal";
292 phy-handle = <&phy_port2>;
293 };
294
295 port@3 {
296 reg = <3>;
297 label = "lan3";
298 phy-mode = "internal";
299 phy-handle = <&phy_port3>;
300 };
301
302 port@4 {
303 reg = <4>;
304 label = "lan4";
305 phy-mode = "internal";
306 phy-handle = <&phy_port4>;
307 };
308
309 port@5 {
310 reg = <5>;
311 label = "wan";
312 phy-mode = "internal";
313 phy-handle = <&phy_port5>;
314 };
315
316 /*
317 port@6 {
318 reg = <0>;
319 label = "cpu";
320 ethernet = <&gmac2>;
321 phy-mode = "rgmii";
322
323 fixed-link {
324 speed = <1000>;
325 full-duplex;
326 };
327 };
328 */
329 };
330
331 mdio {
332 #address-cells = <1>;
333 #size-cells = <0>;
334
335 phy_port1: phy@0 {
336 reg = <0>;
337 };
338
339 phy_port2: phy@1 {
340 reg = <1>;
341 };
342
343 phy_port3: phy@2 {
344 reg = <2>;
345 };
346
347 phy_port4: phy@3 {
348 reg = <3>;
349 };
350
351 phy_port5: phy@4 {
352 reg = <4>;
353 };
354 };
355 };
356 };
357
358 &gmac1 {
359 status = "okay";
360 phy-mode = "rgmii";
361 qcom,id = <1>;
362
363 pinctrl-0 = <&rgmii2_pins>;
364 pinctrl-names = "default";
365
366 nvmem-cells = <&macaddr_art_6>;
367 nvmem-cell-names = "mac-address";
368
369 fixed-link {
370 speed = <1000>;
371 full-duplex;
372 };
373 };
374
375 &gmac2 {
376 status = "okay";
377 phy-mode = "sgmii";
378 qcom,id = <2>;
379
380 nvmem-cells = <&macaddr_art_0>;
381 nvmem-cell-names = "mac-address";
382
383 fixed-link {
384 speed = <1000>;
385 full-duplex;
386 };
387 };
388
389 &tcsr {
390 qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
391 compatible = "qcom,tcsr";
392 };
393
394 &adm_dma {
395 status = "okay";
396 };
397
398 &art {
399 compatible = "nvmem-cells";
400 #address-cells = <1>;
401 #size-cells = <1>;
402
403 macaddr_art_0: macaddr@0 {
404 reg = <0x0 0x6>;
405 };
406
407 macaddr_art_6: macaddr@6 {
408 reg = <0x6 0x6>;
409 };
410 };