ipq806x: convert each device to DSA implementation
[openwrt/staging/svanheule.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8062-wg2600hp3.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq8062-smb208.dtsi"
4 #include <dt-bindings/input/input.h>
5
6 / {
7 model = "NEC Platforms Aterm WG2600HP3";
8 compatible = "nec,wg2600hp3", "qcom,ipq8062", "qcom,ipq8064";
9
10 memory {
11 device_type = "memory";
12 reg = <0x42000000 0x1e000000>;
13 };
14
15 aliases {
16 label-mac-device = &gmac2;
17
18 led-boot = &led_power_green;
19 led-failsafe = &led_power_red;
20 led-running = &led_power_green;
21 led-upgrade = &led_power_red;
22 };
23
24 keys {
25 compatible = "gpio-keys";
26
27 pinctrl-0 = <&buttons_pins>;
28 pinctrl-names = "default";
29
30 reset {
31 label = "reset";
32 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
33 linux,code = <KEY_RESTART>;
34 debounce-interval = <60>;
35 wakeup-source;
36 };
37
38 wps {
39 label = "wps";
40 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
41 linux,code = <KEY_WPS_BUTTON>;
42 debounce-interval = <60>;
43 wakeup-source;
44 };
45
46 mode0 {
47 label = "mode0";
48 gpios = <&qcom_pinmux 40 GPIO_ACTIVE_LOW>;
49 linux,code = <BTN_0>;
50 linux,input-type = <EV_SW>;
51 debounce-interval = <60>;
52 wakeup-source;
53 };
54
55 mode1 {
56 label = "mode1";
57 gpios = <&qcom_pinmux 41 GPIO_ACTIVE_LOW>;
58 linux,code = <BTN_1>;
59 linux,input-type = <EV_SW>;
60 debounce-interval = <60>;
61 wakeup-source;
62 };
63 };
64
65 leds {
66 compatible = "gpio-leds";
67
68 pinctrl-0 = <&leds_pins>;
69 pinctrl-names = "default";
70
71 led_power_green: power_green {
72 label = "green:power";
73 gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
74 };
75
76 led_power_red: power_red {
77 label = "red:power";
78 gpios = <&qcom_pinmux 35 GPIO_ACTIVE_HIGH>;
79 };
80
81 active_green {
82 label = "green:active";
83 gpios = <&qcom_pinmux 42 GPIO_ACTIVE_HIGH>;
84 };
85
86 active_red {
87 label = "red:active";
88 gpios = <&qcom_pinmux 38 GPIO_ACTIVE_HIGH>;
89 };
90
91 wlan2g_green {
92 label = "green:wlan2g";
93 gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
94 linux,default-trigger = "phy1tpt";
95 };
96
97 wlan2g_red {
98 label = "red:wlan2g";
99 gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
100 };
101
102 wlan5g_green {
103 label = "green:wlan5g";
104 gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
105 linux,default-trigger = "phy0tpt";
106 };
107
108 wlan5g_red {
109 label = "red:wlan5g";
110 gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
111 };
112
113 tv_green {
114 label = "green:tv";
115 gpios = <&qcom_pinmux 46 GPIO_ACTIVE_HIGH>;
116 };
117
118 tv_red {
119 label = "red:tv";
120 gpios = <&qcom_pinmux 36 GPIO_ACTIVE_HIGH>;
121 };
122
123 converter_green {
124 label = "green:converter";
125 gpios = <&qcom_pinmux 43 GPIO_ACTIVE_HIGH>;
126 };
127
128 converter_red {
129 label = "red:converter";
130 gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
131 };
132 };
133 };
134
135 /* nand_pins are used for leds_pins, empty the node
136 * from ipq8064.dtsi
137 */
138 &nand_pins {
139 /delete-property/ disable;
140 /delete-property/ pullups;
141 /delete-property/ hold;
142 };
143
144 &qcom_pinmux {
145 pinctrl-0 = <&akro_pins>;
146 pinctrl-names = "default";
147
148 spi_pins: spi_pins {
149 mux {
150 pins = "gpio18", "gpio19", "gpio21";
151 function = "gsbi5";
152 bias-pull-down;
153 };
154
155 data {
156 pins = "gpio18", "gpio19";
157 drive-strength = <10>;
158 };
159
160 cs {
161 pins = "gpio20";
162 drive-strength = <10>;
163 };
164
165 clk {
166 pins = "gpio21";
167 drive-strength = <12>;
168 };
169 };
170
171 buttons_pins: buttons_pins {
172 mux {
173 pins = "gpio22", "gpio24", "gpio40",
174 "gpio41";
175 function = "gpio";
176 drive-strength = <2>;
177 bias-pull-up;
178 };
179 };
180
181 leds_pins: leds_pins {
182 mux {
183 pins = "gpio14", "gpio15", "gpio35",
184 "gpio36", "gpio38", "gpio42",
185 "gpio43", "gpio46", "gpio55",
186 "gpio56", "gpio57", "gpio58";
187 function = "gpio";
188 bias-pull-down;
189 };
190
191 akro2 {
192 pins = "gpio15", "gpio35", "gpio38",
193 "gpio42", "gpio43", "gpio46",
194 "gpio55", "gpio56", "gpio57",
195 "gpio58";
196 drive-strength = <2>;
197 };
198
199 akro4 {
200 pins = "gpio14", "gpio36";
201 drive-strength = <4>;
202 };
203 };
204
205 /*
206 * Stock firmware has the following settings, so let's do the same.
207 * I don't sure why these are required.
208 */
209 akro_pins: akro_pinmux {
210 akro {
211 pins = "gpio17", "gpio26", "gpio47";
212 function = "gpio";
213 drive-strength = <2>;
214 bias-pull-down;
215 };
216
217 reset {
218 pins = "gpio45";
219 function = "gpio";
220 drive-strength = <2>;
221 bias-disable;
222 output-low;
223 };
224
225 gmac0_rgmii {
226 pins = "gpio25";
227 function = "gpio";
228 drive-strength = <8>;
229 bias-disable;
230 };
231 };
232 };
233
234 &gsbi5 {
235 status = "okay";
236 qcom,mode = <GSBI_PROT_SPI>;
237
238 spi@1a280000 {
239 status = "okay";
240
241 pinctrl-0 = <&spi_pins>;
242 pinctrl-names = "default";
243
244 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
245
246 flash@0 {
247 compatible = "jedec,spi-nor";
248 reg = <0>;
249 spi-max-frequency = <50000000>;
250 m25p,fast-read;
251
252 partitions {
253 compatible = "fixed-partitions";
254 #address-cells = <1>;
255 #size-cells = <1>;
256
257 partition@0 {
258 label = "SBL1";
259 reg = <0x0000000 0x0020000>;
260 read-only;
261 };
262
263 partition@20000 {
264 label = "MIBIB";
265 reg = <0x0020000 0x0020000>;
266 read-only;
267 };
268
269 partition@40000 {
270 label = "SBL2";
271 reg = <0x0040000 0x0040000>;
272 read-only;
273 };
274
275 partition@80000 {
276 label = "SBL3";
277 reg = <0x0080000 0x0080000>;
278 read-only;
279 };
280
281 partition@100000 {
282 label = "DDRCONFIG";
283 reg = <0x0100000 0x0010000>;
284 read-only;
285 };
286
287 partition@110000 {
288 label = "SSD";
289 reg = <0x0110000 0x0010000>;
290 read-only;
291 };
292
293 partition@120000 {
294 label = "TZ";
295 reg = <0x0120000 0x0080000>;
296 read-only;
297 };
298
299 partition@1a0000 {
300 label = "RPM";
301 reg = <0x01a0000 0x0080000>;
302 read-only;
303 };
304
305 partition@220000 {
306 label = "APPSBL";
307 reg = <0x0220000 0x0080000>;
308 read-only;
309 };
310
311 partition@2a0000 {
312 label = "APPSBLENV";
313 reg = <0x02a0000 0x0010000>;
314 read-only;
315 };
316
317 factory: partition@2b0000 {
318 label = "PRODUCTDATA";
319 reg = <0x02b0000 0x0030000>;
320 read-only;
321 };
322
323 partition@2e0000 {
324 label = "ART";
325 reg = <0x02e0000 0x0040000>;
326 read-only;
327 compatible = "nvmem-cells";
328 #address-cells = <1>;
329 #size-cells = <1>;
330
331 precal_ART_1000: precal@1000 {
332 reg = <0x1000 0x2f20>;
333 };
334
335 precal_ART_5000: precal@5000 {
336 reg = <0x5000 0x2f20>;
337 };
338 };
339
340 partition@320000 {
341 label = "TP";
342 reg = <0x0320000 0x0040000>;
343 read-only;
344 };
345
346 partition@360000 {
347 label = "TINY";
348 reg = <0x0360000 0x0500000>;
349 read-only;
350 };
351
352 partition@860000 {
353 compatible = "denx,uimage";
354 label = "firmware";
355 reg = <0x0860000 0x17a0000>;
356 };
357 };
358 };
359 };
360 };
361
362 &adm_dma {
363 status = "okay";
364 };
365
366 &pcie0 {
367 status = "okay";
368
369 bridge@0,0 {
370 reg = <0x00000000 0 0 0 0>;
371 #address-cells = <3>;
372 #size-cells = <2>;
373 ranges;
374
375 wifi@1,0 {
376 compatible = "qcom,ath10k";
377 reg = <0x00010000 0 0 0 0>;
378
379 qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
380
381 nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
382 nvmem-cell-names = "mac-address", "pre-calibration";
383 };
384 };
385 };
386
387 &pcie1 {
388 status = "okay";
389 force_gen1 = <1>;
390
391 bridge@0,0 {
392 reg = <0x00000000 0 0 0 0>;
393 #address-cells = <3>;
394 #size-cells = <2>;
395 ranges;
396
397 wifi@1,0 {
398 compatible = "qcom,ath10k";
399 reg = <0x00010000 0 0 0 0>;
400
401 ieee80211-freq-limit = <2400000 2483000>;
402 qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
403
404 nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
405 nvmem-cell-names = "mac-address", "pre-calibration";
406 };
407 };
408 };
409
410 &mdio0 {
411 status = "okay";
412
413 pinctrl-0 = <&mdio0_pins>;
414 pinctrl-names = "default";
415
416 switch@10 {
417 compatible = "qca,qca8337";
418 #address-cells = <1>;
419 #size-cells = <0>;
420 reg = <0x10>;
421
422 ports {
423 #address-cells = <1>;
424 #size-cells = <0>;
425
426 port@0 {
427 reg = <0>;
428 label = "cpu";
429 ethernet = <&gmac1>;
430 phy-mode = "rgmii";
431 tx-internal-delay-ps = <1000>;
432
433 fixed-link {
434 speed = <1000>;
435 full-duplex;
436 };
437 };
438
439 port@1 {
440 reg = <1>;
441 label = "wan";
442 phy-mode = "internal";
443 phy-handle = <&phy_port1>;
444 };
445
446 port@2 {
447 reg = <2>;
448 label = "lan1";
449 phy-mode = "internal";
450 phy-handle = <&phy_port2>;
451 };
452
453 port@3 {
454 reg = <3>;
455 label = "lan2";
456 phy-mode = "internal";
457 phy-handle = <&phy_port3>;
458 };
459
460 port@4 {
461 reg = <4>;
462 label = "lan3";
463 phy-mode = "internal";
464 phy-handle = <&phy_port4>;
465 };
466
467 port@5 {
468 reg = <5>;
469 label = "lan4";
470 phy-mode = "internal";
471 phy-handle = <&phy_port5>;
472 };
473
474 /*
475 port@6 {
476 reg = <6>;
477 label = "cpu";
478 ethernet = <&gmac2>;
479 phy-mode = "sgmii";
480
481 fixed-link {
482 speed = <1000>;
483 full-duplex;
484 };
485 };
486 */
487 };
488
489 mdio {
490 #address-cells = <1>;
491 #size-cells = <0>;
492
493 phy_port1: phy@0 {
494 reg = <0>;
495 };
496
497 phy_port2: phy@1 {
498 reg = <1>;
499 };
500
501 phy_port3: phy@2 {
502 reg = <2>;
503 };
504
505 phy_port4: phy@3 {
506 reg = <3>;
507 };
508
509 phy_port5: phy@4 {
510 reg = <4>;
511 };
512 };
513 };
514 };
515
516 &gmac1 {
517 status = "okay";
518
519 pinctrl-0 = <&rgmii2_pins>;
520 pinctrl-names = "default";
521
522 phy-mode = "rgmii";
523 qcom,id = <1>;
524 mdiobus = <&mdio0>;
525 nvmem-cells = <&macaddr_factory_0>;
526 nvmem-cell-names = "mac-address";
527
528 fixed-link {
529 speed = <1000>;
530 full-duplex;
531 };
532 };
533
534 &gmac2 {
535 status = "okay";
536 phy-mode = "sgmii";
537 qcom,id = <2>;
538 mdiobus = <&mdio0>;
539 nvmem-cells = <&macaddr_factory_6>;
540 nvmem-cell-names = "mac-address";
541
542 fixed-link {
543 speed = <1000>;
544 full-duplex;
545 };
546 };
547
548 &factory {
549 compatible = "nvmem-cells";
550 #address-cells = <1>;
551 #size-cells = <1>;
552
553 macaddr_factory_0: macaddr@0 {
554 reg = <0x0 0x6>;
555 };
556
557 macaddr_factory_6: macaddr@6 {
558 reg = <0x6 0x6>;
559 };
560
561 macaddr_PRODUCTDATA_c: macaddr@c {
562 reg = <0xc 0x6>;
563 };
564
565 macaddr_PRODUCTDATA_12: macaddr@12 {
566 reg = <0x12 0x6>;
567 };
568 };
569
570 &hs_phy_0 {
571 status = "okay";
572 };
573
574 &ss_phy_0 {
575 status = "okay";
576 };
577
578 &usb3_0 {
579 status = "okay";
580 };
581
582 &hs_phy_1 {
583 status = "okay";
584 };
585
586 &ss_phy_1 {
587 status = "okay";
588 };
589
590 &usb3_1 {
591 status = "okay";
592 };