target/linux/generic/backport-6.6/790-07-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch

   1 From 8f7db12efc189eedd196ed8d053236ce27add484 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
   3 Date: Mon, 22 Jan 2024 08:35:54 +0300
   4 Subject: [PATCH 07/30] net: dsa: mt7530: store port 5 SGMII capability of
   5  MT7531
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 Introduce the p5_sgmii field to store the information for whether port 5
  11 has got SGMII or not. Instead of reading the MT7531_TOP_SIG_SR register
  12 multiple times, the register will be read once and the value will be
  13 stored on the p5_sgmii field. This saves unnecessary reads of the
  14 register.
  15
  16 Move the comment about MT7531AE and MT7531BE to mt7531_setup(), where the
  17 switch is identified.
  18
  19 Get rid of mt7531_dual_sgmii_supported() now that priv->p5_sgmii stores the
  20 information. Address the code where mt7531_dual_sgmii_supported() is used.
  21
  22 Get rid of mt7531_is_rgmii_port() which just prints the opposite of
  23 priv->p5_sgmii.
  24
  25 Instead of calling mt7531_pll_setup() then returning, do not call it if
  26 port 5 is SGMII.
  27
  28 Remove P5_INTF_SEL_GMAC5_SGMII. The p5_interface_select enum is supposed to
  29 represent the mode that port 5 is being used in, not the hardware
  30 information of port 5. Set p5_intf_sel to P5_INTF_SEL_GMAC5 instead, if
  31 port 5 is not dsa_is_unused_port().
  32
  33 Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
  34 Acked-by: Daniel Golle <daniel@makrotopia.org>
  35 Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
  36 Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-3-042401f2b279@arinc9.com
  37 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  38 ---
  39  drivers/net/dsa/mt7530-mdio.c |  7 ++---
  40  drivers/net/dsa/mt7530.c      | 48 ++++++++++++-----------------------
  41  drivers/net/dsa/mt7530.h      |  6 +++--
  42  3 files changed, 22 insertions(+), 39 deletions(-)
  43
  44 --- a/drivers/net/dsa/mt7530-mdio.c
  45 +++ b/drivers/net/dsa/mt7530-mdio.c
  46 @@ -81,17 +81,14 @@ static const struct regmap_bus mt7530_re
  47  };
  48
  49  static int
  50 -mt7531_create_sgmii(struct mt7530_priv *priv, bool dual_sgmii)
  51 +mt7531_create_sgmii(struct mt7530_priv *priv)
  52  {
  53         struct regmap_config *mt7531_pcs_config[2] = {};
  54         struct phylink_pcs *pcs;
  55         struct regmap *regmap;
  56         int i, ret = 0;
  57
  58 -       /* MT7531AE has two SGMII units for port 5 and port 6
  59 -        * MT7531BE has only one SGMII unit for port 6
  60 -        */
  61 -       for (i = dual_sgmii ? 0 : 1; i < 2; i++) {
  62 +       for (i = priv->p5_sgmii ? 0 : 1; i < 2; i++) {
  63                 mt7531_pcs_config[i] = devm_kzalloc(priv->dev,
  64                                                     sizeof(struct regmap_config),
  65                                                     GFP_KERNEL);
  66 --- a/drivers/net/dsa/mt7530.c
  67 +++ b/drivers/net/dsa/mt7530.c
  68 @@ -487,15 +487,6 @@ mt7530_pad_clk_setup(struct dsa_switch *
  69         return 0;
  70  }
  71
  72 -static bool mt7531_dual_sgmii_supported(struct mt7530_priv *priv)
  73 -{
  74 -       u32 val;
  75 -
  76 -       val = mt7530_read(priv, MT7531_TOP_SIG_SR);
  77 -
  78 -       return (val & PAD_DUAL_SGMII_EN) != 0;
  79 -}
  80 -
  81  static int
  82  mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface)
  83  {
  84 @@ -510,9 +501,6 @@ mt7531_pll_setup(struct mt7530_priv *pri
  85         u32 xtal;
  86         u32 val;
  87
  88 -       if (mt7531_dual_sgmii_supported(priv))
  89 -               return;
  90 -
  91         val = mt7530_read(priv, MT7531_CREV);
  92         top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR);
  93         hwstrap = mt7530_read(priv, MT7531_HWTRAP);
  94 @@ -920,8 +908,6 @@ static const char *p5_intf_modes(unsigne
  95                 return "PHY P4";
  96         case P5_INTF_SEL_GMAC5:
  97                 return "GMAC5";
  98 -       case P5_INTF_SEL_GMAC5_SGMII:
  99 -               return "GMAC5_SGMII";
 100         default:
 101                 return "unknown";
 102         }
 103 @@ -2685,6 +2671,12 @@ mt7531_setup(struct dsa_switch *ds)
 104                 return -ENODEV;
 105         }
 106
 107 +       /* MT7531AE has got two SGMII units. One for port 5, one for port 6.
 108 +        * MT7531BE has got only one SGMII unit which is for port 6.
 109 +        */
 110 +       val = mt7530_read(priv, MT7531_TOP_SIG_SR);
 111 +       priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN);
 112 +
 113         /* all MACs must be forced link-down before sw reset */
 114         for (i = 0; i < MT7530_NUM_PORTS; i++)
 115                 mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK);
 116 @@ -2694,21 +2686,18 @@ mt7531_setup(struct dsa_switch *ds)
 117                      SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
 118                      SYS_CTRL_REG_RST);
 119
 120 -       mt7531_pll_setup(priv);
 121 -
 122 -       if (mt7531_dual_sgmii_supported(priv)) {
 123 -               priv->p5_intf_sel = P5_INTF_SEL_GMAC5_SGMII;
 124 -
 125 +       if (!priv->p5_sgmii) {
 126 +               mt7531_pll_setup(priv);
 127 +       } else {
 128                 /* Let ds->slave_mii_bus be able to access external phy. */
 129                 mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO11_RG_RXD2_MASK,
 130                            MT7531_EXT_P_MDC_11);
 131                 mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO12_RG_RXD3_MASK,
 132                            MT7531_EXT_P_MDIO_12);
 133 -       } else {
 134 -               priv->p5_intf_sel = P5_INTF_SEL_GMAC5;
 135         }
 136 -       dev_dbg(ds->dev, "P5 support %s interface\n",
 137 -               p5_intf_modes(priv->p5_intf_sel));
 138 +
 139 +       if (!dsa_is_unused_port(ds, 5))
 140 +               priv->p5_intf_sel = P5_INTF_SEL_GMAC5;
 141
 142         mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK,
 143                    MT7531_GPIO0_INTERRUPT);
 144 @@ -2768,11 +2757,6 @@ static void mt7530_mac_port_get_caps(str
 145         }
 146  }
 147
 148 -static bool mt7531_is_rgmii_port(struct mt7530_priv *priv, u32 port)
 149 -{
 150 -       return (port == 5) && (priv->p5_intf_sel != P5_INTF_SEL_GMAC5_SGMII);
 151 -}
 152 -
 153  static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port,
 154                                      struct phylink_config *config)
 155  {
 156 @@ -2785,7 +2769,7 @@ static void mt7531_mac_port_get_caps(str
 157                 break;
 158
 159         case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */
 160 -               if (mt7531_is_rgmii_port(priv, port)) {
 161 +               if (!priv->p5_sgmii) {
 162                         phy_interface_set_rgmii(config->supported_interfaces);
 163                         break;
 164                 }
 165 @@ -2852,7 +2836,7 @@ static int mt7531_rgmii_setup(struct mt7
 166  {
 167         u32 val;
 168
 169 -       if (!mt7531_is_rgmii_port(priv, port)) {
 170 +       if (priv->p5_sgmii) {
 171                 dev_err(priv->dev, "RGMII mode is not available for port %d\n",
 172                         port);
 173                 return -EINVAL;
 174 @@ -3095,7 +3079,7 @@ mt7531_cpu_port_config(struct dsa_switch
 175
 176         switch (port) {
 177         case 5:
 178 -               if (mt7531_is_rgmii_port(priv, port))
 179 +               if (!priv->p5_sgmii)
 180                         interface = PHY_INTERFACE_MODE_RGMII;
 181                 else
 182                         interface = PHY_INTERFACE_MODE_2500BASEX;
 183 @@ -3247,7 +3231,7 @@ mt753x_setup(struct dsa_switch *ds)
 184                 mt7530_free_irq_common(priv);
 185
 186         if (priv->create_sgmii) {
 187 -               ret = priv->create_sgmii(priv, mt7531_dual_sgmii_supported(priv));
 188 +               ret = priv->create_sgmii(priv);
 189                 if (ret && priv->irq)
 190                         mt7530_free_irq(priv);
 191         }
 192 --- a/drivers/net/dsa/mt7530.h
 193 +++ b/drivers/net/dsa/mt7530.h
 194 @@ -712,7 +712,6 @@ enum p5_interface_select {
 195         P5_INTF_SEL_PHY_P0,
 196         P5_INTF_SEL_PHY_P4,
 197         P5_INTF_SEL_GMAC5,
 198 -       P5_INTF_SEL_GMAC5_SGMII,
 199  };
 200
 201  struct mt7530_priv;
 202 @@ -781,6 +780,8 @@ struct mt753x_info {
 203   *                     registers
 204   * @p6_interface       Holding the current port 6 interface
 205   * @p5_intf_sel:       Holding the current port 5 interface select
 206 + * @p5_sgmii:          Flag for distinguishing if port 5 of the MT7531 switch
 207 + *                     has got SGMII
 208   * @irq:               IRQ number of the switch
 209   * @irq_domain:                IRQ domain of the switch irq_chip
 210   * @irq_enable:                IRQ enable bits, synced to SYS_INT_EN
 211 @@ -802,6 +803,7 @@ struct mt7530_priv {
 212         phy_interface_t         p6_interface;
 213         phy_interface_t         p5_interface;
 214         enum p5_interface_select p5_intf_sel;
 215 +       bool                    p5_sgmii;
 216         u8                      mirror_rx;
 217         u8                      mirror_tx;
 218         struct mt7530_port      ports[MT7530_NUM_PORTS];
 219 @@ -811,7 +813,7 @@ struct mt7530_priv {
 220         int irq;
 221         struct irq_domain *irq_domain;
 222         u32 irq_enable;
 223 -       int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii);
 224 +       int (*create_sgmii)(struct mt7530_priv *priv);
 225         u8 active_cpu_ports;
 226  };
 227