ac2a4b08246eca4bf753dfb86376220282b71f7f
[openwrt/staging/neocturne.git] / target / linux / mediatek / dts / mt7986b-netgear-wax220.dts
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2
3 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7
8 #include "mt7986b.dtsi"
9
10 / {
11 #address-cells = <0x2>;
12 #size-cells = <0x2>;
13 model = "Netgear WAX220";
14 compatible = "netgear,wax220", "mediatek,mt7986b-spim-snand-rfb";
15
16 aliases {
17 serial0 = &uart0;
18 led-boot = &led_power_blue;
19 led-failsafe = &led_power_amber;
20 led-running = &led_power_green;
21 led-upgrade = &led_power_amber;
22 };
23
24 gpio-keys {
25 compatible = "gpio-keys";
26
27 reset {
28 gpios = <&pio 9 GPIO_ACTIVE_LOW>;
29 linux,code = <KEY_RESTART>;
30 label = "reset";
31 };
32 };
33
34 chosen {
35 stdout-path = "serial0:115200n8";
36 };
37
38 leds {
39 compatible = "gpio-leds";
40
41 wlan5g_green {
42 gpios = <&pio 12 GPIO_ACTIVE_LOW>;
43 label = "green:wlan5g";
44 };
45
46 led_power_amber: power_amber {
47 gpios = <&pio 15 GPIO_ACTIVE_LOW>;
48 label = "amber:power";
49 };
50
51 wlan2g_green {
52 gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
53 label = "green:wlan2g";
54 };
55
56 led_power_blue: power_blue {
57 gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
58 label = "blue:power";
59 };
60
61 led_power_green: power_green {
62 gpios = <&pio 10 GPIO_ACTIVE_LOW>;
63 label = "green:power";
64 };
65
66 wlan2g_blue {
67 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
68 label = "blue:wlan2g";
69 };
70
71 lan_green {
72 gpios = <&pio 22 GPIO_ACTIVE_HIGH>;
73 label = "green:lan";
74 };
75
76 lan_amber {
77 gpios = <&pio 13 GPIO_ACTIVE_LOW>;
78 label = "amber:lan";
79 };
80
81 wlan5g_blue {
82 gpios = <&pio 2 GPIO_ACTIVE_LOW>;
83 label = "blue:wlan5g";
84 };
85 };
86 };
87
88 &crypto {
89 status = "okay";
90 };
91
92 &eth {
93 status = "okay";
94
95 gmac1: mac@1 {
96 compatible = "mediatek,eth-mac";
97 reg = <1>;
98 phy-handle = <&phy6>;
99 phy-mode = "2500base-x";
100 };
101
102 mdio: mdio-bus {
103 #address-cells = <1>;
104 #size-cells = <0>;
105 };
106 };
107
108 &mdio {
109 #address-cells = <1>;
110 #size-cells = <0>;
111 phy6: ethernet-phy@6 {
112 reg = <6>;
113 reset-assert-us = <100000>;
114 reset-deassert-us = <100000>;
115 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
116 interrupt-controller;
117 #interrupt-cells = <1>;
118 interrupt-parent = <&pio>;
119 interrupts = <46 IRQ_TYPE_LEVEL_HIGH>;
120 };
121 };
122
123
124 &pio {
125 spi_flash_pins: spi-flash-pins-33-to-38 {
126 mux {
127 function = "spi";
128 groups = "spi0", "spi0_wp_hold";
129 };
130 conf-pu {
131 pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
132 drive-strength = <8>;
133 mediatek,pull-up-adv = <0>; /* bias-disable */
134 };
135 conf-pd {
136 pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
137 drive-strength = <8>;
138 mediatek,pull-down-adv = <0>; /* bias-disable */
139 };
140 };
141
142 wf_2g_5g_pins: wf_2g_5g-pins {
143 mux {
144 function = "wifi";
145 groups = "wf_2g", "wf_5g";
146 };
147 conf {
148 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
149 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
150 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
151 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
152 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
153 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
154 "WF1_TOP_CLK", "WF1_TOP_DATA";
155 drive-strength = <4>;
156 };
157 };
158
159 wf_dbdc_pins: wf-dbdc-pins {
160 mux {
161 function = "wifi";
162 groups = "wf_dbdc";
163 };
164 conf {
165 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
166 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
167 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
168 "WF0_TOP_CLK", "WF0_TOP_DATA";
169 drive-strength = <4>;
170 };
171 };
172 };
173
174 &spi0 {
175 pinctrl-names = "default";
176 pinctrl-0 = <&spi_flash_pins>;
177 status = "okay";
178
179 spi_nand_flash: flash@0 {
180 #address-cells = <1>;
181 #size-cells = <1>;
182 compatible = "spi-nand";
183 reg = <0>;
184
185 spi-max-frequency = <20000000>;
186 spi-tx-buswidth = <4>;
187 spi-rx-buswidth = <4>;
188
189 mediatek,nmbm;
190 mediatek,bmt-max-ratio = <1>;
191 mediatek,bmt-max-reserved-blocks = <256>;
192 mediatek,bmt-remap-range = <0x0 0x580000>;
193
194 partitions: partitions {
195 #address-cells = <0x1>;
196 #size-cells = <0x1>;
197 compatible = "fixed-partitions";
198
199 partition@5fc0000 {
200 label = "Traffic";
201 reg = <0x5fc0000 0x200000>;
202 };
203
204 partition@63c0000 {
205 label = "NTGRcryptD";
206 reg = <0x63c0000 0x500000>;
207 };
208
209 partition@580000 {
210 label = "ubi";
211 reg = <0x580000 0x5140000>;
212 };
213
214 factory: partition@180000 {
215 label = "Factory";
216 reg = <0x180000 0x200000>;
217 };
218
219 partition@69c0000 {
220 label = "User_data";
221 reg = <0x69c0000 0x640000>;
222 };
223
224 partition@100000 {
225 label = "u-boot-env";
226 reg = <0x100000 0x80000>;
227 };
228
229 partition@68c0000 {
230 label = "LOG";
231 reg = <0x68c0000 0x100000>;
232 };
233
234 partition@5ac0000 {
235 label = "POT";
236 reg = <0x5ac0000 0x100000>;
237 };
238
239 partition@0 {
240 label = "BL2";
241 read-only;
242 reg = <0x0 0x100000>;
243 };
244
245 partition@5bc0000 {
246 label = "Language";
247 reg = <0x5bc0000 0x400000>;
248 };
249
250 partition@61c0000 {
251 label = "Cert";
252 reg = <0x61c0000 0x100000>;
253 };
254
255 partition@380000 {
256 label = "FIP";
257 reg = <0x380000 0x200000>;
258 };
259
260 partition@56c0000 {
261 label = "RAE";
262 reg = <0x56c0000 0x400000>;
263 };
264
265 partition@62c0000 {
266 label = "NTGRcryptK";
267 reg = <0x62c0000 0x100000>;
268 };
269 };
270 };
271
272 };
273
274 &trng {
275 status = "okay";
276 };
277
278 &uart0 {
279 status = "okay";
280 };
281
282 &watchdog {
283 status = "okay";
284 };
285
286 &wifi {
287 status = "okay";
288 pinctrl-names = "default", "dbdc";
289 pinctrl-0 = <&wf_2g_5g_pins>;
290 pinctrl-1 = <&wf_dbdc_pins>;
291
292 mediatek,mtd-eeprom = <&factory 0x0>;
293 };