target/linux/rockchip/patches-5.15/006-v6.4-arm64-dts-rockchip-Add-FriendlyARM-NanoPi-R2C.patch

   1 From 004589ff9df5b75672a78b6c3c4cba93202b14c9 Mon Sep 17 00:00:00 2001
   2 From: Tianling Shen <cnsztl@gmail.com>
   3 Date: Sat, 25 Mar 2023 15:40:20 +0800
   4 Subject: [PATCH] arm64: dts: rockchip: Add FriendlyARM NanoPi R2C
   5
   6 The NanoPi R2C is a minor variant of NanoPi R2S with the on-board NIC
   7 chip changed from rtl8211e to yt8521s, and otherwise identical to R2S.
   8
   9 Signed-off-by: Tianling Shen <cnsztl@gmail.com>
  10 Link: https://lore.kernel.org/r/20230325074022.9818-3-cnsztl@gmail.com
  11 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
  12 ---
  13  arch/arm64/boot/dts/rockchip/Makefile         |  1 +
  14  .../boot/dts/rockchip/rk3328-nanopi-r2c.dts   | 40 +++++++++++++++++++
  15  2 files changed, 41 insertions(+)
  16  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts
  17
  18 --- a/arch/arm64/boot/dts/rockchip/Makefile
  19 +++ b/arch/arm64/boot/dts/rockchip/Makefile
  20 @@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a9
  21  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
  22  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
  23  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
  24 +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
  25  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
  26  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
  27  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb
  28 --- /dev/null
  29 +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts
  30 @@ -0,0 +1,40 @@
  31 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  32 +/*
  33 + * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd.
  34 + * (http://www.friendlyarm.com)
  35 + *
  36 + * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com>
  37 + */
  38 +
  39 +/dts-v1/;
  40 +#include "rk3328-nanopi-r2s.dts"
  41 +
  42 +/ {
  43 +       model = "FriendlyElec NanoPi R2C";
  44 +       compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328";
  45 +};
  46 +
  47 +&gmac2io {
  48 +       phy-handle = <&yt8521s>;
  49 +       tx_delay = <0x22>;
  50 +       rx_delay = <0x12>;
  51 +
  52 +       mdio {
  53 +               /delete-node/ ethernet-phy@1;
  54 +
  55 +               yt8521s: ethernet-phy@3 {
  56 +                       compatible = "ethernet-phy-ieee802.3-c22";
  57 +                       reg = <3>;
  58 +
  59 +                       motorcomm,clk-out-frequency-hz = <125000000>;
  60 +                       motorcomm,keep-pll-enabled;
  61 +                       motorcomm,auto-sleep-disabled;
  62 +
  63 +                       pinctrl-0 = <&eth_phy_reset_pin>;
  64 +                       pinctrl-names = "default";
  65 +                       reset-assert-us = <10000>;
  66 +                       reset-deassert-us = <50000>;
  67 +                       reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
  68 +               };
  69 +       };
  70 +};