ath79: ar: convert to nvmem-layout
[openwrt/staging/hauke.git] / target / linux / ath79 / dts / ar9344_araknis_an-300-ap-i-n.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar9344.dtsi"
4 #include "ar934x_senao_loader.dtsi"
5
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8
9 / {
10 compatible = "araknis,an-300-ap-i-n", "qca,ar9344";
11 model = "Araknis AN-300-AP-I-N";
12
13 aliases {
14 label-mac-device = &eth0;
15 led-boot = &led_power;
16 led-failsafe = &led_power;
17 led-upgrade = &led_power;
18 };
19
20 keys {
21 compatible = "gpio-keys";
22
23 reset {
24 linux,code = <KEY_RESTART>;
25 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
26 debounce-interval = <60>;
27 };
28 };
29
30 leds {
31 compatible = "gpio-leds";
32
33 led_power: power {
34 label = "amber:power";
35 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
36 default-state = "off";
37 };
38
39 wifi5g {
40 label = "blue:wifi5g";
41 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
42 linux,default-trigger = "phy0tpt";
43 };
44
45 wps {
46 label = "blue:wps";
47 gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
48 };
49 };
50
51 ath9k-leds {
52 compatible = "gpio-leds";
53
54 wifi2g {
55 label = "blue:wifi2g";
56 gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
57 linux,default-trigger = "phy1tpt";
58 };
59 };
60 };
61
62 &mdio0 {
63 status = "okay";
64
65 phy0: ethernet-phy@0 {
66 reg = <0>;
67 eee-broken-100tx;
68 eee-broken-1000t;
69 };
70 };
71
72 &eth0 {
73 status = "okay";
74
75 nvmem-cells = <&macaddr_art_0>;
76 nvmem-cell-names = "mac-address";
77
78 phy-handle = <&phy0>;
79 phy-mode = "rgmii-txid";
80
81 pll-data = <0x02000000 0x00000101 0x00001313>;
82 };
83
84 &pcie {
85 status = "okay";
86
87 ath9k: wifi@0,0,0 {
88 compatible = "pci168c,0030";
89 reg = <0x0 0 0 0 0>;
90 nvmem-cells = <&macaddr_art_0>, <&calibration_art_5000>;
91 nvmem-cell-names = "mac-address", "calibration";
92 mac-address-increment = <1>;
93 ieee80211-freq-limit = <2402000 2482000>;
94 #gpio-cells = <2>;
95 gpio-controller;
96 };
97 };
98
99 &wmac {
100 status = "okay";
101
102 ieee80211-freq-limit = <4900000 5990000>;
103
104 nvmem-cells = <&macaddr_art_0>, <&calibration_art_1000>;
105 nvmem-cell-names = "mac-address", "calibration";
106 mac-address-increment = <2>;
107 };
108
109 &art {
110 nvmem-layout {
111 compatible = "fixed-layout";
112 #address-cells = <1>;
113 #size-cells = <1>;
114
115 macaddr_art_0: macaddr@0 {
116 reg = <0x0 0x6>;
117 };
118
119 calibration_art_1000: calibration@1000 {
120 reg = <0x1000 0x440>;
121 };
122
123 calibration_art_5000: calibration@5000 {
124 reg = <0x5000 0x440>;
125 };
126 };
127 };