target/linux/ath79/dts/ar7242_ubnt_sw.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ar7242.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "qca,ar7242";
  10         model = "Ubiquiti Networks SW board";
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,115200n8";
  14         };
  15
  16         aliases {
  17                 led-boot = &led_usr;
  18                 led-failsafe = &led_usr;
  19                 led-running = &led_usr;
  20                 led-upgrade = &led_usr;
  21         };
  22
  23         leds {
  24                 compatible = "gpio-leds";
  25
  26                 led_usr: usr {
  27                         label = "yellow:usr";
  28                         gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
  29                 };
  30         };
  31
  32         keys {
  33                 compatible = "gpio-keys";
  34
  35                 reset {
  36                         linux,code = <KEY_RESTART>;
  37                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  38                         debounce-interval = <60>;
  39                 };
  40         };
  41
  42         gpio_spi {
  43                 compatible = "spi-gpio";
  44                 #address-cells = <1>;
  45                 #size-cells = <0>;
  46
  47                 sck-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
  48                 mosi-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
  49                 cs-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
  50                 num-chipselects = <1>;
  51
  52                 gpio_hc595: gpio_spi@0 {
  53                         compatible = "fairchild,74hc595";
  54                         reg = <0>;
  55                         registers-number = <2>;
  56                         spi-max-frequency = <100000>;
  57                         enable-gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
  58
  59                         gpio-controller;
  60                         #gpio-cells = <2>;
  61
  62                 };
  63         };
  64 };
  65
  66 &spi {
  67         status = "okay";
  68
  69         flash@0 {
  70                 compatible = "jedec,spi-nor";
  71                 reg = <0>;
  72                 spi-max-frequency = <25000000>;
  73
  74                 partitions {
  75                         compatible = "fixed-partitions";
  76                         #address-cells = <1>;
  77                         #size-cells = <1>;
  78
  79                         partition@0 {
  80                                 reg = <0x000000 0x040000>;
  81                                 label = "u-boot";
  82                                 read-only;
  83                         };
  84
  85                         partition@40000 {
  86                                 reg = <0x040000 0x010000>;
  87                                 label = "u-boot-env";
  88                                 read-only;
  89                         };
  90
  91                         partition@50000 {
  92                                 compatible = "denx,uimage";
  93                                 reg = <0x050000 0x760000>;
  94                                 label = "firmware";
  95                         };
  96
  97                         partition@7b0000 {
  98                                 reg = <0x7b0000 0x040000>;
  99                                 label = "cfg";
 100                                 read-only;
 101                         };
 102
 103                         art: partition@7f0000 {
 104                                 reg = <0x7f0000 0x010000>;
 105                                 label = "art";
 106                                 read-only;
 107
 108                                 nvmem-layout {
 109                                         compatible = "fixed-layout";
 110                                         #address-cells = <1>;
 111                                         #size-cells = <1>;
 112
 113                                         macaddr_art_0: macaddr@0 {
 114                                                 reg = <0x0 0x6>;
 115                                         };
 116
 117                                         macaddr_art_6: macaddr@6 {
 118                                                 reg = <0x6 0x6>;
 119                                         };
 120                                 };
 121                         };
 122                 };
 123         };
 124 };
 125
 126 &usb_phy {
 127         status = "okay";
 128 };
 129
 130 &usb {
 131         status = "okay";
 132 };
 133
 134 &pcie {
 135         status = "okay";
 136 };
 137
 138 &eth1 {
 139         status = "okay";
 140
 141         nvmem-cells = <&macaddr_art_6>;
 142         nvmem-cell-names = "mac-address";
 143 };