projects / openwrt / staging / dangole.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
bcm27xx: update 6.1 patches to latest version
[openwrt/staging/dangole.git] / target / linux / bcm27xx / patches-6.1 / 950-0853-dts-2712-Update-for-device-tree.patch
1 From 1196bf1a7736ff0ab79f5012fa84082e298031a7 Mon Sep 17 00:00:00 2001
2 From: Dom Cobley <popcornmix@gmail.com>
3 Date: Tue, 19 Sep 2023 15:55:00 +0100
4 Subject: [PATCH] dts: 2712: Update for device tree
5
6 dtoverlays: Fix up edt5406 entries to match with vc4-kms-dsi-7inch
7
8 vc4-kms-dsi-7inch expects the touch fragment to be named ts_i2c_frag,
9 but edt5406 didn't do this.
10
11 Fixes: 736d601fb38c ("dts: 2712: Update for device tree")
12
13 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
14 ---
15 arch/arm/boot/dts/Makefile | 3 +-
16 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 3 +
17 arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts | 3 +
18 arch/arm/boot/dts/bcm2708-rpi-b.dts | 3 +
19 arch/arm/boot/dts/bcm2708-rpi-cm.dts | 3 +
20 arch/arm/boot/dts/bcm2708-rpi-zero-w.dts | 1 +
21 arch/arm/boot/dts/bcm2708-rpi-zero.dts | 1 +
22 arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 3 +
23 arch/arm/boot/dts/bcm2709-rpi-cm2.dts | 3 +
24 arch/arm/boot/dts/bcm270x-rpi.dtsi | 3 +
25 arch/arm/boot/dts/bcm2710-rpi-2-b.dts | 3 +
26 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 3 +
27 arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 3 +
28 arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 3 +
29 arch/arm/boot/dts/bcm2710-rpi-zero-2-w.dts | 3 +
30 arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 3 +
31 arch/arm/boot/dts/bcm2711-rpi-cm4.dts | 3 +
32 arch/arm/boot/dts/bcm2711-rpi-cm4s.dts | 3 +
33 arch/arm/boot/dts/bcm2712-rpi-5-b.dts | 824 +++++++++++
34 arch/arm/boot/dts/bcm2712-rpi.dtsi | 281 ++++
35 arch/arm/boot/dts/bcm2712.dtsi | 1287 +++++++++++++++++
36 arch/arm/boot/dts/overlays/Makefile | 23 +
37 arch/arm/boot/dts/overlays/README | 360 ++++-
38 .../dts/overlays/adau1977-adc-overlay.dts | 4 +-
39 .../dts/overlays/adau7002-simple-overlay.dts | 4 +-
40 .../overlays/akkordion-iqdacplus-overlay.dts | 4 +-
41 .../allo-boss-dac-pcm512x-audio-overlay.dts | 10 +-
42 .../overlays/allo-boss2-dac-audio-overlay.dts | 2 +-
43 .../dts/overlays/allo-digione-overlay.dts | 4 +-
44 .../allo-katana-dac-audio-overlay.dts | 2 +-
45 .../allo-piano-dac-pcm512x-audio-overlay.dts | 4 +-
46 ...o-piano-dac-plus-pcm512x-audio-overlay.dts | 4 +-
47 .../boot/dts/overlays/applepi-dac-overlay.dts | 4 +-
48 .../dts/overlays/arducam-64mp-overlay.dts | 2 +-
49 .../overlays/arducam-pivariety-overlay.dts | 2 +-
50 .../overlays/audioinjector-addons-overlay.dts | 4 +-
51 .../audioinjector-bare-i2s-overlay.dts | 6 +-
52 ...dioinjector-isolated-soundcard-overlay.dts | 4 +-
53 .../overlays/audioinjector-ultra-overlay.dts | 6 +-
54 .../audioinjector-wm8731-audio-overlay.dts | 4 +-
55 .../dts/overlays/audiosense-pi-overlay.dts | 4 +-
56 .../boot/dts/overlays/chipdip-dac-overlay.dts | 4 +-
57 .../dts/overlays/cirrus-wm5102-overlay.dts | 4 +-
58 .../boot/dts/overlays/dacberry400-overlay.dts | 4 +-
59 .../dts/overlays/dionaudio-kiwi-overlay.dts | 4 +-
60 .../dts/overlays/dionaudio-loco-overlay.dts | 4 +-
61 .../overlays/dionaudio-loco-v2-overlay.dts | 4 +-
62 .../dts/overlays/disable-bt-pi5-overlay.dts | 17 +
63 .../dts/overlays/disable-wifi-pi5-overlay.dts | 13 +
64 arch/arm/boot/dts/overlays/draws-overlay.dts | 6 +-
65 .../boot/dts/overlays/edt-ft5406-overlay.dts | 22 +-
66 arch/arm/boot/dts/overlays/edt-ft5406.dtsi | 2 +-
67 .../boot/dts/overlays/fe-pi-audio-overlay.dts | 4 +-
68 .../boot/dts/overlays/ghost-amp-overlay.dts | 4 +-
69 .../googlevoicehat-soundcard-overlay.dts | 4 +-
70 .../dts/overlays/hifiberry-amp-overlay.dts | 4 +-
71 .../dts/overlays/hifiberry-amp100-overlay.dts | 11 +-
72 .../dts/overlays/hifiberry-amp3-overlay.dts | 4 +-
73 .../dts/overlays/hifiberry-dac-overlay.dts | 4 +-
74 .../overlays/hifiberry-dacplus-overlay.dts | 11 +-
75 .../overlays/hifiberry-dacplusadc-overlay.dts | 10 +-
76 .../hifiberry-dacplusadcpro-overlay.dts | 10 +-
77 .../overlays/hifiberry-dacplusdsp-overlay.dts | 4 +-
78 .../overlays/hifiberry-dacplushd-overlay.dts | 4 +-
79 .../dts/overlays/hifiberry-digi-overlay.dts | 4 +-
80 .../overlays/hifiberry-digi-pro-overlay.dts | 4 +-
81 .../boot/dts/overlays/i-sabre-q2m-overlay.dts | 4 +-
82 .../boot/dts/overlays/i2c0-pi5-overlay.dts | 34 +
83 .../boot/dts/overlays/i2c1-pi5-overlay.dts | 34 +
84 .../boot/dts/overlays/i2c2-pi5-overlay.dts | 21 +
85 .../boot/dts/overlays/i2c3-pi5-overlay.dts | 22 +
86 .../arm/boot/dts/overlays/i2s-dac-overlay.dts | 4 +-
87 arch/arm/boot/dts/overlays/imx219-overlay.dts | 2 +-
88 arch/arm/boot/dts/overlays/imx258-overlay.dts | 2 +-
89 .../boot/dts/overlays/imx290_327-overlay.dtsi | 2 +-
90 arch/arm/boot/dts/overlays/imx296-overlay.dts | 2 +-
91 .../boot/dts/overlays/imx477_378-overlay.dtsi | 2 +-
92 arch/arm/boot/dts/overlays/imx519-overlay.dts | 2 +-
93 arch/arm/boot/dts/overlays/imx708-overlay.dts | 4 +-
94 .../dts/overlays/iqaudio-codec-overlay.dts | 4 +-
95 .../boot/dts/overlays/iqaudio-dac-overlay.dts | 4 +-
96 .../dts/overlays/iqaudio-dacplus-overlay.dts | 4 +-
97 .../iqaudio-digi-wm8804-audio-overlay.dts | 4 +-
98 .../arm/boot/dts/overlays/irs1125-overlay.dts | 2 +-
99 .../dts/overlays/justboom-both-overlay.dts | 4 +-
100 .../dts/overlays/justboom-dac-overlay.dts | 4 +-
101 .../dts/overlays/justboom-digi-overlay.dts | 4 +-
102 .../boot/dts/overlays/max98357a-overlay.dts | 6 +-
103 .../boot/dts/overlays/mbed-dac-overlay.dts | 6 +-
104 .../boot/dts/overlays/merus-amp-overlay.dts | 4 +-
105 .../dts/overlays/midi-uart0-pi5-overlay.dts | 35 +
106 .../dts/overlays/midi-uart1-pi5-overlay.dts | 35 +
107 .../dts/overlays/midi-uart2-pi5-overlay.dts | 35 +
108 .../dts/overlays/midi-uart3-pi5-overlay.dts | 35 +
109 .../dts/overlays/midi-uart4-pi5-overlay.dts | 35 +
110 arch/arm/boot/dts/overlays/ov2311-overlay.dts | 2 +-
111 arch/arm/boot/dts/overlays/ov5647-overlay.dts | 2 +-
112 arch/arm/boot/dts/overlays/ov7251-overlay.dts | 2 +-
113 arch/arm/boot/dts/overlays/ov9281-overlay.dts | 2 +-
114 arch/arm/boot/dts/overlays/overlay_map.dts | 226 +++
115 arch/arm/boot/dts/overlays/pibell-overlay.dts | 6 +-
116 .../arm/boot/dts/overlays/pifi-40-overlay.dts | 4 +-
117 .../boot/dts/overlays/pifi-dac-hd-overlay.dts | 4 +-
118 .../dts/overlays/pifi-dac-zero-overlay.dts | 4 +-
119 .../dts/overlays/pifi-mini-210-overlay.dts | 4 +-
120 .../arm/boot/dts/overlays/pisound-overlay.dts | 4 +-
121 .../boot/dts/overlays/proto-codec-overlay.dts | 4 +-
122 .../rra-digidac1-wm8741-audio-overlay.dts | 4 +-
123 .../dts/overlays/spi2-1cs-pi5-overlay.dts | 33 +
124 .../dts/overlays/spi2-2cs-pi5-overlay.dts | 44 +
125 .../dts/overlays/spi3-1cs-pi5-overlay.dts | 33 +
126 .../dts/overlays/spi3-2cs-pi5-overlay.dts | 44 +
127 .../dts/overlays/spi5-1cs-pi5-overlay.dts | 33 +
128 .../dts/overlays/spi5-2cs-pi5-overlay.dts | 44 +
129 .../dts/overlays/superaudioboard-overlay.dts | 6 +-
130 .../dts/overlays/tc358743-audio-overlay.dts | 10 +-
131 .../boot/dts/overlays/tc358743-overlay.dts | 2 +-
132 .../boot/dts/overlays/uart0-pi5-overlay.dts | 17 +
133 .../boot/dts/overlays/uart1-pi5-overlay.dts | 17 +
134 .../boot/dts/overlays/uart2-pi5-overlay.dts | 17 +
135 .../boot/dts/overlays/uart3-pi5-overlay.dts | 17 +
136 .../boot/dts/overlays/uart4-pi5-overlay.dts | 17 +
137 arch/arm/boot/dts/overlays/udrc-overlay.dts | 6 +-
138 .../dts/overlays/ugreen-dabboard-overlay.dts | 10 +-
139 .../dts/overlays/vc4-fkms-v3d-overlay.dts | 6 +
140 .../dts/overlays/vc4-fkms-v3d-pi4-overlay.dts | 6 +
141 .../overlays/vc4-kms-dsi-7inch-overlay.dts | 18 +-
142 .../vc4-kms-dsi-waveshare-panel-overlay.dts | 8 +-
143 .../dts/overlays/vc4-kms-v3d-pi5-overlay.dts | 147 ++
144 .../dts/overlays/vc4-kms-vga666-overlay.dts | 9 +-
145 .../dts/overlays/wm8960-soundcard-overlay.dts | 4 +-
146 arch/arm/boot/dts/rp1.dtsi | 1168 +++++++++++++++
147 arch/arm64/boot/dts/broadcom/Makefile | 1 +
148 .../boot/dts/broadcom/bcm2712-rpi-5-b.dts | 1 +
149 134 files changed, 5143 insertions(+), 264 deletions(-)
150 create mode 100644 arch/arm/boot/dts/bcm2712-rpi-5-b.dts
151 create mode 100644 arch/arm/boot/dts/bcm2712-rpi.dtsi
152 create mode 100644 arch/arm/boot/dts/bcm2712.dtsi
153 create mode 100644 arch/arm/boot/dts/overlays/disable-bt-pi5-overlay.dts
154 create mode 100644 arch/arm/boot/dts/overlays/disable-wifi-pi5-overlay.dts
155 create mode 100644 arch/arm/boot/dts/overlays/i2c0-pi5-overlay.dts
156 create mode 100644 arch/arm/boot/dts/overlays/i2c1-pi5-overlay.dts
157 create mode 100644 arch/arm/boot/dts/overlays/i2c2-pi5-overlay.dts
158 create mode 100644 arch/arm/boot/dts/overlays/i2c3-pi5-overlay.dts
159 create mode 100644 arch/arm/boot/dts/overlays/midi-uart0-pi5-overlay.dts
160 create mode 100644 arch/arm/boot/dts/overlays/midi-uart1-pi5-overlay.dts
161 create mode 100644 arch/arm/boot/dts/overlays/midi-uart2-pi5-overlay.dts
162 create mode 100644 arch/arm/boot/dts/overlays/midi-uart3-pi5-overlay.dts
163 create mode 100644 arch/arm/boot/dts/overlays/midi-uart4-pi5-overlay.dts
164 create mode 100644 arch/arm/boot/dts/overlays/spi2-1cs-pi5-overlay.dts
165 create mode 100644 arch/arm/boot/dts/overlays/spi2-2cs-pi5-overlay.dts
166 create mode 100644 arch/arm/boot/dts/overlays/spi3-1cs-pi5-overlay.dts
167 create mode 100644 arch/arm/boot/dts/overlays/spi3-2cs-pi5-overlay.dts
168 create mode 100644 arch/arm/boot/dts/overlays/spi5-1cs-pi5-overlay.dts
169 create mode 100644 arch/arm/boot/dts/overlays/spi5-2cs-pi5-overlay.dts
170 create mode 100755 arch/arm/boot/dts/overlays/uart0-pi5-overlay.dts
171 create mode 100755 arch/arm/boot/dts/overlays/uart1-pi5-overlay.dts
172 create mode 100755 arch/arm/boot/dts/overlays/uart2-pi5-overlay.dts
173 create mode 100755 arch/arm/boot/dts/overlays/uart3-pi5-overlay.dts
174 create mode 100755 arch/arm/boot/dts/overlays/uart4-pi5-overlay.dts
175 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-pi5-overlay.dts
176 create mode 100644 arch/arm/boot/dts/rp1.dtsi
177 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
178
179 --- a/arch/arm/boot/dts/Makefile
180 +++ b/arch/arm/boot/dts/Makefile
181 @@ -18,7 +18,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
182 bcm2709-rpi-cm2.dtb \
183 bcm2710-rpi-cm3.dtb \
184 bcm2711-rpi-cm4.dtb \
185 - bcm2711-rpi-cm4s.dtb
186 + bcm2711-rpi-cm4s.dtb \
187 + bcm2712-rpi-5-b.dtb
188
189 dtb-$(CONFIG_ARCH_ALPINE) += \
190 alpine-db.dtb
191 --- a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
192 +++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
193 @@ -192,6 +192,9 @@ i2c_arm: &i2c1 {
194 i2c_vc: &i2c0 {
195 };
196
197 +i2c_csi_dsi0: &i2c0 {
198 +};
199 +
200 / {
201 __overrides__ {
202 audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
203 --- a/arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts
204 +++ b/arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts
205 @@ -203,6 +203,9 @@ i2c_arm: &i2c0 {
206 i2c_vc: &i2c1 {
207 };
208
209 +i2c_csi_dsi0: &i2c0 {
210 +};
211 +
212 / {
213 __overrides__ {
214 audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
215 --- a/arch/arm/boot/dts/bcm2708-rpi-b.dts
216 +++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
217 @@ -185,6 +185,9 @@ i2c_arm: &i2c1 {
218 i2c_vc: &i2c0 {
219 };
220
221 +i2c_csi_dsi0: &i2c0 {
222 +};
223 +
224 / {
225 __overrides__ {
226 audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
227 --- a/arch/arm/boot/dts/bcm2708-rpi-cm.dts
228 +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
229 @@ -19,6 +19,9 @@ cam0_reg: &cam0_regulator {
230 gpio = <&gpio 31 GPIO_ACTIVE_HIGH>;
231 };
232
233 +i2c_csi_dsi0: &i2c0 {
234 +};
235 +
236 &uart0 {
237 status = "okay";
238 };
239 --- a/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
240 +++ b/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
241 @@ -243,6 +243,7 @@ cam0_reg: &cam_dummy_reg {
242
243 i2c_arm: &i2c1 {};
244 i2c_vc: &i2c0 {};
245 +i2c_csi_dsi0: &i2c0 {};
246
247 / {
248 __overrides__ {
249 --- a/arch/arm/boot/dts/bcm2708-rpi-zero.dts
250 +++ b/arch/arm/boot/dts/bcm2708-rpi-zero.dts
251 @@ -178,6 +178,7 @@ cam0_reg: &cam_dummy_reg {
252
253 i2c_arm: &i2c1 {};
254 i2c_vc: &i2c0 {};
255 +i2c_csi_dsi0: &i2c0 {};
256
257 / {
258 __overrides__ {
259 --- a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
260 +++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
261 @@ -186,6 +186,9 @@
262 cam0_reg: &cam_dummy_reg {
263 };
264
265 +i2c_csi_dsi0: &i2c0 {
266 +};
267 +
268 / {
269 __overrides__ {
270 audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
271 --- a/arch/arm/boot/dts/bcm2709-rpi-cm2.dts
272 +++ b/arch/arm/boot/dts/bcm2709-rpi-cm2.dts
273 @@ -20,6 +20,9 @@ cam0_reg: &cam0_regulator {
274 gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
275 };
276
277 +i2c_csi_dsi0: &i2c0 {
278 +};
279 +
280 &uart0 {
281 status = "okay";
282 };
283 --- a/arch/arm/boot/dts/bcm270x-rpi.dtsi
284 +++ b/arch/arm/boot/dts/bcm270x-rpi.dtsi
285 @@ -127,6 +127,9 @@
286 status = "disabled";
287 };
288
289 +i2s_clk_producer: &i2s {};
290 +i2s_clk_consumer: &i2s {};
291 +
292 &clocks {
293 firmware = <&firmware>;
294 };
295 --- a/arch/arm/boot/dts/bcm2710-rpi-2-b.dts
296 +++ b/arch/arm/boot/dts/bcm2710-rpi-2-b.dts
297 @@ -186,6 +186,9 @@
298 cam0_reg: &cam_dummy_reg {
299 };
300
301 +i2c_csi_dsi0: &i2c0 {
302 +};
303 +
304 / {
305 __overrides__ {
306 audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
307 --- a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
308 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
309 @@ -274,6 +274,9 @@
310 cam0_reg: &cam_dummy_reg {
311 };
312
313 +i2c_csi_dsi0: &i2c0 {
314 +};
315 +
316 / {
317 __overrides__ {
318 audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
319 --- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
320 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
321 @@ -283,6 +283,9 @@
322 cam0_reg: &cam_dummy_reg {
323 };
324
325 +i2c_csi_dsi0: &i2c0 {
326 +};
327 +
328 / {
329 __overrides__ {
330 audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
331 --- a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
332 +++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
333 @@ -19,6 +19,9 @@ cam0_reg: &cam0_regulator {
334 gpio = <&gpio 31 GPIO_ACTIVE_HIGH>;
335 };
336
337 +i2c_csi_dsi0: &i2c0 {
338 +};
339 +
340 &uart0 {
341 status = "okay";
342 };
343 --- a/arch/arm/boot/dts/bcm2710-rpi-zero-2-w.dts
344 +++ b/arch/arm/boot/dts/bcm2710-rpi-zero-2-w.dts
345 @@ -262,6 +262,9 @@
346 cam0_reg: &cam_dummy_reg {
347 };
348
349 +i2c_csi_dsi0: &i2c0 {
350 +};
351 +
352 / {
353 __overrides__ {
354 audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}";
355 --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
356 +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
357 @@ -400,6 +400,9 @@
358 cam0_reg: &cam_dummy_reg {
359 };
360
361 +i2c_csi_dsi0: &i2c0 {
362 +};
363 +
364 / {
365 __overrides__ {
366 audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
367 --- a/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
368 +++ b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
369 @@ -409,6 +409,9 @@ cam0_reg: &cam1_reg {
370 gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
371 };
372
373 +i2c_csi_dsi0: &i2c0 {
374 +};
375 +
376 / {
377 __overrides__ {
378 audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}";
379 --- a/arch/arm/boot/dts/bcm2711-rpi-cm4s.dts
380 +++ b/arch/arm/boot/dts/bcm2711-rpi-cm4s.dts
381 @@ -282,6 +282,9 @@ cam0_reg: &cam0_regulator {
382 status = "disabled";
383 };
384
385 +i2c_csi_dsi0: &i2c0 {
386 +};
387 +
388 / {
389 __overrides__ {
390 audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}";
391 --- /dev/null
392 +++ b/arch/arm/boot/dts/bcm2712-rpi-5-b.dts
393 @@ -0,0 +1,824 @@
394 +// SPDX-License-Identifier: GPL-2.0
395 +/dts-v1/;
396 +
397 +#include <dt-bindings/gpio/gpio.h>
398 +#include <dt-bindings/clock/rp1.h>
399 +#include <dt-bindings/interrupt-controller/irq.h>
400 +#include <dt-bindings/mfd/rp1.h>
401 +#include <dt-bindings/pwm/pwm.h>
402 +#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
403 +
404 +#define i2c0 _i2c0
405 +#define i2c3 _i2c3
406 +#define i2c4 _i2c4
407 +#define i2c5 _i2c5
408 +#define i2c6 _i2c6
409 +#define i2c8 _i2c8
410 +#define i2s _i2s
411 +#define pwm0 _pwm0
412 +#define pwm1 _pwm1
413 +#define spi0 _spi0
414 +#define spi3 _spi3
415 +#define spi4 _spi4
416 +#define spi5 _spi5
417 +#define spi6 _spi6
418 +#define uart0 _uart0
419 +#define uart2 _uart2
420 +#define uart3 _uart3
421 +#define uart4 _uart4
422 +#define uart5 _uart5
423 +
424 +#include "bcm2712.dtsi"
425 +
426 +#undef i2c0
427 +#undef i2c3
428 +#undef i2c4
429 +#undef i2c5
430 +#undef i2c6
431 +#undef i2c8
432 +#undef i2s
433 +#undef pwm0
434 +#undef pwm1
435 +#undef spi0
436 +#undef spi3
437 +#undef spi4
438 +#undef spi5
439 +#undef spi6
440 +#undef uart0
441 +#undef uart2
442 +#undef uart3
443 +#undef uart4
444 +#undef uart5
445 +
446 +/ {
447 + compatible = "raspberrypi,5-model-b", "brcm,bcm2712";
448 + model = "Raspberry Pi 5 Model B";
449 +
450 + /* Will be filled by the bootloader */
451 + memory@0 {
452 + device_type = "memory";
453 + reg = <0 0 0x28000000>;
454 + };
455 +
456 + leds: leds {
457 + compatible = "gpio-leds";
458 +
459 + pwr_led: led-pwr {
460 + label = "PWR";
461 + gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>;
462 + default-state = "off";
463 + linux,default-trigger = "none";
464 + };
465 +
466 + act_led: led-act {
467 + label = "ACT";
468 + gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>;
469 + default-state = "off";
470 + linux,default-trigger = "mmc0";
471 + };
472 + };
473 +
474 + sd_io_1v8_reg: sd_io_1v8_reg {
475 + compatible = "regulator-gpio";
476 + regulator-name = "vdd-sd-io";
477 + regulator-min-microvolt = <1800000>;
478 + regulator-max-microvolt = <3300000>;
479 + regulator-boot-on;
480 + regulator-always-on;
481 + regulator-settling-time-us = <5000>;
482 + gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>;
483 + states = <1800000 0x1
484 + 3300000 0x0>;
485 + status = "okay";
486 + };
487 +
488 + sd_vcc_reg: sd_vcc_reg {
489 + compatible = "regulator-fixed";
490 + regulator-name = "vcc-sd";
491 + regulator-min-microvolt = <3300000>;
492 + regulator-max-microvolt = <3300000>;
493 + regulator-boot-on;
494 + enable-active-high;
495 + gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>;
496 + status = "okay";
497 + };
498 +
499 + wl_on_reg: wl_on_reg {
500 + compatible = "regulator-fixed";
501 + regulator-name = "wl-on-regulator";
502 + regulator-min-microvolt = <3300000>;
503 + regulator-max-microvolt = <3300000>;
504 + pinctrl-0 = <&wl_on_pins>;
505 + pinctrl-names = "default";
506 +
507 + gpio = <&gio 28 GPIO_ACTIVE_HIGH>;
508 +
509 + startup-delay-us = <150000>;
510 + enable-active-high;
511 + };
512 +
513 + clocks: clocks {
514 + };
515 +
516 + cam1_clk: cam1_clk {
517 + compatible = "fixed-clock";
518 + #clock-cells = <0>;
519 + status = "disabled";
520 + };
521 +
522 + cam0_clk: cam0_clk {
523 + compatible = "fixed-clock";
524 + #clock-cells = <0>;
525 + status = "disabled";
526 + };
527 +
528 + cam0_reg: cam0_reg {
529 + compatible = "regulator-fixed";
530 + regulator-name = "cam0_reg";
531 + enable-active-high;
532 + status = "okay";
533 + gpio = <&rp1_gpio 34 0>; // CD0_IO0_MICCLK, to MIPI 0 connector
534 + };
535 +
536 + cam1_reg: cam1_reg {
537 + compatible = "regulator-fixed";
538 + regulator-name = "cam1_reg";
539 + enable-active-high;
540 + status = "okay";
541 + gpio = <&rp1_gpio 46 0>; // CD1_IO0_MICCLK, to MIPI 1 connector
542 + };
543 +
544 + cam_dummy_reg: cam_dummy_reg {
545 + compatible = "regulator-fixed";
546 + regulator-name = "cam-dummy-reg";
547 + status = "okay";
548 + };
549 +
550 + dummy: dummy {
551 + // A target for unwanted overlay fragments
552 + };
553 +};
554 +
555 +rp1_target: &pcie2 {
556 + brcm,vdm-qos-map = <0xbbaa9888>;
557 + aspm-no-l0s;
558 + status = "okay";
559 +};
560 +
561 +// Add some labels to 2712 device
562 +
563 +// The system UART
564 +uart10: &_uart0 { status = "okay"; };
565 +
566 +// The system SPI for the bootloader EEPROM
567 +spi10: &_spi0 { status = "okay"; };
568 +
569 +i2c_rp1boot: &_i2c3 { };
570 +
571 +#include "rp1.dtsi"
572 +
573 +&rp1 {
574 + // PCIe address space layout:
575 + // 00_00000000-00_00xxxxxx = RP1 peripherals
576 + // 10_00000000-1x_xxxxxxxx = up to 64GB system RAM
577 +
578 + // outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx
579 + // This is the RP1 peripheral space
580 + ranges = <0xc0 0x40000000
581 + 0x02000000 0x00 0x00000000
582 + 0x00 0x00400000>;
583 +
584 + dma-ranges =
585 + // inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
586 + <0x10 0x00000000
587 + 0x43000000 0x10 0x00000000
588 + 0x10 0x00000000>,
589 +
590 + // inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx
591 + // This allows the RP1 DMA controller to address RP1 hardware
592 + <0xc0 0x40000000
593 + 0x02000000 0x0 0x00000000
594 + 0x0 0x00400000>,
595 +
596 + // inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
597 + <0x00 0x00000000
598 + 0x02000000 0x10 0x00000000
599 + 0x10 0x00000000>;
600 +};
601 +
602 +// Expose RP1 nodes as system nodes with labels
603 +
604 +&rp1_dma {
605 + status = "okay";
606 +};
607 +
608 +&rp1_eth {
609 + status = "okay";
610 + phy-handle = <&phy1>;
611 + phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>;
612 + phy-reset-duration = <5>;
613 +
614 + phy1: ethernet-phy@1 {
615 + reg = <0x1>;
616 + brcm,powerdown-enable;
617 + };
618 +};
619 +
620 +gpio: &rp1_gpio {
621 + status = "okay";
622 +};
623 +
624 +aux: &dummy {};
625 +
626 +&rp1_usb0 {
627 + pinctrl-0 = <&usb_vbus_pins>;
628 + pinctrl-names = "default";
629 + status = "okay";
630 +};
631 +
632 +&rp1_usb1 {
633 + status = "okay";
634 +};
635 +
636 +#include "bcm2712-rpi.dtsi"
637 +
638 +// A few extra labels to keep overlays happy
639 +
640 +i2c0if: &rp1_gpio {};
641 +i2c0mux: &rp1_gpio {};
642 +
643 +i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only
644 + pinctrl-0 = <&rp1_i2c6_38_39>;
645 + pinctrl-names = "default";
646 +};
647 +
648 +i2c_csi_dsi1: &i2c4 { // Note: This is for MIPI1 connector only
649 + pinctrl-0 = <&rp1_i2c4_40_41>;
650 + pinctrl-names = "default";
651 +};
652 +
653 +i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility
654 +
655 +csi0: &rp1_csi0 { };
656 +csi1: &rp1_csi1 { };
657 +dsi0: &rp1_dsi0 { };
658 +dsi1: &rp1_dsi1 { };
659 +dpi: &rp1_dpi { };
660 +vec: &rp1_vec { };
661 +dpi_gpio0: &rp1_dpi_24bit_gpio0 { };
662 +dpi_gpio1: &rp1_dpi_24bit_gpio2 { };
663 +dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { };
664 +dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { };
665 +dpi_18bit_gpio0: &rp1_dpi_18bit_gpio0 { };
666 +dpi_18bit_gpio2: &rp1_dpi_18bit_gpio2 { };
667 +dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { };
668 +dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { };
669 +dpi_16bit_gpio0: &rp1_dpi_16bit_gpio0 { };
670 +dpi_16bit_gpio2: &rp1_dpi_16bit_gpio2 { };
671 +
672 +/* Add the IOMMUs for some RP1 bus masters */
673 +
674 +&csi0 {
675 + iommus = <&iommu5>;
676 +};
677 +
678 +&csi1 {
679 + iommus = <&iommu5>;
680 +};
681 +
682 +&dsi0 {
683 + iommus = <&iommu5>;
684 +};
685 +
686 +&dsi1 {
687 + iommus = <&iommu5>;
688 +};
689 +
690 +&dpi {
691 + iommus = <&iommu5>;
692 +};
693 +
694 +&vec {
695 + iommus = <&iommu5>;
696 +};
697 +
698 +&ddc0 {
699 + status = "disabled";
700 +};
701 +
702 +&ddc1 {
703 + status = "disabled";
704 +};
705 +
706 +&hdmi0 {
707 + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
708 + clock-names = "hdmi", "bvb", "audio", "cec";
709 + status = "disabled";
710 +};
711 +
712 +&hdmi1 {
713 + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
714 + clock-names = "hdmi", "bvb", "audio", "cec";
715 + status = "disabled";
716 +};
717 +
718 +&hvs {
719 + clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
720 + clock-names = "core", "disp";
721 +};
722 +
723 +&mop {
724 + status = "disabled";
725 +};
726 +
727 +&moplet {
728 + status = "disabled";
729 +};
730 +
731 +&pixelvalve0 {
732 + status = "disabled";
733 +};
734 +
735 +&pixelvalve1 {
736 + status = "disabled";
737 +};
738 +
739 +&disp_intr {
740 + status = "disabled";
741 +};
742 +
743 +/* SDIO1 is used to drive the SD card */
744 +&sdio1 {
745 + pinctrl-0 = <&emmc_sd_pulls>, <&emmc_aon_cd_pins>;
746 + pinctrl-names = "default";
747 + vqmmc-supply = <&sd_io_1v8_reg>;
748 + vmmc-supply = <&sd_vcc_reg>;
749 + bus-width = <4>;
750 + sd-uhs-sdr50;
751 + sd-uhs-ddr50;
752 + sd-uhs-sdr104;
753 + //broken-cd;
754 + //no-1-8-v;
755 + status = "okay";
756 +};
757 +
758 +&pinctrl_aon {
759 + emmc_aon_cd_pins: emmc_aon_cd_pins {
760 + function = "sd_card_g";
761 + pins = "aon_gpio5";
762 + bias-pull-up;
763 + };
764 +
765 + /* Slight hack - only one PWM pin (status LED) is usable */
766 + aon_pwm_1pin: aon_pwm_1pin {
767 + function = "aon_pwm";
768 + pins = "aon_gpio9";
769 + };
770 +};
771 +
772 +&pinctrl {
773 + pwr_button_pins: pwr_button_pins {
774 + function = "gpio";
775 + pins = "gpio20";
776 + bias-pull-up;
777 + };
778 +
779 + wl_on_pins: wl_on_pins {
780 + function = "gpio";
781 + pins = "gpio28";
782 + };
783 +
784 + bt_shutdown_pins: bt_shutdown_pins {
785 + function = "gpio";
786 + pins = "gpio29";
787 + };
788 +
789 + emmc_sd_pulls: emmc_sd_pulls {
790 + function = "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3";
791 + bias-pull-up;
792 + };
793 +};
794 +
795 +/* uarta communicates with the BT module */
796 +&uarta {
797 + uart-has-rtscts;
798 + auto-flow-control;
799 + status = "okay";
800 + clock-frequency = <96000000>;
801 + pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>;
802 + pinctrl-names = "default";
803 +
804 + bluetooth: bluetooth {
805 + compatible = "brcm,bcm43438-bt";
806 + max-speed = <3000000>;
807 + shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>;
808 + local-bd-address = [ 00 00 00 00 00 00 ];
809 + };
810 +};
811 +
812 +&i2c_rp1boot {
813 + clock-frequency = <400000>;
814 + pinctrl-0 = <&i2c3_m4_agpio0_pins>;
815 + pinctrl-names = "default";
816 +};
817 +
818 +/ {
819 + chosen: chosen {
820 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
821 + stdout-path = "serial10:115200n8";
822 + };
823 +
824 + fan: cooling_fan {
825 + status = "disabled";
826 + compatible = "pwm-fan";
827 + #cooling-cells = <2>;
828 + cooling-min-state = <0>;
829 + cooling-max-state = <3>;
830 + cooling-levels = <0 75 125 175 250>;
831 + pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>;
832 + rpm-regmap = <&rp1_pwm1>;
833 + rpm-offset = <0x3c>;
834 + };
835 +
836 + pwr_button {
837 + compatible = "gpio-keys";
838 +
839 + pinctrl-names = "default";
840 + pinctrl-0 = <&pwr_button_pins>;
841 + status = "okay";
842 +
843 + pwr_key: pwr {
844 + label = "pwr_button";
845 + // linux,code = <205>; // KEY_SUSPEND
846 + linux,code = <116>; // KEY_POWER
847 + gpios = <&gio 20 GPIO_ACTIVE_LOW>;
848 + debounce-interval = <50>; // ms
849 + };
850 + };
851 +};
852 +
853 +&usb {
854 + power-domains = <&power RPI_POWER_DOMAIN_USB>;
855 +};
856 +
857 +/* SDIO2 drives the WLAN interface */
858 +&sdio2 {
859 + pinctrl-0 = <&sdio2_30_pins>;
860 + pinctrl-names = "default";
861 + bus-width = <4>;
862 + vmmc-supply = <&wl_on_reg>;
863 + sd-uhs-ddr50;
864 + non-removable;
865 + status = "okay";
866 + #address-cells = <1>;
867 + #size-cells = <0>;
868 +
869 + wifi: wifi@1 {
870 + reg = <1>;
871 + compatible = "brcm,bcm4329-fmac";
872 + local-mac-address = [00 00 00 00 00 00];
873 + };
874 +};
875 +
876 +&rpivid {
877 + status = "okay";
878 +};
879 +
880 +&pinctrl {
881 + spi10_gpio2: spi10_gpio2 {
882 + function = "vc_spi0";
883 + pins = "gpio2", "gpio3", "gpio4";
884 + bias-disable;
885 + };
886 +
887 + spi10_cs_gpio1: spi10_cs_gpio1 {
888 + function = "gpio";
889 + pins = "gpio1";
890 + bias-pull-up;
891 + };
892 +};
893 +
894 +spi10_pins: &spi10_gpio2 {};
895 +spi10_cs_pins: &spi10_cs_gpio1 {};
896 +
897 +&spi10 {
898 + pinctrl-names = "default";
899 + cs-gpios = <&gio 1 1>;
900 + pinctrl-0 = <&spi10_pins &spi10_cs_pins>;
901 +
902 + spidev10: spidev@0 {
903 + compatible = "spidev";
904 + reg = <0>; /* CE0 */
905 + #address-cells = <1>;
906 + #size-cells = <0>;
907 + spi-max-frequency = <20000000>;
908 + status = "okay";
909 + };
910 +};
911 +
912 +// =============================================
913 +// Board specific stuff here
914 +
915 +&gio_aon {
916 + // Don't use GIO_AON as an interrupt controller because it will
917 + // clash with the firmware monitoring the PMIC interrupt via the VPU.
918 +
919 + /delete-property/ interrupt-controller;
920 +};
921 +
922 +&main_aon_irq {
923 + // Don't use the MAIN_AON_IRQ interrupt controller because it will
924 + // clash with the firmware monitoring the PMIC interrupt via the VPU.
925 +
926 + status = "disabled";
927 +};
928 +
929 +&rp1_pwm1 {
930 + status = "disabled";
931 + pinctrl-0 = <&rp1_pwm1_gpio45>;
932 + pinctrl-names = "default";
933 +};
934 +
935 +&thermal_trips {
936 + cpu_tepid: cpu-tepid {
937 + temperature = <50000>;
938 + hysteresis = <5000>;
939 + type = "active";
940 + };
941 +
942 + cpu_warm: cpu-warm {
943 + temperature = <60000>;
944 + hysteresis = <5000>;
945 + type = "active";
946 + };
947 +
948 + cpu_hot: cpu-hot {
949 + temperature = <67500>;
950 + hysteresis = <5000>;
951 + type = "active";
952 + };
953 +
954 + cpu_vhot: cpu-vhot {
955 + temperature = <75000>;
956 + hysteresis = <5000>;
957 + type = "active";
958 + };
959 +};
960 +
961 +&cooling_maps {
962 + tepid {
963 + trip = <&cpu_tepid>;
964 + cooling-device = <&fan 1 1>;
965 + };
966 +
967 + warm {
968 + trip = <&cpu_warm>;
969 + cooling-device = <&fan 2 2>;
970 + };
971 +
972 + hot {
973 + trip = <&cpu_hot>;
974 + cooling-device = <&fan 3 3>;
975 + };
976 +
977 + vhot {
978 + trip = <&cpu_vhot>;
979 + cooling-device = <&fan 4 4>;
980 + };
981 +
982 + melt {
983 + trip = <&cpu_crit>;
984 + cooling-device = <&fan 4 4>;
985 + };
986 +};
987 +
988 +&gio {
989 + // The GPIOs above 35 are not used on Pi 5, so shrink the upper bank
990 + // to reduce the clutter in gpioinfo/pinctrl
991 + brcm,gpio-bank-widths = <32 4>;
992 +
993 + gpio-line-names =
994 + "-", // GPIO_000
995 + "2712_BOOT_CS_N", // GPIO_001
996 + "2712_BOOT_MISO", // GPIO_002
997 + "2712_BOOT_MOSI", // GPIO_003
998 + "2712_BOOT_SCLK", // GPIO_004
999 + "-", // GPIO_005
1000 + "-", // GPIO_006
1001 + "-", // GPIO_007
1002 + "-", // GPIO_008
1003 + "-", // GPIO_009
1004 + "-", // GPIO_010
1005 + "-", // GPIO_011
1006 + "-", // GPIO_012
1007 + "-", // GPIO_013
1008 + "PCIE_SDA", // GPIO_014
1009 + "PCIE_SCL", // GPIO_015
1010 + "-", // GPIO_016
1011 + "-", // GPIO_017
1012 + "-", // GPIO_018
1013 + "-", // GPIO_019
1014 + "PWR_GPIO", // GPIO_020
1015 + "2712_G21_FS", // GPIO_021
1016 + "-", // GPIO_022
1017 + "-", // GPIO_023
1018 + "BT_RTS", // GPIO_024
1019 + "BT_CTS", // GPIO_025
1020 + "BT_TXD", // GPIO_026
1021 + "BT_RXD", // GPIO_027
1022 + "WL_ON", // GPIO_028
1023 + "BT_ON", // GPIO_029
1024 + "WIFI_SDIO_CLK", // GPIO_030
1025 + "WIFI_SDIO_CMD", // GPIO_031
1026 + "WIFI_SDIO_D0", // GPIO_032
1027 + "WIFI_SDIO_D1", // GPIO_033
1028 + "WIFI_SDIO_D2", // GPIO_034
1029 + "WIFI_SDIO_D3"; // GPIO_035
1030 +};
1031 +
1032 +&gio_aon {
1033 + gpio-line-names =
1034 + "RP1_SDA", // AON_GPIO_00
1035 + "RP1_SCL", // AON_GPIO_01
1036 + "RP1_RUN", // AON_GPIO_02
1037 + "SD_IOVDD_SEL", // AON_GPIO_03
1038 + "SD_PWR_ON", // AON_GPIO_04
1039 + "SD_CDET_N", // AON_GPIO_05
1040 + "SD_FLG_N", // AON_GPIO_06
1041 + "-", // AON_GPIO_07
1042 + "2712_WAKE", // AON_GPIO_08
1043 + "2712_STAT_LED", // AON_GPIO_09
1044 + "-", // AON_GPIO_10
1045 + "-", // AON_GPIO_11
1046 + "PMIC_INT", // AON_GPIO_12
1047 + "UART_TX_FS", // AON_GPIO_13
1048 + "UART_RX_FS", // AON_GPIO_14
1049 + "-", // AON_GPIO_15
1050 + "-", // AON_GPIO_16
1051 +
1052 + // Pad bank0 out to 32 entries
1053 + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
1054 +
1055 + "HDMI0_SCL", // AON_SGPIO_00
1056 + "HDMI0_SDA", // AON_SGPIO_01
1057 + "HDMI1_SCL", // AON_SGPIO_02
1058 + "HDMI1_SDA", // AON_SGPIO_03
1059 + "PMIC_SCL", // AON_SGPIO_04
1060 + "PMIC_SDA"; // AON_SGPIO_05
1061 +
1062 + rp1_run_hog {
1063 + gpio-hog;
1064 + gpios = <2 GPIO_ACTIVE_HIGH>;
1065 + output-high;
1066 + line-name = "RP1 RUN pin";
1067 + };
1068 +};
1069 +
1070 +&rp1_gpio {
1071 + gpio-line-names =
1072 + "ID_SD", // GPIO0
1073 + "ID_SC", // GPIO1
1074 + "PIN3", // GPIO2
1075 + "PIN5", // GPIO3
1076 + "PIN7", // GPIO4
1077 + "PIN29", // GPIO5
1078 + "PIN31", // GPIO6
1079 + "PIN26", // GPIO7
1080 + "PIN24", // GPIO8
1081 + "PIN21", // GPIO9
1082 + "PIN19", // GPIO10
1083 + "PIN23", // GPIO11
1084 + "PIN32", // GPIO12
1085 + "PIN33", // GPIO13
1086 + "PIN8", // GPIO14
1087 + "PIN10", // GPIO15
1088 + "PIN36", // GPIO16
1089 + "PIN11", // GPIO17
1090 + "PIN12", // GPIO18
1091 + "PIN35", // GPIO19
1092 + "PIN38", // GPIO20
1093 + "PIN40", // GPIO21
1094 + "PIN15", // GPIO22
1095 + "PIN16", // GPIO23
1096 + "PIN18", // GPIO24
1097 + "PIN22", // GPIO25
1098 + "PIN37", // GPIO26
1099 + "PIN13", // GPIO27
1100 +
1101 + "PCIE_RP1_WAKE", // GPIO28
1102 + "FAN_TACH", // GPIO29
1103 + "HOST_SDA", // GPIO30
1104 + "HOST_SCL", // GPIO31
1105 + "ETH_RST_N", // GPIO32
1106 + "-", // GPIO33
1107 +
1108 + "CD0_IO0_MICCLK", // GPIO34
1109 + "CD0_IO0_MICDAT0", // GPIO35
1110 + "RP1_PCIE_CLKREQ_N", // GPIO36
1111 + "-", // GPIO37
1112 + "CD0_SDA", // GPIO38
1113 + "CD0_SCL", // GPIO39
1114 + "CD1_SDA", // GPIO40
1115 + "CD1_SCL", // GPIO41
1116 + "USB_VBUS_EN", // GPIO42
1117 + "USB_OC_N", // GPIO43
1118 + "RP1_STAT_LED", // GPIO44
1119 + "FAN_PWM", // GPIO45
1120 + "CD1_IO0_MICCLK", // GPIO46
1121 + "2712_WAKE", // GPIO47
1122 + "CD1_IO1_MICDAT1", // GPIO48
1123 + "EN_MAX_USB_CUR", // GPIO49
1124 + "-", // GPIO50
1125 + "-", // GPIO51
1126 + "-", // GPIO52
1127 + "-"; // GPIO53
1128 +
1129 + usb_vbus_pins: usb_vbus_pins {
1130 + function = "vbus1";
1131 + pins = "gpio42", "gpio43";
1132 + };
1133 +};
1134 +
1135 +/ {
1136 + aliases: aliases {
1137 + blconfig = &blconfig;
1138 + bluetooth = &bluetooth;
1139 + console = &uart10;
1140 + ethernet0 = &rp1_eth;
1141 + wifi0 = &wifi;
1142 + fb = &fb;
1143 + mailbox = &mailbox;
1144 + mmc0 = &sdio1;
1145 + uart0 = &uart0;
1146 + uart1 = &uart1;
1147 + uart2 = &uart2;
1148 + uart3 = &uart3;
1149 + uart4 = &uart4;
1150 + uart10 = &uart10;
1151 + serial0 = &uart0;
1152 + serial1 = &uart1;
1153 + serial2 = &uart2;
1154 + serial3 = &uart3;
1155 + serial4 = &uart4;
1156 + serial10 = &uart10;
1157 + i2c = &i2c_arm;
1158 + i2c0 = &i2c0;
1159 + i2c1 = &i2c1;
1160 + i2c2 = &i2c2;
1161 + i2c3 = &i2c3;
1162 + i2c4 = &i2c4;
1163 + i2c5 = &i2c5;
1164 + i2c6 = &i2c6;
1165 + i2c10 = &i2c_rp1boot;
1166 + // Bit-bashed i2c_gpios start at 10
1167 + spi0 = &spi0;
1168 + spi1 = &spi1;
1169 + spi2 = &spi2;
1170 + spi3 = &spi3;
1171 + spi4 = &spi4;
1172 + spi5 = &spi5;
1173 + spi10 = &spi10;
1174 + gpio0 = &gpio;
1175 + gpio1 = &gio;
1176 + gpio2 = &gio_aon;
1177 + gpio3 = &pinctrl;
1178 + gpio4 = &pinctrl_aon;
1179 + usb0 = &rp1_usb0;
1180 + usb1 = &rp1_usb1;
1181 + };
1182 +
1183 + __overrides__ {
1184 + bdaddr = <&bluetooth>, "local-bd-address[";
1185 + button_debounce = <&pwr_key>, "debounce-interval:0";
1186 + cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status";
1187 + uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0;
1188 + i2c0 = <&i2c0>, "status";
1189 + i2c1 = <&i2c1>, "status";
1190 + i2c = <&i2c1>, "status";
1191 + i2c_arm = <&i2c_arm>, "status";
1192 + i2c_vc = <&i2c_vc>, "status";
1193 + i2c_csi_dsi = <&i2c_csi_dsi>, "status";
1194 + i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status";
1195 + i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status";
1196 + i2c0_baudrate = <&i2c0>, "clock-frequency:0";
1197 + i2c1_baudrate = <&i2c1>, "clock-frequency:0";
1198 + i2c_baudrate = <&i2c_arm>, "clock-frequency:0";
1199 + i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0";
1200 + i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0";
1201 + nvme = <&pciex1>, "status";
1202 + pciex1 = <&pciex1>, "status";
1203 + pciex1_gen = <&pciex1> , "max-link-speed:0";
1204 + pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?";
1205 + random = <&random>, "status";
1206 + rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0";
1207 + spi = <&spi0>, "status";
1208 + suspend = <&pwr_key>, "linux,code:0=205";
1209 + uart0 = <&uart0>, "status";
1210 + wifiaddr = <&wifi>, "local-mac-address[";
1211 +
1212 + act_led_activelow = <&act_led>, "active-low?";
1213 + act_led_trigger = <&act_led>, "linux,default-trigger";
1214 + pwr_led_activelow = <&pwr_led>, "gpios:8";
1215 + pwr_led_trigger = <&pwr_led>, "linux,default-trigger";
1216 + };
1217 +};
1218 --- /dev/null
1219 +++ b/arch/arm/boot/dts/bcm2712-rpi.dtsi
1220 @@ -0,0 +1,281 @@
1221 +// SPDX-License-Identifier: GPL-2.0
1222 +
1223 +#include <dt-bindings/power/raspberrypi-power.h>
1224 +
1225 +&soc {
1226 + firmware: firmware {
1227 + compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
1228 + #address-cells = <1>;
1229 + #size-cells = <1>;
1230 +
1231 + mboxes = <&mailbox>;
1232 + dma-ranges;
1233 +
1234 + firmware_clocks: clocks {
1235 + compatible = "raspberrypi,firmware-clocks";
1236 + #clock-cells = <1>;
1237 + };
1238 +
1239 + reset: reset {
1240 + compatible = "raspberrypi,firmware-reset";
1241 + #reset-cells = <1>;
1242 + };
1243 +
1244 + vcio: vcio {
1245 + compatible = "raspberrypi,vcio";
1246 + };
1247 + };
1248 +
1249 + power: power {
1250 + compatible = "raspberrypi,bcm2835-power";
1251 + firmware = <&firmware>;
1252 + #power-domain-cells = <1>;
1253 + };
1254 +
1255 + fb: fb {
1256 + compatible = "brcm,bcm2708-fb";
1257 + firmware = <&firmware>;
1258 + status = "okay";
1259 + };
1260 +
1261 + rpi_rtc: rpi_rtc {
1262 + compatible = "raspberrypi,rpi-rtc";
1263 + firmware = <&firmware>;
1264 + status = "okay";
1265 + trickle-charge-microvolt = <0>;
1266 + };
1267 +
1268 + /* Define these notional regulators for use by overlays, etc. */
1269 + vdd_3v3_reg: fixedregulator_3v3 {
1270 + compatible = "regulator-fixed";
1271 + regulator-always-on;
1272 + regulator-max-microvolt = <3300000>;
1273 + regulator-min-microvolt = <3300000>;
1274 + regulator-name = "3v3";
1275 + };
1276 +
1277 + vdd_5v0_reg: fixedregulator_5v0 {
1278 + compatible = "regulator-fixed";
1279 + regulator-always-on;
1280 + regulator-max-microvolt = <5000000>;
1281 + regulator-min-microvolt = <5000000>;
1282 + regulator-name = "5v0";
1283 + };
1284 +};
1285 +
1286 +/ {
1287 + __overrides__ {
1288 + arm_freq;
1289 + };
1290 +};
1291 +
1292 +pciex1: &pcie1 { };
1293 +pciex4: &pcie2 { };
1294 +
1295 +&dma32 {
1296 + /* The VPU firmware uses DMA channel 11 for VCHIQ */
1297 + brcm,dma-channel-mask = <0x03f>;
1298 +};
1299 +
1300 +&dma40 {
1301 + /* The VPU firmware DMA channel 11 for VCHIQ */
1302 + brcm,dma-channel-mask = <0x07c0>;
1303 +};
1304 +
1305 +&hdmi0 {
1306 + dmas = <&dma40 (10|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
1307 +};
1308 +
1309 +&hdmi1 {
1310 + dmas = <&dma40 (17|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
1311 +};
1312 +
1313 +&spi10 {
1314 + dmas = <&dma40 6>, <&dma40 7>;
1315 + dma-names = "tx", "rx";
1316 +};
1317 +
1318 +&usb {
1319 + power-domains = <&power RPI_POWER_DOMAIN_USB>;
1320 +};
1321 +
1322 +&rmem {
1323 + /*
1324 + * RPi4's co-processor will copy the board's bootloader configuration
1325 + * into memory for the OS to consume. It'll also update this node with
1326 + * its placement information.
1327 + */
1328 + blconfig: nvram@0 {
1329 + compatible = "raspberrypi,bootloader-config", "nvmem-rmem";
1330 + #address-cells = <1>;
1331 + #size-cells = <1>;
1332 + reg = <0x0 0x0 0x0>;
1333 + no-map;
1334 + status = "disabled";
1335 + };
1336 +};
1337 +
1338 +&rp1_adc {
1339 + status = "okay";
1340 +};
1341 +
1342 +/* Add some gpiomem nodes to make the devices accessible to userspace.
1343 + * /dev/gpiomem<n> should expose the registers for the interface with DT alias
1344 + * gpio<n>.
1345 + */
1346 +
1347 +&rp1 {
1348 + gpiomem@d0000 {
1349 + /* Export IO_BANKs, RIO_BANKs and PADS_BANKs to userspace */
1350 + compatible = "raspberrypi,gpiomem";
1351 + reg = <0xc0 0x400d0000 0x0 0x30000>;
1352 + chardev-name = "gpiomem0";
1353 + };
1354 +};
1355 +
1356 +&soc {
1357 + gpiomem@7d508500 {
1358 + compatible = "raspberrypi,gpiomem";
1359 + reg = <0x7d508500 0x40>;
1360 + chardev-name = "gpiomem1";
1361 + };
1362 +
1363 + gpiomem@7d517c00 {
1364 + compatible = "raspberrypi,gpiomem";
1365 + reg = <0x7d517c00 0x40>;
1366 + chardev-name = "gpiomem2";
1367 + };
1368 +
1369 + gpiomem@7d504100 {
1370 + compatible = "raspberrypi,gpiomem";
1371 + reg = <0x7d504100 0x20>;
1372 + chardev-name = "gpiomem3";
1373 + };
1374 +
1375 + gpiomem@7d510700 {
1376 + compatible = "raspberrypi,gpiomem";
1377 + reg = <0x7d510700 0x20>;
1378 + chardev-name = "gpiomem4";
1379 + };
1380 +};
1381 +
1382 +i2c0: &rp1_i2c0 { };
1383 +i2c1: &rp1_i2c1 { };
1384 +i2c2: &rp1_i2c2 { };
1385 +i2c3: &rp1_i2c3 { };
1386 +i2c4: &rp1_i2c4 { };
1387 +i2c5: &rp1_i2c5 { };
1388 +i2c6: &rp1_i2c6 { };
1389 +i2s: &rp1_i2s0 { };
1390 +i2s_clk_producer: &rp1_i2s0 { };
1391 +i2s_clk_consumer: &rp1_i2s1 { };
1392 +pwm0: &rp1_pwm0 { };
1393 +pwm1: &rp1_pwm1 { };
1394 +pwm: &pwm0 { };
1395 +spi0: &rp1_spi0 { };
1396 +spi1: &rp1_spi1 { };
1397 +spi2: &rp1_spi2 { };
1398 +spi3: &rp1_spi3 { };
1399 +spi4: &rp1_spi4 { };
1400 +spi5: &rp1_spi5 { };
1401 +
1402 +uart0_pins: &rp1_uart0_14_15 {};
1403 +uart0_ctsrts_pins: &rp1_uart0_ctsrts_16_17 {};
1404 +uart0: &rp1_uart0 {
1405 + pinctrl-0 = <&uart0_pins>;
1406 +};
1407 +
1408 +uart1_pins: &rp1_uart1_0_1 {};
1409 +uart1_ctsrts_pins: &rp1_uart1_ctsrts_2_3 {};
1410 +uart1: &rp1_uart1 { };
1411 +
1412 +uart2_pins: &rp1_uart2_4_5 {};
1413 +uart2_ctsrts_pins: &rp1_uart2_ctsrts_6_7 {};
1414 +uart2: &rp1_uart2 { };
1415 +
1416 +uart3_pins: &rp1_uart3_8_9 {};
1417 +uart3_ctsrts_pins: &rp1_uart3_ctsrts_10_11 {};
1418 +uart3: &rp1_uart3 { };
1419 +
1420 +uart4_pins: &rp1_uart4_12_13 {};
1421 +uart4_ctsrts_pins: &rp1_uart4_ctsrts_14_15 {};
1422 +uart4: &rp1_uart4 { };
1423 +
1424 +i2c_vc: &i2c0 { // This is pins 27,28 on the header (not MIPI)
1425 + pinctrl-0 = <&rp1_i2c0_0_1>;
1426 + pinctrl-names = "default";
1427 +};
1428 +
1429 +i2c_arm: &i2c1 {
1430 + pinctrl-names = "default";
1431 + pinctrl-0 = <&rp1_i2c1_2_3>;
1432 +};
1433 +
1434 +&i2c2 {
1435 + pinctrl-names = "default";
1436 + pinctrl-0 = <&rp1_i2c2_4_5>;
1437 +};
1438 +
1439 +&i2c3 {
1440 + pinctrl-names = "default";
1441 + pinctrl-0 = <&rp1_i2c3_6_7>;
1442 +};
1443 +
1444 +&i2s_clk_producer {
1445 + pinctrl-names = "default";
1446 + pinctrl-0 = <&rp1_i2s0_18_21>;
1447 +};
1448 +
1449 +&i2s_clk_consumer {
1450 + pinctrl-names = "default";
1451 + pinctrl-0 = <&rp1_i2s1_18_21>;
1452 +};
1453 +
1454 +spi0_pins: &rp1_spi0_gpio9 {};
1455 +spi0_cs_pins: &rp1_spi0_cs_gpio7 {};
1456 +
1457 +&spi0 {
1458 + pinctrl-names = "default";
1459 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1460 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1461 +
1462 + spidev0: spidev@0 {
1463 + compatible = "spidev";
1464 + reg = <0>; /* CE0 */
1465 + #address-cells = <1>;
1466 + #size-cells = <0>;
1467 + spi-max-frequency = <125000000>;
1468 + };
1469 +
1470 + spidev1: spidev@1 {
1471 + compatible = "spidev";
1472 + reg = <1>; /* CE1 */
1473 + #address-cells = <1>;
1474 + #size-cells = <0>;
1475 + spi-max-frequency = <125000000>;
1476 + };
1477 +};
1478 +
1479 +spi2_pins: &rp1_spi2_gpio1 {};
1480 +&spi2 {
1481 + pinctrl-names = "default";
1482 + pinctrl-0 = <&spi2_pins>;
1483 +};
1484 +
1485 +spi3_pins: &rp1_spi3_gpio5 {};
1486 +&spi3 {
1487 + pinctrl-names = "default";
1488 + pinctrl-0 = <&spi3_pins>;
1489 +};
1490 +
1491 +spi4_pins: &rp1_spi4_gpio9 {};
1492 +&spi4 {
1493 + pinctrl-names = "default";
1494 + pinctrl-0 = <&spi4_pins>;
1495 +};
1496 +
1497 +spi5_pins: &rp1_spi5_gpio13 {};
1498 +&spi5 {
1499 + pinctrl-names = "default";
1500 + pinctrl-0 = <&spi5_pins>;
1501 +};
1502 --- /dev/null
1503 +++ b/arch/arm/boot/dts/bcm2712.dtsi
1504 @@ -0,0 +1,1287 @@
1505 +// SPDX-License-Identifier: GPL-2.0
1506 +#include <dt-bindings/interrupt-controller/arm-gic.h>
1507 +#include <dt-bindings/soc/bcm2835-pm.h>
1508 +#include <dt-bindings/phy/phy.h>
1509 +
1510 +/ {
1511 + compatible = "brcm,bcm2712", "brcm,bcm2711";
1512 + model = "BCM2712";
1513 +
1514 + #address-cells = <2>;
1515 + #size-cells = <1>;
1516 +
1517 + interrupt-parent = <&gicv2>;
1518 +
1519 + rmem: reserved-memory {
1520 + #address-cells = <2>;
1521 + #size-cells = <1>;
1522 + ranges;
1523 +
1524 + atf@0 {
1525 + reg = <0x0 0x0 0x80000>;
1526 + no-map;
1527 + };
1528 +
1529 + cma: linux,cma {
1530 + compatible = "shared-dma-pool";
1531 + size = <0x4000000>; /* 64MB */
1532 + reusable;
1533 + linux,cma-default;
1534 +
1535 + /*
1536 + * arm64 reserves the CMA by default somewhere in
1537 + * ZONE_DMA32, that's not good enough for the BCM2711
1538 + * as some devices can only address the lower 1G of
1539 + * memory (ZONE_DMA).
1540 + */
1541 + alloc-ranges = <0x0 0x00000000 0x40000000>;
1542 + };
1543 + };
1544 +
1545 + thermal-zones {
1546 + cpu_thermal: cpu-thermal {
1547 + polling-delay-passive = <2000>;
1548 + polling-delay = <1000>;
1549 + coefficients = <(-550) 450000>;
1550 + thermal-sensors = <&thermal>;
1551 +
1552 + thermal_trips: trips {
1553 + cpu_crit: cpu-crit {
1554 + temperature = <110000>;
1555 + hysteresis = <0>;
1556 + type = "critical";
1557 + };
1558 + };
1559 +
1560 + cooling_maps: cooling-maps {
1561 + };
1562 + };
1563 + };
1564 +
1565 + clk_27MHz: clk-27M {
1566 + #clock-cells = <0>;
1567 + compatible = "fixed-clock";
1568 + clock-frequency = <27000000>;
1569 + clock-output-names = "27MHz-clock";
1570 + };
1571 +
1572 + clk_108MHz: clk-108M {
1573 + #clock-cells = <0>;
1574 + compatible = "fixed-clock";
1575 + clock-frequency = <108000000>;
1576 + clock-output-names = "108MHz-clock";
1577 + };
1578 +
1579 + hvs: hvs@107c580000 {
1580 + compatible = "brcm,bcm2712-hvs";
1581 + reg = <0x10 0x7c580000 0x1a000>;
1582 + interrupt-parent = <&disp_intr>;
1583 + interrupts = <2>, <9>, <16>;
1584 + interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof";
1585 + //iommus = <&iommu4>;
1586 + status = "disabled";
1587 + };
1588 +
1589 + soc: soc {
1590 + compatible = "simple-bus";
1591 + #address-cells = <1>;
1592 + #size-cells = <1>;
1593 +
1594 + ranges = <0x7c000000 0x10 0x7c000000 0x04000000>;
1595 + /* Emulate a contiguous 30-bit address range for DMA */
1596 + dma-ranges = <0xc0000000 0x00 0x00000000 0x40000000>,
1597 + <0x7c000000 0x10 0x7c000000 0x04000000>;
1598 +
1599 + system_timer: timer@7c003000 {
1600 + compatible = "brcm,bcm2835-system-timer";
1601 + reg = <0x7c003000 0x1000>;
1602 + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
1603 + <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
1604 + <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
1605 + <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
1606 + clock-frequency = <1000000>;
1607 + };
1608 +
1609 + firmwarekms: firmwarekms@7d503000 {
1610 + compatible = "raspberrypi,rpi-firmware-kms";
1611 + /* SUN_L2 interrupt reg */
1612 + reg = <0x7d503000 0x18>;
1613 + interrupt-parent = <&cpu_l2_irq>;
1614 + interrupts = <19>;
1615 + brcm,firmware = <&firmware>;
1616 + status = "disabled";
1617 + };
1618 +
1619 + mailbox: mailbox@7c013880 {
1620 + compatible = "brcm,bcm2835-mbox";
1621 + reg = <0x7c013880 0x40>;
1622 + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1623 + #mbox-cells = <0>;
1624 + };
1625 +
1626 + pixelvalve0: pixelvalve@7c410000 {
1627 + compatible = "brcm,bcm2712-pixelvalve0";
1628 + reg = <0x7c410000 0x100>;
1629 + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1630 + status = "disabled";
1631 + };
1632 +
1633 + pixelvalve1: pixelvalve@7c411000 {
1634 + compatible = "brcm,bcm2712-pixelvalve1";
1635 + reg = <0x7c411000 0x100>;
1636 + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1637 + status = "disabled";
1638 + };
1639 +
1640 + usb: usb@7c480000 {
1641 + compatible = "brcm,bcm2835-usb";
1642 + reg = <0x7c480000 0x10000>;
1643 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1644 + #address-cells = <1>;
1645 + #size-cells = <0>;
1646 + clocks = <&clk_usb>;
1647 + clock-names = "otg";
1648 + phys = <&usbphy>;
1649 + phy-names = "usb2-phy";
1650 + status = "disabled";
1651 + };
1652 +
1653 + mop: mop@7c500000 {
1654 + compatible = "brcm,bcm2712-mop";
1655 + reg = <0x7c500000 0x20>;
1656 + interrupt-parent = <&disp_intr>;
1657 + interrupts = <1>;
1658 + status = "disabled";
1659 + };
1660 +
1661 + moplet: moplet@7c501000 {
1662 + compatible = "brcm,bcm2712-moplet";
1663 + reg = <0x7c501000 0x20>;
1664 + interrupt-parent = <&disp_intr>;
1665 + interrupts = <0>;
1666 + status = "disabled";
1667 + };
1668 +
1669 + disp_intr: interrupt-controller@7c502000 {
1670 + compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
1671 + reg = <0x7c502000 0x30>;
1672 + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
1673 + interrupt-controller;
1674 + #interrupt-cells = <1>;
1675 + status = "disabled";
1676 + };
1677 +
1678 + dvp: clock@7c700000 {
1679 + compatible = "brcm,brcm2711-dvp";
1680 + reg = <0x7c700000 0x10>;
1681 + clocks = <&clk_108MHz>;
1682 + #clock-cells = <1>;
1683 + #reset-cells = <1>;
1684 + };
1685 +
1686 + /*
1687 + * This node is the provider for the enable-method for
1688 + * bringing up secondary cores.
1689 + */
1690 + local_intc: local_intc@7cd00000 {
1691 + compatible = "brcm,bcm2836-l1-intc";
1692 + reg = <0x7cd00000 0x100>;
1693 + };
1694 +
1695 + uart0: serial@7d001000 {
1696 + compatible = "arm,pl011", "arm,primecell";
1697 + reg = <0x7d001000 0x200>;
1698 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1699 + clocks = <&clk_uart>,
1700 + <&clk_vpu>;
1701 + clock-names = "uartclk", "apb_pclk";
1702 + arm,primecell-periphid = <0x00241011>;
1703 + status = "disabled";
1704 + };
1705 +
1706 + uart2: serial@7d001400 {
1707 + compatible = "arm,pl011", "arm,primecell";
1708 + reg = <0x7d001400 0x200>;
1709 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1710 + clocks = <&clk_uart>,
1711 + <&clk_vpu>;
1712 + clock-names = "uartclk", "apb_pclk";
1713 + arm,primecell-periphid = <0x00241011>;
1714 + status = "disabled";
1715 + };
1716 +
1717 + uart3: serial@7d001600 {
1718 + compatible = "arm,pl011", "arm,primecell";
1719 + reg = <0x7d001600 0x200>;
1720 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1721 + clocks = <&clk_uart>,
1722 + <&clk_vpu>;
1723 + clock-names = "uartclk", "apb_pclk";
1724 + arm,primecell-periphid = <0x00241011>;
1725 + status = "disabled";
1726 + };
1727 +
1728 + uart4: serial@7d001800 {
1729 + compatible = "arm,pl011", "arm,primecell";
1730 + reg = <0x7d001800 0x200>;
1731 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1732 + clocks = <&clk_uart>,
1733 + <&clk_vpu>;
1734 + clock-names = "uartclk", "apb_pclk";
1735 + arm,primecell-periphid = <0x00241011>;
1736 + status = "disabled";
1737 + };
1738 +
1739 + uart5: serial@7d001a00 {
1740 + compatible = "arm,pl011", "arm,primecell";
1741 + reg = <0x7d001a00 0x200>;
1742 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1743 + clocks = <&clk_uart>,
1744 + <&clk_vpu>;
1745 + clock-names = "uartclk", "apb_pclk";
1746 + arm,primecell-periphid = <0x00241011>;
1747 + status = "disabled";
1748 + };
1749 +
1750 + sdhost: mmc@7d002000 {
1751 + compatible = "brcm,bcm2835-sdhost";
1752 + reg = <0x7d002000 0x100>;
1753 + //interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1754 + clocks = <&clk_vpu>;
1755 + status = "disabled";
1756 + };
1757 +
1758 + i2s: i2s@7d003000 {
1759 + compatible = "brcm,bcm2835-i2s";
1760 + reg = <0x7d003000 0x24>;
1761 + //clocks = <&cprman BCM2835_CLOCK_PCM>;
1762 + status = "disabled";
1763 + };
1764 +
1765 + spi0: spi@7d004000 {
1766 + compatible = "brcm,bcm2835-spi";
1767 + reg = <0x7d004000 0x200>;
1768 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1769 + clocks = <&clk_vpu>;
1770 + num-cs = <1>;
1771 + #address-cells = <1>;
1772 + #size-cells = <0>;
1773 + status = "disabled";
1774 + };
1775 +
1776 + spi3: spi@7d004600 {
1777 + compatible = "brcm,bcm2835-spi";
1778 + reg = <0x7d004600 0x0200>;
1779 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1780 + clocks = <&clk_vpu>;
1781 + #address-cells = <1>;
1782 + #size-cells = <0>;
1783 + status = "disabled";
1784 + };
1785 +
1786 + spi4: spi@7d004800 {
1787 + compatible = "brcm,bcm2835-spi";
1788 + reg = <0x7d004800 0x0200>;
1789 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1790 + clocks = <&clk_vpu>;
1791 + #address-cells = <1>;
1792 + #size-cells = <0>;
1793 + status = "disabled";
1794 + };
1795 +
1796 + spi5: spi@7d004a00 {
1797 + compatible = "brcm,bcm2835-spi";
1798 + reg = <0x7d004a00 0x0200>;
1799 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1800 + clocks = <&clk_vpu>;
1801 + #address-cells = <1>;
1802 + #size-cells = <0>;
1803 + status = "disabled";
1804 + };
1805 +
1806 + spi6: spi@7d004c00 {
1807 + compatible = "brcm,bcm2835-spi";
1808 + reg = <0x7d004c00 0x0200>;
1809 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1810 + clocks = <&clk_vpu>;
1811 + #address-cells = <1>;
1812 + #size-cells = <0>;
1813 + status = "disabled";
1814 + };
1815 +
1816 + i2c0: i2c@7d005000 {
1817 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
1818 + reg = <0x7d005000 0x20>;
1819 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
1820 + clocks = <&clk_vpu>;
1821 + #address-cells = <1>;
1822 + #size-cells = <0>;
1823 + status = "disabled";
1824 + };
1825 +
1826 + i2c3: i2c@7d005600 {
1827 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
1828 + reg = <0x7d005600 0x20>;
1829 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
1830 + clocks = <&clk_vpu>;
1831 + #address-cells = <1>;
1832 + #size-cells = <0>;
1833 + status = "disabled";
1834 + };
1835 +
1836 + i2c4: i2c@7d005800 {
1837 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
1838 + reg = <0x7d005800 0x20>;
1839 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
1840 + clocks = <&clk_vpu>;
1841 + #address-cells = <1>;
1842 + #size-cells = <0>;
1843 + status = "disabled";
1844 + };
1845 +
1846 + i2c5: i2c@7d005a00 {
1847 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
1848 + reg = <0x7d005a00 0x20>;
1849 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
1850 + clocks = <&clk_vpu>;
1851 + #address-cells = <1>;
1852 + #size-cells = <0>;
1853 + status = "disabled";
1854 + };
1855 +
1856 + i2c6: i2c@7d005c00 {
1857 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
1858 + reg = <0x7d005c00 0x20>;
1859 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
1860 + clocks = <&clk_vpu>;
1861 + #address-cells = <1>;
1862 + #size-cells = <0>;
1863 + status = "disabled";
1864 + };
1865 +
1866 + i2c8: i2c@7d005e00 {
1867 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
1868 + reg = <0x7d005e00 0x20>;
1869 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
1870 + clocks = <&clk_vpu>;
1871 + #address-cells = <1>;
1872 + #size-cells = <0>;
1873 + status = "disabled";
1874 + };
1875 +
1876 + pwm0: pwm@7d00c000 {
1877 + compatible = "brcm,bcm2835-pwm";
1878 + reg = <0x7d00c000 0x28>;
1879 + assigned-clock-rates = <10000000>;
1880 + #pwm-cells = <2>;
1881 + status = "disabled";
1882 + };
1883 +
1884 + pwm1: pwm@7d00c800 {
1885 + compatible = "brcm,bcm2835-pwm";
1886 + reg = <0x7d00c800 0x28>;
1887 + assigned-clock-rates = <10000000>;
1888 + #pwm-cells = <2>;
1889 + status = "disabled";
1890 + };
1891 +
1892 + pm: watchdog@7d200000 {
1893 + compatible = "brcm,bcm2712-pm";
1894 + reg = <0x7d200000 0x308>;
1895 + reg-names = "pm";
1896 + #power-domain-cells = <1>;
1897 + #reset-cells = <1>;
1898 + //clocks = <&cprman BCM2835_CLOCK_V3D>,
1899 + // <&cprman BCM2835_CLOCK_PERI_IMAGE>,
1900 + // <&cprman BCM2835_CLOCK_H264>,
1901 + // <&cprman BCM2835_CLOCK_ISP>;
1902 + clock-names = "v3d", "peri_image", "h264", "isp";
1903 + system-power-controller;
1904 + };
1905 +
1906 + cprman: cprman@7d202000 {
1907 + compatible = "brcm,bcm2711-cprman";
1908 + reg = <0x7d202000 0x2000>;
1909 + #clock-cells = <1>;
1910 +
1911 + /* CPRMAN derives almost everything from the
1912 + * platform's oscillator. However, the DSI
1913 + * pixel clocks come from the DSI analog PHY.
1914 + */
1915 + clocks = <&clk_osc>;
1916 + status = "disabled";
1917 + };
1918 +
1919 + random: rng@7d208000 {
1920 + compatible = "brcm,bcm2711-rng200";
1921 + reg = <0x7d208000 0x28>;
1922 + status = "okay";
1923 + };
1924 +
1925 + cpu_l2_irq: intc@7d503000 {
1926 + compatible = "brcm,l2-intc";
1927 + reg = <0x7d503000 0x18>;
1928 + interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
1929 + interrupt-controller;
1930 + #interrupt-cells = <1>;
1931 + };
1932 +
1933 + pinctrl: pinctrl@7d504100 {
1934 + compatible = "brcm,bcm2712-pinctrl";
1935 + reg = <0x7d504100 0x30>;
1936 +
1937 + uarta_24_pins: uarta_24_pins {
1938 + pin_rts {
1939 + function = "uart0";
1940 + pins = "gpio24";
1941 + bias-disable;
1942 + };
1943 + pin_cts {
1944 + function = "uart0";
1945 + pins = "gpio25";
1946 + bias-pull-up;
1947 + };
1948 + pin_txd {
1949 + function = "uart0";
1950 + pins = "gpio26";
1951 + bias-disable;
1952 + };
1953 + pin_rxd {
1954 + function = "uart0";
1955 + pins = "gpio27";
1956 + bias-pull-up;
1957 + };
1958 + };
1959 +
1960 + sdio2_30_pins: sdio2_30_pins {
1961 + pin_clk {
1962 + function = "sd2";
1963 + pins = "gpio30";
1964 + bias-disable;
1965 + };
1966 + pin_cmd {
1967 + function = "sd2";
1968 + pins = "gpio31";
1969 + bias-pull-up;
1970 + };
1971 + pins_dat {
1972 + function = "sd2";
1973 + pins = "gpio32", "gpio33", "gpio34", "gpio35";
1974 + bias-pull-up;
1975 + };
1976 + };
1977 + };
1978 +
1979 + ddc0: i2c@7d508200 {
1980 + compatible = "brcm,brcmstb-i2c";
1981 + reg = <0x7d508200 0x58>;
1982 + interrupt-parent = <&bsc_irq>;
1983 + interrupts = <1>;
1984 + clock-frequency = <200000>;
1985 + #address-cells = <1>;
1986 + #size-cells = <0>;
1987 + status = "disabled";
1988 + };
1989 +
1990 + ddc1: i2c@7d508280 {
1991 + compatible = "brcm,brcmstb-i2c";
1992 + reg = <0x7d508280 0x58>;
1993 + interrupt-parent = <&bsc_irq>;
1994 + interrupts = <2>;
1995 + clock-frequency = <200000>;
1996 + #address-cells = <1>;
1997 + #size-cells = <0>;
1998 + status = "disabled";
1999 + };
2000 +
2001 + bscd: i2c@7d508300 {
2002 + compatible = "brcm,brcmstb-i2c";
2003 + reg = <0x7d508300 0x58>;
2004 + interrupt-parent = <&bsc_irq>;
2005 + interrupts = <0>;
2006 + clock-frequency = <200000>;
2007 + #address-cells = <1>;
2008 + #size-cells = <0>;
2009 + status = "disabled";
2010 + };
2011 +
2012 + bsc_irq: intc@7d508380 {
2013 + compatible = "brcm,bcm7271-l2-intc";
2014 + reg = <0x7d508380 0x10>;
2015 + interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
2016 + interrupt-controller;
2017 + #interrupt-cells = <1>;
2018 + };
2019 +
2020 + main_irq: intc@7d508400 {
2021 + compatible = "brcm,bcm7271-l2-intc";
2022 + reg = <0x7d508400 0x10>;
2023 + interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
2024 + interrupt-controller;
2025 + #interrupt-cells = <1>;
2026 + };
2027 +
2028 + gio: gpio@7d508500 {
2029 + compatible = "brcm,brcmstb-gpio";
2030 + reg = <0x7d508500 0x40>;
2031 + interrupt-parent = <&main_irq>;
2032 + interrupts = <0>;
2033 + gpio-controller;
2034 + #gpio-cells = <2>;
2035 + interrupt-controller;
2036 + #interrupt-cells = <2>;
2037 + brcm,gpio-bank-widths = <32 22>;
2038 + brcm,gpio-direct;
2039 + };
2040 +
2041 + uarta: serial@7d50c000 {
2042 + compatible = "brcm,bcm7271-uart";
2043 + reg = <0x7d50c000 0x20>;
2044 + reg-names = "uart";
2045 + reg-shift = <2>;
2046 + reg-io-width = <4>;
2047 + interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>;
2048 + skip-init;
2049 + status = "disabled";
2050 + };
2051 +
2052 + uartb: serial@7d50d000 {
2053 + compatible = "brcm,bcm7271-uart";
2054 + reg = <0x7d50d000 0x20>;
2055 + reg-names = "uart";
2056 + reg-shift = <2>;
2057 + reg-io-width = <4>;
2058 + interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>;
2059 + skip-init;
2060 + status = "disabled";
2061 + };
2062 +
2063 + uartc: serial@7d50e000 {
2064 + compatible = "brcm,bcm7271-uart";
2065 + reg = <0x7d50e000 0x20>;
2066 + reg-names = "uart";
2067 + reg-shift = <2>;
2068 + reg-io-width = <4>;
2069 + interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
2070 + skip-init;
2071 + status = "disabled";
2072 + };
2073 +
2074 + aon_intr: interrupt-controller@7d510600 {
2075 + compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
2076 + reg = <0x7d510600 0x30>;
2077 + interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
2078 + interrupt-controller;
2079 + #interrupt-cells = <1>;
2080 + status = "disabled";
2081 + };
2082 +
2083 + pinctrl_aon: pinctrl@7d510700 {
2084 + compatible = "brcm,bcm2712-aon-pinctrl";
2085 + reg = <0x7d510700 0x20>;
2086 +
2087 + i2c3_m4_agpio0_pins: i2c3_m4_agpio0_pins {
2088 + function = "vc_i2c3";
2089 + pins = "aon_gpio0", "aon_gpio1";
2090 + bias-pull-up;
2091 + };
2092 +
2093 + bsc_m1_agpio13_pins: bsc_m1_agpio13_pins {
2094 + function = "bsc_m1";
2095 + pins = "aon_gpio13", "aon_gpio14";
2096 + bias-pull-up;
2097 + };
2098 +
2099 + bsc_pmu_sgpio4_pins: bsc_pmu_sgpio4_pins {
2100 + function = "avs_pmu_bsc";
2101 + pins = "aon_sgpio4", "aon_sgpio5";
2102 + };
2103 +
2104 + bsc_m2_sgpio4_pins: bsc_m2_sgpio4_pins {
2105 + function = "bsc_m2";
2106 + pins = "aon_sgpio4", "aon_sgpio5";
2107 + };
2108 +
2109 + pwm_aon_agpio1_pins: pwm_aon_agpio1_pins {
2110 + function = "aon_pwm";
2111 + pins = "aon_gpio1", "aon_gpio2";
2112 + };
2113 +
2114 + pwm_aon_agpio4_pins: pwm_aon_agpio4_pins {
2115 + function = "vc_pwm0";
2116 + pins = "aon_gpio4", "aon_gpio5";
2117 + };
2118 +
2119 + pwm_aon_agpio7_pins: pwm_aon_agpio7_pins {
2120 + function = "aon_pwm";
2121 + pins = "aon_gpio7", "aon_gpio9";
2122 + };
2123 + };
2124 +
2125 + intc@7d517000 {
2126 + compatible = "brcm,bcm7271-l2-intc";
2127 + reg = <0x7d517000 0x10>;
2128 + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
2129 + interrupt-controller;
2130 + #interrupt-cells = <1>;
2131 + status = "disabled";
2132 + };
2133 +
2134 + bscc: i2c@7d517a00 {
2135 + compatible = "brcm,brcmstb-i2c";
2136 + reg = <0x7d517a00 0x58>;
2137 + interrupt-parent = <&bsc_aon_irq>;
2138 + interrupts = <0>;
2139 + clock-frequency = <200000>;
2140 + #address-cells = <1>;
2141 + #size-cells = <0>;
2142 + status = "disabled";
2143 + };
2144 +
2145 + pwm_aon: pwm@7d517a80 {
2146 + compatible = "brcm,bcm7038-pwm";
2147 + reg = <0x7d517a80 0x28>;
2148 + #pwm-cells = <2>;
2149 + clocks = <&clk_27MHz>;
2150 + };
2151 +
2152 + main_aon_irq: intc@7d517ac0 {
2153 + compatible = "brcm,bcm7271-l2-intc";
2154 + reg = <0x7d517ac0 0x10>;
2155 + interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
2156 + interrupt-controller;
2157 + #interrupt-cells = <1>;
2158 + };
2159 +
2160 + bsc_aon_irq: intc@7d517b00 {
2161 + compatible = "brcm,bcm7271-l2-intc";
2162 + reg = <0x7d517b00 0x10>;
2163 + interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
2164 + interrupt-controller;
2165 + #interrupt-cells = <1>;
2166 + };
2167 +
2168 + gio_aon: gpio@7d517c00 {
2169 + compatible = "brcm,brcmstb-gpio";
2170 + reg = <0x7d517c00 0x40>;
2171 + interrupt-parent = <&main_aon_irq>;
2172 + interrupts = <0>;
2173 + gpio-controller;
2174 + #gpio-cells = <2>;
2175 + interrupt-controller;
2176 + #interrupt-cells = <2>;
2177 + brcm,gpio-bank-widths = <17 6>;
2178 + brcm,gpio-direct;
2179 + };
2180 +
2181 + avs_monitor: avs-monitor@7d542000 {
2182 + compatible = "brcm,bcm2711-avs-monitor",
2183 + "syscon", "simple-mfd";
2184 + reg = <0x7d542000 0xf00>;
2185 + status = "okay";
2186 +
2187 + thermal: thermal {
2188 + compatible = "brcm,bcm2711-thermal";
2189 + #thermal-sensor-cells = <0>;
2190 + };
2191 + };
2192 +
2193 + bsc_pmu: i2c@7d544000 {
2194 + compatible = "brcm,brcmstb-i2c";
2195 + reg = <0x7d544000 0x58>;
2196 + interrupt-parent = <&bsc_aon_irq>;
2197 + interrupts = <1>;
2198 + clock-frequency = <200000>;
2199 + status = "disabled";
2200 + };
2201 +
2202 + hdmi0: hdmi@7ef00700 {
2203 + compatible = "brcm,bcm2712-hdmi0";
2204 + reg = <0x7c701400 0x300>,
2205 + <0x7c701000 0x200>,
2206 + <0x7c701d00 0x300>,
2207 + <0x7c702000 0x80>,
2208 + <0x7c703800 0x200>,
2209 + <0x7c704000 0x800>,
2210 + <0x7c700100 0x80>,
2211 + <0x7d510800 0x100>,
2212 + <0x7c720000 0x100>;
2213 + reg-names = "hdmi",
2214 + "dvp",
2215 + "phy",
2216 + "rm",
2217 + "packet",
2218 + "metadata",
2219 + "csc",
2220 + "cec",
2221 + "hd";
2222 + resets = <&dvp 1>;
2223 + interrupt-parent = <&aon_intr>;
2224 + interrupts = <1>, <2>, <3>,
2225 + <7>, <8>;
2226 + interrupt-names = "cec-tx", "cec-rx", "cec-low",
2227 + "hpd-connected", "hpd-removed";
2228 + ddc = <&ddc0>;
2229 + dmas = <&dma32 10>;
2230 + dma-names = "audio-rx";
2231 + status = "disabled";
2232 + };
2233 +
2234 + hdmi1: hdmi@7ef05700 {
2235 + compatible = "brcm,bcm2712-hdmi1";
2236 + reg = <0x7c706400 0x300>,
2237 + <0x7c706000 0x200>,
2238 + <0x7c706d00 0x300>,
2239 + <0x7c707000 0x80>,
2240 + <0x7c708800 0x200>,
2241 + <0x7c709000 0x800>,
2242 + <0x7c700180 0x80>,
2243 + <0x7d511000 0x100>,
2244 + <0x7c720000 0x100>;
2245 + reg-names = "hdmi",
2246 + "dvp",
2247 + "phy",
2248 + "rm",
2249 + "packet",
2250 + "metadata",
2251 + "csc",
2252 + "cec",
2253 + "hd";
2254 + ddc = <&ddc1>;
2255 + resets = <&dvp 2>;
2256 + interrupt-parent = <&aon_intr>;
2257 + interrupts = <11>, <12>, <13>,
2258 + <14>, <15>;
2259 + interrupt-names = "cec-tx", "cec-rx", "cec-low",
2260 + "hpd-connected", "hpd-removed";
2261 + dmas = <&dma32 17>;
2262 + dma-names = "audio-rx";
2263 + status = "disabled";
2264 + };
2265 +
2266 + sound: sound {
2267 + };
2268 + };
2269 +
2270 + arm-pmu {
2271 + compatible = "arm,cortex-a76-pmu";
2272 + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
2273 + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
2274 + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
2275 + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
2276 + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
2277 + };
2278 +
2279 + timer {
2280 + compatible = "arm,armv8-timer";
2281 + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
2282 + IRQ_TYPE_LEVEL_LOW)>,
2283 + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
2284 + IRQ_TYPE_LEVEL_LOW)>,
2285 + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
2286 + IRQ_TYPE_LEVEL_LOW)>,
2287 + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
2288 + IRQ_TYPE_LEVEL_LOW)>;
2289 + /* This only applies to the ARMv7 stub */
2290 + arm,cpu-registers-not-fw-configured;
2291 + };
2292 +
2293 + cpus: cpus {
2294 + #address-cells = <1>;
2295 + #size-cells = <0>;
2296 + enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
2297 +
2298 + cpu0: cpu@0 {
2299 + device_type = "cpu";
2300 + compatible = "arm,cortex-a76";
2301 + reg = <0x000>;
2302 + enable-method = "psci";
2303 + next-level-cache = <&l2_cache>;
2304 + };
2305 +
2306 + cpu1: cpu@1 {
2307 + device_type = "cpu";
2308 + compatible = "arm,cortex-a76";
2309 + reg = <0x100>;
2310 + enable-method = "psci";
2311 + next-level-cache = <&l2_cache>;
2312 + };
2313 +
2314 + cpu2: cpu@2 {
2315 + device_type = "cpu";
2316 + compatible = "arm,cortex-a76";
2317 + reg = <0x200>;
2318 + enable-method = "psci";
2319 + next-level-cache = <&l2_cache>;
2320 + };
2321 +
2322 + cpu3: cpu@3 {
2323 + device_type = "cpu";
2324 + compatible = "arm,cortex-a76";
2325 + reg = <0x300>;
2326 + enable-method = "psci";
2327 + next-level-cache = <&l2_cache>;
2328 + };
2329 +
2330 + l2_cache: l2-cache {
2331 + compatible = "cache";
2332 + next-level-cache = <&l3_cache>;
2333 + };
2334 +
2335 + l3_cache: l3-cache {
2336 + compatible = "cache";
2337 + };
2338 + };
2339 +
2340 + psci {
2341 + method = "smc";
2342 + compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
2343 + cpu_on = <0xc4000003>;
2344 + cpu_suspend = <0xc4000001>;
2345 + cpu_off = <0x84000002>;
2346 + };
2347 +
2348 + axi: axi {
2349 + compatible = "simple-bus";
2350 + #address-cells = <2>;
2351 + #size-cells = <2>;
2352 +
2353 + ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>,
2354 + <0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>,
2355 + <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>,
2356 + <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
2357 + <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
2358 +
2359 + dma-ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>,
2360 + <0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>,
2361 + <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>,
2362 + <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
2363 + <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
2364 +
2365 + vc4: gpu {
2366 + compatible = "brcm,bcm2712-vc6";
2367 + };
2368 +
2369 + iommu2: iommu@5100 {
2370 + /* IOMMU2 for PISP-BE, HEVC; and (unused) H264 accelerators */
2371 + compatible = "brcm,bcm2712-iommu";
2372 + reg = <0x10 0x5100 0x0 0x80>;
2373 + cache = <&iommuc>;
2374 + #iommu-cells = <0>;
2375 + };
2376 +
2377 + iommu4: iommu@5200 {
2378 + /* IOMMU4 for HVS, MPL/TXP; and (unused) Unicam, PISP-FE, MiniBVN */
2379 + compatible = "brcm,bcm2712-iommu";
2380 + reg = <0x10 0x5200 0x0 0x80>;
2381 + cache = <&iommuc>;
2382 + #iommu-cells = <0>;
2383 + #interconnect-cells = <0>;
2384 + };
2385 +
2386 + iommu5: iommu@5280 {
2387 + /* IOMMU5 for PCIe2 (RP1); and (unused) BSTM */
2388 + compatible = "brcm,bcm2712-iommu";
2389 + reg = <0x10 0x5280 0x0 0x80>;
2390 + cache = <&iommuc>;
2391 + #iommu-cells = <0>;
2392 + dma-iova-offset = <0x10 0x00000000>; // HACK for RP1 masters over PCIe
2393 + };
2394 +
2395 + iommuc: iommuc@5b00 {
2396 + compatible = "brcm,bcm2712-iommuc";
2397 + reg = <0x10 0x5b00 0x0 0x80>;
2398 + };
2399 +
2400 + dma32: dma@10000 {
2401 + compatible = "brcm,bcm2712-dma";
2402 + reg = <0x10 0x00010000 0 0x600>;
2403 + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
2404 + <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
2405 + <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
2406 + <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
2407 + <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
2408 + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
2409 + interrupt-names = "dma0",
2410 + "dma1",
2411 + "dma2",
2412 + "dma3",
2413 + "dma4",
2414 + "dma5";
2415 + #dma-cells = <1>;
2416 + brcm,dma-channel-mask = <0x0035>;
2417 + };
2418 +
2419 + dma40: dma@10600 {
2420 + compatible = "brcm,bcm2712-dma";
2421 + reg = <0x10 0x00010600 0 0x600>;
2422 + interrupts =
2423 + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, /* dma4 6 */
2424 + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* dma4 7 */
2425 + <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, /* dma4 8 */
2426 + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, /* dma4 9 */
2427 + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* dma4 10 */
2428 + <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; /* dma4 11 */
2429 + interrupt-names = "dma6",
2430 + "dma7",
2431 + "dma8",
2432 + "dma9",
2433 + "dma10",
2434 + "dma11";
2435 + #dma-cells = <1>;
2436 + brcm,dma-channel-mask = <0x0fc0>;
2437 + };
2438 +
2439 + // Single-lane Gen3 PCIe
2440 + // Outbound window at 0x14_000000-0x17_ffffff
2441 + pcie0: pcie@100000 {
2442 + compatible = "brcm,bcm2712-pcie";
2443 + reg = <0x10 0x00100000 0x0 0x9310>;
2444 + device_type = "pci";
2445 + max-link-speed = <2>;
2446 + #address-cells = <3>;
2447 + #interrupt-cells = <1>;
2448 + #size-cells = <2>;
2449 + /*
2450 + * Unused interrupts:
2451 + * 208: AER
2452 + * 215: NMI
2453 + * 216: PME
2454 + */
2455 + interrupt-parent = <&gicv2>;
2456 + interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
2457 + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
2458 + interrupt-names = "pcie", "msi";
2459 + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
2460 + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 209
2461 + IRQ_TYPE_LEVEL_HIGH>,
2462 + <0 0 0 2 &gicv2 GIC_SPI 210
2463 + IRQ_TYPE_LEVEL_HIGH>,
2464 + <0 0 0 3 &gicv2 GIC_SPI 211
2465 + IRQ_TYPE_LEVEL_HIGH>,
2466 + <0 0 0 4 &gicv2 GIC_SPI 212
2467 + IRQ_TYPE_LEVEL_HIGH>;
2468 + resets = <&bcm_reset 5>, <&bcm_reset 42>, <&pcie_rescal>;
2469 + reset-names = "swinit", "bridge", "rescal";
2470 + msi-controller;
2471 + msi-parent = <&pcie0>;
2472 +
2473 + ranges = <0x02000000 0x00 0x00000000
2474 + 0x17 0x00000000
2475 + 0x0 0xfffffffc>,
2476 + <0x43000000 0x04 0x00000000
2477 + 0x14 0x00000000
2478 + 0x3 0x00000000>;
2479 +
2480 + dma-ranges = <0x43000000 0x10 0x00000000
2481 + 0x00 0x00000000
2482 + 0x10 0x00000000>;
2483 +
2484 + status = "disabled";
2485 + };
2486 +
2487 + // Single-lane Gen3 PCIe
2488 + // Outbound window at 0x18_000000-0x1b_ffffff
2489 + pcie1: pcie@110000 {
2490 + compatible = "brcm,bcm2712-pcie";
2491 + reg = <0x10 0x00110000 0x0 0x9310>;
2492 + device_type = "pci";
2493 + max-link-speed = <2>;
2494 + #address-cells = <3>;
2495 + #interrupt-cells = <1>;
2496 + #size-cells = <2>;
2497 + /*
2498 + * Unused interrupts:
2499 + * 218: AER
2500 + * 225: NMI
2501 + * 226: PME
2502 + */
2503 + interrupt-parent = <&gicv2>;
2504 + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
2505 + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
2506 + interrupt-names = "pcie", "msi";
2507 + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
2508 + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 219
2509 + IRQ_TYPE_LEVEL_HIGH>,
2510 + <0 0 0 2 &gicv2 GIC_SPI 220
2511 + IRQ_TYPE_LEVEL_HIGH>,
2512 + <0 0 0 3 &gicv2 GIC_SPI 221
2513 + IRQ_TYPE_LEVEL_HIGH>,
2514 + <0 0 0 4 &gicv2 GIC_SPI 222
2515 + IRQ_TYPE_LEVEL_HIGH>;
2516 + resets = <&bcm_reset 7>, <&bcm_reset 43>, <&pcie_rescal>;
2517 + reset-names = "swinit", "bridge", "rescal";
2518 + msi-controller;
2519 + msi-parent = <&mip1>;
2520 +
2521 + ranges = <0x02000000 0x00 0x00000000
2522 + 0x1b 0x00000000
2523 + 0x00 0xfffffffc>,
2524 + <0x43000000 0x04 0x00000000
2525 + 0x18 0x00000000
2526 + 0x03 0x00000000>;
2527 +
2528 + dma-ranges = <0x03000000 0x10 0x00000000
2529 + 0x00 0x00000000
2530 + 0x10 0x00000000>;
2531 +
2532 + brcm,enable-l1ss;
2533 + status = "disabled";
2534 + };
2535 +
2536 + pcie_rescal: reset-controller@119500 {
2537 + compatible = "brcm,bcm7216-pcie-sata-rescal";
2538 + reg = <0x10 0x00119500 0x0 0x10>;
2539 + #reset-cells = <0>;
2540 + };
2541 +
2542 + // Quad-lane Gen3 PCIe
2543 + // Outbound window at 0x1c_000000-0x1f_ffffff
2544 + pcie2: pcie@120000 {
2545 + compatible = "brcm,bcm2712-pcie";
2546 + reg = <0x10 0x00120000 0x0 0x9310>;
2547 + device_type = "pci";
2548 + max-link-speed = <2>;
2549 + #address-cells = <3>;
2550 + #interrupt-cells = <1>;
2551 + #size-cells = <2>;
2552 + /*
2553 + * Unused interrupts:
2554 + * 228: AER
2555 + * 235: NMI
2556 + * 236: PME
2557 + */
2558 + interrupt-parent = <&gicv2>;
2559 + interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>,
2560 + <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
2561 + interrupt-names = "pcie", "msi";
2562 + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
2563 + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 229
2564 + IRQ_TYPE_LEVEL_HIGH>,
2565 + <0 0 0 2 &gicv2 GIC_SPI 230
2566 + IRQ_TYPE_LEVEL_HIGH>,
2567 + <0 0 0 3 &gicv2 GIC_SPI 231
2568 + IRQ_TYPE_LEVEL_HIGH>,
2569 + <0 0 0 4 &gicv2 GIC_SPI 232
2570 + IRQ_TYPE_LEVEL_HIGH>;
2571 + resets = <&bcm_reset 32>, <&bcm_reset 44>, <&pcie_rescal>;
2572 + reset-names = "swinit", "bridge", "rescal";
2573 + msi-controller;
2574 + msi-parent = <&mip0>;
2575 +
2576 + // ~4GB, 32-bit, not-prefetchable at PCIe 00_00000000
2577 + ranges = <0x02000000 0x00 0x00000000
2578 + 0x1f 0x00000000
2579 + 0x0 0xfffffffc>,
2580 + // 12GB, 64-bit, prefetchable at PCIe 04_00000000
2581 + <0x43000000 0x04 0x00000000
2582 + 0x1c 0x00000000
2583 + 0x03 0x00000000>;
2584 +
2585 + // 64GB system RAM space at PCIe 10_00000000
2586 + dma-ranges = <0x02000000 0x00 0x00000000
2587 + 0x1f 0x00000000
2588 + 0x00 0x00400000>,
2589 + <0x43000000 0x10 0x00000000
2590 + 0x00 0x00000000
2591 + 0x10 0x00000000>;
2592 +
2593 + brcm,enable-mps-rcb;
2594 + brcm,enable-l1ss;
2595 + status = "disabled";
2596 + };
2597 +
2598 + mip0: msi-controller@130000 {
2599 + compatible = "brcm,bcm2712-mip-intc";
2600 + reg = <0x10 0x00130000 0x0 0xc0>;
2601 + msi-controller;
2602 + interrupt-controller;
2603 + #interrupt-cells = <2>;
2604 + brcm,msi-base-spi = <128>;
2605 + brcm,msi-num-spis = <64>;
2606 + brcm,msi-offset = <0>;
2607 + brcm,msi-pci-addr = <0xff 0xfffff000>;
2608 + };
2609 +
2610 + mip1: msi-controller@131000 {
2611 + compatible = "brcm,bcm2712-mip-intc";
2612 + reg = <0x10 0x00131000 0x0 0xc0>;
2613 + msi-controller;
2614 + interrupt-controller;
2615 + #interrupt-cells = <2>;
2616 + brcm,msi-base-spi = <247>;
2617 + /* Actually 20 total, but the others are
2618 + * both sparse and non-consecutive */
2619 + brcm,msi-num-spis = <8>;
2620 + brcm,msi-offset = <8>;
2621 + brcm,msi-pci-addr = <0xff 0xffffe000>;
2622 + };
2623 +
2624 + genet: ethernet@1300000 {
2625 + compatible = "brcm,bcm2711-genet-v5";
2626 + reg = <0x10 0x01300000 0x0 0x20010>;
2627 + #address-cells = <0x1>;
2628 + #size-cells = <0x0>;
2629 + interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
2630 + <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2631 + status = "disabled";
2632 + phy-mode = "rgmii";
2633 + fixed-link = <0x0 0x1 0x3e8 0x0 0x0>;
2634 + phy-speed = <0x3e8>;
2635 + phy-id = <0x101>;
2636 + phy-type = <0x6>;
2637 + local-mac-address = [ 00 10 18 d8 45 de ];
2638 + device_type = "network";
2639 +
2640 + genet_mdio: mdio@e14 {
2641 + compatible = "brcm,genet-mdio-v5";
2642 + reg = <0xe14 0x8>;
2643 + #address-cells = <0x1>;
2644 + #size-cells = <0x0>;
2645 + };
2646 + };
2647 +
2648 + syscon_piarbctl: syscon@400018 {
2649 + compatible = "brcm,syscon-piarbctl", "syscon", "simple-mfd";
2650 + reg = <0x10 0x00400018 0x0 0x18>;
2651 + };
2652 +
2653 + rpivid: codec@800000 {
2654 + compatible = "raspberrypi,rpivid-vid-decoder";
2655 + reg = <0x10 0x00800000 0x0 0x10000>, /* HEVC */
2656 + <0x10 0x00840000 0x0 0x1000>; /* INTC */
2657 + reg-names = "hevc",
2658 + "intc";
2659 +
2660 + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
2661 +
2662 + clocks = <&firmware_clocks 11>;
2663 + clock-names = "hevc";
2664 + status = "disabled";
2665 + };
2666 +
2667 + sdio1: mmc@fff000 {
2668 + compatible = "brcm,bcm2712-sdhci";
2669 + reg = <0x10 0x00fff000 0x0 0x260>,
2670 + <0x10 0x00fff400 0x0 0x200>,
2671 + <0x10 0x015040b0 0x0 0x4>, // Bus isolation control
2672 + <0x10 0x015200f0 0x0 0x24>; // LCPLL control misc0-8
2673 + reg-names = "host", "cfg", "busisol", "lcpll";
2674 + interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>;
2675 + clocks = <&clk_emmc2>;
2676 + sdhci-caps-mask = <0x0000C000 0x0>;
2677 + sdhci-caps = <0x0 0x0>;
2678 + supports-cqe;
2679 + mmc-ddr-3_3v;
2680 + };
2681 +
2682 + sdio2: mmc@1100000 {
2683 + compatible = "brcm,bcm2712-sdhci";
2684 + reg = <0x10 0x01100000 0x0 0x260>,
2685 + <0x10 0x01100400 0x0 0x200>;
2686 + reg-names = "host", "cfg";
2687 + interrupts = <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>;
2688 + clocks = <&clk_emmc2>;
2689 + sdhci-caps-mask = <0x0000C000 0x0>;
2690 + sdhci-caps = <0x0 0x0>;
2691 + supports-cqe;
2692 + mmc-ddr-3_3v;
2693 + status = "disabled";
2694 + };
2695 +
2696 + sdio0: mmc@1108000 {
2697 + compatible = "brcm,bcm2711-emmc2";
2698 + reg = <0x10 0x01108000 0x0 0x100>;
2699 + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
2700 + clocks = <&clk_emmc2>;
2701 + mmc-ddr-3_3v;
2702 + status = "disabled";
2703 + };
2704 +
2705 + bcm_reset: reset-controller@1504318 {
2706 + compatible = "brcm,brcmstb-reset";
2707 + reg = <0x10 0x01504318 0x0 0x30>;
2708 + #reset-cells = <1>;
2709 + };
2710 +
2711 + v3d: v3d@2000000 {
2712 + compatible = "brcm,2712-v3d";
2713 + reg = <0x10 0x02000000 0x0 0x4000>,
2714 + <0x10 0x02008000 0x0 0x6000>;
2715 + reg-names = "hub", "core0";
2716 +
2717 + power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
2718 + resets = <&pm BCM2835_RESET_V3D>;
2719 + clocks = <&firmware_clocks 5>;
2720 + clocks-names = "v3d";
2721 + interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
2722 + <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
2723 + status = "disabled";
2724 + };
2725 +
2726 + gicv2: interrupt-controller@7fff9000 {
2727 + interrupt-controller;
2728 + #interrupt-cells = <3>;
2729 + compatible = "arm,gic-400";
2730 + reg = <0x10 0x7fff9000 0x0 0x1000>,
2731 + <0x10 0x7fffa000 0x0 0x2000>,
2732 + <0x10 0x7fffc000 0x0 0x2000>,
2733 + <0x10 0x7fffe000 0x0 0x2000>;
2734 + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
2735 + IRQ_TYPE_LEVEL_HIGH)>;
2736 + };
2737 +
2738 + pisp_be: pisp_be@880000 {
2739 + compatible = "raspberrypi,pispbe";
2740 + reg = <0x10 0x00880000 0x0 0x4000>;
2741 + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
2742 + clocks = <&firmware_clocks 7>;
2743 + clocks-names = "isp_be";
2744 + status = "okay";
2745 + iommus = <&iommu2>;
2746 + };
2747 + };
2748 +
2749 + clocks {
2750 + /* The oscillator is the root of the clock tree. */
2751 + clk_osc: clk-osc {
2752 + compatible = "fixed-clock";
2753 + #clock-cells = <0>;
2754 + clock-output-names = "osc";
2755 + clock-frequency = <54000000>;
2756 + };
2757 +
2758 + clk_usb: clk-usb {
2759 + compatible = "fixed-clock";
2760 + #clock-cells = <0>;
2761 + clock-output-names = "otg";
2762 + clock-frequency = <480000000>;
2763 + };
2764 +
2765 + clk_vpu: clk_vpu {
2766 + #clock-cells = <0>;
2767 + compatible = "fixed-clock";
2768 + clock-frequency = <750000000>;
2769 + clock-output-names = "vpu-clock";
2770 + };
2771 +
2772 + clk_uart: clk_uart {
2773 + #clock-cells = <0>;
2774 + compatible = "fixed-clock";
2775 + clock-frequency = <9216000>;
2776 + clock-output-names = "uart-clock";
2777 + };
2778 +
2779 + clk_emmc2: clk_emmc2 {
2780 + #clock-cells = <0>;
2781 + compatible = "fixed-clock";
2782 + clock-frequency = <54000000>;
2783 + clock-output-names = "emmc2-clock";
2784 + };
2785 + };
2786 +
2787 + usbphy: phy {
2788 + compatible = "usb-nop-xceiv";
2789 + #phy-cells = <0>;
2790 + };
2791 +};
2792 --- a/arch/arm/boot/dts/overlays/Makefile
2793 +++ b/arch/arm/boot/dts/overlays/Makefile
2794 @@ -49,8 +49,10 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
2795 dionaudio-loco.dtbo \
2796 dionaudio-loco-v2.dtbo \
2797 disable-bt.dtbo \
2798 + disable-bt-pi5.dtbo \
2799 disable-emmc2.dtbo \
2800 disable-wifi.dtbo \
2801 + disable-wifi-pi5.dtbo \
2802 dpi18.dtbo \
2803 dpi18cpadhi.dtbo \
2804 dpi24.dtbo \
2805 @@ -106,8 +108,12 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
2806 i2c-rtc-gpio.dtbo \
2807 i2c-sensor.dtbo \
2808 i2c0.dtbo \
2809 + i2c0-pi5.dtbo \
2810 i2c1.dtbo \
2811 + i2c1-pi5.dtbo \
2812 + i2c2-pi5.dtbo \
2813 i2c3.dtbo \
2814 + i2c3-pi5.dtbo \
2815 i2c4.dtbo \
2816 i2c5.dtbo \
2817 i2c6.dtbo \
2818 @@ -150,10 +156,15 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
2819 media-center.dtbo \
2820 merus-amp.dtbo \
2821 midi-uart0.dtbo \
2822 + midi-uart0-pi5.dtbo \
2823 midi-uart1.dtbo \
2824 + midi-uart1-pi5.dtbo \
2825 midi-uart2.dtbo \
2826 + midi-uart2-pi5.dtbo \
2827 midi-uart3.dtbo \
2828 + midi-uart3-pi5.dtbo \
2829 midi-uart4.dtbo \
2830 + midi-uart4-pi5.dtbo \
2831 midi-uart5.dtbo \
2832 minipitft13.dtbo \
2833 miniuart-bt.dtbo \
2834 @@ -231,14 +242,20 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
2835 spi1-2cs.dtbo \
2836 spi1-3cs.dtbo \
2837 spi2-1cs.dtbo \
2838 + spi2-1cs-pi5.dtbo \
2839 spi2-2cs.dtbo \
2840 + spi2-2cs-pi5.dtbo \
2841 spi2-3cs.dtbo \
2842 spi3-1cs.dtbo \
2843 + spi3-1cs-pi5.dtbo \
2844 spi3-2cs.dtbo \
2845 + spi3-2cs-pi5.dtbo \
2846 spi4-1cs.dtbo \
2847 spi4-2cs.dtbo \
2848 spi5-1cs.dtbo \
2849 + spi5-1cs-pi5.dtbo \
2850 spi5-2cs.dtbo \
2851 + spi5-2cs-pi5.dtbo \
2852 spi6-1cs.dtbo \
2853 spi6-2cs.dtbo \
2854 ssd1306.dtbo \
2855 @@ -253,10 +270,15 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
2856 tpm-slb9670.dtbo \
2857 tpm-slb9673.dtbo \
2858 uart0.dtbo \
2859 + uart0-pi5.dtbo \
2860 uart1.dtbo \
2861 + uart1-pi5.dtbo \
2862 uart2.dtbo \
2863 + uart2-pi5.dtbo \
2864 uart3.dtbo \
2865 + uart3-pi5.dtbo \
2866 uart4.dtbo \
2867 + uart4-pi5.dtbo \
2868 uart5.dtbo \
2869 udrc.dtbo \
2870 ugreen-dabboard.dtbo \
2871 @@ -276,6 +298,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
2872 vc4-kms-kippah-7inch.dtbo \
2873 vc4-kms-v3d.dtbo \
2874 vc4-kms-v3d-pi4.dtbo \
2875 + vc4-kms-v3d-pi5.dtbo \
2876 vc4-kms-vga666.dtbo \
2877 vga666.dtbo \
2878 vl805.dtbo \
2879 --- a/arch/arm/boot/dts/overlays/README
2880 +++ b/arch/arm/boot/dts/overlays/README
2881 @@ -151,6 +151,9 @@ Params:
2882 bdaddr=06:05:04:03:02:01
2883 will set the BDADDR to 01:02:03:04:05:06.
2884
2885 + button_debounce Set the debounce delay (in ms) on the power/
2886 + shutdown button (default 50ms)
2887 +
2888 cam0_reg Enables CAM 0 regulator.
2889 Only required on CM1 & 3.
2890
2891 @@ -167,6 +170,9 @@ Params:
2892 Default of GPIO expander 5 on CM4, but override
2893 switches to normal GPIO.
2894
2895 + cooling_fan Enables the Pi 5 cooling fan (enabled
2896 + automatically by the firmware)
2897 +
2898 eee Enable Energy Efficient Ethernet support for
2899 compatible devices (default "on"). See also
2900 "tx_lpi_timer". Pi3B+ only.
2901 @@ -206,23 +212,29 @@ Params:
2902 hdmi Set to "off" to disable the HDMI interface
2903 (default "on")
2904
2905 + i2c An alias for i2c_arm
2906 +
2907 i2c_arm Set to "on" to enable the ARM's i2c interface
2908 (default "off")
2909
2910 + i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
2911 + (default "100000")
2912 +
2913 + i2c_baudrate An alias for i2c_arm_baudrate
2914 +
2915 + i2c_csi_dsi Set to "on" to enable the i2c_csi_dsi interface
2916 +
2917 + i2c_csi_dsi0 Set to "on" to enable the i2c_csi_dsi0 interface
2918 +
2919 + i2c_csi_dsi1 Set to "on" to enable the i2c_csi_dsi1 interface
2920 +
2921 i2c_vc Set to "on" to enable the i2c interface
2922 usually reserved for the VideoCore processor
2923 (default "off")
2924
2925 - i2c An alias for i2c_arm
2926 -
2927 - i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
2928 - (default "100000")
2929 -
2930 i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface
2931 (default "100000")
2932
2933 - i2c_baudrate An alias for i2c_arm_baudrate
2934 -
2935 i2s Set to "on" to enable the i2s interface
2936 (default "off")
2937
2938 @@ -237,11 +249,23 @@ Params:
2939 krnbt_baudrate Set the baudrate of the PL011 UART when used
2940 with krnbt=on
2941
2942 + nvme Alias for "pciex1" (2712 only)
2943 +
2944 pcie Set to "off" to disable the PCIe interface
2945 (default "on")
2946 (2711 only, but not applicable on CM4S)
2947 N.B. USB-A ports on 4B are subsequently disabled
2948
2949 + pciex1 Set to "on" to enable the external PCIe link
2950 + (2712 only, default "off")
2951 +
2952 + pciex1_gen Sets the PCIe "GEN"/speed for the external PCIe
2953 + link (2712 only, default "2")
2954 +
2955 + pciex1_no_l0s Set to "on" to disable ASPM L0s on the external
2956 + PCIe link for devices that have broken
2957 + implementations (2712 only, default "off")
2958 +
2959 spi Set to "on" to enable the spi interfaces
2960 (default "off")
2961
2962 @@ -252,6 +276,11 @@ Params:
2963 random Set to "on" to enable the hardware random
2964 number generator (default "on")
2965
2966 + rtc_bbat_vchg Set the RTC backup battery charging voltage in
2967 + microvolts. If set to 0 or not specified, the
2968 + trickle charger is disabled.
2969 + (2712 only, default "0")
2970 +
2971 sd Set to "off" to disable the SD card (or eMMC on
2972 non-lite SKU of CM4).
2973 (default "on")
2974 @@ -276,18 +305,30 @@ Params:
2975 sdio_overclock Clock (in MHz) to use when the MMC framework
2976 requests 50MHz for the SDIO/WLAN interface.
2977
2978 + suspend Make the power button trigger a suspend rather
2979 + than a power-off (2712 only, default "off")
2980 +
2981 tx_lpi_timer Set the delay in microseconds between going idle
2982 and entering the low power state (default 600).
2983 Requires EEE to be enabled - see "eee".
2984
2985 uart0 Set to "off" to disable uart0 (default "on")
2986
2987 + uart0_console Move the kernel boot console to UART0 on pins
2988 + 6, 8 and 10 of the 40-way header (2712 only,
2989 + default "off")
2990 +
2991 uart1 Set to "on" or "off" to enable or disable uart1
2992 (default varies)
2993
2994 watchdog Set to "on" to enable the hardware watchdog
2995 (default "off")
2996
2997 + wifiaddr Set an alternative WiFi MAC address.
2998 + The value should be a 6-byte hexadecimal value,
2999 + with or without colon separators, written in the
3000 + natural (big-endian) order.
3001 +
3002 act_led_trigger Choose which activity the LED tracks.
3003 Use "heartbeat" for a nice load indicator.
3004 (default "mmc")
3005 @@ -919,14 +960,16 @@ Params: 24db_digital_gain Allow ga
3006
3007
3008 Name: disable-bt
3009 -Info: Disable onboard Bluetooth on Pi 3B, 3B+, 3A+, 4B and Zero W, restoring
3010 - UART0/ttyAMA0 over GPIOs 14 & 15.
3011 - N.B. To disable the systemd service that initialises the modem so it
3012 - doesn't use the UART, use 'sudo systemctl disable hciuart'.
3013 +Info: Disable onboard Bluetooth on Bluetooth-capable Raspberry Pis. On Pis
3014 + prior to Pi 5 this restores UART0/ttyAMA0 over GPIOs 14 & 15.
3015 Load: dtoverlay=disable-bt
3016 Params: <None>
3017
3018
3019 +Name: disable-bt-pi5
3020 +Info: See disable-bt
3021 +
3022 +
3023 Name: disable-emmc2
3024 Info: Disable EMMC2 controller on BCM2711.
3025 The allows the onboard EMMC storage on Compute Module 4 to be disabled
3026 @@ -936,11 +979,15 @@ Params: <None>
3027
3028
3029 Name: disable-wifi
3030 -Info: Disable onboard WLAN on Pi 3B, 3B+, 3A+, 4B and Zero W.
3031 +Info: Disable onboard WLAN on WiFi-capable Raspberry Pis.
3032 Load: dtoverlay=disable-wifi
3033 Params: <None>
3034
3035
3036 +Name: disable-wifi-pi5
3037 +Info: See disable-wifi
3038 +
3039 +
3040 Name: dpi18
3041 Info: Overlay for a generic 18-bit DPI display
3042 This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output
3043 @@ -2233,6 +2280,15 @@ Info: Deprecated, legacy version of i2
3044 Load: <Deprecated>
3045
3046
3047 +Name: i2c0-pi5
3048 +Info: Enable i2c0 (Pi 5 only)
3049 +Load: dtoverlay=i2c0-pi5,<param>=<val>
3050 +Params: pins_0_1 Use GPIOs 0 and 1 (default)
3051 + pins_8_9 Use GPIOs 8 and 9
3052 + baudrate Set the baudrate for the interface (default
3053 + "100000")
3054 +
3055 +
3056 Name: i2c1
3057 Info: Change i2c1 pin usage. Not all pin combinations are usable on all
3058 platforms - platforms other then Compute Modules can only use this
3059 @@ -2249,6 +2305,24 @@ Info: Deprecated, legacy version of i2
3060 Load: <Deprecated>
3061
3062
3063 +Name: i2c1-pi5
3064 +Info: Enable i2c1 (Pi 5 only)
3065 +Load: dtoverlay=i2c1-pi5,<param>=<val>
3066 +Params: pins_2_3 Use GPIOs 2 and 3 (default)
3067 + pins_10_11 Use GPIOs 10 and 11
3068 + baudrate Set the baudrate for the interface (default
3069 + "100000")
3070 +
3071 +
3072 +Name: i2c2-pi5
3073 +Info: Enable i2c2 (Pi 5 only)
3074 +Load: dtoverlay=i2c2-pi5,<param>=<val>
3075 +Params: pins_4_5 Use GPIOs 4 and 5 (default)
3076 + pins_12_13 Use GPIOs 12 and 13
3077 + baudrate Set the baudrate for the interface (default
3078 + "100000")
3079 +
3080 +
3081 Name: i2c3
3082 Info: Enable the i2c3 bus. BCM2711 only.
3083 Load: dtoverlay=i2c3,<param>
3084 @@ -2258,6 +2332,16 @@ Params: pins_2_3 Use GPIO
3085 "100000")
3086
3087
3088 +Name: i2c3-pi5
3089 +Info: Enable i2c3 (Pi 5 only)
3090 +Load: dtoverlay=i2c3-pi5,<param>=<val>
3091 +Params: pins_6_7 Use GPIOs 6 and 7 (default)
3092 + pins_14_15 Use GPIOs 14 and 15
3093 + pins_22_23 Use GPIOs 22 and 23
3094 + baudrate Set the baudrate for the interface (default
3095 + "100000")
3096 +
3097 +
3098 Name: i2c4
3099 Info: Enable the i2c4 bus. BCM2711 only.
3100 Load: dtoverlay=i2c4,<param>
3101 @@ -2869,6 +2953,10 @@ Load: dtoverlay=midi-uart0
3102 Params: <None>
3103
3104
3105 +Name: midi-uart0-pi5
3106 +Info: See midi-uart0 (this is the Pi 5 version)
3107 +
3108 +
3109 Name: midi-uart1
3110 Info: Configures UART1 (ttyS0) so that a requested 38.4kbaud actually gets
3111 31.25kbaud, the frequency required for MIDI
3112 @@ -2876,29 +2964,45 @@ Load: dtoverlay=midi-uart1
3113 Params: <None>
3114
3115
3116 +Name: midi-uart1-pi5
3117 +Info: See midi-uart1 (this is the Pi 5 version)
3118 +
3119 +
3120 Name: midi-uart2
3121 -Info: Configures UART2 (ttyAMA1) so that a requested 38.4kbaud actually gets
3122 +Info: Configures UART2 (ttyAMA2) so that a requested 38.4kbaud actually gets
3123 31.25kbaud, the frequency required for MIDI
3124 Load: dtoverlay=midi-uart2
3125 Params: <None>
3126
3127
3128 +Name: midi-uart2-pi5
3129 +Info: See midi-uart2 (this is the Pi 5 version)
3130 +
3131 +
3132 Name: midi-uart3
3133 -Info: Configures UART3 (ttyAMA2) so that a requested 38.4kbaud actually gets
3134 +Info: Configures UART3 (ttyAMA3) so that a requested 38.4kbaud actually gets
3135 31.25kbaud, the frequency required for MIDI
3136 Load: dtoverlay=midi-uart3
3137 Params: <None>
3138
3139
3140 +Name: midi-uart3-pi5
3141 +Info: See midi-uart3 (this is the Pi 5 version)
3142 +
3143 +
3144 Name: midi-uart4
3145 -Info: Configures UART4 (ttyAMA3) so that a requested 38.4kbaud actually gets
3146 +Info: Configures UART4 (ttyAMA4) so that a requested 38.4kbaud actually gets
3147 31.25kbaud, the frequency required for MIDI
3148 Load: dtoverlay=midi-uart4
3149 Params: <None>
3150
3151
3152 +Name: midi-uart4-pi5
3153 +Info: See midi-uart4 (this is the Pi 5 version)
3154 +
3155 +
3156 Name: midi-uart5
3157 -Info: Configures UART5 (ttyAMA4) so that a requested 38.4kbaud actually gets
3158 +Info: Configures UART5 (ttyAMA5) so that a requested 38.4kbaud actually gets
3159 31.25kbaud, the frequency required for MIDI
3160 Load: dtoverlay=midi-uart5
3161 Params: <None>
3162 @@ -3921,105 +4025,131 @@ Name: spi1-1cs
3163 Info: Enables spi1 with a single chip select (CS) line and associated spidev
3164 dev node. The gpio pin number for the CS line and spidev device node
3165 creation are configurable.
3166 - N.B.: spi1 is only accessible on devices with a 40pin header, eg:
3167 - A+, B+, Zero and PI2 B; as well as the Compute Module.
3168 + N.B.: spi1 is not accessible on old Pis without a 40-pin header.
3169 Load: dtoverlay=spi1-1cs,<param>=<val>
3170 Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
3171 - cs0_spidev Set to 'disabled' to stop the creation of a
3172 + cs0_spidev Set to 'off' to stop the creation of a
3173 userspace device node /dev/spidev1.0 (default
3174 - is 'okay' or enabled).
3175 + is 'on' or enabled).
3176
3177
3178 Name: spi1-2cs
3179 Info: Enables spi1 with two chip select (CS) lines and associated spidev
3180 dev nodes. The gpio pin numbers for the CS lines and spidev device node
3181 creation are configurable.
3182 - N.B.: spi1 is only accessible on devices with a 40pin header, eg:
3183 - A+, B+, Zero and PI2 B; as well as the Compute Module.
3184 + N.B.: spi1 is not accessible on old Pis without a 40-pin header.
3185 Load: dtoverlay=spi1-2cs,<param>=<val>
3186 Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
3187 cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
3188 - cs0_spidev Set to 'disabled' to stop the creation of a
3189 + cs0_spidev Set to 'off' to stop the creation of a
3190 userspace device node /dev/spidev1.0 (default
3191 - is 'okay' or enabled).
3192 - cs1_spidev Set to 'disabled' to stop the creation of a
3193 + is 'on' or enabled).
3194 + cs1_spidev Set to 'off' to stop the creation of a
3195 userspace device node /dev/spidev1.1 (default
3196 - is 'okay' or enabled).
3197 + is 'on' or enabled).
3198
3199
3200 Name: spi1-3cs
3201 Info: Enables spi1 with three chip select (CS) lines and associated spidev
3202 dev nodes. The gpio pin numbers for the CS lines and spidev device node
3203 creation are configurable.
3204 - N.B.: spi1 is only accessible on devices with a 40pin header, eg:
3205 - A+, B+, Zero and PI2 B; as well as the Compute Module.
3206 + N.B.: spi1 is not accessible on old Pis without a 40-pin header.
3207 Load: dtoverlay=spi1-3cs,<param>=<val>
3208 Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
3209 cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
3210 cs2_pin GPIO pin for CS2 (default 16 - BCM SPI1_CE2).
3211 - cs0_spidev Set to 'disabled' to stop the creation of a
3212 + cs0_spidev Set to 'off' to stop the creation of a
3213 userspace device node /dev/spidev1.0 (default
3214 - is 'okay' or enabled).
3215 - cs1_spidev Set to 'disabled' to stop the creation of a
3216 + is 'on' or enabled).
3217 + cs1_spidev Set to 'off' to stop the creation of a
3218 userspace device node /dev/spidev1.1 (default
3219 - is 'okay' or enabled).
3220 - cs2_spidev Set to 'disabled' to stop the creation of a
3221 + is 'on' or enabled).
3222 + cs2_spidev Set to 'off' to stop the creation of a
3223 userspace device node /dev/spidev1.2 (default
3224 - is 'okay' or enabled).
3225 + is 'on' or enabled).
3226
3227
3228 Name: spi2-1cs
3229 -Info: Enables spi2 with a single chip select (CS) line and associated spidev
3230 - dev node. The gpio pin number for the CS line and spidev device node
3231 - creation are configurable.
3232 - N.B.: spi2 is only accessible with the Compute Module.
3233 +Info: Enables spi2 on GPIOs 40-42 with a single chip select (CS) line and
3234 + associated spidev dev node. The gpio pin number for the CS line and
3235 + spidev device node creation are configurable. spi2-2cs-pi5 is
3236 + substituted on a Pi 5.
3237 + N.B.: spi2 is only accessible with the Compute Module or Pi 5.
3238 Load: dtoverlay=spi2-1cs,<param>=<val>
3239 Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
3240 - cs0_spidev Set to 'disabled' to stop the creation of a
3241 + cs0_spidev Set to 'off' to stop the creation of a
3242 userspace device node /dev/spidev2.0 (default
3243 - is 'okay' or enabled).
3244 + is 'on' or enabled).
3245 +
3246 +
3247 +Name: spi2-1cs-pi5
3248 +Info: Enables spi2 on GPIOs 1-3 with a single chip select (CS) line and
3249 + associated spidev dev node. The gpio pin number for the CS line and
3250 + spidev device node creation are configurable. Pi 5 only.
3251 +Load: dtoverlay=spi2-1cs-pi5,<param>=<val>
3252 +Params: cs0_pin GPIO pin for CS0 (default 0).
3253 + cs0_spidev Set to 'off' to stop the creation of a
3254 + userspace device node /dev/spidev2.0 (default
3255 + is 'on' or enabled).
3256
3257
3258 Name: spi2-2cs
3259 -Info: Enables spi2 with two chip select (CS) lines and associated spidev
3260 - dev nodes. The gpio pin numbers for the CS lines and spidev device node
3261 - creation are configurable.
3262 - N.B.: spi2 is only accessible with the Compute Module.
3263 +Info: Enables spi2 on GPIOs 40-42 with two chip select (CS) lines and
3264 + associated spidev dev nodes. The gpio pin numbers for the CS lines and
3265 + spidev device node creation are configurable. spi2-2cs-pi5 is
3266 + substituted on a Pi 5.
3267 + N.B.: spi2 is only accessible with the Compute Module or Pi 5.
3268 Load: dtoverlay=spi2-2cs,<param>=<val>
3269 Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
3270 cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
3271 - cs0_spidev Set to 'disabled' to stop the creation of a
3272 + cs0_spidev Set to 'off' to stop the creation of a
3273 + userspace device node /dev/spidev2.0 (default
3274 + is 'on' or enabled).
3275 + cs1_spidev Set to 'off' to stop the creation of a
3276 + userspace device node /dev/spidev2.1 (default
3277 + is 'on' or enabled).
3278 +
3279 +
3280 +Name: spi2-2cs-pi5
3281 +Info: Enables spi2 on GPIOs 1-3 with two chip select (CS) lines and
3282 + associated spidev dev nodes. The gpio pin numbers for the CS lines and
3283 + spidev device node creation are configurable. Pi 5 only.
3284 +Load: dtoverlay=spi2-2cs-pi5,<param>=<val>
3285 +Params: cs0_pin GPIO pin for CS0 (default 0).
3286 + cs1_pin GPIO pin for CS1 (default 24).
3287 + cs0_spidev Set to 'off' to stop the creation of a
3288 userspace device node /dev/spidev2.0 (default
3289 - is 'okay' or enabled).
3290 - cs1_spidev Set to 'disabled' to stop the creation of a
3291 + is 'on' or enabled).
3292 + cs1_spidev Set to 'off' to stop the creation of a
3293 userspace device node /dev/spidev2.1 (default
3294 - is 'okay' or enabled).
3295 + is 'on' or enabled).
3296
3297
3298 Name: spi2-3cs
3299 -Info: Enables spi2 with three chip select (CS) lines and associated spidev
3300 - dev nodes. The gpio pin numbers for the CS lines and spidev device node
3301 - creation are configurable.
3302 - N.B.: spi2 is only accessible with the Compute Module.
3303 +Info: Enables spi2 on GPIOs 40-42 with three chip select (CS) lines and
3304 + associated spidev dev nodes. The gpio pin numbers for the CS lines and
3305 + spidev device node creation are configurable.
3306 + N.B.: spi2 is only accessible with the Compute Module or Pi 5.
3307 Load: dtoverlay=spi2-3cs,<param>=<val>
3308 Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
3309 cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
3310 cs2_pin GPIO pin for CS2 (default 45 - BCM SPI2_CE2).
3311 - cs0_spidev Set to 'disabled' to stop the creation of a
3312 + cs0_spidev Set to 'off' to stop the creation of a
3313 userspace device node /dev/spidev2.0 (default
3314 - is 'okay' or enabled).
3315 - cs1_spidev Set to 'disabled' to stop the creation of a
3316 + is 'on' or enabled).
3317 + cs1_spidev Set to 'off' to stop the creation of a
3318 userspace device node /dev/spidev2.1 (default
3319 - is 'okay' or enabled).
3320 - cs2_spidev Set to 'disabled' to stop the creation of a
3321 + is 'on' or enabled).
3322 + cs2_spidev Set to 'off' to stop the creation of a
3323 userspace device node /dev/spidev2.2 (default
3324 - is 'okay' or enabled).
3325 + is 'on' or enabled).
3326
3327
3328 Name: spi3-1cs
3329 -Info: Enables spi3 with a single chip select (CS) line and associated spidev
3330 - dev node. The gpio pin number for the CS line and spidev device node
3331 - creation are configurable. BCM2711 only.
3332 +Info: Enables spi3 on GPIOs 1-3 with a single chip select (CS) line and
3333 + associated spidev dev node. The gpio pin number for the CS line and
3334 + spidev device node creation are configurable. BCM2711 only,
3335 + spi3-1cs-pi5 is substituted on Pi 5.
3336 Load: dtoverlay=spi3-1cs,<param>=<val>
3337 Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
3338 cs0_spidev Set to 'off' to prevent the creation of a
3339 @@ -4027,10 +4157,22 @@ Params: cs0_pin GPIO pin
3340 is 'on' or enabled).
3341
3342
3343 +Name: spi3-1cs-pi5
3344 +Info: Enables spi3 on GPIOs 5-7 with a single chip select (CS) line and
3345 + associated spidev dev node. The gpio pin number for the CS line and
3346 + spidev device node creation are configurable. Pi 5 only.
3347 +Load: dtoverlay=spi3-1cs-pi5,<param>=<val>
3348 +Params: cs0_pin GPIO pin for CS0 (default 4).
3349 + cs0_spidev Set to 'off' to prevent the creation of a
3350 + userspace device node /dev/spidev3.0 (default
3351 + is 'on' or enabled).
3352 +
3353 +
3354 Name: spi3-2cs
3355 -Info: Enables spi3 with two chip select (CS) lines and associated spidev
3356 - dev nodes. The gpio pin numbers for the CS lines and spidev device node
3357 - creation are configurable. BCM2711 only.
3358 +Info: Enables spi3 on GPIO2 1-3 with two chip select (CS) lines and
3359 + associated spidev dev nodes. The gpio pin numbers for the CS lines and
3360 + spidev device node creation are configurable. BCM2711 only,
3361 + spi3-2cs-pi5 is substituted on Pi 5.
3362 Load: dtoverlay=spi3-2cs,<param>=<val>
3363 Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
3364 cs1_pin GPIO pin for CS1 (default 24 - BCM SPI3_CE1).
3365 @@ -4042,10 +4184,25 @@ Params: cs0_pin GPIO pin
3366 is 'on' or enabled).
3367
3368
3369 +Name: spi3-2cs-pi5
3370 +Info: Enables spi3 on GPIOs 5-7 with two chip select (CS) lines and
3371 + associated spidev dev nodes. The gpio pin numbers for the CS lines and
3372 + spidev device node creation are configurable. Pi 5 only.
3373 +Load: dtoverlay=spi3-2cs-pi5,<param>=<val>
3374 +Params: cs0_pin GPIO pin for CS0 (default 4).
3375 + cs1_pin GPIO pin for CS1 (default 25).
3376 + cs0_spidev Set to 'off' to prevent the creation of a
3377 + userspace device node /dev/spidev3.0 (default
3378 + is 'on' or enabled).
3379 + cs1_spidev Set to 'off' to prevent the creation of a
3380 + userspace device node /dev/spidev3.1 (default
3381 + is 'on' or enabled).
3382 +
3383 +
3384 Name: spi4-1cs
3385 -Info: Enables spi4 with a single chip select (CS) line and associated spidev
3386 - dev node. The gpio pin number for the CS line and spidev device node
3387 - creation are configurable. BCM2711 only.
3388 +Info: Enables spi4 on GPIOs 5-7 with a single chip select (CS) line and
3389 + associated spidev dev node. The gpio pin number for the CS line and
3390 + spidev device node creation are configurable. BCM2711 only.
3391 Load: dtoverlay=spi4-1cs,<param>=<val>
3392 Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
3393 cs0_spidev Set to 'off' to prevent the creation of a
3394 @@ -4054,9 +4211,9 @@ Params: cs0_pin GPIO pin
3395
3396
3397 Name: spi4-2cs
3398 -Info: Enables spi4 with two chip select (CS) lines and associated spidev
3399 - dev nodes. The gpio pin numbers for the CS lines and spidev device node
3400 - creation are configurable. BCM2711 only.
3401 +Info: Enables spi4 on GPIOs 5-6 with two chip select (CS) lines and
3402 + associated spidev dev nodes. The gpio pin numbers for the CS lines and
3403 + spidev device node creation are configurable. BCM2711 only.
3404 Load: dtoverlay=spi4-2cs,<param>=<val>
3405 Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
3406 cs1_pin GPIO pin for CS1 (default 25 - BCM SPI4_CE1).
3407 @@ -4069,23 +4226,27 @@ Params: cs0_pin GPIO pin
3408
3409
3410 Name: spi5-1cs
3411 -Info: Enables spi5 with a single chip select (CS) line and associated spidev
3412 - dev node. The gpio pin numbers for the CS lines and spidev device node
3413 - creation are configurable. BCM2711 only.
3414 +Info: Enables spi5 on GPIOs 13-15 with a single chip select (CS) line and
3415 + associated spidev dev node. The gpio pin numbers for the CS lines and
3416 + spidev device node creation are configurable. BCM2711 and Pi 5.
3417 Load: dtoverlay=spi5-1cs,<param>=<val>
3418 -Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
3419 +Params: cs0_pin GPIO pin for CS0 (default 12).
3420 cs0_spidev Set to 'off' to prevent the creation of a
3421 userspace device node /dev/spidev5.0 (default
3422 is 'on' or enabled).
3423
3424
3425 +Name: spi5-1cs-pi5
3426 +Info: See spi5-1cs
3427 +
3428 +
3429 Name: spi5-2cs
3430 -Info: Enables spi5 with two chip select (CS) lines and associated spidev
3431 - dev nodes. The gpio pin numbers for the CS lines and spidev device node
3432 - creation are configurable. BCM2711 only.
3433 +Info: Enables spi5 on GPIOs 13-15 with two chip select (CS) lines and
3434 + associated spidev dev nodes. The gpio pin numbers for the CS lines and
3435 + spidev device node creation are configurable. BCM2711 and Pi 5.
3436 Load: dtoverlay=spi5-2cs,<param>=<val>
3437 -Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
3438 - cs1_pin GPIO pin for CS1 (default 26 - BCM SPI5_CE1).
3439 +Params: cs0_pin GPIO pin for CS0 (default 12).
3440 + cs1_pin GPIO pin for CS1 (default 26).
3441 cs0_spidev Set to 'off' to prevent the creation of a
3442 userspace device node /dev/spidev5.0 (default
3443 is 'on' or enabled).
3444 @@ -4094,6 +4255,10 @@ Params: cs0_pin GPIO pin
3445 is 'on' or enabled).
3446
3447
3448 +Name: spi5-2cs-pi5
3449 +Info: See spi5-2cs
3450 +
3451 +
3452 Name: spi6-1cs
3453 Info: Enables spi6 with a single chip select (CS) line and associated spidev
3454 dev node. The gpio pin number for the CS line and spidev device node
3455 @@ -4296,6 +4461,12 @@ Params: txd0_pin GPIO pin
3456 7(Alt3) for 32&33, 6(Alt2) for 36&37
3457
3458
3459 +Name: uart0-pi5
3460 +Info: Enable uart 0 on GPIOs 14-15. Pi 5 only.
3461 +Load: dtoverlay=uart0-pi5,<param>
3462 +Params: ctsrts Enable CTS/RTS on GPIOs 16-17 (default off)
3463 +
3464 +
3465 Name: uart1
3466 Info: Change the pin usage of uart1
3467 Load: dtoverlay=uart1,<param>=<val>
3468 @@ -4304,24 +4475,48 @@ Params: txd1_pin GPIO pin
3469 rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
3470
3471
3472 +Name: uart1-pi5
3473 +Info: Enable uart 1 on GPIOs 0-1. Pi 5 only.
3474 +Load: dtoverlay=uart1-pi5,<param>
3475 +Params: ctsrts Enable CTS/RTS on GPIOs 2-3 (default off)
3476 +
3477 +
3478 Name: uart2
3479 Info: Enable uart 2 on GPIOs 0-3. BCM2711 only.
3480 Load: dtoverlay=uart2,<param>
3481 Params: ctsrts Enable CTS/RTS on GPIOs 2-3 (default off)
3482
3483
3484 +Name: uart2-pi5
3485 +Info: Enable uart 2 on GPIOs 4-5. Pi 5 only.
3486 +Load: dtoverlay=uart2-pi5,<param>
3487 +Params: ctsrts Enable CTS/RTS on GPIOs 6-7 (default off)
3488 +
3489 +
3490 Name: uart3
3491 Info: Enable uart 3 on GPIOs 4-7. BCM2711 only.
3492 Load: dtoverlay=uart3,<param>
3493 Params: ctsrts Enable CTS/RTS on GPIOs 6-7 (default off)
3494
3495
3496 +Name: uart3-pi5
3497 +Info: Enable uart 3 on GPIOs 8-9. Pi 5 only.
3498 +Load: dtoverlay=uart3-pi5,<param>
3499 +Params: ctsrts Enable CTS/RTS on GPIOs 10-11 (default off)
3500 +
3501 +
3502 Name: uart4
3503 Info: Enable uart 4 on GPIOs 8-11. BCM2711 only.
3504 Load: dtoverlay=uart4,<param>
3505 Params: ctsrts Enable CTS/RTS on GPIOs 10-11 (default off)
3506
3507
3508 +Name: uart4-pi5
3509 +Info: Enable uart 4 on GPIOs 12-13. Pi 5 only.
3510 +Load: dtoverlay=uart4-pi5,<param>
3511 +Params: ctsrts Enable CTS/RTS on GPIOs 14-15 (default off)
3512 +
3513 +
3514 Name: uart5
3515 Info: Enable uart 5 on GPIOs 12-15. BCM2711 only.
3516 Load: dtoverlay=uart5,<param>
3517 @@ -4530,6 +4725,8 @@ Params: sizex Touchscr
3518 invy Touchscreen inverted y axis
3519 swapxy Touchscreen swapped x y axis
3520 disable_touch Disables the touch screen overlay driver
3521 + dsi0 Use DSI0 and i2c_csi_dsi0 (rather than
3522 + the default DSI1 and i2c_csi_dsi).
3523
3524
3525 Name: vc4-kms-dsi-lt070me05000
3526 @@ -4579,6 +4776,8 @@ Params: 2_8_inch 2.8" 480
3527 invx Touchscreen inverted x axis
3528 invy Touchscreen inverted y axis
3529 swapxy Touchscreen swapped x y axis
3530 + dsi0 Use DSI0 and i2c_csi_dsi0 (rather than
3531 + the default DSI1 and i2c_csi_dsi).
3532
3533
3534 Name: vc4-kms-kippah-7inch
3535 @@ -4633,6 +4832,9 @@ Params: cma-512 CMA is 5
3536 nohdmi1 Disable HDMI 1 output
3537
3538
3539 +Name: vc4-kms-v3d-pi5
3540 +Info: See vc4-kms-v3d-pi4 (this is the Pi 5 version)
3541 +
3542
3543 Name: vc4-kms-vga666
3544 Info: Enable the VGA666 (resistor ladder ADC) for the vc4-kms-v3d driver.
3545 --- a/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
3546 +++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
3547 @@ -23,7 +23,7 @@
3548 };
3549
3550 fragment@1 {
3551 - target = <&i2s>;
3552 + target = <&i2s_clk_consumer>;
3553 __overlay__ {
3554 status = "okay";
3555 };
3556 @@ -33,7 +33,7 @@
3557 target = <&sound>;
3558 __overlay__ {
3559 compatible = "adi,adau1977-adc";
3560 - i2s-controller = <&i2s>;
3561 + i2s-controller = <&i2s_clk_consumer>;
3562 status = "okay";
3563 };
3564 };
3565 --- a/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
3566 +++ b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
3567 @@ -5,7 +5,7 @@
3568 compatible = "brcm,bcm2835";
3569
3570 fragment@0 {
3571 - target = <&i2s>;
3572 + target = <&i2s_clk_producer>;
3573 __overlay__ {
3574 status = "okay";
3575 };
3576 @@ -37,7 +37,7 @@
3577 "PDM_DAT", "Microphone Jack";
3578 status = "okay";
3579 simple-audio-card,cpu {
3580 - sound-dai = <&i2s>;
3581 + sound-dai = <&i2s_clk_producer>;
3582 };
3583 dailink0_slave: simple-audio-card,codec {
3584 sound-dai = <&adau7002_codec>;
3585 --- a/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
3586 +++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
3587 @@ -6,7 +6,7 @@
3588 compatible = "brcm,bcm2835";
3589
3590 fragment@0 {
3591 - target = <&i2s>;
3592 + target = <&i2s_clk_producer>;
3593 __overlay__ {
3594 status = "okay";
3595 };
3596 @@ -38,7 +38,7 @@
3597 card_name = "Akkordion";
3598 dai_name = "IQaudIO DAC";
3599 dai_stream_name = "IQaudIO DAC HiFi";
3600 - i2s-controller = <&i2s>;
3601 + i2s-controller = <&i2s_clk_producer>;
3602 status = "okay";
3603 };
3604 };
3605 --- a/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
3606 +++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
3607 @@ -18,8 +18,8 @@
3608 };
3609 };
3610
3611 - fragment@1 {
3612 - target = <&i2s>;
3613 + frag1: fragment@1 {
3614 + target = <&i2s_clk_consumer>;
3615 __overlay__ {
3616 status = "okay";
3617 };
3618 @@ -46,7 +46,7 @@
3619 target = <&sound>;
3620 boss_dac: __overlay__ {
3621 compatible = "allo,boss-dac";
3622 - i2s-controller = <&i2s>;
3623 + i2s-controller = <&i2s_clk_consumer>;
3624 mute-gpios = <&gpio 6 1>;
3625 status = "okay";
3626 };
3627 @@ -54,6 +54,8 @@
3628
3629 __overrides__ {
3630 24db_digital_gain = <&boss_dac>,"allo,24db_digital_gain?";
3631 - slave = <&boss_dac>,"allo,slave?";
3632 + slave = <&boss_dac>,"allo,slave?",
3633 + <&frag1>,"target:0=",<&i2s_clk_producer>,
3634 + <&boss_dac>,"i2s-controller:0=",<&i2s_clk_producer>;
3635 };
3636 };
3637 --- a/arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts
3638 +++ b/arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts
3639 @@ -8,7 +8,7 @@
3640 compatible = "brcm,bcm2835";
3641
3642 fragment@0 {
3643 - target = <&i2s>;
3644 + target = <&i2s_clk_consumer>;
3645 __overlay__ {
3646 #sound-dai-cells = <0>;
3647 status = "okay";
3648 --- a/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
3649 +++ b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
3650 @@ -6,7 +6,7 @@
3651 compatible = "brcm,bcm2835";
3652
3653 fragment@0 {
3654 - target = <&i2s>;
3655 + target = <&i2s_clk_consumer>;
3656 __overlay__ {
3657 status = "okay";
3658 };
3659 @@ -35,7 +35,7 @@
3660 target = <&sound>;
3661 __overlay__ {
3662 compatible = "allo,allo-digione";
3663 - i2s-controller = <&i2s>;
3664 + i2s-controller = <&i2s_clk_consumer>;
3665 status = "okay";
3666 clock44-gpio = <&gpio 5 0>;
3667 clock48-gpio = <&gpio 6 0>;
3668 --- a/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
3669 +++ b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
3670 @@ -9,7 +9,7 @@
3671 compatible = "brcm,bcm2835";
3672
3673 fragment@0 {
3674 - target = <&i2s>;
3675 + target = <&i2s_clk_consumer>;
3676 __overlay__ {
3677 #sound-dai-cells = <0>;
3678 status = "okay";
3679 --- a/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
3680 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
3681 @@ -16,7 +16,7 @@
3682 compatible = "brcm,bcm2835";
3683
3684 fragment@0 {
3685 - target = <&i2s>;
3686 + target = <&i2s_clk_producer>;
3687 __overlay__ {
3688 status = "okay";
3689 };
3690 @@ -42,7 +42,7 @@
3691 target = <&sound>;
3692 piano_dac: __overlay__ {
3693 compatible = "allo,piano-dac";
3694 - i2s-controller = <&i2s>;
3695 + i2s-controller = <&i2s_clk_producer>;
3696 status = "okay";
3697 };
3698 };
3699 --- a/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
3700 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
3701 @@ -6,7 +6,7 @@
3702 compatible = "brcm,bcm2835";
3703
3704 fragment@0 {
3705 - target = <&i2s>;
3706 + target = <&i2s_clk_producer>;
3707 __overlay__ {
3708 status = "okay";
3709 };
3710 @@ -41,7 +41,7 @@
3711 piano_dac: __overlay__ {
3712 compatible = "allo,piano-dac-plus";
3713 audio-codec = <&allo_pcm5122_4c &allo_pcm5122_4d>;
3714 - i2s-controller = <&i2s>;
3715 + i2s-controller = <&i2s_clk_producer>;
3716 mute1-gpios = <&gpio 6 1>;
3717 mute2-gpios = <&gpio 25 1>;
3718 status = "okay";
3719 --- a/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
3720 +++ b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
3721 @@ -16,7 +16,7 @@
3722 format = "i2s";
3723
3724 p_cpu_dai: cpu {
3725 - sound-dai = <&i2s>;
3726 + sound-dai = <&i2s_clk_producer>;
3727 dai-tdm-slot-num = <2>;
3728 dai-tdm-slot-width = <32>;
3729 };
3730 @@ -40,7 +40,7 @@
3731 };
3732
3733 fragment@2 {
3734 - target = <&i2s>;
3735 + target = <&i2s_clk_producer>;
3736 __overlay__ {
3737 #sound-dai-cells = <0>;
3738 status = "okay";
3739 --- a/arch/arm/boot/dts/overlays/arducam-64mp-overlay.dts
3740 +++ b/arch/arm/boot/dts/overlays/arducam-64mp-overlay.dts
3741 @@ -67,7 +67,7 @@
3742 rotation = <&cam_node>,"rotation:0";
3743 orientation = <&cam_node>,"orientation:0";
3744 media-controller = <&csi>,"brcm,media-controller?";
3745 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
3746 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
3747 <&csi_frag>, "target:0=",<&csi0>,
3748 <&clk_frag>, "target:0=",<&cam0_clk>,
3749 <&cam_node>, "clocks:0=",<&cam0_clk>,
3750 --- a/arch/arm/boot/dts/overlays/arducam-pivariety-overlay.dts
3751 +++ b/arch/arm/boot/dts/overlays/arducam-pivariety-overlay.dts
3752 @@ -85,7 +85,7 @@
3753 rotation = <&arducam_pivariety>,"rotation:0";
3754 orientation = <&arducam_pivariety>,"orientation:0";
3755 media-controller = <&csi>,"brcm,media-controller?";
3756 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
3757 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
3758 <&csi_frag>, "target:0=",<&csi0>,
3759 <&clk_frag>, "target:0=",<&cam0_clk>,
3760 <&arducam_pivariety>, "clocks:0=",<&cam0_clk>,
3761 --- a/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
3762 +++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
3763 @@ -6,7 +6,7 @@
3764 compatible = "brcm,bcm2835";
3765
3766 fragment@0 {
3767 - target = <&i2s>;
3768 + target = <&i2s_clk_producer>;
3769 __overlay__ {
3770 status = "okay";
3771 };
3772 @@ -48,7 +48,7 @@
3773 mult-gpios = <&gpio 27 0>, <&gpio 22 0>, <&gpio 23 0>,
3774 <&gpio 24 0>;
3775 reset-gpios = <&gpio 5 0>;
3776 - i2s-controller = <&i2s>;
3777 + i2s-controller = <&i2s_clk_producer>;
3778 codec = <&cs42448>;
3779 status = "okay";
3780 };
3781 --- a/arch/arm/boot/dts/overlays/audioinjector-bare-i2s-overlay.dts
3782 +++ b/arch/arm/boot/dts/overlays/audioinjector-bare-i2s-overlay.dts
3783 @@ -6,7 +6,7 @@
3784 compatible = "brcm,bcm2835";
3785
3786 fragment@0 {
3787 - target = <&i2s>;
3788 + target = <&i2s_clk_producer>;
3789 __overlay__ {
3790 status = "okay";
3791 };
3792 @@ -27,7 +27,7 @@
3793 target = <&sound>;
3794 __overlay__ {
3795 compatible = "simple-audio-card";
3796 - i2s-controller = <&i2s>;
3797 + i2s-controller = <&i2s_clk_producer>;
3798 status = "okay";
3799
3800 simple-audio-card,name = "audioinjector-bare";
3801 @@ -37,7 +37,7 @@
3802 simple-audio-card,frame-master = <&dailink0_master>;
3803
3804 dailink0_master: simple-audio-card,cpu {
3805 - sound-dai = <&i2s>;
3806 + sound-dai = <&i2s_clk_producer>;
3807 dai-tdm-slot-num = <2>;
3808 dai-tdm-slot-width = <32>;
3809 };
3810 --- a/arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts
3811 +++ b/arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts
3812 @@ -6,7 +6,7 @@
3813 compatible = "brcm,bcm2835";
3814
3815 fragment@0 {
3816 - target = <&i2s>;
3817 + target = <&i2s_clk_consumer>;
3818 __overlay__ {
3819 status = "okay";
3820 };
3821 @@ -47,7 +47,7 @@
3822 snd: __overlay__ {
3823 compatible = "ai,audioinjector-isolated-soundcard";
3824 mute-gpios = <&gpio 17 0>;
3825 - i2s-controller = <&i2s>;
3826 + i2s-controller = <&i2s_clk_consumer>;
3827 codec = <&cs4272>;
3828 status = "okay";
3829 };
3830 --- a/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
3831 +++ b/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
3832 @@ -6,7 +6,7 @@
3833 compatible = "brcm,bcm2835";
3834
3835 fragment@0 {
3836 - target = <&i2s>;
3837 + target = <&i2s_clk_consumer>;
3838 __overlay__ {
3839 status = "okay";
3840 };
3841 @@ -33,7 +33,7 @@
3842 target = <&sound>;
3843 __overlay__ {
3844 compatible = "simple-audio-card";
3845 - i2s-controller = <&i2s>;
3846 + i2s-controller = <&i2s_clk_consumer>;
3847 status = "okay";
3848
3849 simple-audio-card,name = "audioinjector-ultra";
3850 @@ -57,7 +57,7 @@
3851 simple-audio-card,frame-master = <&sound_master>;
3852
3853 simple-audio-card,cpu {
3854 - sound-dai = <&i2s>;
3855 + sound-dai = <&i2s_clk_consumer>;
3856 dai-tdm-slot-num = <2>;
3857 dai-tdm-slot-width = <32>;
3858 };
3859 --- a/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
3860 +++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
3861 @@ -6,7 +6,7 @@
3862 compatible = "brcm,bcm2835";
3863
3864 fragment@0 {
3865 - target = <&i2s>;
3866 + target = <&i2s_clk_consumer>;
3867 __overlay__ {
3868 status = "okay";
3869 };
3870 @@ -32,7 +32,7 @@
3871 target = <&sound>;
3872 __overlay__ {
3873 compatible = "ai,audioinjector-pi-soundcard";
3874 - i2s-controller = <&i2s>;
3875 + i2s-controller = <&i2s_clk_consumer>;
3876 status = "okay";
3877 };
3878 };
3879 --- a/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
3880 +++ b/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
3881 @@ -8,7 +8,7 @@
3882 compatible = "brcm,bcm2835";
3883
3884 fragment@0 {
3885 - target = <&i2s>;
3886 + target = <&i2s_clk_consumer>;
3887 __overlay__ {
3888 status = "okay";
3889 };
3890 @@ -75,7 +75,7 @@
3891 target = <&sound>;
3892 __overlay__ {
3893 compatible = "as,audiosense-pi";
3894 - i2s-controller = <&i2s>;
3895 + i2s-controller = <&i2s_clk_consumer>;
3896 status = "okay";
3897 };
3898 };
3899 --- a/arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts
3900 +++ b/arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts
3901 @@ -9,7 +9,7 @@
3902 compatible = "brcm,bcm2835";
3903
3904 fragment@0 {
3905 - target = <&i2s>;
3906 + target = <&i2s_clk_consumer>;
3907 __overlay__ {
3908 status = "okay";
3909 };
3910 @@ -32,7 +32,7 @@
3911 target = <&sound>;
3912 __overlay__ {
3913 compatible = "chipdip,chipdip-dac";
3914 - i2s-controller = <&i2s>;
3915 + i2s-controller = <&i2s_clk_consumer>;
3916 sr0-gpios = <&gpio 5 0>;
3917 sr1-gpios = <&gpio 6 0>;
3918 sr2-gpios = <&gpio 12 0>;
3919 --- a/arch/arm/boot/dts/overlays/cirrus-wm5102-overlay.dts
3920 +++ b/arch/arm/boot/dts/overlays/cirrus-wm5102-overlay.dts
3921 @@ -9,7 +9,7 @@
3922 compatible = "brcm,bcm2835";
3923
3924 fragment@0 {
3925 - target = <&i2s>;
3926 + target = <&i2s_clk_consumer>;
3927 __overlay__ {
3928 status = "okay";
3929 };
3930 @@ -165,7 +165,7 @@
3931 target = <&sound>;
3932 __overlay__ {
3933 compatible = "wlf,rpi-cirrus";
3934 - i2s-controller = <&i2s>;
3935 + i2s-controller = <&i2s_clk_consumer>;
3936 status = "okay";
3937 };
3938 };
3939 --- a/arch/arm/boot/dts/overlays/dacberry400-overlay.dts
3940 +++ b/arch/arm/boot/dts/overlays/dacberry400-overlay.dts
3941 @@ -5,7 +5,7 @@
3942 compatible = "brcm,bcm2835";
3943
3944 fragment@0 {
3945 - target = <&i2s>;
3946 + target = <&i2s_clk_producer>;
3947 __overlay__ {
3948 status = "okay";
3949 };
3950 @@ -62,7 +62,7 @@
3951 target = <&sound>;
3952 __overlay__ {
3953 compatible = "osaelectronics,dacberry400";
3954 - i2s-controller = <&i2s>;
3955 + i2s-controller = <&i2s_clk_producer>;
3956 status = "okay";
3957 };
3958 };
3959 --- a/arch/arm/boot/dts/overlays/dionaudio-kiwi-overlay.dts
3960 +++ b/arch/arm/boot/dts/overlays/dionaudio-kiwi-overlay.dts
3961 @@ -11,7 +11,7 @@
3962 compatible = "brcm,bcm2835";
3963
3964 fragment@0 {
3965 - target = <&i2s>;
3966 + target = <&i2s_clk_producer>;
3967 __overlay__ {
3968 status = "okay";
3969 };
3970 @@ -32,7 +32,7 @@
3971 target = <&sound>;
3972 __overlay__ {
3973 compatible = "dionaudio,dionaudio-kiwi";
3974 - i2s-controller = <&i2s>;
3975 + i2s-controller = <&i2s_clk_producer>;
3976 status = "okay";
3977 };
3978 };
3979 --- a/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
3980 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
3981 @@ -11,7 +11,7 @@
3982 compatible = "brcm,bcm2835";
3983
3984 fragment@0 {
3985 - target = <&i2s>;
3986 + target = <&i2s_clk_producer>;
3987 __overlay__ {
3988 status = "okay";
3989 };
3990 @@ -32,7 +32,7 @@
3991 target = <&sound>;
3992 __overlay__ {
3993 compatible = "dionaudio,loco-pcm5242-tpa3118";
3994 - i2s-controller = <&i2s>;
3995 + i2s-controller = <&i2s_clk_producer>;
3996 status = "okay";
3997 };
3998 };
3999 --- a/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
4000 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
4001 @@ -15,13 +15,13 @@
4002 target = <&sound>;
4003 frag0: __overlay__ {
4004 compatible = "dionaudio,dionaudio-loco-v2";
4005 - i2s-controller = <&i2s>;
4006 + i2s-controller = <&i2s_clk_producer>;
4007 status = "okay";
4008 };
4009 };
4010
4011 fragment@1 {
4012 - target = <&i2s>;
4013 + target = <&i2s_clk_producer>;
4014 __overlay__ {
4015 status = "okay";
4016 };
4017 --- /dev/null
4018 +++ b/arch/arm/boot/dts/overlays/disable-bt-pi5-overlay.dts
4019 @@ -0,0 +1,17 @@
4020 +/dts-v1/;
4021 +/plugin/;
4022 +
4023 +/* Disable Bluetooth */
4024 +
4025 +#include <dt-bindings/gpio/gpio.h>
4026 +
4027 +/{
4028 + compatible = "brcm,bcm2712";
4029 +
4030 + fragment@0 {
4031 + target = <&bluetooth>;
4032 + __overlay__ {
4033 + status = "disabled";
4034 + };
4035 + };
4036 +};
4037 --- /dev/null
4038 +++ b/arch/arm/boot/dts/overlays/disable-wifi-pi5-overlay.dts
4039 @@ -0,0 +1,13 @@
4040 +/dts-v1/;
4041 +/plugin/;
4042 +
4043 +/{
4044 + compatible = "brcm,bcm2712";
4045 +
4046 + fragment@0 {
4047 + target = <&sdio2>;
4048 + __overlay__ {
4049 + status = "disabled";
4050 + };
4051 + };
4052 +};
4053 --- a/arch/arm/boot/dts/overlays/draws-overlay.dts
4054 +++ b/arch/arm/boot/dts/overlays/draws-overlay.dts
4055 @@ -9,7 +9,7 @@
4056 / {
4057 compatible = "brcm,bcm2835";
4058 fragment@0 {
4059 - target = <&i2s>;
4060 + target = <&i2s_clk_producer>;
4061 __overlay__ {
4062 status = "okay";
4063 };
4064 @@ -131,7 +131,7 @@
4065 target = <&sound>;
4066 snd: __overlay__ {
4067 compatible = "simple-audio-card";
4068 - i2s-controller = <&i2s>;
4069 + i2s-controller = <&i2s_clk_producer>;
4070 status = "okay";
4071
4072 simple-audio-card,name = "draws";
4073 @@ -153,7 +153,7 @@
4074 "Line Out", "LOL";
4075
4076 dailink0_master: simple-audio-card,cpu {
4077 - sound-dai = <&i2s>;
4078 + sound-dai = <&i2s_clk_producer>;
4079 };
4080
4081 simple-audio-card,codec {
4082 --- a/arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts
4083 +++ b/arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts
4084 @@ -25,21 +25,21 @@
4085 };
4086
4087 __overrides__ {
4088 - i2c0 = <&frag13>,"target:0=",<&i2c0>;
4089 - i2c1 = <&frag13>, "target?=0",
4090 - <&frag13>, "target-path=i2c1",
4091 + i2c0 = <&ts_i2c_frag>,"target:0=",<&i2c0>;
4092 + i2c1 = <&ts_i2c_frag>, "target?=0",
4093 + <&ts_i2c_frag>, "target-path=i2c1",
4094 <0>,"-0-1";
4095 - i2c3 = <&frag13>, "target?=0",
4096 - <&frag13>, "target-path=i2c3",
4097 + i2c3 = <&ts_i2c_frag>, "target?=0",
4098 + <&ts_i2c_frag>, "target-path=i2c3",
4099 <0>,"-0-1";
4100 - i2c4 = <&frag13>, "target?=0",
4101 - <&frag13>, "target-path=i2c4",
4102 + i2c4 = <&ts_i2c_frag>, "target?=0",
4103 + <&ts_i2c_frag>, "target-path=i2c4",
4104 <0>,"-0-1";
4105 - i2c5 = <&frag13>, "target?=0",
4106 - <&frag13>, "target-path=i2c5",
4107 + i2c5 = <&ts_i2c_frag>, "target?=0",
4108 + <&ts_i2c_frag>, "target-path=i2c5",
4109 <0>,"-0-1";
4110 - i2c6 = <&frag13>, "target?=0",
4111 - <&frag13>, "target-path=i2c6",
4112 + i2c6 = <&ts_i2c_frag>, "target?=0",
4113 + <&ts_i2c_frag>, "target-path=i2c6",
4114 <0>,"-0-1";
4115 addr = <&ft5406>,"reg:0";
4116 };
4117 --- a/arch/arm/boot/dts/overlays/edt-ft5406.dtsi
4118 +++ b/arch/arm/boot/dts/overlays/edt-ft5406.dtsi
4119 @@ -37,7 +37,7 @@
4120 };
4121 };
4122
4123 - frag13: fragment@13 {
4124 + ts_i2c_frag: fragment@13 {
4125 target = <&i2c_csi_dsi>;
4126 i2cbus: __overlay__ {
4127 status = "okay";
4128 --- a/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
4129 +++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
4130 @@ -53,7 +53,7 @@
4131 };
4132
4133 fragment@3 {
4134 - target = <&i2s>;
4135 + target = <&i2s_clk_consumer>;
4136 __overlay__ {
4137 status = "okay";
4138 };
4139 @@ -63,7 +63,7 @@
4140 target = <&sound>;
4141 __overlay__ {
4142 compatible = "fe-pi,fe-pi-audio";
4143 - i2s-controller = <&i2s>;
4144 + i2s-controller = <&i2s_clk_consumer>;
4145 status = "okay";
4146 };
4147 };
4148 --- a/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts
4149 +++ b/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts
4150 @@ -14,7 +14,7 @@
4151 compatible = "brcm,bcm2835";
4152
4153 fragment@0 {
4154 - target = <&i2s>;
4155 + target = <&i2s_clk_producer>;
4156 __overlay__ {
4157 status = "okay";
4158 };
4159 @@ -43,7 +43,7 @@
4160 target = <&sound>;
4161 iqaudio_dac: __overlay__ {
4162 compatible = "iqaudio,iqaudio-dac";
4163 - i2s-controller = <&i2s>;
4164 + i2s-controller = <&i2s_clk_producer>;
4165 mute-gpios = <&amp 0 0>;
4166 iqaudio-dac,auto-mute-amp;
4167 status = "okay";
4168 --- a/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
4169 +++ b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
4170 @@ -6,7 +6,7 @@
4171 compatible = "brcm,bcm2835";
4172
4173 fragment@0 {
4174 - target = <&i2s>;
4175 + target = <&i2s_clk_producer>;
4176 __overlay__ {
4177 status = "okay";
4178 };
4179 @@ -42,7 +42,7 @@
4180 target = <&sound>;
4181 __overlay__ {
4182 compatible = "googlevoicehat,googlevoicehat-soundcard";
4183 - i2s-controller = <&i2s>;
4184 + i2s-controller = <&i2s_clk_producer>;
4185 status = "okay";
4186 };
4187 };
4188 --- a/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
4189 +++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
4190 @@ -6,7 +6,7 @@
4191 compatible = "brcm,bcm2835";
4192
4193 fragment@0 {
4194 - target = <&i2s>;
4195 + target = <&i2s_clk_producer>;
4196 __overlay__ {
4197 status = "okay";
4198 };
4199 @@ -32,7 +32,7 @@
4200 target = <&sound>;
4201 __overlay__ {
4202 compatible = "hifiberry,hifiberry-amp";
4203 - i2s-controller = <&i2s>;
4204 + i2s-controller = <&i2s_clk_producer>;
4205 status = "okay";
4206 };
4207 };
4208 --- a/arch/arm/boot/dts/overlays/hifiberry-amp100-overlay.dts
4209 +++ b/arch/arm/boot/dts/overlays/hifiberry-amp100-overlay.dts
4210 @@ -15,8 +15,8 @@
4211 };
4212 };
4213
4214 - fragment@1 {
4215 - target = <&i2s>;
4216 + frag1: fragment@1 {
4217 + target = <&i2s_clk_consumer>;
4218 __overlay__ {
4219 status = "okay";
4220 };
4221 @@ -46,7 +46,7 @@
4222 target = <&sound>;
4223 hifiberry_dacplus: __overlay__ {
4224 compatible = "hifiberry,hifiberry-dacplus";
4225 - i2s-controller = <&i2s>;
4226 + i2s-controller = <&i2s_clk_consumer>;
4227 status = "okay";
4228 mute-gpio = <&gpio 4 0>;
4229 reset-gpio = <&gpio 17 0x11>;
4230 @@ -56,7 +56,10 @@
4231 __overrides__ {
4232 24db_digital_gain =
4233 <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
4234 - slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
4235 + slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?",
4236 + <&frag1>,"target:0=",<&i2s_clk_producer>,
4237 + <&hifiberry_dacplus>,"i2s-controller:0=",<&i2s_clk_producer>;
4238 +
4239 leds_off = <&hifiberry_dacplus>,"hifiberry-dacplus,leds_off?";
4240 mute_ext_ctl = <&hifiberry_dacplus>,"hifiberry-dacplus,mute_ext_ctl:0";
4241 auto_mute = <&hifiberry_dacplus>,"hifiberry-dacplus,auto_mute?";
4242 --- a/arch/arm/boot/dts/overlays/hifiberry-amp3-overlay.dts
4243 +++ b/arch/arm/boot/dts/overlays/hifiberry-amp3-overlay.dts
4244 @@ -10,7 +10,7 @@
4245 compatible = "brcm,bcm2835";
4246
4247 fragment@0 {
4248 - target = <&i2s>;
4249 + target = <&i2s_clk_producer>;
4250 __overlay__ {
4251 status = "okay";
4252 };
4253 @@ -50,7 +50,7 @@
4254 target = <&sound>;
4255 __overlay__ {
4256 compatible = "hifiberry,hifiberry-amp3";
4257 - i2s-controller = <&i2s>;
4258 + i2s-controller = <&i2s_clk_producer>;
4259 status = "okay";
4260 };
4261 };
4262 --- a/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
4263 +++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
4264 @@ -6,7 +6,7 @@
4265 compatible = "brcm,bcm2835";
4266
4267 fragment@0 {
4268 - target = <&i2s>;
4269 + target = <&i2s_clk_producer>;
4270 __overlay__ {
4271 status = "okay";
4272 };
4273 @@ -27,7 +27,7 @@
4274 target = <&sound>;
4275 __overlay__ {
4276 compatible = "hifiberry,hifiberry-dac";
4277 - i2s-controller = <&i2s>;
4278 + i2s-controller = <&i2s_clk_producer>;
4279 status = "okay";
4280 };
4281 };
4282 --- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
4283 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
4284 @@ -15,8 +15,8 @@
4285 };
4286 };
4287
4288 - fragment@1 {
4289 - target = <&i2s>;
4290 + frag1: fragment@1 {
4291 + target = <&i2s_clk_consumer>;
4292 __overlay__ {
4293 status = "okay";
4294 };
4295 @@ -51,7 +51,7 @@
4296 target = <&sound>;
4297 hifiberry_dacplus: __overlay__ {
4298 compatible = "hifiberry,hifiberry-dacplus";
4299 - i2s-controller = <&i2s>;
4300 + i2s-controller = <&i2s_clk_consumer>;
4301 status = "okay";
4302 };
4303 };
4304 @@ -59,7 +59,10 @@
4305 __overrides__ {
4306 24db_digital_gain =
4307 <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
4308 - slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
4309 + slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?",
4310 + <&frag1>,"target:0=",<&i2s_clk_producer>,
4311 + <&hifiberry_dacplus>,"i2s-controller:0=",<&i2s_clk_producer>;
4312 +
4313 leds_off = <&hifiberry_dacplus>,"hifiberry-dacplus,leds_off?";
4314 };
4315 };
4316 --- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
4317 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
4318 @@ -15,8 +15,8 @@
4319 };
4320 };
4321
4322 - fragment@1 {
4323 - target = <&i2s>;
4324 + frag1: fragment@1 {
4325 + target = <&i2s_clk_consumer>;
4326 __overlay__ {
4327 status = "okay";
4328 };
4329 @@ -58,7 +58,7 @@
4330 target = <&sound>;
4331 hifiberry_dacplusadc: __overlay__ {
4332 compatible = "hifiberry,hifiberry-dacplusadc";
4333 - i2s-controller = <&i2s>;
4334 + i2s-controller = <&i2s_clk_consumer>;
4335 status = "okay";
4336 };
4337 };
4338 @@ -66,7 +66,9 @@
4339 __overrides__ {
4340 24db_digital_gain =
4341 <&hifiberry_dacplusadc>,"hifiberry,24db_digital_gain?";
4342 - slave = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,slave?";
4343 + slave = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,slave?",
4344 + <&frag1>,"target:0=",<&i2s_clk_producer>,
4345 + <&hifiberry_dacplusadc>,"i2s-controller:0=",<&i2s_clk_producer>;
4346 leds_off = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,leds_off?";
4347 };
4348 };
4349 --- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
4350 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
4351 @@ -15,8 +15,8 @@
4352 };
4353 };
4354
4355 - fragment@1 {
4356 - target = <&i2s>;
4357 + frag1: fragment@1 {
4358 + target = <&i2s_clk_consumer>;
4359 __overlay__ {
4360 status = "okay";
4361 };
4362 @@ -56,7 +56,7 @@
4363 hifiberry_dacplusadcpro: __overlay__ {
4364 compatible = "hifiberry,hifiberry-dacplusadcpro";
4365 audio-codec = <&hb_dac &hb_adc>;
4366 - i2s-controller = <&i2s>;
4367 + i2s-controller = <&i2s_clk_consumer>;
4368 status = "okay";
4369 };
4370 };
4371 @@ -64,7 +64,9 @@
4372 __overrides__ {
4373 24db_digital_gain =
4374 <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,24db_digital_gain?";
4375 - slave = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,slave?";
4376 + slave = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,slave?",
4377 + <&frag1>,"target:0=",<&i2s_clk_producer>,
4378 + <&hifiberry_dacplusadcpro>,"i2s-controller:0=",<&i2s_clk_producer>;
4379 leds_off = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,leds_off?";
4380 };
4381 };
4382 --- a/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
4383 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
4384 @@ -6,7 +6,7 @@
4385 compatible = "brcm,bcm2835";
4386
4387 fragment@0 {
4388 - target = <&i2s>;
4389 + target = <&i2s_clk_producer>;
4390 __overlay__ {
4391 status = "okay";
4392 };
4393 @@ -27,7 +27,7 @@
4394 target = <&sound>;
4395 __overlay__ {
4396 compatible = "hifiberrydacplusdsp,hifiberrydacplusdsp-soundcard";
4397 - i2s-controller = <&i2s>;
4398 + i2s-controller = <&i2s_clk_producer>;
4399 status = "okay";
4400 };
4401 };
4402 --- a/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
4403 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
4404 @@ -8,7 +8,7 @@
4405 compatible = "brcm,bcm2835";
4406
4407 fragment@0 {
4408 - target = <&i2s>;
4409 + target = <&i2s_clk_consumer>;
4410 __overlay__ {
4411 status = "okay";
4412 };
4413 @@ -84,7 +84,7 @@
4414 target = <&sound>;
4415 __overlay__ {
4416 compatible = "hifiberry,hifiberry-dacplushd";
4417 - i2s-controller = <&i2s>;
4418 + i2s-controller = <&i2s_clk_consumer>;
4419 clocks = <&pll 0>;
4420 reset-gpio = <&gpio 16 GPIO_ACTIVE_LOW>;
4421 status = "okay";
4422 --- a/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
4423 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
4424 @@ -6,7 +6,7 @@
4425 compatible = "brcm,bcm2835";
4426
4427 fragment@0 {
4428 - target = <&i2s>;
4429 + target = <&i2s_clk_consumer>;
4430 __overlay__ {
4431 status = "okay";
4432 };
4433 @@ -34,7 +34,7 @@
4434 target = <&sound>;
4435 __overlay__ {
4436 compatible = "hifiberry,hifiberry-digi";
4437 - i2s-controller = <&i2s>;
4438 + i2s-controller = <&i2s_clk_consumer>;
4439 status = "okay";
4440 };
4441 };
4442 --- a/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
4443 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
4444 @@ -6,7 +6,7 @@
4445 compatible = "brcm,bcm2835";
4446
4447 fragment@0 {
4448 - target = <&i2s>;
4449 + target = <&i2s_clk_consumer>;
4450 __overlay__ {
4451 status = "okay";
4452 };
4453 @@ -34,7 +34,7 @@
4454 target = <&sound>;
4455 __overlay__ {
4456 compatible = "hifiberry,hifiberry-digi";
4457 - i2s-controller = <&i2s>;
4458 + i2s-controller = <&i2s_clk_consumer>;
4459 status = "okay";
4460 clock44-gpio = <&gpio 5 0>;
4461 clock48-gpio = <&gpio 6 0>;
4462 --- a/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
4463 +++ b/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
4464 @@ -9,13 +9,13 @@
4465 target = <&sound>;
4466 frag0: __overlay__ {
4467 compatible = "audiophonics,i-sabre-q2m";
4468 - i2s-controller = <&i2s>;
4469 + i2s-controller = <&i2s_clk_producer>;
4470 status = "okay";
4471 };
4472 };
4473
4474 fragment@1 {
4475 - target = <&i2s>;
4476 + target = <&i2s_clk_producer>;
4477 __overlay__ {
4478 status = "okay";
4479 };
4480 --- /dev/null
4481 +++ b/arch/arm/boot/dts/overlays/i2c0-pi5-overlay.dts
4482 @@ -0,0 +1,34 @@
4483 +/dts-v1/;
4484 +/plugin/;
4485 +
4486 +/{
4487 + compatible = "brcm,bcm2712";
4488 +
4489 + fragment@0 {
4490 + target = <&i2c0>;
4491 + frag0: __overlay__ {
4492 + status = "okay";
4493 + clock-frequency = <100000>;
4494 + };
4495 + };
4496 +
4497 + fragment@1 {
4498 + target = <&frag0>;
4499 + __overlay__ {
4500 + pinctrl-0 = <&rp1_i2c0_0_1>;
4501 + };
4502 + };
4503 +
4504 + fragment@2 {
4505 + target = <&frag0>;
4506 + __dormant__ {
4507 + pinctrl-0 = <&rp1_i2c0_8_9>;
4508 + };
4509 + };
4510 +
4511 + __overrides__ {
4512 + pins_0_1 = <0>,"+1-2";
4513 + pins_8_9 = <0>,"-1+2";
4514 + baudrate = <&frag0>, "clock-frequency:0";
4515 + };
4516 +};
4517 --- /dev/null
4518 +++ b/arch/arm/boot/dts/overlays/i2c1-pi5-overlay.dts
4519 @@ -0,0 +1,34 @@
4520 +/dts-v1/;
4521 +/plugin/;
4522 +
4523 +/{
4524 + compatible = "brcm,bcm2712";
4525 +
4526 + fragment@0 {
4527 + target = <&i2c1>;
4528 + frag0: __overlay__ {
4529 + status = "okay";
4530 + clock-frequency = <100000>;
4531 + };
4532 + };
4533 +
4534 + fragment@1 {
4535 + target = <&frag0>;
4536 + __overlay__ {
4537 + pinctrl-0 = <&rp1_i2c1_2_3>;
4538 + };
4539 + };
4540 +
4541 + fragment@2 {
4542 + target = <&frag0>;
4543 + __dormant__ {
4544 + pinctrl-0 = <&rp1_i2c1_10_11>;
4545 + };
4546 + };
4547 +
4548 + __overrides__ {
4549 + pins_2_3 = <0>,"+1-2";
4550 + pins_10_11 = <0>,"-1+2";
4551 + baudrate = <&frag0>, "clock-frequency:0";
4552 + };
4553 +};
4554 --- /dev/null
4555 +++ b/arch/arm/boot/dts/overlays/i2c2-pi5-overlay.dts
4556 @@ -0,0 +1,21 @@
4557 +/dts-v1/;
4558 +/plugin/;
4559 +
4560 +/{
4561 + compatible = "brcm,bcm2712";
4562 +
4563 + fragment@0 {
4564 + target = <&i2c2>;
4565 + frag0: __overlay__ {
4566 + status = "okay";
4567 + clock-frequency = <100000>;
4568 + pinctrl-0 = <&rp1_i2c2_4_5>;
4569 + };
4570 + };
4571 +
4572 + __overrides__ {
4573 + pins_4_5 = <&frag0>,"pinctrl-0:0=", <&rp1_i2c2_4_5>;
4574 + pins_12_13 = <&frag0>,"pinctrl-0:0=", <&rp1_i2c2_12_13>;
4575 + baudrate = <&frag0>, "clock-frequency:0";
4576 + };
4577 +};
4578 --- /dev/null
4579 +++ b/arch/arm/boot/dts/overlays/i2c3-pi5-overlay.dts
4580 @@ -0,0 +1,22 @@
4581 +/dts-v1/;
4582 +/plugin/;
4583 +
4584 +/{
4585 + compatible = "brcm,bcm2712";
4586 +
4587 + fragment@0 {
4588 + target = <&i2c3>;
4589 + frag0: __overlay__ {
4590 + status = "okay";
4591 + clock-frequency = <100000>;
4592 + pinctrl-0 = <&rp1_i2c3_6_7>;
4593 + };
4594 + };
4595 +
4596 + __overrides__ {
4597 + pins_6_7 = <&frag0>,"pinctrl-0:0=", <&rp1_i2c3_6_7>;
4598 + pins_14_15 = <&frag0>,"pinctrl-0:0=", <&rp1_i2c3_14_15>;
4599 + pins_22_23 = <&frag0>,"pinctrl-0:0=", <&rp1_i2c3_22_23>;
4600 + baudrate = <&frag0>, "clock-frequency:0";
4601 + };
4602 +};
4603 --- a/arch/arm/boot/dts/overlays/i2s-dac-overlay.dts
4604 +++ b/arch/arm/boot/dts/overlays/i2s-dac-overlay.dts
4605 @@ -6,7 +6,7 @@
4606 compatible = "brcm,bcm2835";
4607
4608 fragment@0 {
4609 - target = <&i2s>;
4610 + target = <&i2s_clk_producer>;
4611 __overlay__ {
4612 status = "okay";
4613 };
4614 @@ -27,7 +27,7 @@
4615 target = <&sound>;
4616 __overlay__ {
4617 compatible = "rpi,rpi-dac";
4618 - i2s-controller = <&i2s>;
4619 + i2s-controller = <&i2s_clk_producer>;
4620 status = "okay";
4621 };
4622 };
4623 --- a/arch/arm/boot/dts/overlays/imx219-overlay.dts
4624 +++ b/arch/arm/boot/dts/overlays/imx219-overlay.dts
4625 @@ -69,7 +69,7 @@
4626 rotation = <&cam_node>,"rotation:0";
4627 orientation = <&cam_node>,"orientation:0";
4628 media-controller = <&csi>,"brcm,media-controller?";
4629 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
4630 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
4631 <&csi_frag>, "target:0=",<&csi0>,
4632 <&clk_frag>, "target:0=",<&cam0_clk>,
4633 <&cam_node>, "clocks:0=",<&cam0_clk>,
4634 --- a/arch/arm/boot/dts/overlays/imx258-overlay.dts
4635 +++ b/arch/arm/boot/dts/overlays/imx258-overlay.dts
4636 @@ -110,7 +110,7 @@
4637 rotation = <&cam_node>,"rotation:0";
4638 orientation = <&cam_node>,"orientation:0";
4639 media-controller = <&csi>,"brcm,media-controller?";
4640 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
4641 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
4642 <&csi_frag>, "target:0=",<&csi0>,
4643 <&clk_frag>, "target:0=",<&cam0_clk>,
4644 <&reg_frag>, "target:0=",<&cam0_reg>,
4645 --- a/arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi
4646 +++ b/arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi
4647 @@ -95,7 +95,7 @@
4648 rotation = <&cam_node>,"rotation:0";
4649 orientation = <&cam_node>,"orientation:0";
4650 media-controller = <&csi>,"brcm,media-controller?";
4651 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
4652 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
4653 <&csi_frag>, "target:0=",<&csi0>,
4654 <&clk_frag>, "target:0=",<&cam0_clk>,
4655 <&cam_node>, "clocks:0=",<&cam0_clk>,
4656 --- a/arch/arm/boot/dts/overlays/imx296-overlay.dts
4657 +++ b/arch/arm/boot/dts/overlays/imx296-overlay.dts
4658 @@ -94,7 +94,7 @@
4659 rotation = <&imx296>,"rotation:0";
4660 orientation = <&imx296>,"orientation:0";
4661 media-controller = <&csi>,"brcm,media-controller?";
4662 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
4663 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
4664 <&csi_frag>, "target:0=",<&csi0>,
4665 <&clk_frag>, "target:0=",<&cam0_clk>,
4666 <&imx296>, "clocks:0=",<&cam0_clk>,
4667 --- a/arch/arm/boot/dts/overlays/imx477_378-overlay.dtsi
4668 +++ b/arch/arm/boot/dts/overlays/imx477_378-overlay.dtsi
4669 @@ -65,7 +65,7 @@
4670 rotation = <&cam_node>,"rotation:0";
4671 orientation = <&cam_node>,"orientation:0";
4672 media-controller = <&csi>,"brcm,media-controller?";
4673 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
4674 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
4675 <&csi_frag>, "target:0=",<&csi0>,
4676 <&clk_frag>, "target:0=",<&cam0_clk>,
4677 <&reg_frag>, "target:0=",<&cam0_reg>,
4678 --- a/arch/arm/boot/dts/overlays/imx519-overlay.dts
4679 +++ b/arch/arm/boot/dts/overlays/imx519-overlay.dts
4680 @@ -69,7 +69,7 @@
4681 rotation = <&cam_node>,"rotation:0";
4682 orientation = <&cam_node>,"orientation:0";
4683 media-controller = <&csi>,"brcm,media-controller?";
4684 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
4685 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
4686 <&csi_frag>, "target:0=",<&csi0>,
4687 <&clk_frag>, "target:0=",<&cam0_clk>,
4688 <&cam_node>, "clocks:0=",<&cam0_clk>,
4689 --- a/arch/arm/boot/dts/overlays/imx708-overlay.dts
4690 +++ b/arch/arm/boot/dts/overlays/imx708-overlay.dts
4691 @@ -79,12 +79,12 @@
4692 rotation = <&cam_node>,"rotation:0";
4693 orientation = <&cam_node>,"orientation:0";
4694 media-controller = <&csi>,"brcm,media-controller?";
4695 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
4696 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
4697 <&csi_frag>, "target:0=",<&csi0>,
4698 <&clk_frag>, "target:0=",<&cam0_clk>,
4699 <&reg_frag>, "target:0=",<&cam0_reg>,
4700 <&cam_node>, "clocks:0=",<&cam0_clk>,
4701 - <&cam_node>, "VANA1-supply:0=",<&cam0_reg>,
4702 + <&cam_node>, "vana1-supply:0=",<&cam0_reg>,
4703 <&vcm_node>, "VDD-supply:0=",<&cam0_reg>;
4704 vcm = <&vcm_node>, "status",
4705 <0>, "=4";
4706 --- a/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
4707 +++ b/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
4708 @@ -6,7 +6,7 @@
4709 compatible = "brcm,bcm2835";
4710
4711 fragment@0 {
4712 - target = <&i2s>;
4713 + target = <&i2s_clk_consumer>;
4714 __overlay__ {
4715 status = "okay";
4716 };
4717 @@ -32,7 +32,7 @@
4718 target = <&sound>;
4719 iqaudio_dac: __overlay__ {
4720 compatible = "iqaudio,iqaudio-codec";
4721 - i2s-controller = <&i2s>;
4722 + i2s-controller = <&i2s_clk_consumer>;
4723 status = "okay";
4724 };
4725 };
4726 --- a/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
4727 +++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
4728 @@ -6,7 +6,7 @@
4729 compatible = "brcm,bcm2835";
4730
4731 fragment@0 {
4732 - target = <&i2s>;
4733 + target = <&i2s_clk_producer>;
4734 __overlay__ {
4735 status = "okay";
4736 };
4737 @@ -35,7 +35,7 @@
4738 target = <&sound>;
4739 frag2: __overlay__ {
4740 compatible = "iqaudio,iqaudio-dac";
4741 - i2s-controller = <&i2s>;
4742 + i2s-controller = <&i2s_clk_producer>;
4743 status = "okay";
4744 };
4745 };
4746 --- a/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
4747 +++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
4748 @@ -6,7 +6,7 @@
4749 compatible = "brcm,bcm2835";
4750
4751 fragment@0 {
4752 - target = <&i2s>;
4753 + target = <&i2s_clk_producer>;
4754 __overlay__ {
4755 status = "okay";
4756 };
4757 @@ -35,7 +35,7 @@
4758 target = <&sound>;
4759 iqaudio_dac: __overlay__ {
4760 compatible = "iqaudio,iqaudio-dac";
4761 - i2s-controller = <&i2s>;
4762 + i2s-controller = <&i2s_clk_producer>;
4763 mute-gpios = <&gpio 22 0>;
4764 status = "okay";
4765 };
4766 --- a/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
4767 +++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
4768 @@ -6,7 +6,7 @@
4769 compatible = "brcm,bcm2835";
4770
4771 fragment@0 {
4772 - target = <&i2s>;
4773 + target = <&i2s_clk_consumer>;
4774 __overlay__ {
4775 status = "okay";
4776 };
4777 @@ -34,7 +34,7 @@
4778 target = <&sound>;
4779 wm8804_digi: __overlay__ {
4780 compatible = "iqaudio,wm8804-digi";
4781 - i2s-controller = <&i2s>;
4782 + i2s-controller = <&i2s_clk_consumer>;
4783 status = "okay";
4784 };
4785 };
4786 --- a/arch/arm/boot/dts/overlays/irs1125-overlay.dts
4787 +++ b/arch/arm/boot/dts/overlays/irs1125-overlay.dts
4788 @@ -82,7 +82,7 @@
4789
4790 __overrides__ {
4791 media-controller = <&csi>,"brcm,media-controller?";
4792 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
4793 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
4794 <&csi_frag>, "target:0=",<&csi0>,
4795 <&clk_frag>, "target:0=",<&cam0_clk>,
4796 <&irs1125>, "clocks:0=",<&cam0_clk>;
4797 --- a/arch/arm/boot/dts/overlays/justboom-both-overlay.dts
4798 +++ b/arch/arm/boot/dts/overlays/justboom-both-overlay.dts
4799 @@ -7,7 +7,7 @@
4800 compatible = "brcm,bcm2835";
4801
4802 fragment@0 {
4803 - target = <&i2s>;
4804 + target = <&i2s_clk_consumer>;
4805 __overlay__ {
4806 status = "okay";
4807 };
4808 @@ -54,7 +54,7 @@
4809 target = <&sound>;
4810 frag3: __overlay__ {
4811 compatible = "justboom,justboom-both";
4812 - i2s-controller = <&i2s>;
4813 + i2s-controller = <&i2s_clk_consumer>;
4814 status = "okay";
4815 };
4816 };
4817 --- a/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
4818 +++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
4819 @@ -6,7 +6,7 @@
4820 compatible = "brcm,bcm2835";
4821
4822 fragment@0 {
4823 - target = <&i2s>;
4824 + target = <&i2s_clk_producer>;
4825 __overlay__ {
4826 status = "okay";
4827 };
4828 @@ -35,7 +35,7 @@
4829 target = <&sound>;
4830 frag2: __overlay__ {
4831 compatible = "justboom,justboom-dac";
4832 - i2s-controller = <&i2s>;
4833 + i2s-controller = <&i2s_clk_producer>;
4834 status = "okay";
4835 };
4836 };
4837 --- a/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
4838 +++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
4839 @@ -6,7 +6,7 @@
4840 compatible = "brcm,bcm2835";
4841
4842 fragment@0 {
4843 - target = <&i2s>;
4844 + target = <&i2s_clk_consumer>;
4845 __overlay__ {
4846 status = "okay";
4847 };
4848 @@ -34,7 +34,7 @@
4849 target = <&sound>;
4850 __overlay__ {
4851 compatible = "justboom,justboom-digi";
4852 - i2s-controller = <&i2s>;
4853 + i2s-controller = <&i2s_clk_consumer>;
4854 status = "okay";
4855 };
4856 };
4857 --- a/arch/arm/boot/dts/overlays/max98357a-overlay.dts
4858 +++ b/arch/arm/boot/dts/overlays/max98357a-overlay.dts
4859 @@ -12,7 +12,7 @@
4860
4861 /* Enable I2S */
4862 fragment@0 {
4863 - target = <&i2s>;
4864 + target = <&i2s_clk_producer>;
4865 __overlay__ {
4866 status = "okay";
4867 };
4868 @@ -52,7 +52,7 @@
4869 simple-audio-card,name = "MAX98357A";
4870 status = "okay";
4871 simple-audio-card,cpu {
4872 - sound-dai = <&i2s>;
4873 + sound-dai = <&i2s_clk_producer>;
4874 };
4875 simple-audio-card,codec {
4876 sound-dai = <&max98357a_dac>;
4877 @@ -69,7 +69,7 @@
4878 simple-audio-card,name = "MAX98357A";
4879 status = "okay";
4880 simple-audio-card,cpu {
4881 - sound-dai = <&i2s>;
4882 + sound-dai = <&i2s_clk_producer>;
4883 };
4884 simple-audio-card,codec {
4885 sound-dai = <&max98357a_nsd>;
4886 --- a/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
4887 +++ b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
4888 @@ -6,7 +6,7 @@
4889 compatible = "brcm,bcm2835";
4890
4891 fragment@0 {
4892 - target = <&i2s>;
4893 + target = <&i2s_clk_producer>;
4894 __overlay__ {
4895 status = "okay";
4896 };
4897 @@ -32,7 +32,7 @@
4898 target = <&sound>;
4899 __overlay__ {
4900 compatible = "simple-audio-card";
4901 - i2s-controller = <&i2s>;
4902 + i2s-controller = <&i2s_clk_producer>;
4903 status = "okay";
4904
4905 simple-audio-card,name = "mbed-DAC";
4906 @@ -52,7 +52,7 @@
4907 simple-audio-card,format = "i2s";
4908
4909 simple-audio-card,cpu {
4910 - sound-dai = <&i2s>;
4911 + sound-dai = <&i2s_clk_producer>;
4912 };
4913
4914 sound_master: simple-audio-card,codec {
4915 --- a/arch/arm/boot/dts/overlays/merus-amp-overlay.dts
4916 +++ b/arch/arm/boot/dts/overlays/merus-amp-overlay.dts
4917 @@ -9,7 +9,7 @@
4918 compatible = "brcm,bcm2835";
4919
4920 fragment@0 {
4921 - target = <&i2s>;
4922 + target = <&i2s_clk_producer>;
4923 __overlay__ {
4924 status = "okay";
4925 };
4926 @@ -52,7 +52,7 @@
4927 target = <&sound>;
4928 __overlay__ {
4929 compatible = "merus,merus-amp";
4930 - i2s-controller = <&i2s>;
4931 + i2s-controller = <&i2s_clk_producer>;
4932 status = "okay";
4933 };
4934 };
4935 --- /dev/null
4936 +++ b/arch/arm/boot/dts/overlays/midi-uart0-pi5-overlay.dts
4937 @@ -0,0 +1,35 @@
4938 +/dts-v1/;
4939 +/plugin/;
4940 +
4941 +#include <dt-bindings/clock/rp1.h>
4942 +
4943 +/*
4944 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
4945 + * baudrate. The real clock is 100MHz, which we scale so that requesting
4946 + * 38.4kHz results in an actual 31.25kHz.
4947 + *
4948 + * 100000000*38400/31250 = 122880000
4949 + */
4950 +
4951 +/{
4952 + compatible = "brcm,bcm2712";
4953 +
4954 + fragment@0 {
4955 + target-path = "/";
4956 + __overlay__ {
4957 + midi_clk: midi_clk0 {
4958 + compatible = "fixed-clock";
4959 + #clock-cells = <0>;
4960 + clock-output-names = "uart0_pclk";
4961 + clock-frequency = <122880000>;
4962 + };
4963 + };
4964 + };
4965 +
4966 + fragment@1 {
4967 + target = <&uart0>;
4968 + __overlay__ {
4969 + clocks = <&midi_clk &rp1_clocks RP1_PLL_SYS_PRI_PH>;
4970 + };
4971 + };
4972 +};
4973 --- /dev/null
4974 +++ b/arch/arm/boot/dts/overlays/midi-uart1-pi5-overlay.dts
4975 @@ -0,0 +1,35 @@
4976 +/dts-v1/;
4977 +/plugin/;
4978 +
4979 +#include <dt-bindings/clock/rp1.h>
4980 +
4981 +/*
4982 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
4983 + * baudrate. The real clock is 100MHz, which we scale so that requesting
4984 + * 38.4kHz results in an actual 31.25kHz.
4985 + *
4986 + * 100000000*38400/31250 = 122880000
4987 + */
4988 +
4989 +/{
4990 + compatible = "brcm,bcm2712";
4991 +
4992 + fragment@0 {
4993 + target-path = "/";
4994 + __overlay__ {
4995 + midi_clk: midi_clk1 {
4996 + compatible = "fixed-clock";
4997 + #clock-cells = <0>;
4998 + clock-output-names = "uart1_pclk";
4999 + clock-frequency = <122880000>;
5000 + };
5001 + };
5002 + };
5003 +
5004 + fragment@1 {
5005 + target = <&uart1>;
5006 + __overlay__ {
5007 + clocks = <&midi_clk &rp1_clocks RP1_PLL_SYS_PRI_PH>;
5008 + };
5009 + };
5010 +};
5011 --- /dev/null
5012 +++ b/arch/arm/boot/dts/overlays/midi-uart2-pi5-overlay.dts
5013 @@ -0,0 +1,35 @@
5014 +/dts-v1/;
5015 +/plugin/;
5016 +
5017 +#include <dt-bindings/clock/rp1.h>
5018 +
5019 +/*
5020 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
5021 + * baudrate. The real clock is 100MHz, which we scale so that requesting
5022 + * 38.4kHz results in an actual 31.25kHz.
5023 + *
5024 + * 100000000*38400/31250 = 122880000
5025 + */
5026 +
5027 +/{
5028 + compatible = "brcm,bcm2712";
5029 +
5030 + fragment@0 {
5031 + target-path = "/";
5032 + __overlay__ {
5033 + midi_clk: midi_clk2 {
5034 + compatible = "fixed-clock";
5035 + #clock-cells = <0>;
5036 + clock-output-names = "uart2_pclk";
5037 + clock-frequency = <122880000>;
5038 + };
5039 + };
5040 + };
5041 +
5042 + fragment@1 {
5043 + target = <&uart2>;
5044 + __overlay__ {
5045 + clocks = <&midi_clk &rp1_clocks RP1_PLL_SYS_PRI_PH>;
5046 + };
5047 + };
5048 +};
5049 --- /dev/null
5050 +++ b/arch/arm/boot/dts/overlays/midi-uart3-pi5-overlay.dts
5051 @@ -0,0 +1,35 @@
5052 +/dts-v1/;
5053 +/plugin/;
5054 +
5055 +#include <dt-bindings/clock/rp1.h>
5056 +
5057 +/*
5058 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
5059 + * baudrate. The real clock is 100MHz, which we scale so that requesting
5060 + * 38.4kHz results in an actual 31.25kHz.
5061 + *
5062 + * 100000000*38400/31250 = 122880000
5063 + */
5064 +
5065 +/{
5066 + compatible = "brcm,bcm2712";
5067 +
5068 + fragment@0 {
5069 + target-path = "/";
5070 + __overlay__ {
5071 + midi_clk: midi_clk3 {
5072 + compatible = "fixed-clock";
5073 + #clock-cells = <0>;
5074 + clock-output-names = "uart3_pclk";
5075 + clock-frequency = <122880000>;
5076 + };
5077 + };
5078 + };
5079 +
5080 + fragment@1 {
5081 + target = <&uart3>;
5082 + __overlay__ {
5083 + clocks = <&midi_clk &rp1_clocks RP1_PLL_SYS_PRI_PH>;
5084 + };
5085 + };
5086 +};
5087 --- /dev/null
5088 +++ b/arch/arm/boot/dts/overlays/midi-uart4-pi5-overlay.dts
5089 @@ -0,0 +1,35 @@
5090 +/dts-v1/;
5091 +/plugin/;
5092 +
5093 +#include <dt-bindings/clock/rp1.h>
5094 +
5095 +/*
5096 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
5097 + * baudrate. The real clock is 100MHz, which we scale so that requesting
5098 + * 38.4kHz results in an actual 31.25kHz.
5099 + *
5100 + * 100000000*38400/31250 = 122880000
5101 + */
5102 +
5103 +/{
5104 + compatible = "brcm,bcm2712";
5105 +
5106 + fragment@0 {
5107 + target-path = "/";
5108 + __overlay__ {
5109 + midi_clk: midi_clk4 {
5110 + compatible = "fixed-clock";
5111 + #clock-cells = <0>;
5112 + clock-output-names = "uart4_pclk";
5113 + clock-frequency = <122880000>;
5114 + };
5115 + };
5116 + };
5117 +
5118 + fragment@1 {
5119 + target = <&uart4>;
5120 + __overlay__ {
5121 + clocks = <&midi_clk &rp1_clocks RP1_PLL_SYS_PRI_PH>;
5122 + };
5123 + };
5124 +};
5125 --- a/arch/arm/boot/dts/overlays/ov2311-overlay.dts
5126 +++ b/arch/arm/boot/dts/overlays/ov2311-overlay.dts
5127 @@ -60,7 +60,7 @@
5128 rotation = <&cam_node>,"rotation:0";
5129 orientation = <&cam_node>,"orientation:0";
5130 media-controller = <&csi>,"brcm,media-controller?";
5131 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
5132 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
5133 <&csi_frag>, "target:0=",<&csi0>,
5134 <&clk_frag>, "target:0=",<&cam0_clk>,
5135 <&cam_node>, "clocks:0=",<&cam0_clk>,
5136 --- a/arch/arm/boot/dts/overlays/ov5647-overlay.dts
5137 +++ b/arch/arm/boot/dts/overlays/ov5647-overlay.dts
5138 @@ -72,7 +72,7 @@
5139 rotation = <&cam_node>,"rotation:0";
5140 orientation = <&cam_node>,"orientation:0";
5141 media-controller = <&csi>,"brcm,media-controller?";
5142 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
5143 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
5144 <&csi_frag>, "target:0=",<&csi0>,
5145 <&reg_frag>, "target:0=",<&cam0_reg>,
5146 <&clk_frag>, "target:0=",<&cam0_clk>,
5147 --- a/arch/arm/boot/dts/overlays/ov7251-overlay.dts
5148 +++ b/arch/arm/boot/dts/overlays/ov7251-overlay.dts
5149 @@ -60,7 +60,7 @@
5150 rotation = <&cam_node>,"rotation:0";
5151 orientation = <&cam_node>,"orientation:0";
5152 media-controller = <&csi>,"brcm,media-controller?";
5153 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
5154 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
5155 <&csi_frag>, "target:0=",<&csi0>,
5156 <&clk_frag>, "target:0=",<&cam0_clk>,
5157 <&cam_node>, "clocks:0=",<&cam0_clk>,
5158 --- a/arch/arm/boot/dts/overlays/ov9281-overlay.dts
5159 +++ b/arch/arm/boot/dts/overlays/ov9281-overlay.dts
5160 @@ -61,7 +61,7 @@
5161 rotation = <&cam_node>,"rotation:0";
5162 orientation = <&cam_node>,"orientation:0";
5163 media-controller = <&csi>,"brcm,media-controller?";
5164 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
5165 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
5166 <&csi_frag>, "target:0=",<&csi0>,
5167 <&clk_frag>, "target:0=",<&cam0_clk>,
5168 <&cam_node>, "clocks:0=",<&cam0_clk>,
5169 --- a/arch/arm/boot/dts/overlays/overlay_map.dts
5170 +++ b/arch/arm/boot/dts/overlays/overlay_map.dts
5171 @@ -1,32 +1,100 @@
5172 /dts-v1/;
5173
5174 / {
5175 + audremap {
5176 + bcm2835;
5177 + bcm2711;
5178 + };
5179 +
5180 + balena-fin {
5181 + bcm2835;
5182 + bcm2711;
5183 + };
5184 +
5185 bmp085_i2c-sensor {
5186 deprecated = "use i2c-sensor,bmp085";
5187 };
5188
5189 + cm-swap-i2c0 {
5190 + bcm2835;
5191 + bcm2711;
5192 + };
5193 +
5194 cutiepi-panel {
5195 bcm2711;
5196 };
5197
5198 + disable-bt {
5199 + bcm2835;
5200 + bcm2711;
5201 + bcm2712 = "disable-bt-pi5";
5202 + };
5203 +
5204 + disable-bt-pi5 {
5205 + bcm2712;
5206 + };
5207 +
5208 disable-emmc2 {
5209 bcm2711;
5210 };
5211
5212 + disable-wifi {
5213 + bcm2835;
5214 + bcm2711;
5215 + bcm2712 = "disable-wifi-pi5";
5216 + };
5217 +
5218 + disable-wifi-pi5 {
5219 + bcm2712;
5220 + };
5221 +
5222 highperi {
5223 bcm2711;
5224 };
5225
5226 + i2c0 {
5227 + bcm2835;
5228 + bcm2711;
5229 + bcm2712 = "i2c0-pi5";
5230 + };
5231 +
5232 i2c0-bcm2708 {
5233 deprecated = "use i2c0";
5234 };
5235
5236 + i2c0-pi5 {
5237 + bcm2712;
5238 + };
5239 +
5240 + i2c1 {
5241 + bcm2835;
5242 + bcm2711;
5243 + bcm2712 = "i2c1-pi5";
5244 + };
5245 +
5246 i2c1-bcm2708 {
5247 deprecated = "use i2c1";
5248 };
5249
5250 + i2c1-pi5 {
5251 + bcm2712;
5252 + };
5253 +
5254 + i2c2 {
5255 + bcm2712 = "i2c2-pi5";
5256 + };
5257 +
5258 + i2c2-pi5 {
5259 + bcm2712;
5260 + };
5261 +
5262 i2c3 {
5263 bcm2711;
5264 + bcm2712 = "i2c3-pi5";
5265 + };
5266 +
5267 + i2c3-pi5 {
5268 + bcm2712;
5269 };
5270
5271 i2c4 {
5272 @@ -41,26 +109,76 @@
5273 bcm2711;
5274 };
5275
5276 + i2s-gpio28-31 {
5277 + bcm2835;
5278 + bcm2711;
5279 + };
5280 +
5281 lirc-rpi {
5282 deprecated = "use gpio-ir";
5283 };
5284
5285 + midi-uart0 {
5286 + bcm2835;
5287 + bcm2711;
5288 + bcm2712 = "midi-uart0-pi5";
5289 + };
5290 +
5291 + midi-uart0-pi5 {
5292 + bcm2712;
5293 + };
5294 +
5295 + midi-uart1 {
5296 + bcm2835;
5297 + bcm2711;
5298 + bcm2712 = "midi-uart1-pi5";
5299 + };
5300 +
5301 + midi-uart1-pi5 {
5302 + bcm2712;
5303 + };
5304 +
5305 midi-uart2 {
5306 bcm2711;
5307 + bcm2712 = "midi-uart2-pi5";
5308 + };
5309 +
5310 + midi-uart2-pi5 {
5311 + bcm2712;
5312 };
5313
5314 midi-uart3 {
5315 bcm2711;
5316 + bcm2712 = "midi-uart3-pi5";
5317 + };
5318 +
5319 + midi-uart3-pi5 {
5320 + bcm2712;
5321 };
5322
5323 midi-uart4 {
5324 bcm2711;
5325 + bcm2712 = "midi-uart4-pi5";
5326 + };
5327 +
5328 + midi-uart4-pi5 {
5329 + bcm2712;
5330 };
5331
5332 midi-uart5 {
5333 bcm2711;
5334 };
5335
5336 + miniuart-bt {
5337 + bcm2835;
5338 + bcm2711;
5339 + };
5340 +
5341 + mmc {
5342 + bcm2835;
5343 + bcm2711;
5344 + };
5345 +
5346 mpu6050 {
5347 deprecated = "use i2c-sensor,mpu6050";
5348 };
5349 @@ -118,6 +236,16 @@
5350 deprecated = "no longer necessary";
5351 };
5352
5353 + sdhost {
5354 + bcm2835;
5355 + bcm2711;
5356 + };
5357 +
5358 + sdio {
5359 + bcm2835;
5360 + bcm2711;
5361 + };
5362 +
5363 sdio-1bit {
5364 deprecated = "use sdio,bus_width=1,gpios_22_25";
5365 };
5366 @@ -126,6 +254,21 @@
5367 deprecated = "use 'dtparam=sd_poll_once' etc.";
5368 };
5369
5370 + smi {
5371 + bcm2835;
5372 + bcm2711;
5373 + };
5374 +
5375 + smi-dev {
5376 + bcm2835;
5377 + bcm2711;
5378 + };
5379 +
5380 + smi-nand {
5381 + bcm2835;
5382 + bcm2711;
5383 + };
5384 +
5385 spi0-cs {
5386 renamed = "spi0-2cs";
5387 };
5388 @@ -134,12 +277,42 @@
5389 deprecated = "no longer necessary";
5390 };
5391
5392 + spi2-1cs {
5393 + bcm2835;
5394 + bcm2711;
5395 + bcm2712 = "spi2-1cs-pi5";
5396 + };
5397 +
5398 + spi2-1cs-pi5 {
5399 + bcm2712;
5400 + };
5401 +
5402 + spi2-2cs {
5403 + bcm2835;
5404 + bcm2711;
5405 + bcm2712 = "spi2-2cs-pi5";
5406 + };
5407 +
5408 + spi2-2cs-pi5 {
5409 + bcm2712;
5410 + };
5411 +
5412 spi3-1cs {
5413 bcm2711;
5414 + bcm2712 = "spi3-1cs-pi5";
5415 + };
5416 +
5417 + spi3-1cs-pi5 {
5418 + bcm2712;
5419 };
5420
5421 spi3-2cs {
5422 bcm2711;
5423 + bcm2712 = "spi3-2cs-pi5";
5424 + };
5425 +
5426 + spi3-2cs-pi5 {
5427 + bcm2712;
5428 };
5429
5430 spi4-1cs {
5431 @@ -152,10 +325,20 @@
5432
5433 spi5-1cs {
5434 bcm2711;
5435 + bcm2712 = "spi5-1cs-pi5";
5436 + };
5437 +
5438 + spi5-1cs-pi5 {
5439 + bcm2712;
5440 };
5441
5442 spi5-2cs {
5443 bcm2711;
5444 + bcm2712 = "spi5-2cs-pi5";
5445 + };
5446 +
5447 + spi5-2cs-pi5 {
5448 + bcm2712;
5449 };
5450
5451 spi6-1cs {
5452 @@ -166,16 +349,51 @@
5453 bcm2711;
5454 };
5455
5456 + uart0 {
5457 + bcm2835;
5458 + bcm2711;
5459 + bcm2712 = "uart0-pi5";
5460 + };
5461 +
5462 + uart0-pi5 {
5463 + bcm2712;
5464 + };
5465 +
5466 + uart1 {
5467 + bcm2835;
5468 + bcm2711;
5469 + bcm2712 = "uart1-pi5";
5470 + };
5471 +
5472 + uart1-pi5 {
5473 + bcm2712;
5474 + };
5475 +
5476 uart2 {
5477 bcm2711;
5478 + bcm2712 = "uart2-pi5";
5479 + };
5480 +
5481 + uart2-pi5 {
5482 + bcm2712;
5483 };
5484
5485 uart3 {
5486 bcm2711;
5487 + bcm2712 = "uart3-pi5";
5488 + };
5489 +
5490 + uart3-pi5 {
5491 + bcm2712;
5492 };
5493
5494 uart4 {
5495 bcm2711;
5496 + bcm2712 = "uart4-pi5";
5497 + };
5498 +
5499 + uart4-pi5 {
5500 + bcm2712;
5501 };
5502
5503 uart5 {
5504 @@ -198,10 +416,12 @@
5505 vc4-fkms-v3d {
5506 bcm2835;
5507 bcm2711 = "vc4-fkms-v3d-pi4";
5508 + bcm2712 = "vc4-fkms-v3d-pi4";
5509 };
5510
5511 vc4-fkms-v3d-pi4 {
5512 bcm2711;
5513 + bcm2712;
5514 };
5515
5516 vc4-kms-dpi-at056tn53v1 {
5517 @@ -211,10 +431,16 @@
5518 vc4-kms-v3d {
5519 bcm2835;
5520 bcm2711 = "vc4-kms-v3d-pi4";
5521 + bcm2712 = "vc4-kms-v3d-pi5";
5522 };
5523
5524 vc4-kms-v3d-pi4 {
5525 bcm2711;
5526 + bcm2712 = "vc4-kms-v3d-pi5";
5527 + };
5528 +
5529 + vc4-kms-v3d-pi5 {
5530 + bcm2712;
5531 };
5532
5533 vl805 {
5534 --- a/arch/arm/boot/dts/overlays/pibell-overlay.dts
5535 +++ b/arch/arm/boot/dts/overlays/pibell-overlay.dts
5536 @@ -24,7 +24,7 @@
5537 };
5538
5539 fragment@1 {
5540 - target = <&i2s>;
5541 + target = <&i2s_clk_producer>;
5542 __overlay__ {
5543 #sound-dai-cells = <0>;
5544 status = "okay";
5545 @@ -43,7 +43,7 @@
5546 format = "i2s";
5547
5548 r_cpu_dai: cpu {
5549 - sound-dai = <&i2s>;
5550 + sound-dai = <&i2s_clk_producer>;
5551
5552 /* example TDM slot configuration
5553 dai-tdm-slot-num = <2>;
5554 @@ -60,7 +60,7 @@
5555 format = "i2s";
5556
5557 p_cpu_dai: cpu {
5558 - sound-dai = <&i2s>;
5559 + sound-dai = <&i2s_clk_producer>;
5560
5561 /* example TDM slot configuration
5562 dai-tdm-slot-num = <2>;
5563 --- a/arch/arm/boot/dts/overlays/pifi-40-overlay.dts
5564 +++ b/arch/arm/boot/dts/overlays/pifi-40-overlay.dts
5565 @@ -6,7 +6,7 @@
5566 compatible = "brcm,bcm2835";
5567
5568 fragment@0 {
5569 - target = <&i2s>;
5570 + target = <&i2s_clk_producer>;
5571 __overlay__ {
5572 status = "okay";
5573 };
5574 @@ -42,7 +42,7 @@
5575 pifi_40: __overlay__ {
5576 compatible = "pifi,pifi-40";
5577 audio-codec = <&tas5711l &tas5711r>;
5578 - i2s-controller = <&i2s>;
5579 + i2s-controller = <&i2s_clk_producer>;
5580 pdn-gpios = <&gpio 23 1>;
5581 status = "okay";
5582 };
5583 --- a/arch/arm/boot/dts/overlays/pifi-dac-hd-overlay.dts
5584 +++ b/arch/arm/boot/dts/overlays/pifi-dac-hd-overlay.dts
5585 @@ -6,7 +6,7 @@
5586 compatible = "brcm,bcm2835";
5587
5588 fragment@0 {
5589 - target = <&i2s>;
5590 + target = <&i2s_clk_producer>;
5591 __overlay__ {
5592 status = "okay";
5593 };
5594 @@ -38,7 +38,7 @@
5595 simple-audio-card,dai-link@1 {
5596 format = "i2s";
5597 cpu {
5598 - sound-dai = <&i2s>;
5599 + sound-dai = <&i2s_clk_producer>;
5600 };
5601 codec {
5602 sound-dai = <&pcm5142>;
5603 --- a/arch/arm/boot/dts/overlays/pifi-dac-zero-overlay.dts
5604 +++ b/arch/arm/boot/dts/overlays/pifi-dac-zero-overlay.dts
5605 @@ -16,7 +16,7 @@
5606 format = "i2s";
5607
5608 cpu {
5609 - sound-dai = <&i2s>;
5610 + sound-dai = <&i2s_clk_producer>;
5611 dai-tdm-slot-num = <2>;
5612 dai-tdm-slot-width = <32>;
5613 };
5614 @@ -40,7 +40,7 @@
5615 };
5616
5617 fragment@2 {
5618 - target = <&i2s>;
5619 + target = <&i2s_clk_producer>;
5620 __overlay__ {
5621 #sound-dai-cells = <0>;
5622 status = "okay";
5623 --- a/arch/arm/boot/dts/overlays/pifi-mini-210-overlay.dts
5624 +++ b/arch/arm/boot/dts/overlays/pifi-mini-210-overlay.dts
5625 @@ -6,7 +6,7 @@
5626 compatible = "brcm,bcm2835";
5627
5628 fragment@0 {
5629 - target = <&i2s>;
5630 + target = <&i2s_clk_producer>;
5631 __overlay__ {
5632 status = "okay";
5633 };
5634 @@ -34,7 +34,7 @@
5635 target = <&sound>;
5636 __overlay__ {
5637 compatible = "pifi,pifi-mini-210";
5638 - i2s-controller = <&i2s>;
5639 + i2s-controller = <&i2s_clk_producer>;
5640
5641 status = "okay";
5642 };
5643 --- a/arch/arm/boot/dts/overlays/pisound-overlay.dts
5644 +++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts
5645 @@ -75,7 +75,7 @@
5646 target = <&sound>;
5647 __overlay__ {
5648 compatible = "blokaslabs,pisound";
5649 - i2s-controller = <&i2s>;
5650 + i2s-controller = <&i2s_clk_consumer>;
5651 status = "okay";
5652
5653 pinctrl-names = "default";
5654 @@ -108,7 +108,7 @@
5655 };
5656
5657 fragment@7 {
5658 - target = <&i2s>;
5659 + target = <&i2s_clk_consumer>;
5660 __overlay__ {
5661 status = "okay";
5662 };
5663 --- a/arch/arm/boot/dts/overlays/proto-codec-overlay.dts
5664 +++ b/arch/arm/boot/dts/overlays/proto-codec-overlay.dts
5665 @@ -6,7 +6,7 @@
5666 compatible = "brcm,bcm2835";
5667
5668 fragment@0 {
5669 - target = <&i2s>;
5670 + target = <&i2s_clk_consumer>;
5671 __overlay__ {
5672 status = "okay";
5673 };
5674 @@ -32,7 +32,7 @@
5675 target = <&sound>;
5676 __overlay__ {
5677 compatible = "rpi,rpi-proto";
5678 - i2s-controller = <&i2s>;
5679 + i2s-controller = <&i2s_clk_consumer>;
5680 status = "okay";
5681 };
5682 };
5683 --- a/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
5684 +++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
5685 @@ -6,7 +6,7 @@
5686 compatible = "brcm,bcm2835";
5687
5688 fragment@0 {
5689 - target = <&i2s>;
5690 + target = <&i2s_clk_consumer>;
5691 __overlay__ {
5692 status = "okay";
5693 };
5694 @@ -42,7 +42,7 @@
5695 target = <&sound>;
5696 __overlay__ {
5697 compatible = "rra,digidac1-soundcard";
5698 - i2s-controller = <&i2s>;
5699 + i2s-controller = <&i2s_clk_consumer>;
5700 status = "okay";
5701 };
5702 };
5703 --- /dev/null
5704 +++ b/arch/arm/boot/dts/overlays/spi2-1cs-pi5-overlay.dts
5705 @@ -0,0 +1,33 @@
5706 +/dts-v1/;
5707 +/plugin/;
5708 +
5709 +
5710 +/ {
5711 + compatible = "brcm,bcm2712";
5712 +
5713 + fragment@0 {
5714 + target = <&spi2>;
5715 + frag1: __overlay__ {
5716 + /* needed to avoid dtc warning */
5717 + #address-cells = <1>;
5718 + #size-cells = <0>;
5719 +
5720 + cs-gpios = <&gpio 0 1>;
5721 + status = "okay";
5722 +
5723 + spidev2_0: spidev@0 {
5724 + compatible = "spidev";
5725 + reg = <0>; /* CE0 */
5726 + #address-cells = <1>;
5727 + #size-cells = <0>;
5728 + spi-max-frequency = <125000000>;
5729 + status = "okay";
5730 + };
5731 + };
5732 + };
5733 +
5734 + __overrides__ {
5735 + cs0_pin = <&frag1>,"cs-gpios:4";
5736 + cs0_spidev = <&spidev2_0>,"status";
5737 + };
5738 +};
5739 --- /dev/null
5740 +++ b/arch/arm/boot/dts/overlays/spi2-2cs-pi5-overlay.dts
5741 @@ -0,0 +1,44 @@
5742 +/dts-v1/;
5743 +/plugin/;
5744 +
5745 +
5746 +/ {
5747 + compatible = "brcm,bcm2712";
5748 +
5749 + fragment@0 {
5750 + target = <&spi2>;
5751 + frag1: __overlay__ {
5752 + /* needed to avoid dtc warning */
5753 + #address-cells = <1>;
5754 + #size-cells = <0>;
5755 +
5756 + cs-gpios = <&gpio 0 1>, <&gpio 24 1>;
5757 + status = "okay";
5758 +
5759 + spidev2_0: spidev@0 {
5760 + compatible = "spidev";
5761 + reg = <0>; /* CE0 */
5762 + #address-cells = <1>;
5763 + #size-cells = <0>;
5764 + spi-max-frequency = <125000000>;
5765 + status = "okay";
5766 + };
5767 +
5768 + spidev2_1: spidev@1 {
5769 + compatible = "spidev";
5770 + reg = <1>; /* CE1 */
5771 + #address-cells = <1>;
5772 + #size-cells = <0>;
5773 + spi-max-frequency = <125000000>;
5774 + status = "okay";
5775 + };
5776 + };
5777 + };
5778 +
5779 + __overrides__ {
5780 + cs0_pin = <&frag1>,"cs-gpios:4";
5781 + cs1_pin = <&frag1>,"cs-gpios:16";
5782 + cs0_spidev = <&spidev2_0>,"status";
5783 + cs1_spidev = <&spidev2_1>,"status";
5784 + };
5785 +};
5786 --- /dev/null
5787 +++ b/arch/arm/boot/dts/overlays/spi3-1cs-pi5-overlay.dts
5788 @@ -0,0 +1,33 @@
5789 +/dts-v1/;
5790 +/plugin/;
5791 +
5792 +
5793 +/ {
5794 + compatible = "brcm,bcm2712";
5795 +
5796 + fragment@0 {
5797 + target = <&spi3>;
5798 + frag1: __overlay__ {
5799 + /* needed to avoid dtc warning */
5800 + #address-cells = <1>;
5801 + #size-cells = <0>;
5802 +
5803 + cs-gpios = <&gpio 4 1>;
5804 + status = "okay";
5805 +
5806 + spidev3_0: spidev@0 {
5807 + compatible = "spidev";
5808 + reg = <0>; /* CE0 */
5809 + #address-cells = <1>;
5810 + #size-cells = <0>;
5811 + spi-max-frequency = <125000000>;
5812 + status = "okay";
5813 + };
5814 + };
5815 + };
5816 +
5817 + __overrides__ {
5818 + cs0_pin = <&frag1>,"cs-gpios:4";
5819 + cs0_spidev = <&spidev3_0>,"status";
5820 + };
5821 +};
5822 --- /dev/null
5823 +++ b/arch/arm/boot/dts/overlays/spi3-2cs-pi5-overlay.dts
5824 @@ -0,0 +1,44 @@
5825 +/dts-v1/;
5826 +/plugin/;
5827 +
5828 +
5829 +/ {
5830 + compatible = "brcm,bcm2712";
5831 +
5832 + fragment@0 {
5833 + target = <&spi3>;
5834 + frag1: __overlay__ {
5835 + /* needed to avoid dtc warning */
5836 + #address-cells = <1>;
5837 + #size-cells = <0>;
5838 +
5839 + cs-gpios = <&gpio 4 1>, <&gpio 25 1>;
5840 + status = "okay";
5841 +
5842 + spidev3_0: spidev@0 {
5843 + compatible = "spidev";
5844 + reg = <0>; /* CE0 */
5845 + #address-cells = <1>;
5846 + #size-cells = <0>;
5847 + spi-max-frequency = <125000000>;
5848 + status = "okay";
5849 + };
5850 +
5851 + spidev3_1: spidev@1 {
5852 + compatible = "spidev";
5853 + reg = <1>; /* CE1 */
5854 + #address-cells = <1>;
5855 + #size-cells = <0>;
5856 + spi-max-frequency = <125000000>;
5857 + status = "okay";
5858 + };
5859 + };
5860 + };
5861 +
5862 + __overrides__ {
5863 + cs0_pin = <&frag1>,"cs-gpios:4";
5864 + cs1_pin = <&frag1>,"cs-gpios:16";
5865 + cs0_spidev = <&spidev3_0>,"status";
5866 + cs1_spidev = <&spidev3_1>,"status";
5867 + };
5868 +};
5869 --- /dev/null
5870 +++ b/arch/arm/boot/dts/overlays/spi5-1cs-pi5-overlay.dts
5871 @@ -0,0 +1,33 @@
5872 +/dts-v1/;
5873 +/plugin/;
5874 +
5875 +
5876 +/ {
5877 + compatible = "brcm,bcm2712";
5878 +
5879 + fragment@0 {
5880 + target = <&spi5>;
5881 + frag1: __overlay__ {
5882 + /* needed to avoid dtc warning */
5883 + #address-cells = <1>;
5884 + #size-cells = <0>;
5885 +
5886 + cs-gpios = <&gpio 12 1>;
5887 + status = "okay";
5888 +
5889 + spidev5_0: spidev@0 {
5890 + compatible = "spidev";
5891 + reg = <0>; /* CE0 */
5892 + #address-cells = <1>;
5893 + #size-cells = <0>;
5894 + spi-max-frequency = <125000000>;
5895 + status = "okay";
5896 + };
5897 + };
5898 + };
5899 +
5900 + __overrides__ {
5901 + cs0_pin = <&frag1>,"cs-gpios:4";
5902 + cs0_spidev = <&spidev5_0>,"status";
5903 + };
5904 +};
5905 --- /dev/null
5906 +++ b/arch/arm/boot/dts/overlays/spi5-2cs-pi5-overlay.dts
5907 @@ -0,0 +1,44 @@
5908 +/dts-v1/;
5909 +/plugin/;
5910 +
5911 +
5912 +/ {
5913 + compatible = "brcm,bcm2712";
5914 +
5915 + fragment@0 {
5916 + target = <&spi5>;
5917 + frag1: __overlay__ {
5918 + /* needed to avoid dtc warning */
5919 + #address-cells = <1>;
5920 + #size-cells = <0>;
5921 +
5922 + cs-gpios = <&gpio 12 1>, <&gpio 26 1>;
5923 + status = "okay";
5924 +
5925 + spidev5_0: spidev@0 {
5926 + compatible = "spidev";
5927 + reg = <0>; /* CE0 */
5928 + #address-cells = <1>;
5929 + #size-cells = <0>;
5930 + spi-max-frequency = <125000000>;
5931 + status = "okay";
5932 + };
5933 +
5934 + spidev5_1: spidev@1 {
5935 + compatible = "spidev";
5936 + reg = <1>; /* CE1 */
5937 + #address-cells = <1>;
5938 + #size-cells = <0>;
5939 + spi-max-frequency = <125000000>;
5940 + status = "okay";
5941 + };
5942 + };
5943 + };
5944 +
5945 + __overrides__ {
5946 + cs0_pin = <&frag1>,"cs-gpios:4";
5947 + cs1_pin = <&frag1>,"cs-gpios:16";
5948 + cs0_spidev = <&spidev5_0>,"status";
5949 + cs1_spidev = <&spidev5_1>,"status";
5950 + };
5951 +};
5952 --- a/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
5953 +++ b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
5954 @@ -9,7 +9,7 @@
5955 target = <&sound>;
5956 __overlay__ {
5957 compatible = "simple-audio-card";
5958 - i2s-controller = <&i2s>;
5959 + i2s-controller = <&i2s_clk_consumer>;
5960 status = "okay";
5961
5962 simple-audio-card,name = "SuperAudioBoard";
5963 @@ -32,7 +32,7 @@
5964 simple-audio-card,frame-master = <&sound_master>;
5965
5966 simple-audio-card,cpu {
5967 - sound-dai = <&i2s>;
5968 + sound-dai = <&i2s_clk_consumer>;
5969 dai-tdm-slot-num = <2>;
5970 dai-tdm-slot-width = <32>;
5971 };
5972 @@ -45,7 +45,7 @@
5973 };
5974
5975 fragment@1 {
5976 - target = <&i2s>;
5977 + target = <&i2s_clk_consumer>;
5978 __overlay__ {
5979 status = "okay";
5980 };
5981 --- a/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
5982 +++ b/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
5983 @@ -8,7 +8,7 @@
5984 compatible = "brcm,bcm2835";
5985
5986 fragment@0 {
5987 - target = <&i2s>;
5988 + target = <&i2s_clk_consumer>;
5989 __overlay__ {
5990 status = "okay";
5991 };
5992 @@ -31,16 +31,16 @@
5993 compatible = "simple-audio-card";
5994 simple-audio-card,format = "i2s";
5995 simple-audio-card,name = "tc358743";
5996 - simple-audio-card,bitclock-master = <&dailink0_slave>;
5997 - simple-audio-card,frame-master = <&dailink0_slave>;
5998 + simple-audio-card,bitclock-master = <&dailink0_master>;
5999 + simple-audio-card,frame-master = <&dailink0_master>;
6000 status = "okay";
6001
6002 simple-audio-card,cpu {
6003 - sound-dai = <&i2s>;
6004 + sound-dai = <&i2s_clk_consumer>;
6005 dai-tdm-slot-num = <2>;
6006 dai-tdm-slot-width = <32>;
6007 };
6008 - dailink0_slave: simple-audio-card,codec {
6009 + dailink0_master: simple-audio-card,codec {
6010 sound-dai = <&tc358743_codec>;
6011 };
6012 };
6013 --- a/arch/arm/boot/dts/overlays/tc358743-overlay.dts
6014 +++ b/arch/arm/boot/dts/overlays/tc358743-overlay.dts
6015 @@ -101,7 +101,7 @@
6016 4lane = <0>, "-2+3-7+8";
6017 link-frequency = <&tc358743_0>,"link-frequencies#0";
6018 media-controller = <&csi>,"brcm,media-controller?";
6019 - cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
6020 + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
6021 <&csi_frag>, "target:0=",<&csi0>,
6022 <&clk_frag>, "target:0=",<&cam0_clk>,
6023 <&tc358743>, "clocks:0=",<&cam0_clk>;
6024 --- /dev/null
6025 +++ b/arch/arm/boot/dts/overlays/uart0-pi5-overlay.dts
6026 @@ -0,0 +1,17 @@
6027 +/dts-v1/;
6028 +/plugin/;
6029 +
6030 +/{
6031 + compatible = "brcm,bcm2712";
6032 +
6033 + fragment@0 {
6034 + target = <&uart0>;
6035 + frag0: __overlay__ {
6036 + status = "okay";
6037 + };
6038 + };
6039 +
6040 + __overrides__ {
6041 + ctsrts = <&frag0>,"pinctrl-0:4=",<&uart0_ctsrts_pins>;
6042 + };
6043 +};
6044 --- /dev/null
6045 +++ b/arch/arm/boot/dts/overlays/uart1-pi5-overlay.dts
6046 @@ -0,0 +1,17 @@
6047 +/dts-v1/;
6048 +/plugin/;
6049 +
6050 +/{
6051 + compatible = "brcm,bcm2712";
6052 +
6053 + fragment@0 {
6054 + target = <&uart1>;
6055 + frag0: __overlay__ {
6056 + status = "okay";
6057 + };
6058 + };
6059 +
6060 + __overrides__ {
6061 + ctsrts = <&frag0>,"pinctrl-0:4=",<&uart1_ctsrts_pins>;
6062 + };
6063 +};
6064 --- /dev/null
6065 +++ b/arch/arm/boot/dts/overlays/uart2-pi5-overlay.dts
6066 @@ -0,0 +1,17 @@
6067 +/dts-v1/;
6068 +/plugin/;
6069 +
6070 +/{
6071 + compatible = "brcm,bcm2712";
6072 +
6073 + fragment@0 {
6074 + target = <&uart2>;
6075 + frag0: __overlay__ {
6076 + status = "okay";
6077 + };
6078 + };
6079 +
6080 + __overrides__ {
6081 + ctsrts = <&frag0>,"pinctrl-0:4=",<&uart2_ctsrts_pins>;
6082 + };
6083 +};
6084 --- /dev/null
6085 +++ b/arch/arm/boot/dts/overlays/uart3-pi5-overlay.dts
6086 @@ -0,0 +1,17 @@
6087 +/dts-v1/;
6088 +/plugin/;
6089 +
6090 +/{
6091 + compatible = "brcm,bcm2712";
6092 +
6093 + fragment@0 {
6094 + target = <&uart3>;
6095 + frag0: __overlay__ {
6096 + status = "okay";
6097 + };
6098 + };
6099 +
6100 + __overrides__ {
6101 + ctsrts = <&frag0>,"pinctrl-0:4=",<&uart3_ctsrts_pins>;
6102 + };
6103 +};
6104 --- /dev/null
6105 +++ b/arch/arm/boot/dts/overlays/uart4-pi5-overlay.dts
6106 @@ -0,0 +1,17 @@
6107 +/dts-v1/;
6108 +/plugin/;
6109 +
6110 +/{
6111 + compatible = "brcm,bcm2712";
6112 +
6113 + fragment@0 {
6114 + target = <&uart4>;
6115 + frag0: __overlay__ {
6116 + status = "okay";
6117 + };
6118 + };
6119 +
6120 + __overrides__ {
6121 + ctsrts = <&frag0>,"pinctrl-0:4=",<&uart4_ctsrts_pins>;
6122 + };
6123 +};
6124 --- a/arch/arm/boot/dts/overlays/udrc-overlay.dts
6125 +++ b/arch/arm/boot/dts/overlays/udrc-overlay.dts
6126 @@ -9,7 +9,7 @@
6127 / {
6128 compatible = "brcm,bcm2835";
6129 fragment@0 {
6130 - target = <&i2s>;
6131 + target = <&i2s_clk_producer>;
6132 __overlay__ {
6133 clocks = <&clocks BCM2835_CLOCK_PCM>;
6134 clock-names = "pcm";
6135 @@ -71,7 +71,7 @@
6136 target = <&sound>;
6137 snd: __overlay__ {
6138 compatible = "simple-audio-card";
6139 - i2s-controller = <&i2s>;
6140 + i2s-controller = <&i2s_clk_producer>;
6141 status = "okay";
6142
6143 simple-audio-card,name = "udrc";
6144 @@ -93,7 +93,7 @@
6145 "Line Out", "LOL";
6146
6147 dailink0_master: simple-audio-card,cpu {
6148 - sound-dai = <&i2s>;
6149 + sound-dai = <&i2s_clk_producer>;
6150 };
6151
6152 simple-audio-card,codec {
6153 --- a/arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts
6154 +++ b/arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts
6155 @@ -6,7 +6,7 @@
6156 compatible = "brcm,bcm2835";
6157
6158 fragment@0 {
6159 - target = <&i2s>;
6160 + target = <&i2s_clk_consumer>;
6161 __overlay__ {
6162 status = "okay";
6163 };
6164 @@ -29,14 +29,14 @@
6165 compatible = "simple-audio-card";
6166 simple-audio-card,format = "i2s";
6167 simple-audio-card,name = "dabboard";
6168 - simple-audio-card,bitclock-master = <&dailink0_slave>;
6169 - simple-audio-card,frame-master = <&dailink0_slave>;
6170 + simple-audio-card,bitclock-master = <&dailink0_master>;
6171 + simple-audio-card,frame-master = <&dailink0_master>;
6172 simple-audio-card,widgets = "Microphone", "Microphone Jack";
6173 status = "okay";
6174 simple-audio-card,cpu {
6175 - sound-dai = <&i2s>;
6176 + sound-dai = <&i2s_clk_consumer>;
6177 };
6178 - dailink0_slave: simple-audio-card,codec {
6179 + dailink0_master: simple-audio-card,codec {
6180 #sound-dai-cells = <0>;
6181 sound-dai = <&dmic_codec>;
6182 };
6183 --- a/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
6184 +++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
6185 @@ -37,4 +37,10 @@
6186 status = "okay";
6187 };
6188 };
6189 + fragment@5 {
6190 + target-path = "/chosen";
6191 + __overlay__ {
6192 + bootargs = "clk_ignore_unused";
6193 + };
6194 + };
6195 };
6196 --- a/arch/arm/boot/dts/overlays/vc4-fkms-v3d-pi4-overlay.dts
6197 +++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-pi4-overlay.dts
6198 @@ -41,4 +41,10 @@
6199 status = "okay";
6200 };
6201 };
6202 + fragment@5 {
6203 + target-path = "/chosen";
6204 + __overlay__ {
6205 + bootargs = "clk_ignore_unused";
6206 + };
6207 + };
6208 };
6209 --- a/arch/arm/boot/dts/overlays/vc4-kms-dsi-7inch-overlay.dts
6210 +++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-7inch-overlay.dts
6211 @@ -11,7 +11,7 @@
6212 / {
6213 /* No compatible as it will have come from edt-ft5406.dtsi */
6214
6215 - fragment@0 {
6216 + dsi_frag: fragment@0 {
6217 target = <&dsi1>;
6218 __overlay__ {
6219 #address-cells = <1>;
6220 @@ -51,8 +51,8 @@
6221 fragment@1 {
6222 target-path = "/";
6223 __overlay__ {
6224 - panel_disp1: panel_disp1@0 {
6225 - reg = <0>;
6226 + panel_disp: panel_disp@1 {
6227 + reg = <1>;
6228 compatible = "raspberrypi,7inch-dsi", "simple-panel";
6229 backlight = <&reg_display>;
6230 power-supply = <&reg_display>;
6231 @@ -64,8 +64,8 @@
6232 };
6233 };
6234
6235 - reg_bridge: reg_bridge@0 {
6236 - reg = <0>;
6237 + reg_bridge: reg_bridge@1 {
6238 + reg = <1>;
6239 compatible = "regulator-fixed";
6240 regulator-name = "bridge_reg";
6241 gpio = <&reg_display 0 0>;
6242 @@ -75,7 +75,7 @@
6243 };
6244 };
6245
6246 - fragment@2 {
6247 + i2c_frag: fragment@2 {
6248 target = <&i2c_csi_dsi>;
6249 __overlay__ {
6250 #address-cells = <1>;
6251 @@ -113,6 +113,12 @@
6252 };
6253
6254 __overrides__ {
6255 + dsi0 = <&dsi_frag>, "target:0=",<&dsi0>,
6256 + <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
6257 + <&ts_i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
6258 + <&panel_disp>, "reg:0=0",
6259 + <&reg_bridge>, "reg:0=0",
6260 + <&reg_bridge>, "regulator-name=bridge_reg_0";
6261 disable_touch = <0>, "-10-11-12";
6262 };
6263 };
6264 --- a/arch/arm/boot/dts/overlays/vc4-kms-dsi-waveshare-panel-overlay.dts
6265 +++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-waveshare-panel-overlay.dts
6266 @@ -9,7 +9,7 @@
6267 / {
6268 compatible = "brcm,bcm2835";
6269
6270 - fragment@0 {
6271 + dsi_frag: fragment@0 {
6272 target = <&dsi1>;
6273 __overlay__ {
6274 #address-cells = <1>;
6275 @@ -29,7 +29,7 @@
6276 };
6277 };
6278
6279 - frag2: fragment@2 {
6280 + i2c_frag: fragment@2 {
6281 target = <&i2c_csi_dsi>;
6282 __overlay__ {
6283 #address-cells = <1>;
6284 @@ -112,12 +112,14 @@
6285 <&touch>, "touchscreen-size-y:0=1480",
6286 <&touch>, "touchscreen-inverted-x?",
6287 <&touch>, "touchscreen-swapped-x-y?";
6288 - i2c1 = <&frag2>, "target:0=",<&i2c1>,
6289 + i2c1 = <&i2c_frag>, "target:0=",<&i2c1>,
6290 <0>, "-3-4+5";
6291 disable_touch = <&touch>, "status=disabled";
6292 rotation = <&panel>, "rotation:0";
6293 invx = <&touch>,"touchscreen-inverted-x?";
6294 invy = <&touch>,"touchscreen-inverted-y?";
6295 swapxy = <&touch>,"touchscreen-swapped-x-y?";
6296 + dsi0 = <&dsi_frag>, "target:0=",<&dsi0>,
6297 + <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>;
6298 };
6299 };
6300 --- /dev/null
6301 +++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-pi5-overlay.dts
6302 @@ -0,0 +1,147 @@
6303 +// SPDX-License-Identifier: GPL-2.0
6304 +
6305 +#include "cma-overlay.dts"
6306 +
6307 +&frag0 {
6308 + size = <((320-4)*1024*1024)>;
6309 +};
6310 +
6311 +/ {
6312 + compatible = "brcm,bcm2712";
6313 +
6314 + fragment@1 {
6315 + target = <&fb>;
6316 + __overlay__ {
6317 + status = "disabled";
6318 + };
6319 + };
6320 +
6321 + fragment@2 {
6322 + target = <&aon_intr>;
6323 + __overlay__ {
6324 + status = "okay";
6325 + };
6326 + };
6327 +
6328 + fragment@3 {
6329 + target = <&ddc0>;
6330 + __overlay__ {
6331 + status = "okay";
6332 + };
6333 + };
6334 +
6335 + fragment@4 {
6336 + target = <&ddc1>;
6337 + __overlay__ {
6338 + status = "okay";
6339 + };
6340 + };
6341 +
6342 + fragment@5 {
6343 + target = <&hdmi0>;
6344 + __overlay__ {
6345 + status = "okay";
6346 + };
6347 + };
6348 +
6349 + fragment@6 {
6350 + target = <&hdmi1>;
6351 + __overlay__ {
6352 + status = "okay";
6353 + };
6354 + };
6355 +
6356 + fragment@7 {
6357 + target = <&hvs>;
6358 + __overlay__ {
6359 + status = "okay";
6360 + };
6361 + };
6362 +
6363 + fragment@8 {
6364 + target = <&mop>;
6365 + __overlay__ {
6366 + status = "okay";
6367 + };
6368 + };
6369 +
6370 + fragment@9 {
6371 + target = <&moplet>;
6372 + __overlay__ {
6373 + status = "okay";
6374 + };
6375 + };
6376 +
6377 + fragment@10 {
6378 + target = <&pixelvalve0>;
6379 + __overlay__ {
6380 + status = "okay";
6381 + };
6382 + };
6383 +
6384 + fragment@11 {
6385 + target = <&pixelvalve1>;
6386 + __overlay__ {
6387 + status = "okay";
6388 + };
6389 + };
6390 +
6391 + fragment@12 {
6392 + target = <&v3d>;
6393 + __overlay__ {
6394 + status = "okay";
6395 + };
6396 + };
6397 +
6398 + fragment@13 {
6399 + target = <&vec>;
6400 + frag13: __overlay__ {
6401 + status = "disabled";
6402 + };
6403 + };
6404 +
6405 + fragment@14 {
6406 + target = <&hdmi0>;
6407 + __dormant__ {
6408 + dmas;
6409 + };
6410 + };
6411 +
6412 + fragment@15 {
6413 + target = <&hdmi1>;
6414 + __dormant__ {
6415 + dmas;
6416 + };
6417 + };
6418 +
6419 + fragment@16 {
6420 + target = <&disp_intr>;
6421 + __overlay__ {
6422 + status = "okay";
6423 + };
6424 + };
6425 +
6426 + fragment@17 {
6427 + target = <&vc4>;
6428 + __overlay__ {
6429 + /* IOMMU attaches here, where we allocate DMA buffers */
6430 + iommus = <&iommu4>;
6431 + };
6432 + };
6433 +
6434 + __overrides__ {
6435 + audio = <0>,"!14";
6436 + audio1 = <0>,"!15";
6437 + noaudio = <0>,"=14", <0>,"=15";
6438 + composite = <0>, "!3",
6439 + <0>, "!4",
6440 + <0>, "!5",
6441 + <0>, "!6",
6442 + <0>, "!10",
6443 + <0>, "!11",
6444 + <&frag13>, "status";
6445 + nohdmi0 = <0>, "-3-5-10";
6446 + nohdmi1 = <0>, "-4-6-11";
6447 + nohdmi = <0>, "-3-4-5-6-10-11";
6448 + };
6449 +};
6450 --- a/arch/arm/boot/dts/overlays/vc4-kms-vga666-overlay.dts
6451 +++ b/arch/arm/boot/dts/overlays/vc4-kms-vga666-overlay.dts
6452 @@ -94,7 +94,14 @@
6453 };
6454 };
6455
6456 + fragment@5 {
6457 + target = <&i2c_vc>;
6458 + __dormant__ {
6459 + status = "okay";
6460 + };
6461 + };
6462 +
6463 __overrides__ {
6464 - ddc = <0>,"=2", <0>,"=3", <0>,"=4";
6465 + ddc = <0>,"=2", <0>,"=3", <0>,"=4", <0>,"=5";
6466 };
6467 };
6468 --- a/arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts
6469 +++ b/arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts
6470 @@ -6,7 +6,7 @@
6471 compatible = "brcm,bcm2835";
6472
6473 fragment@0 {
6474 - target = <&i2s>;
6475 + target = <&i2s_clk_producer>;
6476 __overlay__ {
6477 status = "okay";
6478 };
6479 @@ -65,7 +65,7 @@
6480 "RINPUT2", "Mic Jack";
6481
6482 simple-audio-card,cpu {
6483 - sound-dai = <&i2s>;
6484 + sound-dai = <&i2s_clk_producer>;
6485 };
6486 dailink0_slave: simple-audio-card,codec {
6487 sound-dai = <&wm8960>;
6488 --- /dev/null
6489 +++ b/arch/arm/boot/dts/rp1.dtsi
6490 @@ -0,0 +1,1168 @@
6491 +#include <dt-bindings/clock/rp1.h>
6492 +#include <dt-bindings/interrupt-controller/irq.h>
6493 +#include <dt-bindings/mfd/rp1.h>
6494 +
6495 +&rp1_target {
6496 + rp1: rp1 {
6497 + compatible = "simple-bus";
6498 + #address-cells = <2>;
6499 + #size-cells = <2>;
6500 + #interrupt-cells = <2>;
6501 + interrupt-controller;
6502 + interrupt-parent = <&rp1>;
6503 +
6504 + // ranges and dma-ranges must be provided by the includer
6505 +
6506 + rp1_clocks: clocks@18000 {
6507 + compatible = "raspberrypi,rp1-clocks";
6508 + #clock-cells = <1>;
6509 + reg = <0xc0 0x40018000 0x0 0x10038>;
6510 + clocks = <&clk_xosc>;
6511 +
6512 + assigned-clocks = <&rp1_clocks RP1_PLL_SYS_CORE>,
6513 + <&rp1_clocks RP1_PLL_AUDIO_CORE>,
6514 + // RP1_PLL_VIDEO_CORE and dividers are now managed by VEC,DPI drivers
6515 + <&rp1_clocks RP1_PLL_SYS>,
6516 + <&rp1_clocks RP1_PLL_SYS_SEC>,
6517 + <&rp1_clocks RP1_PLL_AUDIO>,
6518 + <&rp1_clocks RP1_PLL_AUDIO_SEC>,
6519 + <&rp1_clocks RP1_CLK_SYS>,
6520 + <&rp1_clocks RP1_PLL_SYS_PRI_PH>,
6521 + // RP1_CLK_SLOW_SYS is used for the frequency counter (FC0)
6522 + <&rp1_clocks RP1_CLK_SLOW_SYS>,
6523 + <&rp1_clocks RP1_CLK_SDIO_TIMER>,
6524 + <&rp1_clocks RP1_CLK_SDIO_ALT_SRC>,
6525 + <&rp1_clocks RP1_CLK_ETH_TSU>;
6526 +
6527 + assigned-clock-rates = <1000000000>, // RP1_PLL_SYS_CORE
6528 + <1536000000>, // RP1_PLL_AUDIO_CORE
6529 + <200000000>, // RP1_PLL_SYS
6530 + <125000000>, // RP1_PLL_SYS_SEC
6531 + <61440000>, // RP1_PLL_AUDIO
6532 + <192000000>, // RP1_PLL_AUDIO_SEC
6533 + <200000000>, // RP1_CLK_SYS
6534 + <100000000>, // RP1_PLL_SYS_PRI_PH
6535 + // Must match the XOSC frequency
6536 + <50000000>, // RP1_CLK_SLOW_SYS
6537 + <1000000>, // RP1_CLK_SDIO_TIMER
6538 + <200000000>, // RP1_CLK_SDIO_ALT_SRC
6539 + <50000000>; // RP1_CLK_ETH_TSU
6540 + };
6541 +
6542 + rp1_uart0: serial@30000 {
6543 + compatible = "arm,pl011-axi";
6544 + reg = <0xc0 0x40030000 0x0 0x100>;
6545 + interrupts = <RP1_INT_UART0 IRQ_TYPE_LEVEL_HIGH>;
6546 + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
6547 + clock-names = "uartclk", "apb_pclk";
6548 + dmas = <&rp1_dma RP1_DMA_UART0_TX>,
6549 + <&rp1_dma RP1_DMA_UART0_RX>;
6550 + dma-names = "tx", "rx";
6551 + pinctrl-names = "default";
6552 + arm,primecell-periphid = <0x00541011>;
6553 + uart-has-rtscts;
6554 + cts-event-workaround;
6555 + skip-init;
6556 + status = "disabled";
6557 + };
6558 +
6559 + rp1_uart1: serial@34000 {
6560 + compatible = "arm,pl011-axi";
6561 + reg = <0xc0 0x40034000 0x0 0x100>;
6562 + interrupts = <RP1_INT_UART1 IRQ_TYPE_LEVEL_HIGH>;
6563 + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
6564 + clock-names = "uartclk", "apb_pclk";
6565 + // dmas = <&rp1_dma RP1_DMA_UART1_TX>,
6566 + // <&rp1_dma RP1_DMA_UART1_RX>;
6567 + // dma-names = "tx", "rx";
6568 + pinctrl-names = "default";
6569 + arm,primecell-periphid = <0x00541011>;
6570 + uart-has-rtscts;
6571 + cts-event-workaround;
6572 + skip-init;
6573 + status = "disabled";
6574 + };
6575 +
6576 + rp1_uart2: serial@38000 {
6577 + compatible = "arm,pl011-axi";
6578 + reg = <0xc0 0x40038000 0x0 0x100>;
6579 + interrupts = <RP1_INT_UART2 IRQ_TYPE_LEVEL_HIGH>;
6580 + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
6581 + clock-names = "uartclk", "apb_pclk";
6582 + // dmas = <&rp1_dma RP1_DMA_UART2_TX>,
6583 + // <&rp1_dma RP1_DMA_UART2_RX>;
6584 + // dma-names = "tx", "rx";
6585 + pinctrl-names = "default";
6586 + arm,primecell-periphid = <0x00541011>;
6587 + uart-has-rtscts;
6588 + cts-event-workaround;
6589 + skip-init;
6590 + status = "disabled";
6591 + };
6592 +
6593 + rp1_uart3: serial@3c000 {
6594 + compatible = "arm,pl011-axi";
6595 + reg = <0xc0 0x4003c000 0x0 0x100>;
6596 + interrupts = <RP1_INT_UART3 IRQ_TYPE_LEVEL_HIGH>;
6597 + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
6598 + clock-names = "uartclk", "apb_pclk";
6599 + // dmas = <&rp1_dma RP1_DMA_UART3_TX>,
6600 + // <&rp1_dma RP1_DMA_UART3_RX>;
6601 + // dma-names = "tx", "rx";
6602 + pinctrl-names = "default";
6603 + arm,primecell-periphid = <0x00541011>;
6604 + uart-has-rtscts;
6605 + cts-event-workaround;
6606 + skip-init;
6607 + status = "disabled";
6608 + };
6609 +
6610 + rp1_uart4: serial@40000 {
6611 + compatible = "arm,pl011-axi";
6612 + reg = <0xc0 0x40040000 0x0 0x100>;
6613 + interrupts = <RP1_INT_UART4 IRQ_TYPE_LEVEL_HIGH>;
6614 + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
6615 + clock-names = "uartclk", "apb_pclk";
6616 + // dmas = <&rp1_dma RP1_DMA_UART4_TX>,
6617 + // <&rp1_dma RP1_DMA_UART4_RX>;
6618 + // dma-names = "tx", "rx";
6619 + pinctrl-names = "default";
6620 + arm,primecell-periphid = <0x00541011>;
6621 + uart-has-rtscts;
6622 + cts-event-workaround;
6623 + skip-init;
6624 + status = "disabled";
6625 + };
6626 +
6627 + rp1_uart5: serial@44000 {
6628 + compatible = "arm,pl011-axi";
6629 + reg = <0xc0 0x40044000 0x0 0x100>;
6630 + interrupts = <RP1_INT_UART5 IRQ_TYPE_LEVEL_HIGH>;
6631 + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
6632 + clock-names = "uartclk", "apb_pclk";
6633 + // dmas = <&rp1_dma RP1_DMA_UART5_TX>,
6634 + // <&rp1_dma RP1_DMA_UART5_RX>;
6635 + // dma-names = "tx", "rx";
6636 + pinctrl-names = "default";
6637 + arm,primecell-periphid = <0x00541011>;
6638 + uart-has-rtscts;
6639 + cts-event-workaround;
6640 + skip-init;
6641 + status = "disabled";
6642 + };
6643 +
6644 + rp1_spi8: spi@4c000 {
6645 + reg = <0xc0 0x4004c000 0x0 0x130>;
6646 + compatible = "snps,dw-apb-ssi";
6647 + interrupts = <RP1_INT_SPI8 IRQ_TYPE_LEVEL_HIGH>;
6648 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6649 + clock-names = "ssi_clk";
6650 + #address-cells = <1>;
6651 + #size-cells = <0>;
6652 + num-cs = <2>;
6653 + dmas = <&rp1_dma RP1_DMA_SPI8_TX>,
6654 + <&rp1_dma RP1_DMA_SPI8_RX>;
6655 + dma-names = "tx", "rx";
6656 + status = "disabled";
6657 + };
6658 +
6659 + rp1_spi0: spi@50000 {
6660 + reg = <0xc0 0x40050000 0x0 0x130>;
6661 + compatible = "snps,dw-apb-ssi";
6662 + interrupts = <RP1_INT_SPI0 IRQ_TYPE_LEVEL_HIGH>;
6663 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6664 + clock-names = "ssi_clk";
6665 + #address-cells = <1>;
6666 + #size-cells = <0>;
6667 + num-cs = <2>;
6668 + dmas = <&rp1_dma RP1_DMA_SPI0_TX>,
6669 + <&rp1_dma RP1_DMA_SPI0_RX>;
6670 + dma-names = "tx", "rx";
6671 + status = "disabled";
6672 + };
6673 +
6674 + rp1_spi1: spi@54000 {
6675 + reg = <0xc0 0x40054000 0x0 0x130>;
6676 + compatible = "snps,dw-apb-ssi";
6677 + interrupts = <RP1_INT_SPI1 IRQ_TYPE_LEVEL_HIGH>;
6678 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6679 + clock-names = "ssi_clk";
6680 + #address-cells = <0>;
6681 + #size-cells = <0>;
6682 + num-cs = <2>;
6683 + dmas = <&rp1_dma RP1_DMA_SPI1_TX>,
6684 + <&rp1_dma RP1_DMA_SPI1_RX>;
6685 + dma-names = "tx", "rx";
6686 + status = "disabled";
6687 + };
6688 +
6689 + rp1_spi2: spi@58000 {
6690 + reg = <0xc0 0x40058000 0x0 0x130>;
6691 + compatible = "snps,dw-apb-ssi";
6692 + interrupts = <RP1_INT_SPI2 IRQ_TYPE_LEVEL_HIGH>;
6693 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6694 + clock-names = "ssi_clk";
6695 + #address-cells = <1>;
6696 + #size-cells = <0>;
6697 + num-cs = <2>;
6698 + dmas = <&rp1_dma RP1_DMA_SPI2_TX>,
6699 + <&rp1_dma RP1_DMA_SPI2_RX>;
6700 + dma-names = "tx", "rx";
6701 + status = "disabled";
6702 + };
6703 +
6704 + rp1_spi3: spi@5c000 {
6705 + reg = <0xc0 0x4005c000 0x0 0x130>;
6706 + compatible = "snps,dw-apb-ssi";
6707 + interrupts = <RP1_INT_SPI3 IRQ_TYPE_LEVEL_HIGH>;
6708 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6709 + clock-names = "ssi_clk";
6710 + #address-cells = <1>;
6711 + #size-cells = <0>;
6712 + num-cs = <2>;
6713 + dmas = <&rp1_dma RP1_DMA_SPI3_TX>,
6714 + <&rp1_dma RP1_DMA_SPI3_RX>;
6715 + dma-names = "tx", "rx";
6716 + status = "disabled";
6717 + };
6718 +
6719 + // SPI4 is a target/slave interface
6720 + rp1_spi4: spi@60000 {
6721 + reg = <0xc0 0x40060000 0x0 0x130>;
6722 + compatible = "snps,dw-apb-ssi";
6723 + interrupts = <RP1_INT_SPI4 IRQ_TYPE_LEVEL_HIGH>;
6724 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6725 + clock-names = "ssi_clk";
6726 + #address-cells = <0>;
6727 + #size-cells = <0>;
6728 + num-cs = <1>;
6729 + spi-slave;
6730 + dmas = <&rp1_dma RP1_DMA_SPI4_TX>,
6731 + <&rp1_dma RP1_DMA_SPI4_RX>;
6732 + dma-names = "tx", "rx";
6733 + status = "disabled";
6734 +
6735 + slave {
6736 + compatible = "spidev";
6737 + spi-max-frequency = <1000000>;
6738 + };
6739 + };
6740 +
6741 + rp1_spi5: spi@64000 {
6742 + reg = <0xc0 0x40064000 0x0 0x130>;
6743 + compatible = "snps,dw-apb-ssi";
6744 + interrupts = <RP1_INT_SPI5 IRQ_TYPE_LEVEL_HIGH>;
6745 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6746 + clock-names = "ssi_clk";
6747 + #address-cells = <1>;
6748 + #size-cells = <0>;
6749 + num-cs = <2>;
6750 + dmas = <&rp1_dma RP1_DMA_SPI5_TX>,
6751 + <&rp1_dma RP1_DMA_SPI5_RX>;
6752 + dma-names = "tx", "rx";
6753 + status = "disabled";
6754 + };
6755 +
6756 + // SPI7 is a target/slave interface
6757 + rp1_spi7: spi@6c000 {
6758 + reg = <0xc0 0x4006c000 0x0 0x130>;
6759 + compatible = "snps,dw-apb-ssi";
6760 + interrupts = <RP1_INT_SPI7 IRQ_TYPE_LEVEL_HIGH>;
6761 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6762 + clock-names = "ssi_clk";
6763 + #address-cells = <0>;
6764 + #size-cells = <0>;
6765 + num-cs = <1>;
6766 + spi-slave;
6767 + dmas = <&rp1_dma RP1_DMA_SPI7_TX>,
6768 + <&rp1_dma RP1_DMA_SPI7_RX>;
6769 + dma-names = "tx", "rx";
6770 + status = "disabled";
6771 +
6772 + slave {
6773 + compatible = "spidev";
6774 + spi-max-frequency = <1000000>;
6775 + };
6776 + };
6777 +
6778 + rp1_i2c0: i2c@70000 {
6779 + reg = <0xc0 0x40070000 0x0 0x1000>;
6780 + compatible = "snps,designware-i2c";
6781 + interrupts = <RP1_INT_I2C0 IRQ_TYPE_LEVEL_HIGH>;
6782 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6783 + status = "disabled";
6784 + };
6785 +
6786 + rp1_i2c1: i2c@74000 {
6787 + reg = <0xc0 0x40074000 0x0 0x1000>;
6788 + compatible = "snps,designware-i2c";
6789 + interrupts = <RP1_INT_I2C1 IRQ_TYPE_LEVEL_HIGH>;
6790 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6791 + status = "disabled";
6792 + };
6793 +
6794 + rp1_i2c2: i2c@78000 {
6795 + reg = <0xc0 0x40078000 0x0 0x1000>;
6796 + compatible = "snps,designware-i2c";
6797 + interrupts = <RP1_INT_I2C2 IRQ_TYPE_LEVEL_HIGH>;
6798 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6799 + status = "disabled";
6800 + };
6801 +
6802 + rp1_i2c3: i2c@7c000 {
6803 + reg = <0xc0 0x4007c000 0x0 0x1000>;
6804 + compatible = "snps,designware-i2c";
6805 + interrupts = <RP1_INT_I2C3 IRQ_TYPE_LEVEL_HIGH>;
6806 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6807 + status = "disabled";
6808 + };
6809 +
6810 + rp1_i2c4: i2c@80000 {
6811 + reg = <0xc0 0x40080000 0x0 0x1000>;
6812 + compatible = "snps,designware-i2c";
6813 + interrupts = <RP1_INT_I2C4 IRQ_TYPE_LEVEL_HIGH>;
6814 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6815 + status = "disabled";
6816 + };
6817 +
6818 + rp1_i2c5: i2c@84000 {
6819 + reg = <0xc0 0x40084000 0x0 0x1000>;
6820 + compatible = "snps,designware-i2c";
6821 + interrupts = <RP1_INT_I2C5 IRQ_TYPE_LEVEL_HIGH>;
6822 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6823 + status = "disabled";
6824 + };
6825 +
6826 + rp1_i2c6: i2c@88000 {
6827 + reg = <0xc0 0x40088000 0x0 0x1000>;
6828 + compatible = "snps,designware-i2c";
6829 + interrupts = <RP1_INT_I2C6 IRQ_TYPE_LEVEL_HIGH>;
6830 + clocks = <&rp1_clocks RP1_CLK_SYS>;
6831 + status = "disabled";
6832 + };
6833 +
6834 + rp1_pwm0: pwm@98000 {
6835 + compatible = "raspberrypi,rp1-pwm";
6836 + reg = <0xc0 0x40098000 0x0 0x100>;
6837 + #pwm-cells = <3>;
6838 + clocks = <&rp1_clocks RP1_CLK_PWM0>;
6839 + assigned-clocks = <&rp1_clocks RP1_CLK_PWM0>;
6840 + assigned-clock-rates = <6144000>;
6841 + status = "disabled";
6842 + };
6843 +
6844 + rp1_pwm1: pwm@9c000 {
6845 + compatible = "raspberrypi,rp1-pwm";
6846 + reg = <0xc0 0x4009c000 0x0 0x100>;
6847 + #pwm-cells = <3>;
6848 + clocks = <&rp1_clocks RP1_CLK_PWM1>;
6849 + assigned-clocks = <&rp1_clocks RP1_CLK_PWM1>;
6850 + assigned-clock-rates = <6144000>;
6851 + status = "disabled";
6852 + };
6853 +
6854 + rp1_i2s0: i2s@a0000 {
6855 + reg = <0xc0 0x400a0000 0x0 0x1000>;
6856 + compatible = "snps,designware-i2s";
6857 + // Providing an interrupt disables DMA
6858 + // interrupts = <RP1_INT_I2S0 IRQ_TYPE_LEVEL_HIGH>;
6859 + clocks = <&rp1_clocks RP1_CLK_I2S>;
6860 + clock-names = "i2sclk";
6861 + #sound-dai-cells = <0>;
6862 + dmas = <&rp1_dma RP1_DMA_I2S0_TX>,<&rp1_dma RP1_DMA_I2S0_RX>;
6863 + dma-names = "tx", "rx";
6864 + status = "disabled";
6865 + };
6866 +
6867 + rp1_i2s1: i2s@a4000 {
6868 + reg = <0xc0 0x400a4000 0x0 0x1000>;
6869 + compatible = "snps,designware-i2s";
6870 + // Providing an interrupt disables DMA
6871 + // interrupts = <RP1_INT_I2S1 IRQ_TYPE_LEVEL_HIGH>;
6872 + clocks = <&rp1_clocks RP1_CLK_I2S>;
6873 + clock-names = "i2sclk";
6874 + #sound-dai-cells = <0>;
6875 + dmas = <&rp1_dma RP1_DMA_I2S1_TX>,<&rp1_dma RP1_DMA_I2S1_RX>;
6876 + dma-names = "tx", "rx";
6877 + status = "disabled";
6878 + };
6879 +
6880 + rp1_i2s2: i2s@a8000 {
6881 + reg = <0xc0 0x400a8000 0x0 0x1000>;
6882 + compatible = "snps,designware-i2s";
6883 + // Providing an interrupt disables DMA
6884 + // interrupts = <RP1_INT_I2S2 IRQ_TYPE_LEVEL_HIGH>;
6885 + clocks = <&rp1_clocks RP1_CLK_I2S>;
6886 + status = "disabled";
6887 + };
6888 +
6889 + rp1_sdio_clk0: sdio_clk0@b0004 {
6890 + compatible = "raspberrypi,rp1-sdio-clk";
6891 + reg = <0xc0 0x400b0004 0x0 0x1c>;
6892 + clocks = <&sdio_src &sdhci_core>;
6893 + clock-names = "src", "base";
6894 + #clock-cells = <0>;
6895 + status = "disabled";
6896 + };
6897 +
6898 + rp1_sdio_clk1: sdio_clk1@b4004 {
6899 + compatible = "raspberrypi,rp1-sdio-clk";
6900 + reg = <0xc0 0x400b4004 0x0 0x1c>;
6901 + clocks = <&sdio_src &sdhci_core>;
6902 + clock-names = "src", "base";
6903 + #clock-cells = <0>;
6904 + status = "disabled";
6905 + };
6906 +
6907 + rp1_adc: adc@c8000 {
6908 + compatible = "raspberrypi,rp1-adc";
6909 + reg = <0xc0 0x400c8000 0x0 0x4000>;
6910 + clocks = <&rp1_clocks RP1_CLK_ADC>;
6911 + clock-names = "adcclk";
6912 + #clock-cells = <0>;
6913 + vref-supply = <&rp1_vdd_3v3>;
6914 + status = "disabled";
6915 + };
6916 +
6917 + rp1_gpio: gpio@d0000 {
6918 + reg = <0xc0 0x400d0000 0x0 0xc000>,
6919 + <0xc0 0x400e0000 0x0 0xc000>,
6920 + <0xc0 0x400f0000 0x0 0xc000>;
6921 + compatible = "raspberrypi,rp1-gpio";
6922 + interrupts = <RP1_INT_IO_BANK0 IRQ_TYPE_LEVEL_HIGH>,
6923 + <RP1_INT_IO_BANK1 IRQ_TYPE_LEVEL_HIGH>,
6924 + <RP1_INT_IO_BANK2 IRQ_TYPE_LEVEL_HIGH>;
6925 + gpio-controller;
6926 + #gpio-cells = <2>;
6927 + interrupt-controller;
6928 + #interrupt-cells = <2>;
6929 +
6930 + rp1_uart0_14_15: rp1_uart0_14_15 {
6931 + pin_txd {
6932 + function = "uart0";
6933 + pins = "gpio14";
6934 + bias-disable;
6935 + };
6936 + pin_rxd {
6937 + function = "uart0";
6938 + pins = "gpio15";
6939 + bias-pull-up;
6940 + };
6941 + };
6942 + rp1_uart0_ctsrts_16_17: rp1_uart0_ctsrts_16_17 {
6943 + pin_cts {
6944 + function = "uart0";
6945 + pins = "gpio16";
6946 + bias-pull-up;
6947 + };
6948 + pin_rts {
6949 + function = "uart0";
6950 + pins = "gpio17";
6951 + bias-disable;
6952 + };
6953 + };
6954 + rp1_uart1_0_1: rp1_uart1_0_1 {
6955 + pin_txd {
6956 + function = "uart1";
6957 + pins = "gpio0";
6958 + bias-disable;
6959 + };
6960 + pin_rxd {
6961 + function = "uart1";
6962 + pins = "gpio1";
6963 + bias-pull-up;
6964 + };
6965 + };
6966 + rp1_uart1_ctsrts_2_3: rp1_uart1_ctsrts_2_3 {
6967 + pin_cts {
6968 + function = "uart1";
6969 + pins = "gpio2";
6970 + bias-pull-up;
6971 + };
6972 + pin_rts {
6973 + function = "uart1";
6974 + pins = "gpio3";
6975 + bias-disable;
6976 + };
6977 + };
6978 + rp1_uart2_4_5: rp1_uart2_4_5 {
6979 + pin_txd {
6980 + function = "uart2";
6981 + pins = "gpio4";
6982 + bias-disable;
6983 + };
6984 + pin_rxd {
6985 + function = "uart2";
6986 + pins = "gpio5";
6987 + bias-pull-up;
6988 + };
6989 + };
6990 + rp1_uart2_ctsrts_6_7: rp1_uart2_ctsrts_6_7 {
6991 + pin_cts {
6992 + function = "uart2";
6993 + pins = "gpio6";
6994 + bias-pull-up;
6995 + };
6996 + pin_rts {
6997 + function = "uart2";
6998 + pins = "gpio7";
6999 + bias-disable;
7000 + };
7001 + };
7002 + rp1_uart3_8_9: rp1_uart3_8_9 {
7003 + pin_txd {
7004 + function = "uart3";
7005 + pins = "gpio8";
7006 + bias-disable;
7007 + };
7008 + pin_rxd {
7009 + function = "uart3";
7010 + pins = "gpio9";
7011 + bias-pull-up;
7012 + };
7013 + };
7014 + rp1_uart3_ctsrts_10_11: rp1_uart3_ctsrts_10_11 {
7015 + pin_cts {
7016 + function = "uart3";
7017 + pins = "gpio10";
7018 + bias-pull-up;
7019 + };
7020 + pin_rts {
7021 + function = "uart3";
7022 + pins = "gpio11";
7023 + bias-disable;
7024 + };
7025 + };
7026 + rp1_uart4_12_13: rp1_uart4_12_13 {
7027 + pin_txd {
7028 + function = "uart4";
7029 + pins = "gpio12";
7030 + bias-disable;
7031 + };
7032 + pin_rxd {
7033 + function = "uart4";
7034 + pins = "gpio13";
7035 + bias-pull-up;
7036 + };
7037 + };
7038 + rp1_uart4_ctsrts_14_15: rp1_uart4_ctsrts_14_15 {
7039 + pin_cts {
7040 + function = "uart4";
7041 + pins = "gpio14";
7042 + bias-pull-up;
7043 + };
7044 + pin_rts {
7045 + function = "uart4";
7046 + pins = "gpio15";
7047 + bias-disable;
7048 + };
7049 + };
7050 +
7051 + rp1_sdio0_22_27: rp1_sdio0_22_27 {
7052 + pin_clk {
7053 + function = "sd0";
7054 + pins = "gpio22";
7055 + bias-disable;
7056 + drive-strength = <12>;
7057 + slew-rate = <1>;
7058 + };
7059 + pin_cmd {
7060 + function = "sd0";
7061 + pins = "gpio23";
7062 + bias-pull-up;
7063 + drive-strength = <12>;
7064 + slew-rate = <1>;
7065 + };
7066 + pins_dat {
7067 + function = "sd0";
7068 + pins = "gpio24", "gpio25", "gpio26", "gpio27";
7069 + bias-pull-up;
7070 + drive-strength = <12>;
7071 + slew-rate = <1>;
7072 + };
7073 + };
7074 +
7075 + rp1_sdio1_28_33: rp1_sdio1_28_33 {
7076 + pin_clk {
7077 + function = "sd1";
7078 + pins = "gpio28";
7079 + bias-disable;
7080 + drive-strength = <12>;
7081 + slew-rate = <1>;
7082 + };
7083 + pin_cmd {
7084 + function = "sd1";
7085 + pins = "gpio29";
7086 + bias-pull-up;
7087 + drive-strength = <12>;
7088 + slew-rate = <1>;
7089 + };
7090 + pins_dat {
7091 + function = "sd1";
7092 + pins = "gpio30", "gpio31", "gpio32", "gpio33";
7093 + bias-pull-up;
7094 + drive-strength = <12>;
7095 + slew-rate = <1>;
7096 + };
7097 + };
7098 +
7099 + rp1_i2s0_18_21: rp1_i2s0_18_21 {
7100 + function = "i2s0";
7101 + pins = "gpio18", "gpio19", "gpio20", "gpio21";
7102 + bias-disable;
7103 + };
7104 +
7105 + rp1_i2s1_18_21: rp1_i2s1_18_21 {
7106 + function = "i2s1";
7107 + pins = "gpio18", "gpio19", "gpio20", "gpio21";
7108 + bias-disable;
7109 + };
7110 +
7111 + rp1_i2c4_34_35: rp1_i2c4_34_35 {
7112 + function = "i2c4";
7113 + pins = "gpio34", "gpio35";
7114 + bias-pull-up;
7115 + };
7116 + rp1_i2c6_38_39: rp1_i2c6_38_39 {
7117 + function = "i2c6";
7118 + pins = "gpio38", "gpio39";
7119 + bias-pull-up;
7120 + };
7121 + rp1_i2c4_40_41: rp1_i2c4_40_41 {
7122 + function = "i2c4";
7123 + pins = "gpio40", "gpio41";
7124 + bias-pull-up;
7125 + };
7126 + rp1_i2c5_44_45: rp1_i2c5_44_45 {
7127 + function = "i2c5";
7128 + pins = "gpio44", "gpio45";
7129 + bias-pull-up;
7130 + };
7131 + rp1_i2c0_0_1: rp1_i2c0_0_1 {
7132 + function = "i2c0";
7133 + pins = "gpio0", "gpio1";
7134 + bias-pull-up;
7135 + };
7136 + rp1_i2c0_8_9: rp1_i2c0_8_9 {
7137 + function = "i2c0";
7138 + pins = "gpio8", "gpio9";
7139 + bias-pull-up;
7140 + };
7141 + rp1_i2c1_2_3: rp1_i2c1_2_3 {
7142 + function = "i2c1";
7143 + pins = "gpio2", "gpio3";
7144 + bias-pull-up;
7145 + };
7146 + rp1_i2c1_10_11: rp1_i2c1_10_11 {
7147 + function = "i2c1";
7148 + pins = "gpio10", "gpio11";
7149 + bias-pull-up;
7150 + };
7151 + rp1_i2c2_4_5: rp1_i2c2_4_5 {
7152 + function = "i2c2";
7153 + pins = "gpio4", "gpio5";
7154 + bias-pull-up;
7155 + };
7156 + rp1_i2c2_12_13: rp1_i2c2_12_13 {
7157 + function = "i2c2";
7158 + pins = "gpio12", "gpio13";
7159 + bias-pull-up;
7160 + };
7161 + rp1_i2c3_6_7: rp1_i2c3_6_7 {
7162 + function = "i2c3";
7163 + pins = "gpio6", "gpio7";
7164 + bias-pull-up;
7165 + };
7166 + rp1_i2c3_14_15: rp1_i2c3_14_15 {
7167 + function = "i2c3";
7168 + pins = "gpio14", "gpio15";
7169 + bias-pull-up;
7170 + };
7171 + rp1_i2c3_22_23: rp1_i2c3_22_23 {
7172 + function = "i2c3";
7173 + pins = "gpio22", "gpio23";
7174 + bias-pull-up;
7175 + };
7176 +
7177 + // DPI mappings with HSYNC,VSYNC but without PIXCLK,DE
7178 + rp1_dpi_16bit_gpio2: rp1_dpi_16bit_gpio2 { /* Mode 2, not fully supported by RP1 */
7179 + function = "dpi";
7180 + pins = "gpio2", "gpio3", "gpio4", "gpio5",
7181 + "gpio6", "gpio7", "gpio8", "gpio9",
7182 + "gpio10", "gpio11", "gpio12", "gpio13",
7183 + "gpio14", "gpio15", "gpio16", "gpio17",
7184 + "gpio18", "gpio19";
7185 + bias-disable;
7186 + };
7187 + rp1_dpi_16bit_cpadhi_gpio2: rp1_dpi_16bit_cpadhi_gpio2 { /* Mode 3 */
7188 + function = "dpi";
7189 + pins = "gpio2", "gpio3", "gpio4", "gpio5",
7190 + "gpio6", "gpio7", "gpio8",
7191 + "gpio12", "gpio13", "gpio14", "gpio15",
7192 + "gpio16", "gpio17",
7193 + "gpio20", "gpio21", "gpio22", "gpio23",
7194 + "gpio24";
7195 + bias-disable;
7196 + };
7197 + rp1_dpi_16bit_pad666_gpio2: rp1_dpi_16bit_pad666_gpio2 { /* Mode 4 */
7198 + function = "dpi";
7199 + pins = "gpio2", "gpio3",
7200 + "gpio5", "gpio6", "gpio7", "gpio8",
7201 + "gpio9",
7202 + "gpio12", "gpio13", "gpio14", "gpio15",
7203 + "gpio16", "gpio17",
7204 + "gpio21", "gpio22", "gpio23", "gpio24",
7205 + "gpio25";
7206 + bias-disable;
7207 + };
7208 + rp1_dpi_18bit_gpio2: rp1_dpi_18bit_gpio2 { /* Mode 5, not fully supported by RP1 */
7209 + function = "dpi";
7210 + pins = "gpio2", "gpio3", "gpio4", "gpio5",
7211 + "gpio6", "gpio7", "gpio8", "gpio9",
7212 + "gpio10", "gpio11", "gpio12", "gpio13",
7213 + "gpio14", "gpio15", "gpio16", "gpio17",
7214 + "gpio18", "gpio19", "gpio20", "gpio21";
7215 + bias-disable;
7216 + };
7217 + rp1_dpi_18bit_cpadhi_gpio2: rp1_dpi_18bit_cpadhi_gpio2 { /* Mode 6 */
7218 + function = "dpi";
7219 + pins = "gpio2", "gpio3", "gpio4", "gpio5",
7220 + "gpio6", "gpio7", "gpio8", "gpio9",
7221 + "gpio12", "gpio13", "gpio14", "gpio15",
7222 + "gpio16", "gpio17",
7223 + "gpio20", "gpio21", "gpio22", "gpio23",
7224 + "gpio24", "gpio25";
7225 + bias-disable;
7226 + };
7227 + rp1_dpi_24bit_gpio2: rp1_dpi_24bit_gpio2 { /* Mode 7 */
7228 + function = "dpi";
7229 + pins = "gpio2", "gpio3", "gpio4", "gpio5",
7230 + "gpio6", "gpio7", "gpio8", "gpio9",
7231 + "gpio10", "gpio11", "gpio12", "gpio13",
7232 + "gpio14", "gpio15", "gpio16", "gpio17",
7233 + "gpio18", "gpio19", "gpio20", "gpio21",
7234 + "gpio22", "gpio23", "gpio24", "gpio25",
7235 + "gpio26", "gpio27";
7236 + bias-disable;
7237 + };
7238 + rp1_dpi_hvsync: rp1_dpi_hvsync { /* Sync only, for use with int VDAC */
7239 + function = "dpi";
7240 + pins = "gpio2", "gpio3";
7241 + bias-disable;
7242 + };
7243 +
7244 + // More DPI mappings, including PIXCLK,DE on GPIOs 0,1
7245 + rp1_dpi_16bit_gpio0: rp1_dpi_16bit_gpio0 { /* Mode 2, not fully supported by RP1 */
7246 + function = "dpi";
7247 + pins = "gpio0", "gpio1", "gpio2", "gpio3",
7248 + "gpio4", "gpio5", "gpio6", "gpio7",
7249 + "gpio8", "gpio9", "gpio10", "gpio11",
7250 + "gpio12", "gpio13", "gpio14", "gpio15",
7251 + "gpio16", "gpio17", "gpio18", "gpio19";
7252 + bias-disable;
7253 + };
7254 + rp1_dpi_16bit_cpadhi_gpio0: rp1_dpi_16bit_cpadhi_gpio0 { /* Mode 3 */
7255 + function = "dpi";
7256 + pins = "gpio0", "gpio1", "gpio2", "gpio3",
7257 + "gpio4", "gpio5", "gpio6", "gpio7",
7258 + "gpio8",
7259 + "gpio12", "gpio13", "gpio14", "gpio15",
7260 + "gpio16", "gpio17",
7261 + "gpio20", "gpio21", "gpio22", "gpio23",
7262 + "gpio24";
7263 + bias-disable;
7264 + };
7265 + rp1_dpi_16bit_pad666_gpio0: rp1_dpi_16bit_pad666_gpio0 { /* Mode 4 */
7266 + function = "dpi";
7267 + pins = "gpio0", "gpio1", "gpio2", "gpio3",
7268 + "gpio5", "gpio6", "gpio7", "gpio8",
7269 + "gpio9",
7270 + "gpio12", "gpio13", "gpio14", "gpio15",
7271 + "gpio16", "gpio17",
7272 + "gpio21", "gpio22", "gpio23", "gpio24",
7273 + "gpio25";
7274 + bias-disable;
7275 + };
7276 + rp1_dpi_18bit_gpio0: rp1_dpi_18bit_gpio0 { /* Mode 5, not fully supported by RP1 */
7277 + function = "dpi";
7278 + pins = "gpio0", "gpio1", "gpio2", "gpio3",
7279 + "gpio4", "gpio5", "gpio6", "gpio7",
7280 + "gpio8", "gpio9", "gpio10", "gpio11",
7281 + "gpio12", "gpio13", "gpio14", "gpio15",
7282 + "gpio16", "gpio17", "gpio18", "gpio19",
7283 + "gpio20", "gpio21";
7284 + bias-disable;
7285 + };
7286 + rp1_dpi_18bit_cpadhi_gpio0: rp1_dpi_18bit_cpadhi_gpio0 { /* Mode 6 */
7287 + function = "dpi";
7288 + pins = "gpio0", "gpio1", "gpio2", "gpio3",
7289 + "gpio4", "gpio5", "gpio6", "gpio7",
7290 + "gpio8", "gpio9",
7291 + "gpio12", "gpio13", "gpio14", "gpio15",
7292 + "gpio16", "gpio17",
7293 + "gpio20", "gpio21", "gpio22", "gpio23",
7294 + "gpio24", "gpio25";
7295 + bias-disable;
7296 + };
7297 + rp1_dpi_24bit_gpio0: rp1_dpi_24bit_gpio0 { /* Mode 7 -- All GPIOs used! */
7298 + function = "dpi";
7299 + pins = "gpio0", "gpio1", "gpio2", "gpio3",
7300 + "gpio4", "gpio5", "gpio6", "gpio7",
7301 + "gpio8", "gpio9", "gpio10", "gpio11",
7302 + "gpio12", "gpio13", "gpio14", "gpio15",
7303 + "gpio16", "gpio17", "gpio18", "gpio19",
7304 + "gpio20", "gpio21", "gpio22", "gpio23",
7305 + "gpio24", "gpio25", "gpio26", "gpio27";
7306 + bias-disable;
7307 + };
7308 +
7309 + rp1_pwm1_gpio45: rp1_pwm1_gpio45 {
7310 + function = "pwm1";
7311 + pins = "gpio45";
7312 + bias-pull-down;
7313 + };
7314 +
7315 + rp1_spi0_gpio9: rp1_spi0_gpio9 {
7316 + function = "spi0";
7317 + pins = "gpio9", "gpio10", "gpio11";
7318 + bias-disable;
7319 + drive-strength = <12>;
7320 + slew-rate = <1>;
7321 + };
7322 +
7323 + rp1_spi0_cs_gpio7: rp1_spi0_cs_gpio7 {
7324 + function = "spi0";
7325 + pins = "gpio7", "gpio8";
7326 + bias-pull-up;
7327 + };
7328 +
7329 + rp1_spi1_gpio19: rp1_spi1_gpio19 {
7330 + function = "spi1";
7331 + pins = "gpio19", "gpio20", "gpio21";
7332 + bias-disable;
7333 + drive-strength = <12>;
7334 + slew-rate = <1>;
7335 + };
7336 +
7337 + rp1_spi2_gpio1: rp1_spi2_gpio1 {
7338 + function = "spi2";
7339 + pins = "gpio1", "gpio2", "gpio3";
7340 + bias-disable;
7341 + drive-strength = <12>;
7342 + slew-rate = <1>;
7343 + };
7344 +
7345 + rp1_spi3_gpio5: rp1_spi3_gpio5 {
7346 + function = "spi3";
7347 + pins = "gpio5", "gpio6", "gpio7";
7348 + bias-disable;
7349 + drive-strength = <12>;
7350 + slew-rate = <1>;
7351 + };
7352 +
7353 + rp1_spi4_gpio9: rp1_spi4_gpio9 {
7354 + function = "spi4";
7355 + pins = "gpio9", "gpio10", "gpio11";
7356 + bias-disable;
7357 + drive-strength = <12>;
7358 + slew-rate = <1>;
7359 + };
7360 +
7361 + rp1_spi5_gpio13: rp1_spi5_gpio13 {
7362 + function = "spi5";
7363 + pins = "gpio13", "gpio14", "gpio15";
7364 + bias-disable;
7365 + drive-strength = <12>;
7366 + slew-rate = <1>;
7367 + };
7368 +
7369 + rp1_spi8_gpio49: rp1_spi8_gpio49 {
7370 + function = "spi8";
7371 + pins = "gpio49", "gpio50", "gpio51";
7372 + bias-disable;
7373 + drive-strength = <12>;
7374 + slew-rate = <1>;
7375 + };
7376 +
7377 + rp1_spi8_cs_gpio52: rp1_spi8_cs_gpio52 {
7378 + function = "spi0";
7379 + pins = "gpio52", "gpio53";
7380 + bias-pull-up;
7381 + };
7382 + };
7383 +
7384 + rp1_eth: ethernet@100000 {
7385 + reg = <0xc0 0x40100000 0x0 0x4000>;
7386 + compatible = "cdns,macb";
7387 + #address-cells = <1>;
7388 + #size-cells = <0>;
7389 + interrupts = <RP1_INT_ETH IRQ_TYPE_LEVEL_HIGH>;
7390 + clocks = <&macb_pclk &macb_hclk &rp1_clocks RP1_CLK_ETH_TSU>;
7391 + clock-names = "pclk", "hclk", "tsu_clk";
7392 + phy-mode = "rgmii-id";
7393 + cdns,aw2w-max-pipe = /bits/ 8 <8>;
7394 + cdns,ar2r-max-pipe = /bits/ 8 <8>;
7395 + cdns,use-aw2b-fill;
7396 + local-mac-address = [00 00 00 00 00 00];
7397 + status = "disabled";
7398 + };
7399 +
7400 + rp1_csi0: csi@110000 {
7401 + compatible = "raspberrypi,rp1-cfe";
7402 + reg = <0xc0 0x40110000 0x0 0x100>, // CSI2 DMA address
7403 + <0xc0 0x40114000 0x0 0x100>, // PHY/CSI Host address
7404 + <0xc0 0x40120000 0x0 0x100>, // MIPI CFG address
7405 + <0xc0 0x40124000 0x0 0x1000>; // PiSP FE address
7406 +
7407 + // interrupts must match rp1_pisp_fe setup
7408 + interrupts = <RP1_INT_MIPI0 IRQ_TYPE_LEVEL_HIGH>;
7409 +
7410 + clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
7411 + assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
7412 + assigned-clock-rates = <25000000>;
7413 +
7414 + #address-cells = <1>;
7415 + #size-cells = <0>;
7416 + status = "disabled";
7417 + };
7418 +
7419 + rp1_csi1: csi@128000 {
7420 + compatible = "raspberrypi,rp1-cfe";
7421 + reg = <0xc0 0x40128000 0x0 0x100>, // CSI2 DMA address
7422 + <0xc0 0x4012c000 0x0 0x100>, // PHY/CSI Host address
7423 + <0xc0 0x40138000 0x0 0x100>, // MIPI CFG address
7424 + <0xc0 0x4013c000 0x0 0x1000>; // PiSP FE address
7425 +
7426 + // interrupts must match rp1_pisp_fe setup
7427 + interrupts = <RP1_INT_MIPI1 IRQ_TYPE_LEVEL_HIGH>;
7428 +
7429 + clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
7430 + assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
7431 + assigned-clock-rates = <25000000>;
7432 +
7433 + #address-cells = <1>;
7434 + #size-cells = <0>;
7435 + status = "disabled";
7436 + };
7437 +
7438 + rp1_mmc0: mmc@180000 {
7439 + reg = <0xc0 0x40180000 0x0 0x100>;
7440 + compatible = "snps,dwcmshc-sdhci";
7441 + interrupts = <RP1_INT_SDIO0 IRQ_TYPE_LEVEL_HIGH>;
7442 + clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core
7443 + &rp1_clocks RP1_CLK_SDIO_TIMER
7444 + &rp1_sdio_clk0>;
7445 + clock-names = "bus", "core", "timeout", "sdio";
7446 + /* Bank 0 VDDIO is fixed */
7447 + no-1-8-v;
7448 + bus-width = <4>;
7449 + vmmc-supply = <&rp1_vdd_3v3>;
7450 + broken-cd;
7451 + status = "disabled";
7452 + };
7453 +
7454 + rp1_mmc1: mmc@184000 {
7455 + reg = <0xc0 0x40184000 0x0 0x100>;
7456 + compatible = "snps,dwcmshc-sdhci";
7457 + interrupts = <RP1_INT_SDIO1 IRQ_TYPE_LEVEL_HIGH>;
7458 + clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core
7459 + &rp1_clocks RP1_CLK_SDIO_TIMER
7460 + &rp1_sdio_clk1>;
7461 + clock-names = "bus", "core", "timeout", "sdio";
7462 + bus-width = <4>;
7463 + vmmc-supply = <&rp1_vdd_3v3>;
7464 + /* Nerf SDR speeds */
7465 + sdhci-caps-mask = <0x3 0x0>;
7466 + broken-cd;
7467 + status = "disabled";
7468 + };
7469 +
7470 + rp1_dma: dma@188000 {
7471 + reg = <0xc0 0x40188000 0x0 0x1000>;
7472 + compatible = "snps,axi-dma-1.01a";
7473 + interrupts = <RP1_INT_DMA IRQ_TYPE_LEVEL_HIGH>;
7474 + clocks = <&sdhci_core &rp1_clocks RP1_CLK_SYS>;
7475 + clock-names = "core-clk", "cfgr-clk";
7476 +
7477 + #dma-cells = <1>;
7478 + dma-channels = <8>;
7479 + snps,dma-masters = <1>;
7480 + snps,dma-targets = <64>;
7481 + snps,data-width = <4>; // (8 << 4) == 128 bits
7482 + snps,block-size = <0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000>;
7483 + snps,priority = <0 1 2 3 4 5 6 7>;
7484 + snps,axi-max-burst-len = <8>;
7485 + status = "disabled";
7486 + };
7487 +
7488 + rp1_usb0: usb@200000 {
7489 + reg = <0xc0 0x40200000 0x0 0x100000>;
7490 + compatible = "snps,dwc3";
7491 + dr_mode = "host";
7492 + usb3-lpm-capable;
7493 + snps,axi-pipe-limit = /bits/ 8 <8>;
7494 + snps,dis_rxdet_inp3_quirk;
7495 + snps,tx-max-burst-prd = <8>;
7496 + snps,tx-thr-num-pkt-prd = <2>;
7497 + interrupts = <RP1_INT_USBHOST0_0 IRQ_TYPE_EDGE_RISING>;
7498 + status = "disabled";
7499 + };
7500 +
7501 + rp1_usb1: usb@300000 {
7502 + reg = <0xc0 0x40300000 0x0 0x100000>;
7503 + compatible = "snps,dwc3";
7504 + dr_mode = "host";
7505 + usb3-lpm-capable;
7506 + snps,axi-pipe-limit = /bits/ 8 <8>;
7507 + snps,dis_rxdet_inp3_quirk;
7508 + snps,tx-max-burst-prd = <8>;
7509 + snps,tx-thr-num-pkt-prd = <2>;
7510 + interrupts = <RP1_INT_USBHOST1_0 IRQ_TYPE_EDGE_RISING>;
7511 + status = "disabled";
7512 + };
7513 +
7514 + rp1_dsi0: dsi@110000 {
7515 + compatible = "raspberrypi,rp1dsi";
7516 + status = "disabled";
7517 + reg = <0xc0 0x40118000 0x0 0x1000>, // MIPI0 DSI DMA (ArgonDPI)
7518 + <0xc0 0x4011c000 0x0 0x1000>, // MIPI0 DSI Host (SNPS)
7519 + <0xc0 0x40120000 0x0 0x1000>; // MIPI0 CFG
7520 +
7521 + interrupts = <RP1_INT_MIPI0 IRQ_TYPE_LEVEL_HIGH>;
7522 +
7523 + clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>, // required, config bus clock
7524 + <&rp1_clocks RP1_CLK_MIPI0_DPI>, // required, pixel clock
7525 + <&clksrc_mipi0_dsi_byteclk>, // internal, parent for divide
7526 + <&clk_xosc>; // hardwired to DSI "refclk"
7527 + clock-names = "cfgclk", "dpiclk", "byteclk", "refclk";
7528 +
7529 + assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>,
7530 + <&rp1_clocks RP1_CLK_MIPI0_DPI>;
7531 + assigned-clock-rates = <25000000>;
7532 + assigned-clock-parents = <0>, <&clksrc_mipi0_dsi_byteclk>;
7533 + };
7534 +
7535 + rp1_dsi1: dsi@128000 {
7536 + compatible = "raspberrypi,rp1dsi";
7537 + status = "disabled";
7538 + reg = <0xc0 0x40130000 0x0 0x1000>, // MIPI1 DSI DMA (ArgonDPI)
7539 + <0xc0 0x40134000 0x0 0x1000>, // MIPI1 DSI Host (SNPS)
7540 + <0xc0 0x40138000 0x0 0x1000>; // MIPI1 CFG
7541 +
7542 + interrupts = <RP1_INT_MIPI1 IRQ_TYPE_LEVEL_HIGH>;
7543 +
7544 + clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>, // required, config bus clock
7545 + <&rp1_clocks RP1_CLK_MIPI1_DPI>, // required, pixel clock
7546 + <&clksrc_mipi1_dsi_byteclk>, // internal, parent for divide
7547 + <&clk_xosc>; // hardwired to DSI "refclk"
7548 + clock-names = "cfgclk", "dpiclk", "byteclk", "refclk";
7549 +
7550 + assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>,
7551 + <&rp1_clocks RP1_CLK_MIPI1_DPI>;
7552 + assigned-clock-rates = <25000000>;
7553 + assigned-clock-parents = <0>, <&clksrc_mipi1_dsi_byteclk>;
7554 + };
7555 +
7556 + /* VEC and DPI both need to control PLL_VIDEO and cannot work together; */
7557 + /* config.txt should enable one or other using dtparam=vec or an overlay. */
7558 + rp1_vec: vec@144000 {
7559 + compatible = "raspberrypi,rp1vec";
7560 + status = "disabled";
7561 + reg = <0xc0 0x40144000 0x0 0x1000>, // VIDEO_OUT_VEC
7562 + <0xc0 0x40140000 0x0 0x1000>; // VIDEO_OUT_CFG
7563 +
7564 + interrupts = <RP1_INT_VIDEO_OUT IRQ_TYPE_LEVEL_HIGH>;
7565 +
7566 + clocks = <&rp1_clocks RP1_CLK_VEC>;
7567 +
7568 + assigned-clocks = <&rp1_clocks RP1_PLL_VIDEO_CORE>,
7569 + <&rp1_clocks RP1_PLL_VIDEO_SEC>,
7570 + <&rp1_clocks RP1_CLK_VEC>;
7571 + assigned-clock-rates = <1188000000>,
7572 + <108000000>,
7573 + <108000000>;
7574 + assigned-clock-parents = <0>,
7575 + <&rp1_clocks RP1_PLL_VIDEO_CORE>,
7576 + <&rp1_clocks RP1_PLL_VIDEO_SEC>;
7577 + };
7578 +
7579 + rp1_dpi: dpi@148000 {
7580 + compatible = "raspberrypi,rp1dpi";
7581 + status = "disabled";
7582 + reg = <0xc0 0x40148000 0x0 0x1000>, // VIDEO_OUT DPI
7583 + <0xc0 0x40140000 0x0 0x1000>; // VIDEO_OUT_CFG
7584 +
7585 + interrupts = <RP1_INT_VIDEO_OUT IRQ_TYPE_LEVEL_HIGH>;
7586 +
7587 + clocks = <&rp1_clocks RP1_CLK_DPI>, // DPI pixel clock
7588 + <&rp1_clocks RP1_PLL_VIDEO>, // PLL primary divider, and
7589 + <&rp1_clocks RP1_PLL_VIDEO_CORE>; // VCO, which we also control
7590 + clock-names = "dpiclk", "plldiv", "pllcore";
7591 +
7592 + assigned-clocks = <&rp1_clocks RP1_CLK_DPI>;
7593 + assigned-clock-parents = <&rp1_clocks RP1_PLL_VIDEO>;
7594 + };
7595 + };
7596 +};
7597 +
7598 +&clocks {
7599 + clk_xosc: clk_xosc {
7600 + compatible = "fixed-clock";
7601 + #clock-cells = <0>;
7602 + clock-output-names = "xosc";
7603 + clock-frequency = <50000000>;
7604 + };
7605 + macb_pclk: macb_pclk {
7606 + compatible = "fixed-clock";
7607 + #clock-cells = <0>;
7608 + clock-output-names = "pclk";
7609 + clock-frequency = <200000000>;
7610 + };
7611 + macb_hclk: macb_hclk {
7612 + compatible = "fixed-clock";
7613 + #clock-cells = <0>;
7614 + clock-output-names = "hclk";
7615 + clock-frequency = <200000000>;
7616 + };
7617 + sdio_src: sdio_src {
7618 + // 400 MHz on FPGA. PLL sys VCO on asic
7619 + compatible = "fixed-clock";
7620 + #clock-cells = <0>;
7621 + clock-output-names = "src";
7622 + clock-frequency = <1000000000>;
7623 + };
7624 + sdhci_core: sdhci_core {
7625 + compatible = "fixed-clock";
7626 + #clock-cells = <0>;
7627 + clock-output-names = "core";
7628 + clock-frequency = <50000000>;
7629 + };
7630 + clksrc_mipi0_dsi_byteclk: clksrc_mipi0_dsi_byteclk {
7631 + // This clock is synthesized by MIPI0 D-PHY, when DSI is running.
7632 + // Its frequency is not known a priori (until a panel driver attaches)
7633 + // so assign a made-up frequency of 72MHz so it can be divided for DPI.
7634 + compatible = "fixed-clock";
7635 + #clock-cells = <0>;
7636 + clock-output-names = "clksrc_mipi0_dsi_byteclk";
7637 + clock-frequency = <72000000>;
7638 + };
7639 + clksrc_mipi1_dsi_byteclk: clksrc_mipi1_dsi_byteclk {
7640 + // This clock is synthesized by MIPI1 D-PHY, when DSI is running.
7641 + // Its frequency is not known a priori (until a panel driver attaches)
7642 + // so assign a made-up frequency of 72MHz so it can be divided for DPI.
7643 + compatible = "fixed-clock";
7644 + #clock-cells = <0>;
7645 + clock-output-names = "clksrc_mipi1_dsi_byteclk";
7646 + clock-frequency = <72000000>;
7647 + };
7648 +};
7649 +
7650 +/ {
7651 + rp1_vdd_3v3: rp1_vdd_3v3 {
7652 + compatible = "regulator-fixed";
7653 + regulator-name = "vdd-3v3";
7654 + regulator-min-microvolt = <3300000>;
7655 + regulator-max-microvolt = <3300000>;
7656 + regulator-always-on;
7657 + };
7658 +};
7659 --- a/arch/arm64/boot/dts/broadcom/Makefile
7660 +++ b/arch/arm64/boot/dts/broadcom/Makefile
7661 @@ -16,6 +16,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rp
7662 dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-cm3.dtb
7663 dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-cm4.dtb
7664 dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-cm4s.dtb
7665 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-5-b.dtb
7666
7667 subdir-y += bcmbca
7668 subdir-y += northstar2
7669 --- /dev/null
7670 +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
7671 @@ -0,0 +1 @@
7672 +#include "../../../../arm/boot/dts/bcm2712-rpi-5-b.dts"
Staging tree of Daniel Golle