target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4019-le1.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/leds/common.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8
   9 / {
  10         model = "YYeTs LE1";
  11         compatible = "yyets,le1";
  12
  13         aliases {
  14                 led-boot = &led_usb;
  15                 led-failsafe = &led_usb;
  16                 led-upgrade = &led_usb;
  17
  18                 ethernet0 = &swport5;
  19                 ethernet1 = &gmac;
  20                 label-mac-device = &gmac;
  21         };
  22
  23         keys {
  24                 compatible = "gpio-keys";
  25
  26                 reset {
  27                         label = "reset";
  28                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  29                         linux,code = <KEY_RESTART>;
  30                 };
  31         };
  32
  33         leds {
  34                 compatible = "gpio-leds";
  35
  36                 led_usb: usb {
  37                         function = LED_FUNCTION_USB;
  38                         color = <LED_COLOR_ID_GREEN>;
  39                         gpios = <&tlmm 36 GPIO_ACTIVE_LOW>;
  40                         linux,default-trigger = "usbport";
  41                         trigger-sources = <&usb3_port1>, <&usb3_port2>, <&usb2_port1>;
  42                 };
  43
  44                 wlan2g {
  45                         label = "green:wlan2g";
  46                         gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
  47                         linux,default-trigger = "phy0tpt";
  48                 };
  49
  50                 wlan5g {
  51                         label = "green:wlan5g";
  52                         gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
  53                         linux,default-trigger = "phy1tpt";
  54                 };
  55         };
  56
  57         soc {
  58                 tcsr@1949000 {
  59                         compatible = "qcom,tcsr";
  60                         reg = <0x1949000 0x100>;
  61                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  62                 };
  63
  64                 tcsr@194b000 {
  65                         compatible = "qcom,tcsr";
  66                         reg = <0x194b000 0x100>;
  67                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  68                 };
  69
  70                 ess_tcsr@1953000 {
  71                         compatible = "qcom,tcsr";
  72                         reg = <0x1953000 0x1000>;
  73                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  74                 };
  75
  76                 tcsr@1957000 {
  77                         compatible = "qcom,tcsr";
  78                         reg = <0x1957000 0x100>;
  79                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  80                 };
  81         };
  82 };
  83
  84 &blsp_dma {
  85         status = "okay";
  86 };
  87
  88 &blsp1_spi1 {
  89         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
  90         pinctrl-0 = <&spi_0_pins>;
  91         pinctrl-names = "default";
  92         status = "okay";
  93
  94         flash@0 {
  95                 compatible = "jedec,spi-nor";
  96                 #address-cells = <1>;
  97                 #size-cells = <1>;
  98                 reg = <0>;
  99                 spi-max-frequency = <24000000>;
 100
 101                 partitions {
 102                         compatible = "fixed-partitions";
 103                         #address-cells = <1>;
 104                         #size-cells = <1>;
 105
 106                         partition@0 {
 107                                 label = "SBL1";
 108                                 reg = <0x0 0x40000>;
 109                                 read-only;
 110                         };
 111
 112                         partition@40000 {
 113                                 label = "MIBIB";
 114                                 reg = <0x40000 0x20000>;
 115                                 read-only;
 116                         };
 117
 118                         partition@60000 {
 119                                 label = "QSEE";
 120                                 reg = <0x60000 0x60000>;
 121                                 read-only;
 122                         };
 123
 124                         partition@c0000 {
 125                                 label = "CDT";
 126                                 reg = <0xc0000 0x10000>;
 127                                 read-only;
 128                         };
 129
 130                         partition@d0000 {
 131                                 label = "DDRPARAMS";
 132                                 reg = <0xd0000 0x10000>;
 133                                 read-only;
 134                         };
 135
 136                         partition@e0000 {
 137                                 label = "APPSBLENV";
 138                                 reg = <0xe0000 0x10000>;
 139                                 read-only;
 140                         };
 141
 142                         partition@f0000 {
 143                                 label = "APPSBL";
 144                                 reg = <0xf0000 0x80000>;
 145                                 read-only;
 146                         };
 147
 148                         partition@170000 {
 149                                 label = "ART";
 150                                 reg = <0x170000 0x10000>;
 151                                 read-only;
 152
 153                                 nvmem-layout {
 154                                         compatible = "fixed-layout";
 155                                         #address-cells = <1>;
 156                                         #size-cells = <1>;
 157
 158                                         precal_art_1000: precal@1000 {
 159                                                 reg = <0x1000 0x2f20>;
 160                                         };
 161
 162                                         precal_art_5000: precal@5000 {
 163                                                 reg = <0x5000 0x2f20>;
 164                                         };
 165                                 };
 166                         };
 167
 168                         partition@180000 {
 169                                 compatible = "denx,fit";
 170                                 label = "firmware";
 171                                 reg = <0x180000 0x1e80000>;
 172                         };
 173                 };
 174         };
 175 };
 176
 177 &blsp1_uart1 {
 178         pinctrl-0 = <&serial_pins>;
 179         pinctrl-names = "default";
 180         status = "okay";
 181 };
 182
 183 &cryptobam {
 184         status = "okay";
 185 };
 186
 187 &crypto {
 188         status = "okay";
 189 };
 190
 191 &gmac {
 192         status = "okay";
 193 };
 194
 195 &mdio {
 196         pinctrl-0 = <&mdio_pins>;
 197         pinctrl-names = "default";
 198         status = "okay";
 199 };
 200
 201 &prng {
 202         status = "okay";
 203 };
 204
 205 &switch {
 206         status = "okay";
 207 };
 208
 209 &swport1 {
 210         status = "okay";
 211 };
 212
 213 &swport2 {
 214         status = "okay";
 215 };
 216
 217 &swport3 {
 218         status = "okay";
 219 };
 220
 221 &swport4 {
 222         status = "okay";
 223 };
 224
 225 &swport5 {
 226         status = "okay";
 227 };
 228
 229 &tlmm {
 230         mdio_pins: mdio_pinmux {
 231                 mux_1 {
 232                         pins = "gpio6";
 233                         function = "mdio";
 234                         bias-pull-up;
 235                 };
 236                 mux_2 {
 237                         pins = "gpio7";
 238                         function = "mdc";
 239                         bias-pull-up;
 240                 };
 241         };
 242
 243         serial_pins: serial_pinmux {
 244                 mux {
 245                         pins = "gpio16", "gpio17";
 246                         function = "blsp_uart0";
 247                         bias-disable;
 248                 };
 249         };
 250
 251         spi_0_pins: spi_0_pinmux {
 252                 pinmux {
 253                         function = "blsp_spi0";
 254                         pins = "gpio13", "gpio14", "gpio15";
 255                         drive-strength = <12>;
 256                         bias-disable;
 257                 };
 258
 259                 pinmux_cs {
 260                         function = "gpio";
 261                         pins = "gpio12";
 262                         drive-strength = <2>;
 263                         bias-disable;
 264                         output-high;
 265                 };
 266         };
 267 };
 268
 269 &usb2 {
 270         status = "okay";
 271
 272         dwc3@6000000 {
 273                 #address-cells = <1>;
 274                 #size-cells = <0>;
 275
 276                 usb2_port1: port@1 {
 277                         reg = <1>;
 278                         #trigger-source-cells = <0>;
 279                 };
 280         };
 281 };
 282
 283 &usb2_hs_phy {
 284         status = "okay";
 285 };
 286
 287 &usb3 {
 288         status = "okay";
 289
 290         dwc3@8a00000 {
 291                 #address-cells = <1>;
 292                 #size-cells = <0>;
 293
 294                 usb3_port1: port@1 {
 295                         reg = <1>;
 296                         #trigger-source-cells = <0>;
 297                 };
 298
 299                 usb3_port2: port@2 {
 300                         reg = <2>;
 301                         #trigger-source-cells = <0>;
 302                 };
 303         };
 304 };
 305
 306 &usb3_hs_phy {
 307         status = "okay";
 308 };
 309
 310 &usb3_ss_phy {
 311         status = "okay";
 312 };
 313
 314 &watchdog {
 315         status = "okay";
 316 };
 317
 318 &wifi0 {
 319         status = "okay";
 320         nvmem-cells = <&precal_art_1000>;
 321         nvmem-cell-names = "pre-calibration";
 322         qcom,ath10k-calibration-variant = "YYeTs-LE1";
 323 };
 324
 325 &wifi1 {
 326         status = "okay";
 327         nvmem-cells = <&precal_art_5000>;
 328         nvmem-cell-names = "pre-calibration";
 329         qcom,ath10k-calibration-variant = "YYeTs-LE1";
 330 };