interrupt-map = <0x7000 0 0 1 &icu0 30 1>;
req-mask = <0x1>;
+ resets = <&reset 13 13>;
+ reset-names = "pci";
+
device_type = "pci";
};
};
interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
req-mask = <0x1>; /* GNT1 */
+ resets = <&reset 13 13>;
+ reset-names = "pci";
+
device_type = "pci";
};
};
interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
req-mask = <0x1>; /* GNT1 */
+ resets = <&reset0 13 13>;
+ reset-names = "pci";
+
device_type = "pci";
};
};
--- /dev/null
+From 44e33007412b9a8fc32faee897a57c8c1bb39391 Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Sun, 3 Feb 2019 11:10:50 +0100
+Subject: [PATCH 2/6] MIPS: lantiq: pci: reset core on startup
+
+Reset the pci core on startup as it's done by the vendor SDK. It was
+most likely omitted, as we haven't had a proper reset controller for
+ages.
+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+---
+ arch/mips/pci/pci-lantiq.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
+index 9afca76a7b02..2e41f91c688c 100644
+--- a/arch/mips/pci/pci-lantiq.c
++++ b/arch/mips/pci/pci-lantiq.c
+@@ -16,6 +16,8 @@
+ #include <linux/of_gpio.h>
+ #include <linux/of_irq.h>
+ #include <linux/of_pci.h>
++#include <linux/reset.h>
++#include <linux/device.h>
+
+ #include <asm/addrspace.h>
+
+@@ -95,6 +97,12 @@ static int ltq_pci_startup(struct platform_device *pdev)
+ struct device_node *node = pdev->dev.of_node;
+ const __be32 *req_mask, *bus_clk;
+ u32 temp_buffer;
++ int ret;
++
++ /* reset pci core */
++ ret = device_reset(&pdev->dev);
++ if (ret)
++ return dev_err_probe(&pdev->dev, ret, "PCI reset failed!\n");
+
+ /* get our clocks */
+ clk_pci = clk_get(&pdev->dev, NULL);
+--
+2.25.1
+
--- /dev/null
+From 1058f2729707f680acbaae60f56f022de48da186 Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Sun, 3 Feb 2019 11:10:50 +0100
+Subject: [PATCH 2/6] MIPS: lantiq: pci: reset core on startup
+
+Reset the pci core on startup as it's done by the vendor SDK. It was
+most likely omitted, as we haven't had a proper reset controller for
+ages.
+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+---
+ arch/mips/pci/pci-lantiq.c | 11 +++++++++++
+ 1 files changed, 11 insertions(+)
+
+diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
+index 9afca76a7b02..7c30399a60d7 100644
+--- a/arch/mips/pci/pci-lantiq.c
++++ b/arch/mips/pci/pci-lantiq.c
+@@ -16,6 +16,7 @@
+ #include <linux/of_gpio.h>
+ #include <linux/of_irq.h>
+ #include <linux/of_pci.h>
++#include <linux/reset.h>
+
+ #include <asm/addrspace.h>
+
+@@ -95,6 +96,16 @@ static int ltq_pci_startup(struct platform_device *pdev)
+ struct device_node *node = pdev->dev.of_node;
+ const __be32 *req_mask, *bus_clk;
+ u32 temp_buffer;
++ int ret;
++
++ /* reset pci core */
++ ret = device_reset(&pdev->dev);
++ if (ret) {
++ if (ret != -EPROBE_DEFER)
++ dev_err(&pdev->dev, "PCI reset failed!\n");
++
++ return ret;
++ }
+
+ /* get our clocks */
+ clk_pci = clk_get(&pdev->dev, NULL);
+--
+2.25.1
+