target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /*
   3  * Device Tree file for Globalscale MOCHAbin
   4  * Copyright (C) 2019 Globalscale technologies, Inc.
   5  * Copyright (C) 2021 Sartura Ltd.
   6  *
   7  */
   8
   9 /dts-v1/;
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include "armada-7040.dtsi"
  13
  14 / {
  15         model = "Globalscale MOCHAbin";
  16         compatible = "globalscale,mochabin", "marvell,armada7040",
  17                      "marvell,armada-ap806-quad", "marvell,armada-ap806";
  18
  19         chosen {
  20                 stdout-path = "serial0:115200n8";
  21         };
  22
  23         aliases {
  24                 ethernet0 = &cp0_eth0;
  25                 ethernet1 = &cp0_eth1;
  26                 ethernet2 = &cp0_eth2;
  27                 ethernet3 = &swport1;
  28                 ethernet4 = &swport2;
  29                 ethernet5 = &swport3;
  30                 ethernet6 = &swport4;
  31         };
  32
  33         /* SFP+ 10G */
  34         sfp_eth0: sfp-eth0 {
  35                 compatible = "sff,sfp";
  36                 i2c-bus = <&cp0_i2c1>;
  37                 los-gpio = <&sfp_gpio 3 GPIO_ACTIVE_HIGH>;
  38                 mod-def0-gpio = <&sfp_gpio 2 GPIO_ACTIVE_LOW>;
  39                 tx-disable-gpio = <&sfp_gpio 1 GPIO_ACTIVE_HIGH>;
  40                 tx-fault-gpio  = <&sfp_gpio 0 GPIO_ACTIVE_HIGH>;
  41         };
  42
  43         /* SFP 1G */
  44         sfp_eth2: sfp-eth2 {
  45                 compatible = "sff,sfp";
  46                 i2c-bus = <&cp0_i2c0>;
  47                 los-gpio = <&sfp_gpio 7 GPIO_ACTIVE_HIGH>;
  48                 mod-def0-gpio = <&sfp_gpio 6 GPIO_ACTIVE_LOW>;
  49                 tx-disable-gpio = <&sfp_gpio 5 GPIO_ACTIVE_HIGH>;
  50                 tx-fault-gpio  = <&sfp_gpio 4 GPIO_ACTIVE_HIGH>;
  51         };
  52 };
  53
  54 /* microUSB UART console */
  55 &uart0 {
  56         status = "okay";
  57
  58         pinctrl-0 = <&uart0_pins>;
  59         pinctrl-names = "default";
  60 };
  61
  62 /* eMMC */
  63 &ap_sdhci0 {
  64         status = "okay";
  65
  66         bus-width = <4>;
  67         non-removable;
  68         /delete-property/ marvell,xenon-phy-slow-mode;
  69         no-1-8-v;
  70 };
  71
  72 &cp0_pinctrl {
  73         cp0_uart0_pins: cp0-uart0-pins {
  74                 marvell,pins = "mpp6", "mpp7";
  75                 marvell,function = "uart0";
  76         };
  77
  78         cp0_spi0_pins: cp0-spi0-pins {
  79                 marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59";
  80                 marvell,function = "spi0";
  81         };
  82
  83         cp0_spi1_pins: cp0-spi1-pins {
  84                 marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
  85                 marvell,function = "spi1";
  86         };
  87
  88         cp0_i2c0_pins: cp0-i2c0-pins {
  89                 marvell,pins = "mpp37", "mpp38";
  90                 marvell,function = "i2c0";
  91         };
  92
  93         cp0_i2c1_pins: cp0-i2c1-pins {
  94                 marvell,pins = "mpp2", "mpp3";
  95                 marvell,function = "i2c1";
  96         };
  97
  98         pca9554_int_pins: pca9554-int-pins {
  99                 marvell,pins = "mpp27";
 100                 marvell,function = "gpio";
 101         };
 102
 103         cp0_rgmii1_pins: cp0-rgmii1-pins {
 104                 marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47", "mpp48", "mpp49",
 105                                "mpp50", "mpp51", "mpp52", "mpp53", "mpp54", "mpp55";
 106                 marvell,function = "ge1";
 107         };
 108
 109         is31_sdb_pins: is31-sdb-pins {
 110                 marvell,pins = "mpp30";
 111                 marvell,function = "gpio";
 112         };
 113
 114         cp0_pcie_reset_pins: cp0-pcie-reset-pins {
 115                 marvell,pins = "mpp9";
 116                 marvell,function = "gpio";
 117         };
 118
 119         cp0_switch_pins: cp0-switch-pins {
 120                 marvell,pins = "mpp0", "mpp1";
 121                 marvell,function = "gpio";
 122         };
 123
 124         cp0_phy_pins: cp0-phy-pins {
 125                 marvell,pins = "mpp12";
 126                 marvell,function = "gpio";
 127         };
 128 };
 129
 130 /* mikroBUS UART */
 131 &cp0_uart0 {
 132         status = "okay";
 133
 134         pinctrl-names = "default";
 135         pinctrl-0 = <&cp0_uart0_pins>;
 136 };
 137
 138 /* mikroBUS SPI */
 139 &cp0_spi0 {
 140         status = "okay";
 141
 142         pinctrl-names = "default";
 143         pinctrl-0 = <&cp0_spi0_pins>;
 144 };
 145
 146 /* SPI-NOR */
 147 &cp0_spi1{
 148         status = "okay";
 149
 150         pinctrl-names = "default";
 151         pinctrl-0 = <&cp0_spi1_pins>;
 152
 153         spi-flash@0 {
 154                 #address-cells = <1>;
 155                 #size-cells = <1>;
 156                 compatible = "jedec,spi-nor";
 157                 reg = <0>;
 158                 spi-max-frequency = <20000000>;
 159
 160                 partitions {
 161                         compatible = "fixed-partitions";
 162                         #address-cells = <1>;
 163                         #size-cells = <1>;
 164
 165                         partition@0 {
 166                                 label = "u-boot";
 167                                 reg = <0x0 0x3e0000>;
 168                                 read-only;
 169                         };
 170
 171                         partition@3e0000 {
 172                                 label = "hw-info";
 173                                 reg = <0x3e0000 0x10000>;
 174                                 read-only;
 175                         };
 176
 177                         partition@3f0000 {
 178                                 label = "u-boot-env";
 179                                 reg = <0x3f0000 0x10000>;
 180                         };
 181                 };
 182         };
 183 };
 184
 185 /* mikroBUS, 1G SFP and GPIO expander */
 186 &cp0_i2c0 {
 187         status = "okay";
 188
 189         pinctrl-names = "default";
 190         pinctrl-0 = <&cp0_i2c0_pins>;
 191         clock-frequency = <100000>;
 192
 193         sfp_gpio: pca9554@39 {
 194                 compatible = "nxp,pca9554";
 195                 pinctrl-names = "default";
 196                 pinctrl-0 = <&pca9554_int_pins>;
 197                 reg = <0x39>;
 198
 199                 interrupt-parent = <&cp0_gpio1>;
 200                 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
 201                 interrupt-controller;
 202                 #interrupt-cells = <2>;
 203
 204                 gpio-controller;
 205                 #gpio-cells = <2>;
 206
 207                 /*
 208                  * IO0_0: SFP+_TX_FAULT
 209                  * IO0_1: SFP+_TX_DISABLE
 210                  * IO0_2: SFP+_PRSNT
 211                  * IO0_3: SFP+_LOSS
 212                  * IO0_4: SFP_TX_FAULT
 213                  * IO0_5: SFP_TX_DISABLE
 214                  * IO0_6: SFP_PRSNT
 215                  * IO0_7: SFP_LOSS
 216                  */
 217         };
 218 };
 219
 220 /* IS31FL3199, mini-PCIe and 10G SFP+ */
 221 &cp0_i2c1 {
 222         status = "okay";
 223
 224         pinctrl-names = "default";
 225         pinctrl-0 = <&cp0_i2c1_pins>;
 226         clock-frequency = <100000>;
 227
 228         leds@64 {
 229                 compatible = "issi,is31fl3199";
 230                 #address-cells = <1>;
 231                 #size-cells = <0>;
 232                 pinctrl-names = "default";
 233                 pinctrl-0 = <&is31_sdb_pins>;
 234                 shutdown-gpios = <&cp0_gpio1 30 GPIO_ACTIVE_HIGH>;
 235                 reg = <0x64>;
 236
 237                 led1_red: led@1 {
 238                         label = "red:led1";
 239                         reg = <1>;
 240                         led-max-microamp = <20000>;
 241                 };
 242
 243                 led1_green: led@2 {
 244                         label = "green:led1";
 245                         reg = <2>;
 246                 };
 247
 248                 led1_blue: led@3 {
 249                         label = "blue:led1";
 250                         reg = <3>;
 251                 };
 252
 253                 led2_red: led@4 {
 254                         label = "red:led2";
 255                         reg = <4>;
 256                 };
 257
 258                 led2_green: led@5 {
 259                         label = "green:led2";
 260                         reg = <5>;
 261                 };
 262
 263                 led2_blue: led@6 {
 264                         label = "blue:led2";
 265                         reg = <6>;
 266                 };
 267
 268                 led3_red: led@7 {
 269                         label = "red:led3";
 270                         reg = <7>;
 271                 };
 272
 273                 led3_green: led@8 {
 274                         label = "green:led3";
 275                         reg = <8>;
 276                 };
 277
 278                 led3_blue: led@9 {
 279                         label = "blue:led3";
 280                         reg = <9>;
 281                 };
 282         };
 283 };
 284
 285 &cp0_mdio {
 286         status = "okay";
 287
 288         /* 88E1512 PHY */
 289         eth2phy: ethernet-phy@1 {
 290                 reg = <1>;
 291                 sfp = <&sfp_eth2>;
 292
 293                 pinctrl-names = "default";
 294                 pinctrl-0 = <&cp0_phy_pins>;
 295                 reset-gpios = <&cp0_gpio1 12 GPIO_ACTIVE_LOW>;
 296         };
 297
 298         /* 88E6141 Topaz switch */
 299         switch: switch@3 {
 300                 compatible = "marvell,mv88e6085";
 301                 #address-cells = <1>;
 302                 #size-cells = <0>;
 303                 reg = <3>;
 304
 305                 pinctrl-names = "default";
 306                 pinctrl-0 = <&cp0_switch_pins>;
 307                 reset-gpios = <&cp0_gpio1 0 GPIO_ACTIVE_LOW>;
 308
 309                 interrupt-parent = <&cp0_gpio1>;
 310                 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
 311
 312                 ports {
 313                         #address-cells = <1>;
 314                         #size-cells = <0>;
 315
 316                         swport1: port@1 {
 317                                 reg = <1>;
 318                                 label = "lan0";
 319                                 phy-handle = <&swphy1>;
 320                         };
 321
 322                         swport2: port@2 {
 323                                 reg = <2>;
 324                                 label = "lan1";
 325                                 phy-handle = <&swphy2>;
 326                         };
 327
 328                         swport3: port@3 {
 329                                 reg = <3>;
 330                                 label = "lan2";
 331                                 phy-handle = <&swphy3>;
 332                         };
 333
 334                         swport4: port@4 {
 335                                 reg = <4>;
 336                                 label = "lan3";
 337                                 phy-handle = <&swphy4>;
 338                         };
 339
 340                         port@5 {
 341                                 reg = <5>;
 342                                 ethernet = <&cp0_eth1>;
 343                                 phy-mode = "2500base-x";
 344                                 managed = "in-band-status";
 345                         };
 346                 };
 347
 348                 mdio {
 349                         #address-cells = <1>;
 350                         #size-cells = <0>;
 351
 352                         swphy1: swphy1@17 {
 353                                 reg = <17>;
 354                         };
 355
 356                         swphy2: swphy2@18 {
 357                                 reg = <18>;
 358                         };
 359
 360                         swphy3: swphy3@19 {
 361                                 reg = <19>;
 362                         };
 363
 364                         swphy4: swphy4@20 {
 365                                 reg = <20>;
 366                         };
 367                 };
 368         };
 369 };
 370
 371 &cp0_ethernet {
 372         status = "okay";
 373 };
 374
 375 /* 10G SFP+ */
 376 &cp0_eth0 {
 377         status = "okay";
 378
 379         phy-mode = "10gbase-r";
 380         phys = <&cp0_comphy4 0>;
 381         managed = "in-band-status";
 382         sfp = <&sfp_eth0>;
 383 };
 384
 385 /* Topaz switch uplink */
 386 &cp0_eth1 {
 387         status = "okay";
 388
 389         phy-mode = "2500base-x";
 390         phys = <&cp0_comphy0 1>;
 391
 392         fixed-link {
 393                 speed = <2500>;
 394                 full-duplex;
 395         };
 396 };
 397
 398 /* 1G SFP or 1G RJ45 */
 399 &cp0_eth2 {
 400         status = "okay";
 401
 402         pinctrl-names = "default";
 403         pinctrl-0 = <&cp0_rgmii1_pins>;
 404
 405         phy = <&eth2phy>;
 406         phy-mode = "rgmii-id";
 407 };
 408
 409 /* SMSC USB5434B hub */
 410 &cp0_usb3_0 {
 411         status = "okay";
 412
 413         phys = <&cp0_comphy1 0>;
 414         phy-names = "cp0-usb3h0-comphy";
 415 };
 416
 417 /* miniPCI-E USB */
 418 &cp0_usb3_1 {
 419         status = "okay";
 420 };
 421
 422 &cp0_sata0 {
 423         status = "okay";
 424
 425         /* 7 + 12 SATA connector (J24) */
 426         sata-port@0 {
 427                 phys = <&cp0_comphy2 0>;
 428                 phy-names = "cp0-sata0-0-phy";
 429         };
 430
 431         /* M.2-2250 B-key (J39) */
 432         sata-port@1 {
 433                 phys = <&cp0_comphy3 1>;
 434                 phy-names = "cp0-sata0-1-phy";
 435         };
 436 };
 437
 438 /* miniPCI-E (J5) */
 439 &cp0_pcie2 {
 440         status = "okay";
 441
 442         pinctrl-names = "default";
 443         pinctrl-0 = <&cp0_pcie_reset_pins>;
 444         phys = <&cp0_comphy5 2>;
 445         phy-names = "cp0-pcie2-x1-phy";
 446         reset-gpio = <&cp0_gpio1 9 GPIO_ACTIVE_LOW>;
 447         ranges = <0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x8000000>;
 448 };