target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981-rfb.dts

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /*
   3  * Copyright (C) 2022 MediaTek Inc.
   4  * Author: Sam.Shih <sam.shih@mediatek.com>
   5  */
   6
   7 /dts-v1/;
   8 #include "mt7981.dtsi"
   9
  10 / {
  11         model = "MediaTek MT7981 RFB";
  12         compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
  13
  14         aliases {
  15                 serial0 = &uart0;
  16         };
  17
  18         chosen {
  19                 stdout-path = "serial0:115200n8";
  20         };
  21
  22         memory {
  23                 reg = <0 0x40000000 0 0x20000000>;
  24         };
  25
  26         reg_3p3v: regulator-3p3v {
  27                 compatible = "regulator-fixed";
  28                 regulator-name = "fixed-3.3V";
  29                 regulator-min-microvolt = <3300000>;
  30                 regulator-max-microvolt = <3300000>;
  31                 regulator-boot-on;
  32                 regulator-always-on;
  33         };
  34
  35         reg_5v: regulator-5v {
  36                 compatible = "regulator-fixed";
  37                 regulator-name = "fixed-5V";
  38                 regulator-min-microvolt = <5000000>;
  39                 regulator-max-microvolt = <5000000>;
  40                 regulator-boot-on;
  41                 regulator-always-on;
  42         };
  43
  44         gpio-keys {
  45                 compatible = "gpio-keys";
  46                 reset {
  47                         label = "reset";
  48                         linux,code = <KEY_RESTART>;
  49                         gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  50                 };
  51                 wps {
  52                         label = "wps";
  53                         linux,code = <KEY_WPS_BUTTON>;
  54                         gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
  55                 };
  56         };
  57 };
  58
  59 &eth {
  60         status = "okay";
  61
  62         gmac0: mac@0 {
  63                 compatible = "mediatek,eth-mac";
  64                 reg = <0>;
  65                 phy-mode = "2500base-x";
  66
  67                 fixed-link {
  68                         speed = <2500>;
  69                         full-duplex;
  70                         pause;
  71                 };
  72         };
  73
  74         gmac1: mac@1 {
  75                 compatible = "mediatek,eth-mac";
  76                 reg = <1>;
  77                 phy-mode = "gmii";
  78                 phy-handle = <&int_gbe_phy>;
  79         };
  80 };
  81
  82 &mdio_bus {
  83         switch: switch@1f {
  84                 compatible = "mediatek,mt7531";
  85                 reg = <31>;
  86                 interrupt-controller;
  87                 #interrupt-cells = <1>;
  88                 interrupt-parent = <&pio>;
  89                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
  90                 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
  91         };
  92 };
  93
  94 &crypto {
  95         status = "okay";
  96 };
  97
  98 &pio {
  99         spi0_flash_pins: spi0-pins {
 100                 mux {
 101                         function = "spi";
 102                         groups = "spi0", "spi0_wp_hold";
 103                 };
 104                 conf-pu {
 105                         pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
 106                         drive-strength = <MTK_DRIVE_8mA>;
 107                         bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
 108                 };
 109                 conf-pd {
 110                         pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
 111                         drive-strength = <MTK_DRIVE_8mA>;
 112                         bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
 113                 };
 114         };
 115
 116 };
 117
 118 &spi0 {
 119         pinctrl-names = "default";
 120         pinctrl-0 = <&spi0_flash_pins>;
 121         cs-gpios = <0>, <0>;
 122         #address-cells = <1>;
 123         #size-cells = <0>;
 124         status = "disabled";
 125 };
 126
 127 &switch {
 128         ports {
 129                 #address-cells = <1>;
 130                 #size-cells = <0>;
 131
 132                 port@0 {
 133                         reg = <0>;
 134                         label = "lan1";
 135                 };
 136
 137                 port@1 {
 138                         reg = <1>;
 139                         label = "lan2";
 140                 };
 141
 142                 port@2 {
 143                         reg = <2>;
 144                         label = "lan3";
 145                 };
 146
 147                 port@3 {
 148                         reg = <3>;
 149                         label = "lan4";
 150                 };
 151
 152                 sw_p5: port@5 {
 153                         reg = <5>;
 154                         label = "lan5";
 155                         status = "disabled";
 156                 };
 157
 158                 port@6 {
 159                         reg = <6>;
 160                         ethernet = <&gmac0>;
 161                         phy-mode = "2500base-x";
 162
 163                         fixed-link {
 164                                 speed = <2500>;
 165                                 full-duplex;
 166                                 pause;
 167                         };
 168                 };
 169         };
 170 };
 171
 172 &xhci {
 173         vusb33-supply = <&reg_3p3v>;
 174         vbus-supply = <&reg_5v>;
 175         status = "okay";
 176 };
 177
 178 &uart0 {
 179         status = "okay";
 180 };
 181
 182 &usb_phy {
 183         status = "okay";
 184 };
 185
 186 &watchdog {
 187         status = "okay";
 188 };